Memory access method, device and equipment and computer readable storage medium

Abstract

The invention discloses a memory access method, device and equipment and a computer readable storage medium. The memory access method comprises the following steps: acquiring a use thread count corresponding to each non-uniform storage access domain; obtaining a thread count and maximum bandwidth comparison table respectively corresponding to each non-consistent storage access domain obtained by testing; wherein the thread count and maximum bandwidth comparison table comprises corresponding relation groups among the used thread count, the distributed thread count of each memory and the maximum bandwidth; each memory comprises a memory in each non-uniform storage access domain and a memory connected with each calculation expression; searching the distributed thread count of each memory corresponding to each used thread count from a comparison table of each thread count and the maximum bandwidth; and performing thread allocation according to the allocation thread count of each memory, and accessing each memory by using each allocated thread. According to the method and the device, a user debugging process is avoided, the accuracy of the obtained access bandwidth is improved, and the additional bandwidth provided by the computing expression connection equipment is fully utilized.

Description

Technical Field

[0001] The present invention relates to the field of storage technology, and in particular to a memory access method, device, equipment and computer-readable storage medium. Background Art

[0002] As dynamic random access memory products are gradually unable to meet the processor's needs for data capacity and bandwidth, Compute eXpress Link (CXL) memory is introduced to provide additional memory.

[0003] Most simulations based on multiple non-uniform memory access systems cannot accurately model and characterize the running Compute Expression Connected Memory, and the characterization is very different from the actual Compute Expression Connected Memory. Since Compute Expression Connected Memory is remote memory for all cores, multi-threaded software will only use main memory in the near non-uniform memory access domain and cannot fully utilize the additional data bandwidth provided by Compute Expression Connected Memory. Using Compute Expression Connected Memory by modifying the binding strategy between memory and threads requires users to have a certain understanding of the platform Compute Expression Connected Memory performance.

[0004] In summary, how to effectively solve the problems of large differences between simulated representation and real representation, inability to use computing expression connection devices to provide additional bandwidth, and high requirements for user computing expression connection memory-related knowledge are issues that technical personnel in this field urgently need to solve. Summary of the invention

[0005] The purpose of the present invention is to provide a memory access method, which avoids the user debugging process, improves the accuracy of the access bandwidth obtained, and fully utilizes the additional bandwidth provided by the computing expression connection device; another purpose of the present invention is to provide a memory access device, equipment and computer-readable storage medium.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0007] A memory access method, comprising:

[0008] Obtain the number of threads used corresponding to each non-uniform storage access domain;

[0009] Obtain a comparison table of the number of threads and the maximum bandwidth corresponding to each non-uniform storage access domain obtained by the test; wherein the comparison table of the number of threads and the maximum bandwidth includes each corresponding relationship group between the number of used threads, the number of allocated threads of each memory, and the maximum bandwidth; each memory includes the memory in each non-uniform storage access domain and each computing expression connection memory;

[0010] Find the number of allocated threads for each memory corresponding to each number of used threads from the comparison table of each number of threads and maximum bandwidth;

[0011] Threads are allocated according to the number of threads allocated to each memory, and each memory is accessed using each allocated thread.

[0012] In a specific implementation of the present invention, obtaining the number of threads used corresponding to each non-uniform storage access domain includes:

[0013] Determine whether there are designated numbers of use threads corresponding to each inconsistency memory access domain; wherein the sum of the designated numbers of use threads is the first number of threads;

[0014] If yes, then the designated number of use threads corresponding to each non-uniform storage access domain is determined as the number of use threads corresponding to each non-uniform storage access domain;

[0015] If not, the number of used threads corresponding to each non-uniform memory access domain is determined by evenly dividing the number of threads among the non-uniform memory access domains.

[0016] In a specific implementation of the present invention, determining the number of threads corresponding to each non-uniform storage access domain in a manner of evenly dividing the number of threads among the non-uniform storage access domains includes:

[0017] When the multi-threaded software runs with a first number of threads, the number of inconsistency memory access domains of the current platform is obtained;

[0018] The first number of threads is evenly divided according to the number of the non-uniform storage access domains to obtain the number of used threads corresponding to each non-uniform storage access domain.

[0019] In a specific implementation of the present invention, evenly dividing the first number of threads according to the number of the non-uniform storage access domains to obtain the number of used threads corresponding to each non-uniform storage access domain includes:

[0020] Determine whether the first number of threads is divisible by the number of non-uniform storage access domains;

[0021] If yes, then performing the step of equally dividing the first number of threads according to the number of the non-uniform storage access domains to obtain the number of used threads corresponding to each non-uniform storage access domain;

[0022] If not, dividing the first number of threads by the number of non-uniform storage access domains to obtain a quotient and a remainder;

[0023] Randomly select non-uniform storage access domains with the remainder number from each non-uniform storage access domain, add 1 to the quotient value and determine it as the number of used threads corresponding to the non-uniform storage access domains selected from each non-uniform storage access domain;

[0024] The quotient value is determined as the number of used threads corresponding to the non-uniform storage access domains that are not selected in each non-uniform storage access domain.

[0025] In a specific implementation of the present invention, obtaining a comparison table of the number of threads and the maximum bandwidth corresponding to each non-uniform storage access domain respectively obtained by testing with a benchmark testing tool includes:

[0026] Get the total number of threads of a preset single non-uniform storage access domain;

[0027] By using a benchmark test tool, the corresponding relationship between thread allocation and access bandwidth is tested for each non-uniform storage access domain according to the total number of threads, so as to obtain a bandwidth and thread allocation comparison table corresponding to each non-uniform storage access domain; wherein the bandwidth and thread allocation comparison table contains the corresponding relationship between the number of allocated threads and the access bandwidth for threads in the current non-uniform storage access domain to access each memory;

[0028] For each non-uniform storage access domain, an exhaustive enumeration method is used to combine the bandwidth corresponding to the non-uniform storage access domain with each thread number in the thread allocation comparison table to obtain an array of thread numbers including the number of threads used by each non-uniform storage access domain, corresponding to each number of used threads between 0 and the total number of threads;

[0029] For each number of used threads between 0 and the total number of threads, the total bandwidths corresponding to each thread number array are calculated according to the access bandwidths corresponding to the number of used threads of each non-uniform storage access domain in each thread number array;

[0030] Determine the maximum value among the total bandwidths as the maximum access bandwidth of the current non-uniform storage access domain under the condition of the current number of used threads;

[0031] Obtain an array of current thread numbers corresponding to the maximum access bandwidth;

[0032] The current thread number array, the currently used thread number and the maximum access bandwidth are recorded correspondingly to obtain a comparison table of each thread number and the maximum bandwidth.

[0033] In a specific implementation of the present invention, using each allocated thread to access each memory includes:

[0034] Each thread that has completed the allocation is used to access the memory in each non-uniform storage access domain and the memory connected to each computational expression.

[0035] In a specific implementation of the present invention, after using each allocated thread to access the memory in each non-uniform storage access domain and each computational expression connection memory, the method further includes:

[0036] The memory access distribution of each thread to each non-uniform storage access domain that has completed the memory access allocation is recorded. A memory access device includes:

[0037] A module for obtaining the number of used threads, used to obtain the number of used threads corresponding to each non-uniform storage access domain;

[0038] A thread number and maximum bandwidth comparison table acquisition module is used to obtain a thread number and maximum bandwidth comparison table corresponding to each non-uniform storage access domain obtained by a benchmark test tool; wherein the thread number and maximum bandwidth comparison table contains corresponding relationship groups between the number of used threads, the number of allocated threads for each memory, and the maximum bandwidth; each memory includes the memory in each non-uniform storage access domain and each computing expression connection memory;

[0039] The allocated thread number search module is used to search the allocated thread number of each memory corresponding to each used thread number from the comparison table of each thread number and maximum bandwidth;

[0040] The memory access module is used to allocate threads according to the number of allocated threads of each memory, and use each allocated thread to access each memory.

[0041] A memory access device, comprising:

[0042] Memory for storing computer programs;

[0043] A processor is used to implement the steps of the memory access method as described above when executing the computer program.

[0044] A computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the memory access method described above are implemented.

[0045] The memory access method provided by the present invention obtains the number of used threads corresponding to each non-consistent storage access domain; obtains a comparison table of the number of threads and the maximum bandwidth corresponding to each non-consistent storage access domain obtained by testing; wherein the comparison table of the number of threads and the maximum bandwidth contains corresponding relationship groups among the number of used threads, the number of threads allocated to each memory, and the maximum bandwidth; each memory includes the memory in each non-consistent storage access domain and each calculation expression connection memory; respectively searches for the number of allocated threads of each memory corresponding to each number of used threads from the comparison table of each number of threads and the maximum bandwidth; performs thread allocation according to the number of threads allocated to each memory, and uses each allocated thread to access each memory.

[0046] It can be seen from the above technical solution that the comparison table of the number of threads and the maximum bandwidth corresponding to each non-consistent storage access domain is obtained through the benchmark test tool. According to the comparison table of the number of threads and the maximum bandwidth, the thread allocation strategy corresponding to the maximum access bandwidth under a specific thread condition is obtained, and the automatic acquisition of the optimal configuration parameters is realized, avoiding the user debugging process. By using different numbers of threads to actually access the computational expression connection memory, the measured access bandwidth is obtained. Compared with the simulation data, the measured data improves the accuracy of the obtained access bandwidth, providing a reliable guarantee for thread operation optimization. By performing access tests on both the memory in the non-consistent storage access domain and the computational expression connection memory, the optimal thread allocation scheme is not limited to allocating threads to the memory in the non-consistent storage access domain, thereby realizing full utilization of the additional bandwidth provided by the computational expression connection device.

[0047] Correspondingly, the present invention also provides a memory access device, equipment and computer-readable storage medium corresponding to the above-mentioned memory access method, which have the above-mentioned technical effects and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0049] FIG1 is a flowchart of an implementation of a memory access method according to an embodiment of the present invention;

[0050] FIG2 is another implementation flow chart of the memory access method in an embodiment of the present invention;

[0051] FIG3 is a structural block diagram of a memory access device according to an embodiment of the present invention;

[0052] FIG4 is a structural block diagram of a memory access device according to an embodiment of the present invention;

[0053] FIG5 is a schematic diagram of a specific structure of a memory access device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0054] In modern high-performance computers, the memory wall has gradually become the main limiting factor for software performance improvement. This is mainly due to two factors:

[0055] The growth rate of the number of cores in mainstream central processing unit (CPU) products has far exceeded the expansion rate of single-core memory capacity and bandwidth. As this trend continues, data movement has gradually become the main bottleneck for memory-dependent workloads. Current CPU manufacturers are also trying to solve this problem by increasing the number of memory channels in a single CPU. However, adding more memory channels comes at a cost in terms of pins and routing complexity. Manufacturers are also trying other alternatives to increase memory capacity and bandwidth, such as two DIMM slots per channel (2 DIMMs perchannel, 2DPC) and 3D stacking to integrate other types of memory packaging technologies such as High Bandwidth Memory (HBM), but these measures come at the expense of memory bandwidth or increase product costs. Therefore, memory is increasingly becoming an extremely critical bottleneck and valuable computing resource in the system.

[0056] A significant performance gap has formed between main memory and storage media. There is a huge latency gap between storage media such as dynamic random access memory (DRAM) and solid-state drives. As data demands continue to grow, complex workloads require more memory capacity to fit the data sets. Due to technical challenges, the industry is unable to scale memory capacity in a cost-effective manner that meets demand, so data-intensive workloads that process large data sets may experience excessive demand paging and input / output (IO) activity, which can result in significantly higher data access latency and lower performance.

[0057] As DRAM memory products are gradually unable to meet the processor's needs for data capacity and bandwidth, processor manufacturers have begun to expand memory based on Compute Express Connect, trying to provide additional memory capacity and bandwidth beyond ordinary DRAM memory. Compute Express Connect is a cache coherent system built on the Peripheral Component Interconnect Express (PCIe) physical layer. This standard defines three independent protocols: CXL.io, CXL.cache, and CXL.mem. CXL.mem allows memory access between devices and hosts.

[0058] Compute Express Connected Memory Extension provides additional memory in the form of Non Uniform Memory Access (NUMA) nodes in the operating system. Non Uniform Memory Access domains are established based on access latency, with the local dynamic random access memory connected to the CPU socket forming the faster near-NUMA domain, while Compute Express Connected Memory acts as a relatively slower far-NUMA domain due to its higher access latency. Current operating systems such as Linux already have the ability to perform non-uniform access tiering / balancing. Compute Express Connected Memory Extension can be easily supported by hardware and software stacks without any modifications to the current setup.

[0059] For multi-threaded software, the parallel runtime library usually automatically binds the running core (thread) to the memory area used according to the non-uniform memory access domain provided by the operating system. In this case, since the computational expression connection memory is a remote memory for all cores, in the default scheduling algorithm, all multi-threaded software will only use the main memory in the near-end non-uniform memory access domain and cannot fully utilize the additional data bandwidth provided by the computational expression connection memory.

[0060] Most of the research on computationally expressive connected memory is based on simulations using multiple non-uniform memory access systems, which may not accurately model and characterize computationally expressive connected memory in operation. According to some related research results, real computationally expressive connected memory has higher latency and less memory bandwidth compared to theoretical performance indicators.

[0061] The user can also modify the memory binding policy of multi-threaded software operation through commands such as the non-uniform storage access control tool (numactl). However, this method requires the user to have a certain understanding of the platform's computing expression connection memory performance, and also requires continuous attempts at memory usage for different non-uniform storage access domains. Otherwise, the full computing performance available on the platform cannot be fully utilized.

[0062] To this end, the memory access method provided in the present invention avoids the user debugging process, improves the accuracy of bandwidth results, and fully utilizes the additional bandwidth provided by the computing expression connection device.

[0063] In order to enable those skilled in the art to better understand the scheme of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0064] Referring to FIG. 1 , FIG. 1 is a flowchart of an implementation of a memory access method in an embodiment of the present invention. The method may include the following steps:

[0065] S101: Obtain the number of used threads corresponding to each non-uniform memory access domain.

[0066] The threads of each non-uniform storage access domain constitute the total threads of the system. When memory access is required, such as access to the memory in each non-uniform storage access domain and the computational expression connection memory outside each non-uniform storage access domain, the threads of each non-uniform storage access domain need to be used for memory access. The number of threads used for each non-uniform storage access domain can be pre-specified according to user needs, or the required threads can be obtained by averaging from each non-uniform storage access domain to obtain the number of threads used corresponding to each non-uniform storage access domain.

[0067] S102: Obtain a comparison table of the number of threads and the maximum bandwidth corresponding to each non-uniform memory access domain obtained through testing.

[0068] The comparison table of the number of threads and the maximum bandwidth includes corresponding relationship groups among the number of used threads, the number of allocated threads of each memory, and the maximum bandwidth; each memory includes the memory in each non-uniform storage access domain and each computing expression connection memory.

[0069] A comparison table of the number of threads and the maximum bandwidth corresponding to each non-uniform storage access domain is pre-established. The comparison table of the number of threads and the maximum bandwidth includes the corresponding relationship groups between the number of used threads, the number of allocated threads for each memory, and the maximum bandwidth. Each memory includes the memory in each non-uniform storage access domain and each computing expression connection memory. After obtaining the number of used threads corresponding to each non-uniform storage access domain, the comparison table of the number of threads and the maximum bandwidth corresponding to each non-uniform storage access domain obtained by testing is obtained.

[0070] S103: respectively searching for the number of allocated threads for each memory corresponding to each number of used threads from a comparison table of each number of threads and maximum bandwidth.

[0071] The thread number and maximum bandwidth comparison table corresponding to each non-uniform memory access domain contains the number of threads allocated to each memory corresponding to each number of used threads. After obtaining the thread number and maximum bandwidth comparison table, the number of threads allocated to each memory corresponding to each number of used threads is searched from each thread number and maximum bandwidth comparison table.

[0072] S104: Perform thread allocation according to the number of allocated threads of each memory, and use each allocated thread to access each memory.

[0073] After finding the number of threads allocated to each memory corresponding to each number of threads in use, threads are allocated according to the number of threads allocated to each memory, and each memory is accessed using each allocated thread. This achieves automatic acquisition of optimal configuration parameters, avoids the user debugging process, and improves memory access efficiency.

[0074] It can be seen from the above technical solution that the comparison table of the number of threads and the maximum bandwidth corresponding to each non-consistent storage access domain is obtained through the benchmark test tool. According to the comparison table of the number of threads and the maximum bandwidth, the thread allocation strategy corresponding to the maximum access bandwidth under a specific thread condition is obtained, and the automatic acquisition of the optimal configuration parameters is realized, avoiding the user debugging process. By using different numbers of threads to actually access the computational expression connection memory, the measured access bandwidth is obtained. Compared with the simulation data, the measured data improves the accuracy of the obtained access bandwidth, providing a reliable guarantee for thread operation optimization. By performing access tests on both the memory in the non-consistent storage access domain and the computational expression connection memory, the optimal thread allocation scheme is not limited to allocating threads to the memory in the non-consistent storage access domain, thereby realizing full utilization of the additional bandwidth provided by the computational expression connection device.

[0075] It should be noted that, based on the above embodiment, the embodiment of the present invention also provides corresponding improved solutions. In the subsequent embodiments, the same steps or corresponding steps as those in the above embodiment can be referenced to each other, and the corresponding beneficial effects can also be referenced to each other, which will not be repeated one by one in the following improved embodiments.

[0076] Referring to FIG. 2 , FIG. 2 is another implementation flow chart of the memory access method in an embodiment of the present invention. The method may include the following steps:

[0077] S201: Obtain the number of used threads corresponding to each non-uniform storage access domain.

[0078] S202: Obtain the total number of threads of a preset single non-uniform storage access domain.

[0079] The total number of threads in each non-uniform storage access domain is the same, the total number of threads in a single non-uniform storage access domain is preset, and the preset total number of threads in the single non-uniform storage access domain is obtained.

[0080] It should be noted that the total number of threads in a single non-uniform memory access domain can be set and adjusted according to actual conditions, and the embodiment of the present invention does not limit this. For example, it can be set to 52.

[0081] S203: Using a benchmark test tool to test the correspondence between thread allocation and access bandwidth for each non-uniform memory access domain according to the total number of threads, and obtaining a bandwidth and thread allocation comparison table corresponding to each non-uniform memory access domain.

[0082] The bandwidth and thread allocation comparison table includes the corresponding relationship between the number of allocated threads and the access bandwidth for threads in the current non-uniform memory access domain to access each memory.

[0083] After obtaining the total number of threads of a preset single non-uniform memory access domain, the corresponding relationship between thread allocation and access bandwidth of each non-uniform memory access domain is tested by the benchmark tool according to the total number of threads. For example, the sustainable memory bandwidth benchmark (STREAM) tool can be used to test the corresponding relationship between thread allocation and access bandwidth of each non-uniform memory access domain according to the total number of threads, and a bandwidth and thread allocation comparison table corresponding to each non-uniform memory access domain is obtained, thereby improving the accuracy of bandwidth results through measured data and providing a reliable guarantee for thread operation optimization. The sustainable memory bandwidth benchmark tool is fully utilized, and the test calculation process is simple and controllable. Through a simple vector calculation process, the memory sustained bandwidth can be tested. In multi-threaded software, the measured memory bandwidth often differs greatly from the theoretical value when the number of threads changes. The measured data can provide more accurate bandwidth results and provide a reliable guarantee for thread operation optimization.

[0084] The embodiment of the present invention may also include an update process for the bandwidth and thread allocation comparison table, and the bandwidth and thread allocation comparison table update cycle may be pre-set, and the bandwidth value under each thread number array may be obtained again by the exhaustive enumeration method according to the preset bandwidth and thread allocation comparison table update cycle, and the maximum bandwidth value may be re-selected according to the currently obtained bandwidth value, so as to update the thread number and maximum bandwidth comparison table corresponding to each non-consistent storage access domain. By updating the bandwidth and thread allocation comparison table and the thread number and maximum bandwidth comparison table, the accuracy of the thread allocation reference basis is guaranteed, the full use of system resources is achieved, and the memory access efficiency is improved.

[0085] See Table 1, which is a bandwidth and thread allocation comparison table in an embodiment of the present invention.

[0086] Table 1

[0087]

[0088] Non-uniform memory access domain For example, assuming that the current platform has Non-uniform storage access domains, the total number of threads in each non-uniform storage access domain is , the memory bandwidth of accessing other non-uniform storage access domains varies with the number of threads as shown in Table 1. In the results, the number of threads is 0, and the corresponding access bandwidth Table 1 Indicates the use of non-uniform memory access domain A thread in the non-coherent memory access domain Memory bandwidth at Indicates the use of non-uniform memory access domain A thread in the non-coherent memory access domain Memory bandwidth at the time.

[0089] S204: For each non-uniform storage access domain, an exhaustive enumeration method is used to combine the bandwidth corresponding to the non-uniform storage access domain and the thread numbers in the thread allocation comparison table to obtain thread number arrays corresponding to each used thread number between 0 and the total number of threads, including the number of used threads of each non-uniform storage access domain.

[0090] After obtaining the bandwidth and thread allocation comparison table corresponding to each non-uniform storage access domain, for each non-uniform storage access domain, an exhaustive enumeration method is used to combine the thread numbers in the bandwidth and thread allocation comparison table corresponding to the non-uniform storage access domain to obtain an array of thread numbers including the number of threads used by each non-uniform storage access domain, corresponding to each number of used threads between 0 and the total number of threads.

[0091] Non-uniform memory access domain For example, when the user specifies that the total number of threads used in this non-uniform storage access domain is When , the optimal bandwidth result is Inconsistent memory access domains core, satisfying , while the total bandwidth Get the maximum value.

[0092] S205: For each number of used threads between 0 and the total number of threads, the total bandwidths corresponding to each thread number array are calculated according to the access bandwidths corresponding to the number of used threads of each non-uniform storage access domain in each thread number array.

[0093] After obtaining each thread number array, for each used thread number between 0 and the total thread number, the total bandwidth corresponding to each thread number array is calculated according to the access bandwidth corresponding to the used thread number of each non-consistent storage access domain in each thread number array, that is, the total bandwidth corresponding to the thread number array is obtained by summing up the access bandwidth corresponding to the used thread number of each non-consistent storage access domain in each thread number array.

[0094] S206: Determine the maximum value among the total bandwidths as the maximum access bandwidth of the current non-uniform storage access domain under the condition of the current number of used threads.

[0095] After calculating and obtaining the total bandwidths corresponding to each thread number array, the maximum value among the total bandwidths is determined as the maximum access bandwidth of the current non-uniform storage access domain under the condition of the current number of used threads.

[0096] S207: Obtain the current thread number array corresponding to the maximum access bandwidth.

[0097] After determining the maximum access bandwidth of the current non-uniform storage access domain under the condition of the currently used number of threads, an array of the current number of threads corresponding to the maximum access bandwidth is obtained.

[0098] S208: Correspondingly recording the current thread number array, the currently used thread number and the maximum access bandwidth, and obtaining a comparison table of each thread number and the maximum bandwidth.

[0099] The comparison table of the number of threads and the maximum bandwidth includes corresponding relationship groups among the number of used threads, the number of allocated threads of each memory, and the maximum bandwidth; each memory includes the memory in each non-uniform storage access domain and each computing expression connection memory.

[0100] After obtaining the current thread number array corresponding to the maximum access bandwidth under each thread condition, the current thread number array, the currently used thread number and the maximum access bandwidth are recorded accordingly to obtain a comparison table of the number of threads and the maximum bandwidth corresponding to each non-uniform storage access domain. By using the exhaustive enumeration method to list all possible combinations of thread numbers, and calculating the bandwidth value under each combination, the thread number combination corresponding to the maximum bandwidth value is selected according to the bandwidth value, which realizes the automatic acquisition of the optimal configuration parameters and improves the bandwidth access efficiency.

[0101] S209: respectively searching for the number of allocated threads for each memory corresponding to each number of used threads from the comparison table of each number of threads and maximum bandwidth.

[0102] S210: Perform thread allocation according to the number of allocated threads of each memory, and use each allocated thread to access each memory.

[0103] The embodiment of the present invention is applicable to multi-threaded software running in heterogeneous memory devices such as memory connected based on computational expression. By optimizing thread allocation for non-uniform storage access domains, the available data bandwidth of the software is increased, the running time of user-submitted programs is reduced, and the overall operating efficiency of supercomputing platforms and data centers is accelerated.

[0104] In a specific implementation of the present invention, using each allocated thread to access each memory may include the following steps:

[0105] Each thread that has completed the allocation is used to access the memory in each non-uniform storage access domain and the memory connected to each computational expression.

[0106] After threads are allocated according to the number of allocated threads for each memory, each allocated thread is used to access the memory in each non-uniform storage access domain and each computing expression connection memory, thereby using each thread obtained according to the thread allocation strategy corresponding to the maximum access bandwidth under a specific thread situation to perform memory access, thereby fully utilizing the additional bandwidth provided by the computing expression connection device.

[0107] In a specific implementation of the present invention, after using each allocated thread to access the memory in each non-uniform storage access domain and each computational expression connection memory, the method may further include the following steps:

[0108] The memory access distribution of each thread to each non-uniform storage access domain that has completed the memory access allocation is recorded.

[0109] After using each allocated thread to access the memory in each non-uniform storage access domain and each computational expression connection memory, the memory access distribution of each thread that has completed the memory access allocation to each non-uniform storage access domain is recorded. By recording the memory access distribution of each thread that has completed the memory access allocation to each non-uniform storage access domain, subsequent queries based on the recorded information are facilitated.

[0110] In a specific implementation of the present invention, obtaining the number of threads used corresponding to each non-uniform storage access domain may include the following steps:

[0111] Step 1: Determine whether there are designated numbers of threads corresponding to each non-uniform storage access domain, if yes, execute step 2, if no, execute step 3; wherein the sum of the designated numbers of threads is the first number of threads;

[0112] Step 2: determining the designated number of use threads corresponding to each non-uniform storage access domain as the number of use threads corresponding to each non-uniform storage access domain;

[0113] Step 3: Determine the number of threads used corresponding to each non-uniform memory access domain by evenly dividing the number of threads among the non-uniform memory access domains.

[0114] For the convenience of description, the above three steps can be combined for explanation.

[0115] Determine whether there is a specified number of threads corresponding to each non-consistent storage access domain. If so, it means that threads need to be allocated according to the number of threads specified by the user for each non-consistent storage access domain, and the specified number of threads corresponding to each non-consistent storage access domain is determined as the number of threads corresponding to each non-consistent storage access domain, and the sum of each specified number of threads is the first number of threads. If not, it means that the user has not specified the number of threads for each non-consistent storage access domain, and the number of threads corresponding to each non-consistent storage access domain is determined by evenly dividing the number of threads for each non-consistent storage access domain. By supporting users to specify the number of threads for each non-consistent storage access domain according to their needs, the flexibility of thread scheduling is improved and the user experience is enhanced.

[0116] In a specific implementation of the present invention, determining the number of threads corresponding to each non-uniform storage access domain in a manner of evenly dividing the number of threads in each non-uniform storage access domain may include the following steps:

[0117] Step 1: when the multi-threaded software runs with a first number of threads, the number of inconsistency memory access domains of the current platform is obtained;

[0118] Step 2: Evenly divide the first number of threads according to the number of non-uniform memory access domains to obtain the number of used threads corresponding to each non-uniform memory access domain.

[0119] For the convenience of description, the above two steps can be combined for explanation.

[0120] When it is determined that there is no designated number of threads corresponding to each non-consistent storage access domain, if the multi-threaded software runs with the first number of threads, the number of non-consistent storage access domains of the current platform is obtained, and the first number of threads is evenly divided according to the number of non-consistent storage access domains to obtain the number of threads corresponding to each non-consistent storage access domain. When there is no designated number of threads corresponding to each non-consistent storage access domain, thread calls are made in a manner that the number of threads occupied by each non-consistent storage access domain is evenly divided, so that load balancing of thread calls in each non-consistent storage access domain is achieved, and the stability of system operation is improved.

[0121] In a specific implementation of the present invention, evenly dividing the first number of threads according to the number of non-uniform storage access domains to obtain the number of used threads corresponding to each non-uniform storage access domain may include the following steps:

[0122] Step 1: determine whether the first thread number is divisible by the number of non-uniform storage access domains, if so, execute step 2, if not, execute step 3;

[0123] Step 2: Evenly divide the first number of threads according to the number of non-uniform memory access domains to obtain the number of used threads corresponding to each non-uniform memory access domain;

[0124] Step 3: Perform a division operation on the first thread number and the number of non-uniform storage access domains to obtain a quotient and a remainder;

[0125] Step 4: randomly selecting non-uniform memory access domains with the remainder number from each non-uniform memory access domain, and adding 1 to the quotient value to determine the number of used threads corresponding to the non-uniform memory access domain selected from each non-uniform memory access domain;

[0126] Step 5: Determine the quotient value as the number of used threads corresponding to the non-uniform memory access domains that are not selected in each non-uniform memory access domain.

[0127] For the convenience of description, the above five steps can be combined for explanation.

[0128] When it is determined that there is no designated number of use threads corresponding to each non-consistent storage access domain, determine whether the first number of threads is divisible by the number of non-consistent storage access domains; if so, divide the first number of threads equally according to the number of non-consistent storage access domains to obtain the number of use threads corresponding to each non-consistent storage access domain; if not, divide the first number of threads by the number of non-consistent storage access domains to obtain a quotient and a remainder, randomly select non-consistent storage access domains with the number of remainders from each non-consistent storage access domain, add 1 to the quotient to determine it as the number of use threads corresponding to the non-consistent storage access domains selected from each non-consistent storage access domain, and determine the quotient as the number of use threads corresponding to the non-consistent storage access domains that are not selected from each non-consistent storage access domain. According to the embodiment of the present invention, when the multi-threaded software runs with a first number of threads and there is no designated number of threads corresponding to each non-consistent storage access domain, the number of threads in each non-consistent storage access domain is evenly divided when the first number of threads is divisible by the number of non-consistent storage access domains and the first number of threads is not divisible by the number of non-consistent storage access domains. In both cases, the number of threads in each non-consistent storage access domain is evenly divided as much as possible, thereby ensuring load balancing of thread calls in each non-consistent storage access domain.

[0129] Use exhaustive method to list all thread combinations, the number of threads used in each non-uniform storage access domain In total Results is the number of non-uniform storage access domains, The total number of threads used in this non-uniform memory access domain is specified by the user and the result is stored in a Dimensional array , where each dimension ranges The calculation expression corresponding to each feasible combination is as follows:

[0130] ;

[0131] in, For access to non-uniform memory access domain i, use The bandwidth corresponding to the number of threads when accessing each non-uniform storage access domain is represented by W. The total bandwidth at that time.

[0132] The code involved is as follows:

[0133] for(int i = 0; i < pow(N+1, M); i++){

[0134] tmp = i;

[0135] num_thread = 0;

[0136] for(int m = 0; m < M; m++){ / / Calculate the thread allocation combination corresponding to the iteration step

[0137] C[m] = tmp % (N+1) / / Number of threads allocated to the Mth NUMA domain

[0138] tmp = tmp / (N+1)

[0139] num_thread += C[m]

[0140] }

[0141] / / Determine whether the total number of threads exceeds the number of computing threads N

[0142] if(num_thread > N) continue;

[0143] / / Calculate the data bandwidth of all NUMA domains corresponding to this thread combination

[0144] W(i) = 0

[0145] for(int m = 0; m < M; m++)

[0146] W(i) += B(m, C[m])

[0147] }

[0148] Get After the result is obtained, the enumeration method can be used to calculate the number of threads used in a single non-uniform storage access domain: Maximum bandwidth under the condition And thread allocation method.

[0149] See Table 2, which is a bandwidth and thread allocation comparison table in an embodiment of the present invention.

[0150] Table 2

[0151]

[0152] The corresponding calculation code process is as follows:

[0153] BW[:] = 0 / / BW initialization

[0154] for(int i = 0; i < pow(N+1, M); i++){

[0155] num_thread = 0;

[0156] tmp = i

[0157] for(int m = 0; m < M; m++){ / / Calculate the thread allocation combination corresponding to the iteration step

[0158] C[m] = tmp % (N+1) / / Number of threads allocated to the Mth NUMA domain

[0159] tmp = tmp / (N+1)

[0160] num_thread += C[m]

[0161] }

[0162] / / Determine whether the total number of threads exceeds the number of computing threads N

[0163] if(num_thread > N) continue;

[0164] / / Determine whether the current bandwidth exceeds the corresponding BW_N

[0165] if(W(i) > BW[num_thread])

[0166] BW[num_thread] = W(i)

[0167] }

[0168] Corresponding to the above method embodiment, the present invention further provides a memory access device. The memory access device described below and the memory access method described above can be referenced to each other.

[0169] Referring to FIG. 3 , FIG. 3 is a structural block diagram of a memory access device according to an embodiment of the present invention, and the device may include:

[0170] A used thread number acquisition module 31 is used to acquire the number of used threads corresponding to each non-uniform storage access domain;

[0171] The thread number and maximum bandwidth comparison table acquisition module 32 is used to obtain the thread number and maximum bandwidth comparison table corresponding to each non-uniform storage access domain obtained by the test; wherein the thread number and maximum bandwidth comparison table contains the corresponding relationship groups between the number of used threads, the number of allocated threads for each memory, and the maximum bandwidth; each memory includes the memory in each non-uniform storage access domain and each computing expression connection memory;

[0172] The allocated thread number search module 33 is used to search the allocated thread number of each memory corresponding to each used thread number from the comparison table of each thread number and maximum bandwidth;

[0173] The memory access module 34 is used to perform thread allocation according to the number of allocated threads of each memory, and use each allocated thread to access each memory.

[0174] It can be seen from the above technical solution that the comparison table of the number of threads and the maximum bandwidth corresponding to each non-consistent storage access domain is obtained through the benchmark test tool. According to the comparison table of the number of threads and the maximum bandwidth, the thread allocation strategy corresponding to the maximum access bandwidth under a specific thread condition is obtained, and the automatic acquisition of the optimal configuration parameters is realized, avoiding the user debugging process. By using different numbers of threads to actually access the computational expression connection memory, the measured access bandwidth is obtained. Compared with the simulation data, the measured data improves the accuracy of the obtained access bandwidth, providing a reliable guarantee for thread operation optimization. By performing access tests on both the memory in the non-consistent storage access domain and the computational expression connection memory, the optimal thread allocation scheme is not limited to allocating threads to the memory in the non-consistent storage access domain, thereby realizing full utilization of the additional bandwidth provided by the computational expression connection device.

[0175] In a specific implementation of the present invention, the thread number acquisition module 31 includes:

[0176] A judgment submodule is used to judge whether there are designated numbers of use threads corresponding to each inconsistency storage access domain; wherein the sum of each designated number of use threads is the first number of threads;

[0177] A first submodule for determining the number of used threads, for determining the number of used threads corresponding to each non-uniform storage access domain as the number of used threads corresponding to each non-uniform storage access domain when it is determined that there is a designated number of used threads corresponding to each non-uniform storage access domain.

[0178] The second submodule for determining the number of used threads is used to determine the number of used threads corresponding to each non-uniform storage access domain by evenly dividing the number of threads among the non-uniform storage access domains when it is determined that there is no designated number of used threads corresponding to each non-uniform storage access domain.

[0179] In a specific implementation of the present invention, the second thread number determination submodule includes:

[0180] A non-uniform storage access domain number acquisition unit, used for acquiring the number of non-uniform storage access domains of the current platform when the multi-threaded software runs with a first number of threads;

[0181] The used thread number obtaining unit is used to evenly divide the first thread number according to the number of non-uniform storage access domains to obtain the used thread number corresponding to each non-uniform storage access domain.

[0182] In a specific implementation of the present invention, the thread number obtaining unit includes:

[0183] A determination subunit, used to determine whether the first number of threads is divisible by the number of non-uniform storage access domains;

[0184] A subunit for obtaining the number of used threads is configured to, when it is determined that the first number of threads is divisible by the number of non-uniform storage access domains, evenly divide the first number of threads according to the number of non-uniform storage access domains to obtain the number of used threads corresponding to each non-uniform storage access domain;

[0185] a quotient and remainder obtaining subunit, configured to, when it is determined that the first number of threads is not divisible by the number of non-uniform storage access domains, divide the first number of threads by the number of non-uniform storage access domains to obtain a quotient and a remainder;

[0186] A first thread number determination subunit is used to randomly select non-uniform storage access domains of the remainder number from each non-uniform storage access domain, and add 1 to the quotient value to determine the number of threads corresponding to the non-uniform storage access domain selected from each non-uniform storage access domain;

[0187] The second used thread number determination subunit is used to determine the quotient value as the used thread number corresponding to the non-uniform storage access domain that is not selected in each non-uniform storage access domain.

[0188] In a specific implementation of the present invention, the thread number and maximum bandwidth comparison table acquisition module 32 includes:

[0189] A total thread number acquisition submodule is used to acquire the total thread number of a preset single non-uniform storage access domain;

[0190] The module for obtaining the bandwidth and thread allocation comparison table is used to test the corresponding relationship between thread allocation and access bandwidth of each non-uniform storage access domain according to the total number of threads through a benchmark test tool, and obtain the bandwidth and thread allocation comparison table corresponding to each non-uniform storage access domain; wherein the bandwidth and thread allocation comparison table contains the corresponding relationship between the number of allocated threads and the access bandwidth for threads in the current non-uniform storage access domain to access each memory;

[0191] The thread number array obtaining submodule is used to combine the thread numbers in the bandwidth and thread allocation comparison table corresponding to the non-uniform storage access domain by an exhaustive enumeration method for each non-uniform storage access domain, and obtain the thread number arrays corresponding to the thread numbers between 0 and the total number of threads, which contain the thread numbers used by each non-uniform storage access domain;

[0192] A total bandwidth calculation submodule is used to calculate the total bandwidth corresponding to each thread number array according to the access bandwidth corresponding to each non-uniform storage access domain using thread number in each thread number array for each used thread number between 0 and the total thread number;

[0193] A maximum access bandwidth determination submodule, used to determine the maximum value of each total bandwidth as the maximum access bandwidth of the current non-uniform storage access domain under the condition of the current number of threads in use;

[0194] The current thread number array acquisition submodule is used to obtain the current thread number array corresponding to the maximum access bandwidth;

[0195] The submodule for obtaining the comparison table of the number of threads and the maximum bandwidth is used to record the current number of threads array, the currently used number of threads and the maximum access bandwidth in correspondence, and obtain the comparison table of the number of threads and the maximum bandwidth.

[0196] In a specific implementation of the present invention, the memory access module 34 is specifically a module that uses each allocated thread to access the memory in each non-uniform storage access domain and each computational expression connected memory.

[0197] In a specific embodiment of the present invention, the device may further include:

[0198] The memory access distribution recording module is used to record the memory access distribution of each thread that has completed the memory access allocation to each non-uniform storage access domain after each thread that has completed the memory access allocation accesses the memory in each non-uniform storage access domain and each computing expression connection memory.

[0199] Corresponding to the above method embodiment, referring to FIG. 4 , FIG. 4 is a schematic diagram of a memory access device provided by the present invention, and the device may include:

[0200] A memory 332, for storing computer programs;

[0201] The processor 322 is used to implement the steps of the memory access method of the above method embodiment when executing a computer program.

[0202] Specifically, please refer to Figure 5, which is a schematic diagram of the specific structure of a memory access device provided in this embodiment. The memory access device may have relatively large differences due to different configurations or performances, and may include a processor (central processing units, CPU) 322 (for example, one or more processors) and a memory 332, and the memory 332 stores one or more computer programs 342 or data 344. Among them, the memory 332 can be a temporary storage or a permanent storage. The program stored in the memory 332 may include one or more modules (not shown in the figure), and each module may include a series of instruction operations in the data processing device. Furthermore, the processor 322 can be configured to communicate with the memory 332 and execute a series of instruction operations in the memory 332 on the memory access device 301.

[0203] The memory access device 301 may further include one or more power supplies 326 , one or more wired or wireless network interfaces 350 , one or more input and output interfaces 358 , and / or one or more operating systems 341 .

[0204] The steps in the memory access method described above can be implemented by the structure of a memory access device.

[0205] Corresponding to the above method embodiment, the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the following steps can be implemented:

[0206] Obtain the number of used threads corresponding to each non-consistent storage access domain; obtain a comparison table of the number of threads and the maximum bandwidth corresponding to each non-consistent storage access domain obtained by testing; wherein the comparison table of the number of threads and the maximum bandwidth contains corresponding relationship groups among the number of used threads, the number of allocated threads of each memory, and the maximum bandwidth; each memory includes the memory in each non-consistent storage access domain and each computing expression connection memory; respectively search the number of allocated threads of each memory corresponding to each number of used threads from the comparison table of each number of threads and the maximum bandwidth; perform thread allocation according to the number of allocated threads of each memory, and use each allocated thread to access each memory.

[0207] The computer-readable storage medium may include: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program codes.

[0208] For an introduction to the computer-readable storage medium provided by the present invention, please refer to the above method embodiment, and the present invention will not be elaborated here.

[0209] Corresponding to the above method embodiments, the present invention further provides a computer program product, including a computer program, which implements the steps of the above memory access method when executed by a processor.

[0210] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the devices, equipment and computer-readable storage media disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0211] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the technical solution and core ideas of the present invention. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, the present invention can also be improved and modified, and these improvements and modifications also fall within the scope of protection of the present invention.

Claims

1. A memory access method, characterized in that: include: Obtain the number of threads used corresponding to each non-uniform storage access domain; Obtain a comparison table of the number of threads and the maximum bandwidth corresponding to each non-uniform storage access domain obtained by the test; wherein the comparison table of the number of threads and the maximum bandwidth includes each corresponding relationship group between the number of used threads, the number of allocated threads of each memory, and the maximum bandwidth; each memory includes the memory in each non-uniform storage access domain and each computing expression connection memory; Find the number of allocated threads for each memory corresponding to each number of used threads from the comparison table of each number of threads and maximum bandwidth; Threads are allocated according to the number of threads allocated to each memory, and each memory is accessed using each allocated thread.

2. The memory access method according to claim 1, characterized in that: Get the number of threads used by each non-uniform storage access domain, including: Determine whether there are designated numbers of use threads corresponding to each inconsistency memory access domain; wherein the sum of the designated numbers of use threads is the first number of threads; If yes, then the designated number of use threads corresponding to each non-uniform storage access domain is determined as the number of use threads corresponding to each non-uniform storage access domain; If not, the number of used threads corresponding to each non-uniform memory access domain is determined by evenly dividing the number of threads among the non-uniform memory access domains.

3. The memory access method according to claim 2, characterized in that: Determining the number of threads corresponding to each non-uniform storage access domain by evenly dividing the number of threads in each non-uniform storage access domain includes: When the multi-threaded software runs with a first number of threads, the number of inconsistency memory access domains of the current platform is obtained; The first number of threads is evenly divided according to the number of the non-uniform storage access domains to obtain the number of used threads corresponding to each non-uniform storage access domain.

4. The memory access method according to claim 3, characterized in that: The first number of threads is evenly divided according to the number of the non-uniform storage access domains to obtain the number of used threads corresponding to each non-uniform storage access domain, including: Determine whether the first number of threads is divisible by the number of non-uniform storage access domains; If yes, then performing the step of equally dividing the first number of threads according to the number of the non-uniform storage access domains to obtain the number of used threads corresponding to each non-uniform storage access domain; If not, dividing the first number of threads by the number of non-uniform storage access domains to obtain a quotient and a remainder; Randomly select non-uniform storage access domains with the remainder number from each non-uniform storage access domain, add 1 to the quotient value and determine it as the number of used threads corresponding to the non-uniform storage access domains selected from each non-uniform storage access domain; The quotient value is determined as the number of used threads corresponding to the non-uniform storage access domains that are not selected in each non-uniform storage access domain.

5. The memory access method according to claim 1, characterized in that: Obtain a comparison table of the number of threads and maximum bandwidth corresponding to each non-uniform storage access domain obtained from the test, including: Get the total number of threads of a preset single non-uniform storage access domain; By using a benchmark test tool, the corresponding relationship between thread allocation and access bandwidth is tested for each non-uniform storage access domain according to the total number of threads, so as to obtain a bandwidth and thread allocation comparison table corresponding to each non-uniform storage access domain; wherein the bandwidth and thread allocation comparison table contains the corresponding relationship between the number of allocated threads and the access bandwidth for threads in the current non-uniform storage access domain to access each memory; For each non-uniform storage access domain, an exhaustive enumeration method is used to combine the bandwidth corresponding to the non-uniform storage access domain with each thread number in the thread allocation comparison table to obtain an array of thread numbers including the number of threads used by each non-uniform storage access domain, corresponding to each number of used threads between 0 and the total number of threads; For each number of used threads between 0 and the total number of threads, the total bandwidths corresponding to each thread number array are calculated according to the access bandwidths corresponding to the number of used threads of each non-uniform storage access domain in each thread number array; Determine the maximum value among the total bandwidths as the maximum access bandwidth of the current non-uniform storage access domain under the condition of the current number of used threads; Obtain an array of current thread numbers corresponding to the maximum access bandwidth; The current thread number array, the currently used thread number and the maximum access bandwidth are recorded correspondingly to obtain a comparison table of each thread number and the maximum bandwidth.

6. The memory access method according to claim 1, characterized in that: Use the allocated threads to access each memory, including: Each thread that has completed the allocation is used to access the memory in each non-uniform storage access domain and the memory connected to each calculation expression.

7. The memory access method according to claim 6, characterized in that: After using each allocated thread to access the memory in each non-uniform storage access domain and each computation expression connection memory, the method further includes: The memory access distribution of each thread to each non-uniform storage access domain that has completed the memory access allocation is recorded.

8. A memory access device, characterized in that: include: A module for obtaining the number of used threads, used to obtain the number of used threads corresponding to each non-uniform storage access domain; A thread number and maximum bandwidth comparison table acquisition module is used to obtain a thread number and maximum bandwidth comparison table corresponding to each non-consistent storage access domain obtained by the test; wherein the thread number and maximum bandwidth comparison table contains each corresponding relationship group between the number of used threads, the number of allocated threads for each memory, and the maximum bandwidth; each memory includes the memory in each non-consistent storage access domain and each computing expression connection memory; The allocated thread number search module is used to search the allocated thread number of each memory corresponding to each used thread number from the comparison table of each thread number and maximum bandwidth; The memory access module is used to allocate threads according to the number of allocated threads of each memory, and use each allocated thread to access each memory.

9. A memory access device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the memory access method as claimed in any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the memory access method according to any one of claims 1 to 7 are implemented.

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