Embedded software anti-copy and anti-confusion protection system
By designing an embedded software anti-copying and confusion protection system, and using multi-module collaborative work, the reliability and maintenance difficulties of the microcontroller program protection method are solved, and efficient program protection and system stability are achieved.
Patent Information
- Application Number
- CN202411520381.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-29
- Publication Date
- 2025-01-24
AI Technical Summary
The existing microcontroller program protection methods have reliability problems, difficulty in maintaining, high costs, increased supply chain complexity and risks, and may encounter difficulties in system upgrade or maintenance, and are not suitable for mass production.
Design a embedded software anti -copy and confusion protection system, including the main control chip module, EEPROM storage module, input and output terminal module, swiping card and coin -drop signal processing module, encryption and verification module, abnormal processing module and code confusion module Through the collaborative work of these modules to achieve the encryption, verification, confusion and abnormal processing of the program.
It improves the security of the single -chip program, prevent copying and reverse engineering, enhances the system's anti -attack capabilities, ensures the reliability and stability of the system, and reduces the risk of faults.
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Figure CN119358001A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of information security, and in particular to an embedded software anti-copying and obfuscation protection system. Background Art
[0002] With the continuous advancement and popularization of single-chip microcomputer technology, single-chip microcomputer application systems have become the core control units in many products. The control programs in these systems often embody the hard work and creative labor of designers and are the key to product competitiveness. However, in the existing technology, although there are some methods such as Flash setting read protection, dedicated encryption chips, burning data buses, etc., which are used to protect the programs in the single-chip microcomputer from being copied, these methods have their own shortcomings. For example, although Flash setting read protection can effectively prevent the leakage of sensitive data or program codes, there are reliability problems and maintenance difficulties; although dedicated encryption chips have powerful encryption and decryption capabilities, they are costly and increase the complexity and risk of the supply chain; burning the data bus is an extreme hardware protection measure with irreversibility and damage risks.
[0003] Although the encryption of the microcontroller's unique ID program can improve the security of the program to a certain extent, due to the close coupling of the encryption program with other parts of the microcontroller, difficulties may be encountered during system upgrades or maintenance, and it is not suitable for mass production. The production steps are too complicated, and when errors are verified, the severity of the error will have a certain impact on the security of the system, thereby increasing the risk of system failure. For this reason, an embedded software anti-copying and obfuscation protection system is proposed. Summary of the invention
[0004] The present invention aims to provide an embedded software anti-copying and obfuscation protection system to solve the problems raised in the above background technology.
[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is:
[0006] The embedded software anti-copying and obfuscation protection system comprises a main control chip module, wherein the main control chip module is communicatively connected with an EEPROM storage module, an input and output terminal module, a card swiping and coin insertion signal processing module, an encryption and verification module, an exception handling module and a code obfuscation module, wherein the modules are electrically connected with each other;
[0007] The main control chip module is used to receive external signals (such as card swiping, coin insertion, etc.) and execute preset program logic, realize the on and off of the circuit through level control relay, and has a built-in unique UID (such as MCU serial number, MAC address, etc.) as the basis for encryption;
[0008] The EEPROM storage module is used to store the encryption key and configuration information generated by the main control chip module, and provide the key for decryption and verification;
[0009] The input and output terminal module is connected to the load to realize the actual control function of the circuit, receive the signal of the external device (such as the card swiping board, coin acceptor, etc.) and transmit it to the main control chip module;
[0010] The card swiping and coin insertion signal processing module, the card swiping board receives the card swiping signal and transmits it to the main control chip module through the serial port, and the coin acceptor receives the coin insertion information and feeds it back to the main control chip module through the level signal to realize the input function of user interaction;
[0011] The encryption and verification module is divided into program A and program B for encryption and decryption operations. Program A is the encryption process, and program B is the decryption and verification process. If the verification is correct, the program will run normally. If the verification is wrong, the severity of the error will be evaluated.
[0012] The exception handling module is used to analyze the security status of the system and implement corresponding exception handling measures in combination with the severity assessment result of the verification error;
[0013] The code obfuscation module is used to obfuscate the original code, change the structure and variable names of the program code, make the program code difficult to understand and analyze, and increase the difficulty of reverse engineering. Even if the firmware is copied and burned to other microcontrollers, the program execution path is difficult to predict and understand.
[0014] A further improvement of the technical solution of the present invention is that: in the main control chip module and the EEPROM storage module, the storage process of the encryption key and the configuration information is:
[0015] The main control chip module is connected to the external device (card swiping board, coin acceptor) through the input and output terminal module. When the external device sends a signal, the signal is transmitted to the main control chip module through the input and output terminal module. After receiving the signal, the main control chip module decodes and identifies the signal, and calls the corresponding preset program logic for processing according to the decoded signal content, and performs corresponding operations, including data calculation, state judgment, and control instruction output;
[0016] According to the execution result of the preset program logic, the main control chip module generates the corresponding relay control signal, and the control signal is output to the relay control terminal in the form of a level. After receiving the control signal, the relay acts according to its internal electromagnetic principle. When the control signal is at a high level, the relay is closed and the circuit is connected. When the control signal is at a low level, the relay is disconnected and the circuit is broken.
[0017] When encryption operation is required, the main control chip module reads its built-in unique UID. The UID is generated during the production process of the chip and is unique and cannot be copied. Using the read UID, the main control chip module cooperates with the encryption and verification module to perform encryption operations, using the UID as part of the key and combining it with the encryption algorithm to generate an encryption identifier;
[0018] After the encryption identifier is generated, the EEPROM storage module receives and stores the encryption key, and synchronously stores the configuration information of the device operating parameters, user settings, and software version. The configuration information is generated by the main control chip module according to system requirements.
[0019] A further improvement of the technical solution of the present invention is that: in the input / output terminal module, the process of receiving a signal from an external device and transmitting it to the main control chip module is:
[0020] The input and output terminal module consists of an input and output interface, an internal circuit and a protection element. The input interface is used to receive signals from external devices, and the output interface is used to output control signals to the load to achieve signal interaction with external devices, including receiving input signals and outputting control signals.
[0021] The interaction process between the input and output terminal module and the main control chip module is as follows: the main control chip module receives the signal from the input and output terminal module through its built-in interface circuit, and the received signal is decoded into a data format recognizable by the system for subsequent processing and judgment. The main control chip module calls the corresponding preset program logic for processing according to the decoded signal content. The processing process includes data calculation, state judgment, and control instruction generation;
[0022] According to the processing results, the main control chip module generates corresponding control signals and transmits them to the load through the output interface. The control signals include relay control signals, motor control signals, and LED indication signals.
[0023] A further improvement of the technical solution of the present invention is that in the card swiping and coin insertion signal processing module, the realization of the user interactive input function includes a card swiping signal processing process and a coin insertion signal processing process, specifically:
[0024] Card swiping signal processing process: the user brings the card (such as IC card, M1 card, etc.) close to the card swiping board, and the card reader module (FRID RC522 module) on the card swiping board transmits electromagnetic waves to the card through the antenna for communication. After the card senses the electromagnetic waves, it generates energy, receives and processes the information of the card reader module, and responds to the card reader module. After receiving the card information, the card reader module transmits the information to the I / O port of the microcontroller through the SPI bus communication method;
[0025] After receiving the information from the card reader module, the microcontroller processes the information through the program and sends the information to the main control chip module through the transparent transmission mode of the WiFi module. The main control chip module receives the card swiping information from the microcontroller through the serial port and performs subsequent processing.
[0026] Coin signal processing process: The user puts a coin into the coin selector, which uses photoelectric sensors and magnetic sensors to measure the diameter, thickness, weight, magnetism, and conductivity of the coin to verify and identify the authenticity and face value of the coin. Once the coin is verified, the coin selector generates a level signal, which is transmitted to the main control chip module through the output interface of the coin selector;
[0027] The main control chip module receives the level signal from the coin acceptor, determines whether the user has successfully inserted the coin based on the status of the signal, and then executes the corresponding program logic based on the coin information, including counting, storage, and output control signals. In the self-service vending machine, the card swiping signal is used to verify the user's identity and payment amount, while the coin insertion signal is used to increase the payment amount.
[0028] A further improvement of the technical solution of the present invention is that in the encryption and verification module, the process of encryption and decryption operation is:
[0029] Program A is the encryption process, and program B is the decryption and verification process. Program A reads the built-in UID from the main control chip module, uses the encryption algorithm and UID as part of the key, and uses program A to generate a unique encryption identifier. The UID will not be repeated and can be used to identify and distinguish different chips. The generated encryption identifier is used as the key for subsequent decryption and verification operations. Program A stores the generated encryption identifier in the EEPROM storage module;
[0030] Program B reads the stored encrypted identifier from the EEPROM storage module, uses the same decryption algorithm as program A, decrypts the read key, and uses the key as a reference to verify the UID of the current chip;
[0031] Program B reads the UID of the current main control chip module and verifies it with the decrypted key to confirm whether the current chip is the one used for the previous encryption;
[0032] If the verification is successful and the verification result shows that the UID matches the key, then program B believes that the current chip is legal and can run normally. If the verification is wrong and the verification result shows that the UID does not match the key, then program B believes that the current chip is illegal or tampered with, and then evaluates the severity of the error.
[0033] A further improvement of the technical solution of the present invention is that the error severity evaluation process is:
[0034] Collect relevant data about the occurrence of errors, including error logs and system monitoring data, organize and analyze the relevant data about the occurrence of errors to extract feature data related to error frequency and error duration, and evaluate the error frequency and error duration respectively;
[0035] Analyze the characteristic data of error frequency and determine the evaluation indicators of error frequency characteristics, which are single error frequency indicator, similar error frequency indicator and error frequency increase rate indicator. Combine the related data of each evaluation indicator to calculate the error frequency evaluation index and evaluate the occurrence and change trend of errors.
[0036] Analyze the characteristic data of error duration and determine the evaluation indicators of error duration characteristics, which are single error duration indicator, error impact time indicator and estimated repair time indicator. Combine the related data of each evaluation indicator to calculate the error interference evaluation index and evaluate the potential impact of the error.
[0037] Integrate the associated data of each feature, and combine the error frequency assessment index and error interference assessment index to calculate the error severity assessment coefficient, evaluate the comprehensive severity of the error, and comprehensively analyze the potential impact and harm of the error.
[0038] A further improvement of the technical solution of the present invention is that the calculation expression of the error frequency evaluation index is:
[0039]
[0040] Among them, FI is the error frequency evaluation index, FE is the single error frequency, that is, the number of times a specific error occurs per unit time, RE is the same type of error frequency, that is, the frequency of the same type of error occurring per unit time, TE is the error frequency increase rate, indicating the rising trend of the error frequency, and RE is the error frequency increase rate, indicating the rising trend of the error frequency. base is the reference value of the error frequency of the same type, TE max It is the maximum value of the error frequency increase rate, which is used to standardize TE. The value range of FI is 0 to 1;
[0041] The calculation expression of the error interference evaluation index is:
[0042]
[0043] Among them, EI is the error interference evaluation index, CE is the single error duration, that is, the time required for a specific error to be discovered and resolved, ET is the error impact time, that is, the duration of the error's impact on the system or business function, RT is the estimated repair time, that is, the total time required from the discovery of the error to complete repair, and ET is the error impact time. base is the reference value of the error impact time, HT maxIt is the maximum value of the estimated repair time and is used to standardize RT. The value range of EI is 0 to 1.
[0044] A further improvement of the technical solution of the present invention is that the calculation expression of the error severity evaluation coefficient is:
[0045]
[0046] Among them, E is the error severity assessment coefficient, FI is the error frequency assessment index, EI is the error interference assessment index, w1 is the weight coefficient of the error frequency assessment index, w2 is the weight coefficient of the error interference assessment index, and the value range of E is 0 to 1.
[0047] A further improvement of the technical solution of the present invention is that in the exception handling module, the analysis process of the system safety status is:
[0048] Verify online payment requests, including the legitimacy of payment amount, payment account, and receiving account information, and use verification algorithms (such as hash verification, digital signature, etc.) to verify the integrity and authenticity of the data. Evaluate the severity of the error based on the specific type (such as data format error, signature mismatch, insufficient account balance, etc.) and number of verification errors;
[0049] According to the calculation results of the error severity assessment coefficient, different safety status levels are divided into safety level, warning level, danger level and emergency level, and the corresponding safety assessment threshold is matched for each safety status level;
[0050] Based on the severity assessment results of the verification error, determine the safety status level of the verification error and implement corresponding exception handling measures;
[0051] Monitor the security status of the system in real time, including the frequency and severity of verification errors. When a warning or dangerous state occurs, the monitoring alarm is automatically triggered. All verification errors and the execution of exception handling measures are recorded. The logs are analyzed regularly to identify potential security issues and improvement points.
[0052] A further improvement of the technical solution of the present invention is that: the multiple security status levels correspond to the multiple security assessment thresholds, wherein the security assessment thresholds include an upper threshold and a lower threshold;
[0053] The multiple security status levels and the multiple security assessment thresholds satisfy the following relationship:
[0054] Safety level E L ≤E<1; the system is in good operating condition, no serious errors or abnormal behaviors are detected, the payment process can proceed normally, and no additional security measures are required;
[0055] Warning Level E M ≤E<E L ; The system detects some minor errors or abnormal behaviors, but these behaviors are not enough to affect the overall security of the system. Warning information needs to be recorded and sent to the administrator for monitoring. The user interface should display a warning prompt, but the payment process can continue;
[0056] Danger level E H ≤E<E M ; The errors or abnormal behaviors detected by the system are serious and may affect the security of the transaction. It is necessary to suspend the payment process and ask the user to reconfirm the payment information. Randomness is introduced to control the success or failure of the relay or card swiping and coin insertion to increase the difficulty for attackers to predict the system behavior;
[0057] Emergency level 0<E<E H ; The system detects very serious or high-risk errors that may pose a direct threat to system security. The payment process must be interrupted immediately, and an error message must be displayed, triggering a security alarm to notify the administrator for emergency processing. In extreme cases, the system may need to be shut down or the network connection may need to be disconnected to prevent further attacks;
[0058] Among them, E is the energy synergy evaluation coefficient, E L is the lower threshold corresponding to the safety level and the upper threshold corresponding to the warning level, E M is the lower threshold corresponding to the warning level and the upper threshold corresponding to the danger level, E H is the lower threshold corresponding to the danger level and the upper threshold corresponding to the emergency level, E L =0.9, E M =0.7, E H =0.5.
[0059] Due to the adoption of the above technical solution, the present invention has the following technical advances compared with the prior art:
[0060] 1. The present invention provides an embedded software anti-copying and obfuscation protection system. By introducing randomness to control the opening and closing of relays or the success or failure of swiping cards and coins, it increases the difficulty for attackers to predict the behavior of the system. The randomness makes it difficult for attackers to find predictable patterns in the system, thereby improving the system's anti-attack capability. In addition, when a serious error is detected, the system can immediately interrupt the payment process, trigger a security alarm, and notify the administrator for emergency processing, effectively preventing potential attacks and damages.
[0061] 2. The present invention provides an embedded software anti-copying and obfuscation protection system, which ensures the reliability and stability of the system through real-time monitoring and exception handling mechanisms, monitors the frequency and severity of verification errors in real time, and automatically triggers monitoring alarms when warning or dangerous conditions occur. The real-time monitoring and response mechanisms help to promptly discover and resolve potential problems, thereby reducing the risk of system failures and improving the stability and reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS
[0062] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.
[0063] Figure 1 It is a module structure diagram of the present invention;
[0064] Figure 2 A flowchart of the encryption and decryption operations of the present invention;
[0065] Figure 3 is a flow chart for evaluating the severity of errors of the present invention;
[0066] Figure 4 The figure is a flow chart for analyzing the safety status of the system of the present invention. DETAILED DESCRIPTION
[0067] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0068] Embodiment 1, as Figure 1 and Figure 2 As shown, the present invention provides an embedded software anti-copying and obfuscation protection system, including a main control chip module, the main control chip module is communicatively connected with an EEPROM storage module, an input and output terminal module, a card swiping and coin insertion signal processing module, an encryption and verification module, an exception processing module and a code obfuscation module, wherein the modules are electrically connected with each other;
[0069] The main control chip module is used to receive external signals (such as card swiping, coin insertion, etc.) and execute the preset program logic. It realizes the on and off of the circuit through the level control relay, and has a built-in unique UID (such as the serial number of the MCU, the MAC address, etc.). As the basis for encryption, the main control chip module is connected to the external device (card swiping board, coin acceptor) through the input and output terminal module. When the external device sends a signal, the signal is transmitted to the main control chip module through the input and output terminal module. After receiving the signal, the main control chip module decodes and identifies the signal, and according to the decoded signal content, calls the corresponding preset program logic for processing and performs corresponding operations, including data calculation, state judgment, and control instruction output. Assume that the execution result of the program logic, the main control chip module generates a corresponding relay control signal, and the control signal is output to the relay control end in the form of a level. After receiving the control signal, the relay acts according to its internal electromagnetic principle. When the control signal is at a high level, the relay is energized and the circuit is connected. When the control signal is at a low level, the relay is disconnected and the circuit is broken. When encryption operation is required, the main control chip module reads its built-in unique UID. The UID is formed during the production process of the chip and is unique and non-replicable. Using the read UID, the main control chip module cooperates with the encryption and verification module to perform encryption operations, and uses the UID as part of the key and combines it with the encryption algorithm to generate an encryption identifier;
[0070] The EEPROM storage module is used to store the encryption key and configuration information generated by the main control chip module, and provide the key for decryption and verification. The EEPROM storage module is connected to the main control chip module through the corresponding interface (I2C or SPI). When the system starts, the main control chip module initializes the communication interface with the EEPROM storage module, and configures the read and write parameters of the EEPROM storage module through the main control chip module, including the address range and the read and write speed. After the encryption identifier is generated, the EEPROM storage module receives the encryption key and stores it, and synchronously stores the configuration information of the device operating parameters, user settings, and software version. The configuration information is generated by the main control chip module according to system requirements. When data needs to be decrypted or the device identity needs to be verified, the main control chip module reads the encryption key and configuration information from the EEPROM storage module. During the reading process, the main control chip module extracts data according to the reading rules and address space of the EEPROM;
[0071] The input and output terminal module is connected to the load to realize the actual control function of the circuit, receive signals from external devices (such as card swiping boards, coin acceptors, etc.) and transmit them to the main control chip module. The input and output terminal module is composed of input and output interfaces, internal circuits and protection elements. The input interface is used to receive signals from external devices, and the output interface is used to output control signals to the load to realize signal interaction with external devices, including receiving input signals and outputting control signals. The interaction process between the input and output terminal module and the main control chip module is as follows: the main control chip module receives signals from the input and output terminal module through its built-in interface circuit, and the received signals are decoded into a data format recognizable by the system for subsequent processing and judgment. The main control chip module calls the corresponding preset program logic for processing according to the decoded signal content. The processing process includes data calculation, state judgment, and control instruction generation. According to the processing results, the main control chip module generates corresponding control signals and transmits them to the load through the output interface. The control signals include relay control signals, motor control signals, and LED indication signals.
[0072] Card swiping and coin insertion signal processing module: the card swiping board receives the card swiping signal and transmits it to the main control chip module through the serial port; the coin acceptor receives the coin insertion information and feeds it back to the main control chip module through the level signal to realize the input function of user interaction;
[0073] Furthermore, the implementation of the user interaction input function includes a card swipe signal processing process and a coin insertion signal processing process, specifically:
[0074] Card swiping signal processing process: the user brings the card (such as IC card, M1 card, etc.) close to the card swiping board, and the card reader module (FRID RC522 module) on the card swiping board transmits electromagnetic waves to the card through the antenna for communication. After the card senses the electromagnetic waves, it generates energy, receives and processes the information of the card reader module, and responds to the card reader module. After receiving the card information, the card reader module transmits the information to the I / O port of the microcontroller through the SPI bus communication method. After receiving the information from the card reader module, the microcontroller processes the information through the program on the one hand, and sends the information to the main control chip module through the transparent transmission mode of the WiFi module on the other hand. The main control chip module receives the card swiping information from the microcontroller through the serial port and performs subsequent processing;
[0075] Coin signal processing process: the user puts the coin into the coin selector, which uses photoelectric sensors and magnetic sensors to measure the diameter, thickness, weight, magnetism, and conductivity of the coin to verify and identify the authenticity and face value of the coin. Once the coin is verified, the coin selector generates a level signal, which is transmitted to the main control chip module through the output interface of the coin selector. The main control chip module receives the level signal from the coin selector and determines whether the user has successfully inserted the coin based on the status of the signal. Then, the corresponding program logic is executed based on the coin information, including counting, storage, and output control signals. In the self-service vending machine, the card swiping signal is used to verify the user's identity and payment amount, while the coin insertion signal is used to increase the payment amount.
[0076] The encryption and verification module is divided into program A and program B for encryption and decryption operations. Program A is the encryption process, and program B is the decryption and verification process. In program A, the UID of the main control chip module is read, and a unique encryption identifier is generated through the encryption algorithm and stored in the EEPROM storage module. In program B, the key in the EEPROM storage module is read for decryption and verified with the UID of the main control chip module. If the verification is correct, it runs normally. If the verification is wrong, the severity of the error is evaluated. Program A is the encryption process, and program B is the decryption and verification process. Program A reads the built-in UID from the main control chip module, uses the encryption algorithm and UID as part of the key, and uses program A to generate a unique encryption identifier. The UID will not be repeated and can be used to identify and distinguish different chips. The generated encryption identifier is used as the key for subsequent decryption and verification operations. Program A stores the generated encrypted identifier in the EEPROM storage module, and Program B reads the stored encrypted identifier from the EEPROM storage module, and uses the same decryption algorithm as Program A (because the encryption algorithm is usually irreversible, "decryption" refers to verifying the validity of the encrypted identifier rather than directly restoring the original UID), decrypts the read key, and uses the key as a reference to verify the UID of the current chip. Program B reads the UID of the current main control chip module and verifies it with the decrypted key to confirm whether the current chip is the chip used for the previous encryption. If the verification is successful and the verification result shows that the UID matches the key, then Program B believes that the current chip is legal and can run normally. If the verification is wrong and the verification result shows that the UID does not match the key, then Program B believes that the current chip is illegal or tampered with, and then evaluates the severity of the error;
[0077] The exception handling module is used to analyze the security status of the system based on the severity assessment results of the verification error and implement corresponding exception handling measures. When a verification error occurs, the module randomly controls whether the relay is turned on or whether the card swiping and coin insertion are successful, based on the size of the network payment amount. By introducing randomness, it further confuses the attacker's vision and increases the security of the system.
[0078] The code obfuscation module is used to confuse the original code, change the structure and variable names of the program code, make the program code difficult to understand and analyze, and increase the difficulty of reverse engineering. Even if the firmware is copied and burned to other MCUs, the program execution path is difficult to predict and understand.
[0079] Embodiment 2, as Figure 3 and Figure 4 As shown, based on Example 1, the present invention provides a technical solution: Preferably, the error severity evaluation process is:
[0080] Collect relevant data about the occurrence of errors, including error logs and system monitoring data; organize and analyze relevant data about the occurrence of errors to extract characteristic data related to error frequency and error duration; evaluate error frequency and error duration respectively; analyze characteristic data of error frequency; determine evaluation indicators of error frequency characteristics, namely, single error frequency indicator, similar error frequency indicator and error frequency increase rate indicator; combine the associated data of each evaluation indicator to calculate error frequency evaluation index; evaluate the occurrence and changing trend of errors; among them, single error frequency indicator records the number of times a specific error occurs in a unit time and analyzes its changing trend; similar error frequency indicator counts the frequency of occurrence of errors of the same type or category in a unit time to identify potential repetitive problems; error frequency increase rate indicator observes the rising or falling trend of error frequency and the emergence of new error types to predict future errors Frequency increase rate, analyze the characteristic data of error duration, determine the evaluation indicators of error duration characteristics, namely single error duration indicator, error impact time indicator and expected repair time indicator, integrate the associated data of each evaluation indicator, calculate the error interference evaluation index, and evaluate the potential impact of the error. Among them, the single error duration indicator measures the time required from the discovery to the resolution of a specific error, and analyzes the reasons for its change. The error impact time indicator evaluates the duration of the impact of the error on the system or business function, as well as the potential harm of this impact to users and organizations. The expected repair time indicator predicts the total time required from the discovery of the error to the complete repair and verification of error-free based on historical data and current conditions. Integrate the associated data of each feature, and integrate the error frequency evaluation index and error interference evaluation index to calculate the error severity evaluation coefficient, evaluate the comprehensive severity of the error, and comprehensively analyze the potential impact and harm of the error;
[0081] Furthermore, the calculation expression of the error frequency evaluation index is:
[0082]
[0083] Among them, FI is the error frequency evaluation index, FE is the single error frequency, that is, the number of times a specific error occurs per unit time, RE is the same type of error frequency, that is, the frequency of the same type of error occurring per unit time, TE is the error frequency increase rate, indicating the rising trend of the error frequency, and RE is the error frequency increase rate, indicating the rising trend of the error frequency. base is the reference value of the error frequency of the same type, TE max It is the maximum value of the error frequency increase rate, which is used to standardize TE. The value range of FI is 0 to 1. When the error frequency is low, FI is close to 1, and when the error frequency is high, FI is close to 0. As the error frequency increases, the evaluation index decreases, indicating that the severity of the error frequency increases;
[0084] The calculation expression of the error interference evaluation index is:
[0085]
[0086] Among them, EI is the error interference evaluation index, CE is the single error duration, that is, the time required for a specific error to be discovered and resolved, ET is the error impact time, that is, the duration of the error's impact on the system or business function, RT is the estimated repair time, that is, the total time required from the discovery of the error to complete repair, and ET is the error impact time. base is the reference value of the error impact time, HT max It is the maximum value of the estimated repair time and is used to standardize RT. The value range of EI is from 0 to 1. When the error interference is small (i.e., the error duration is short, the impact time is short, and the repair is fast), EI is close to 1. When the error interference is large (i.e., the error duration is long, the impact time is long, and the repair is slow), EI is close to 0. As the error interference increases, the evaluation index decreases, indicating that the severity of the error interference increases.
[0087] Furthermore, the calculation expression of the error severity evaluation coefficient is:
[0088]
[0089] Where, E is the error severity evaluation coefficient, FI is the error frequency evaluation index, EI is the error interference evaluation index, w1 is the weight coefficient of the error frequency evaluation index, w2 is the weight coefficient of the error interference evaluation index, and the value range of E is 0 to 1. When the error frequency and interference are both low (i.e., FI and EI are close to 1), E is close to 1. When the error frequency and interference are both high (i.e., FI and EI are close to 0), E is close to 0. As the error severity increases, the evaluation coefficient decreases, indicating that the comprehensive severity of the error increases. Applying the radical formula to FFEI helps smooth its impact on E and makes it more gradual. Applying the natural logarithm to EI helps to deal with its nonlinear characteristics and ensure that the impact on E is predictable.
[0090] In the exception handling module, the analysis process of the system security status is as follows:
[0091] Verify the online payment request, including the payment amount, payment account, and the legitimacy of the receiving account information, and use verification algorithms (such as hash verification, digital signature, etc.) to verify the integrity and authenticity of the data. Evaluate the severity of the error based on the specific type (such as data format error, signature mismatch, insufficient account balance, etc.) and number of verification errors. According to the calculation results of the error severity assessment coefficient, divide the security status into different levels, namely security level, warning level, danger level, and emergency level, and match the corresponding security assessment threshold for each security status level. Combined with the severity assessment results of the verification error, determine the security status level of the verification error, and implement corresponding exception handling measures. For the security level, no additional measures are required, and the payment process proceeds normally. For the warning level, record the warning information and send it to the administrator for monitoring and display it on the user interface. A warning prompt is displayed, but payment is not affected. For the danger level, the payment process is suspended and the user is required to reconfirm the payment information. A random control relay is introduced (such as randomly delaying the relay opening time) to increase the difficulty for attackers to predict system behavior. For the card swiping or coin insertion system, the card swiping or coin insertion is randomly controlled to be successful (such as simulating occasional card reading failures or coin insertion recognition errors). For the emergency level, the payment process is immediately interrupted and an error message is displayed, triggering a security alarm to notify the administrator for emergency processing. In extreme cases, the system can be shut down or the network connection can be disconnected to prevent further attacks. The security status of the system is monitored in real time, including the frequency and severity of verification errors. When a warning or danger state occurs, a monitoring alarm is automatically triggered to record all verification errors and the execution of abnormal handling measures. The logs are analyzed regularly to identify potential security issues and improvement points.
[0092] Further, the multiple security status levels correspond to multiple security assessment thresholds, wherein the security assessment threshold includes an upper threshold and a lower threshold;
[0093] Multiple security status levels and multiple security assessment thresholds satisfy the following relationship:
[0094] Safety level E L ≤E<1; the system is in good operating condition, no serious errors or abnormal behaviors are detected, the payment process can proceed normally, and no additional security measures are required;
[0095] Warning Level E M ≤E<E L ; The system detects some minor errors or abnormal behaviors, but these behaviors are not enough to affect the overall security of the system. Warning information needs to be recorded and sent to the administrator for monitoring. The user interface should display a warning prompt, but the payment process can continue;
[0096] Danger level E H ≤E<E M ; The errors or abnormal behaviors detected by the system are serious and may affect the security of the transaction. It is necessary to suspend the payment process and ask the user to reconfirm the payment information. Randomness is introduced to control the success or failure of the relay or card swiping and coin insertion to increase the difficulty for attackers to predict the system behavior;
[0097] Emergency level 0<E<E H ; The system detects very serious or high-risk errors that may pose a direct threat to system security. The payment process must be interrupted immediately, and an error message must be displayed, triggering a security alarm to notify the administrator for emergency processing. In extreme cases, the system may need to be shut down or the network connection may need to be disconnected to prevent further attacks;
[0098] Among them, E is the energy synergy evaluation coefficient, E L is the lower threshold corresponding to the safety level and the upper threshold corresponding to the warning level, E M is the lower threshold corresponding to the warning level and the upper threshold corresponding to the danger level, E H is the lower threshold corresponding to the danger level and the upper threshold corresponding to the emergency level, E L =0.9, E M =0.7, E H =0.5.
[0099] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
Claims
1. The embedded software anti-copying and obfuscation protection system includes a main control chip module, which is characterized by: The main control chip module is communicatively connected with an EEPROM storage module, an input and output terminal module, a card swiping and coin insertion signal processing module, an encryption and verification module, an exception handling module and a code obfuscation module, wherein the electrical signals between the modules are connected; The main control chip module is used to receive external signals and execute preset program logic, and realize the on and off of the circuit through the level control relay; The EEPROM storage module is used to store the encryption key and configuration information generated by the main control chip module; The input and output terminal module is connected to the load, realizes the actual control function of the circuit, receives the signal of the external device and transmits it to the main control chip module; The card swiping and coin insertion signal processing module, the card swiping board receives the card swiping signal and transmits it to the main control chip module through the serial port, and the coin acceptor receives the coin insertion information and feeds it back to the main control chip module through the level signal to realize the input function of user interaction; The encryption and verification module is divided into program A and program B for encryption and decryption operations. Program A is the encryption process, and program B is the decryption and verification process. If the verification is correct, the program will run normally. If the verification is wrong, the severity of the error will be evaluated. The exception handling module is used to analyze the security status of the system and implement corresponding exception handling measures in combination with the severity assessment result of the verification error; The code obfuscation module is used to perform obfuscation processing on the original code and change the structure and variable names of the program code.
2. The embedded software anti-copying and obfuscation protection system according to claim 1, characterized in that: In the main control chip module and the EEPROM storage module, the storage process of the encryption key and configuration information is as follows: The main control chip module is connected to the external device through the input and output terminal module. When the external device sends a signal, the signal is transmitted to the main control chip module through the input and output terminal module. After receiving the signal, the main control chip module decodes and identifies the signal, and calls the corresponding preset program logic for processing according to the decoded signal content, and performs corresponding operations, including data calculation, state judgment, and control instruction output; According to the execution result of the preset program logic, the main control chip module generates the corresponding relay control signal, and the control signal is output to the relay control terminal in the form of a level. After receiving the control signal, the relay acts according to its internal electromagnetic principle. When the control signal is at a high level, the relay is closed and the circuit is connected. When the control signal is at a low level, the relay is disconnected and the circuit is broken. When encryption operation is required, the main control chip module reads its built-in unique UID, and uses the read UID to cooperate with the encryption and verification module to perform encryption operation, using the UID as part of the key and combining it with the encryption algorithm to generate an encryption identifier; After the encryption identifier is generated, the EEPROM storage module receives and stores the encryption key, and simultaneously stores the configuration information of the device operating parameters, user settings, and software version.
3. The embedded software anti-copying and obfuscation protection system according to claim 2, characterized in that: In the input / output terminal module, the process of receiving the signal of the external device and transmitting it to the main control chip module is as follows: The input and output terminal module consists of an input and output interface, an internal circuit and a protection element. The input interface is used to receive signals from external devices, and the output interface is used to output control signals to the load to achieve signal interaction with external devices, including receiving input signals and outputting control signals. The interaction process between the input and output terminal module and the main control chip module is as follows: the main control chip module receives the signal from the input and output terminal module through its built-in interface circuit, and the main control chip module calls the corresponding preset program logic for processing according to the decoded signal content. The processing process includes data calculation, state judgment, and control instruction generation; According to the processing results, the main control chip module generates corresponding control signals and transmits them to the load through the output interface. The control signals include relay control signals, motor control signals, and LED indication signals.
4. The embedded software anti-copying and obfuscation protection system according to claim 3, characterized in that: In the card swiping and coin insertion signal processing module, the realization of the user interactive input function includes the card swiping signal processing process and the coin insertion signal processing process, which are specifically: Card swiping signal processing process: the user brings the card close to the card swiping board, and the card reader module on the card swiping board transmits electromagnetic waves to the card through the antenna for communication. After the card senses the electromagnetic waves, it generates energy, receives and processes the information of the card reader module, and responds to the card reader module. After receiving the card information, the card reader module transmits the information to the I / O port of the microcontroller through the SPI bus communication method; After receiving the information from the card reader module, the microcontroller processes the information through the program and sends the information to the main control chip module through the transparent transmission mode of the WiFi module. The main control chip module receives the card swiping information from the microcontroller through the serial port and performs subsequent processing. Coin signal processing process: The user puts a coin into the coin selector, which uses photoelectric sensors and magnetic sensors to measure the diameter, thickness, weight, magnetism, and conductivity of the coin to verify and identify the authenticity and face value of the coin. Once the coin is verified, the coin selector generates a level signal, which is transmitted to the main control chip module through the output interface of the coin selector; The main control chip module receives the level signal from the coin acceptor, determines whether the user has successfully inserted the coin according to the state of the signal, and then executes the corresponding program logic according to the coin information, including counting, storage, and output control signals.
5. The embedded software anti-copying and obfuscation protection system according to claim 4, characterized in that: In the encryption and verification module, the process of encryption and decryption operation is as follows: Program A is the encryption process, and program B is the decryption and verification process. Program A reads the built-in UID from the main control chip module, uses the encryption algorithm and UID as part of the key, and uses program A to generate a unique encryption identifier. The generated encryption identifier is used as the key, and program A stores the generated encryption identifier in the EEPROM storage module; Program B reads the stored encrypted identifier from the EEPROM storage module, uses the same decryption algorithm as program A, decrypts the read key, and uses the key as a reference to verify the UID of the current chip; Program B reads the UID of the current main control chip module and verifies it with the decrypted key to confirm whether the current chip is the one used for the previous encryption; If the verification is successful and the verification result shows that the UID matches the key, then program B believes that the current chip is legal and can run normally. If the verification is wrong and the verification result shows that the UID does not match the key, then program B believes that the current chip is illegal or tampered with, and then evaluates the severity of the error.
6. The embedded software anti-copying and obfuscation protection system according to claim 5, characterized in that: The error severity evaluation process is as follows: Collect relevant data about the occurrence of errors, including error logs and system monitoring data, organize and analyze the relevant data about the occurrence of errors to extract feature data related to error frequency and error duration, and evaluate the error frequency and error duration respectively; Analyze the characteristic data of error frequency and determine the evaluation indicators of error frequency characteristics, which are single error frequency indicator, similar error frequency indicator and error frequency increase rate indicator. Combine the related data of each evaluation indicator to calculate the error frequency evaluation index and evaluate the occurrence and change trend of errors. Analyze the characteristic data of error duration and determine the evaluation indicators of error duration characteristics, which are single error duration indicator, error impact time indicator and estimated repair time indicator. Combine the related data of each evaluation indicator to calculate the error interference evaluation index and evaluate the potential impact of the error. Integrate the associated data of each feature, and combine the error frequency assessment index and error interference assessment index to calculate the error severity assessment coefficient, evaluate the comprehensive severity of the error, and comprehensively analyze the potential impact and harm of the error.
7. The embedded software anti-copying and obfuscation protection system according to claim 6, characterized in that: The calculation expression of the error frequency evaluation index is: Among them, FI is the error frequency evaluation index, FE is the single error frequency, RE is the same error frequency, TE is the error frequency increase rate, RE is the error frequency increase rate, base is the reference value of the error frequency of the same type, TE max is the maximum value of the error frequency increase rate, used to standardize TE; The calculation expression of the error interference evaluation index is: Among them, EI is the error interference evaluation index, CE is the duration of a single error, ET is the error impact time, RT is the estimated repair time, and ET is the error impact time. base is the reference value of the error impact time, RT max is the maximum estimated repair time, used to standardize RT.
8. The embedded software anti-copying and obfuscation protection system according to claim 7, characterized in that: The calculation expression of the error severity evaluation coefficient is: Among them, E is the error severity assessment coefficient, FI is the error frequency assessment index, EI is the error interference assessment index, w1 is the weight coefficient of the error frequency assessment index, w2 is the weight coefficient of the error interference assessment index, and the value range of E is 0 to 1.
9. The embedded software anti-copying and obfuscation protection system according to claim 8, characterized in that: In the exception handling module, the analysis process of the system security status is as follows: Verify online payment requests, including the legitimacy of payment amount, payment account, and receiving account information, and use verification algorithms to verify the integrity and authenticity of data. Evaluate the severity of errors based on the specific type and number of verification errors. According to the calculation results of the error severity assessment coefficient, different safety status levels are divided into safety level, warning level, danger level and emergency level, and the corresponding safety assessment threshold is matched for each safety status level; Based on the severity assessment results of the verification error, determine the safety status level of the verification error and implement corresponding exception handling measures; Monitor the security status of the system in real time, including the frequency and severity of verification errors. When a warning or dangerous state occurs, automatically trigger a monitoring alarm, record all verification errors and the execution of exception handling measures, and regularly analyze logs to identify potential security issues and improvement points.
10. The embedded software anti-copying and obfuscation protection system according to claim 9, characterized in that: A plurality of the security status levels correspond to a plurality of the security assessment thresholds, wherein the security assessment thresholds include an upper threshold and a lower threshold; The multiple security status levels and the multiple security assessment thresholds satisfy the following relationship: Safety level E L ≤E<1; Warning Level E M ≤E <E L ; Danger level E H ≤E <E M ; Emergency Level 0 <E<E H ; Among them, E is the energy synergy evaluation coefficient, E L is the lower threshold corresponding to the safety level and the upper threshold corresponding to the warning level, E M is the lower threshold corresponding to the warning level and the upper threshold corresponding to the danger level, E H is the lower threshold corresponding to the danger level and the upper threshold corresponding to the emergency level, E L =0.9, E M =0.7, E H =0.5.