Post-layout physical feature prediction method and system based on graph neural network

Abstract

The invention discloses a post-layout physical feature prediction method and system based on a graph neural network, and the method comprises the steps: converting a circuit netlist in a logic synthesis stage into a topological graph composed of nodes and edges, constructing an adjacent matrix according to the connection relation between the nodes, extracting the initial feature vector of each node to obtain a feature matrix, and carrying out the prediction of the feature matrix; and inputting a graph neural network module composed of an embedded layer, a multi-layer GNN layer, a merging layer and a full connection layer, aggregating feature information of neighbor nodes, and predicting the half perimeter of the network after layout. The physical feature prediction model based on the graph neural network is introduced and used for estimating the network line length after layout, the prediction result can serve as one of features of a follow-up early time sequence prediction framework, the prediction precision of path delay after layout is remarkably improved, a designer or a tool is guided to conduct optimization, design iteration is reduced, and the design efficiency is improved. And the time cost of chip design is reduced.

Description

Technical Field

[0001] The present invention relates to a post-layout physical feature prediction method and system based on a graph neural network, and belongs to the technical field of electronic design automation. Background Art

[0002] With the advancement of integrated circuit process nodes, the problem of timing predictability in the early stages of design has become increasingly prominent. The logic synthesis stage only contains information on the logic level of the design, and the physical level of the design is unknown. The lack of physical information will lead to inaccurate timing estimates in the early stages of the design, resulting in large differences in timing results after synthesis and after layout, which will result in the design requiring multiple rounds of iterations to achieve the desired quality of results (QoR), resulting in an extension of the chip design cycle.

[0003] In order to improve the predictability of design, the field of electronic design automation hopes to achieve a close connection between different design stages by integrating the engine of the downstream design stage into the early design stage. In recent years, with the vigorous development of machine learning, more and more research has begun to focus on using machine learning technology for guidance across design stages, but ordinary machine learning models can only learn local information of the network, making it difficult to distinguish similar networks in the design, and the prediction accuracy is poor.

[0004] Physical characteristics are closely related to the timing of the design. Physical characteristics are closely related to line capacitance. On the one hand, line capacitance brings a certain line delay. On the other hand, line capacitance affects the unit delay by affecting the unit load capacitance, and finally affects the path delay after layout. Almost every step of the design process will have an impact on the line length, but the line length is not clearly quantified until the layout stage of unit placement. Therefore, in order to consider the impact of physical characteristics in the design stage before layout for more accurate timing analysis, fast and accurate pre-layout line length prediction is crucial.

[0005] Therefore, those skilled in the art need to solve the problem of limited accuracy of early timing prediction models caused by the lack of physical information before layout. Summary of the invention

[0006] Purpose: In order to overcome the deficiencies in the prior art, the present invention provides a method and system for predicting post-layout physical features based on graph neural networks, which can accurately and efficiently predict post-layout physical features in the logic synthesis stage to assist in more accurate timing analysis, thereby effectively guiding circuit pre-layout design and optimization, which is of great significance for accelerating the digital integrated circuit design process.

[0007] Technical solution: To solve the above technical problems, the technical solution adopted by the present invention is:

[0008] In a first aspect, a method for predicting physical features after layout based on a graph neural network comprises the following steps:

[0009] Step 1: Obtain a circuit netlist and convert the interconnections between gate units and networks in the circuit netlist into a graph data structure.

[0010] Step 2: According to the graph data structure, obtain the adjacency matrix, obtain the characteristics of the central network itself and the characteristics of the neighboring network of the central network according to the adjacency matrix, use the characteristics of the central network itself and the characteristics of the neighboring network of the central network as the feature matrix, calculate the corresponding semi-perimeter of each network, use the corresponding semi-perimeter as the label to be learned, and use the adjacency matrix, feature matrix and label to be learned as sample data sets.

[0011] Step 3: Divide the sample data set into training set data and test set data, use the training set data to train the physical feature prediction network model to obtain the trained physical feature prediction network model, use the test set data to verify the prediction accuracy and efficiency of the trained physical feature prediction network model, and adjust the trained physical feature prediction network model based on the verification results to obtain the adjusted physical feature prediction network model.

[0012] Step 4: Input the circuit layout diagram to be predicted into the adjusted physical feature prediction network model to obtain the predicted value of the half-perimeter of the network after layout.

[0013] As a preferred solution, the graph data structure acquisition method specifically includes:

[0014] The networks in the circuit netlist are considered nodes, and the cells connecting two networks are considered edges.

[0015] The circuit netlist is converted into a topological graph consisting of nodes and edges according to the connection relationship of the circuit netlist.

[0016] As a preferred solution, the values ​​in the adjacency matrix reflect the connection relationship between nodes.

[0017] As a preferred solution, the characteristics of the central network itself include but are not limited to: the area of ​​the driving unit and sink unit of the central network and the number of neighboring networks of the central network. The characteristics of the neighboring networks of the central network include but are not limited to: the number of fan-in networks, the number of fan-out networks, the area of ​​the driving unit, the area of ​​the sink unit and / or the standard deviation of the area of ​​the sink unit.

[0018] As a preferred solution, the semi-perimeter corresponding to each network is the sum of the length and width of the smallest rectangle containing the network drive pins and the load pins.

[0019] As a preferred solution, the physical feature prediction network model includes: an embedding layer, a multi-layer GNN layer, a merging layer and a fully connected layer. The embedding layer is connected in series with the multi-layer GNN layer, and the output end of each GNN layer is also connected to the input end of the merging layer, and the output end of the merging layer is connected to the input end of the fully connected layer. The GNN layer includes a graph attention neural network, which is used to perform attention coefficient calculation and feature weighted aggregation calculation, so as to better learn the influence of different types of neighbor networks on the central network, and pay attention to the relationship between different types of networks in different attention heads.

[0020] As a preferred solution, the graph attention neural network has 3 layers, the dimensions of each layer are 32, 64 and 64 respectively, the number of attention heads is 2, and the node aggregation method is sum aggregation.

[0021] As a preferred solution, the number of training set data is 6 and the number of test set data is 3.

[0022] In a second aspect, a computer-readable storage medium stores a computer program, which, when executed by a processor, implements a post-layout physical feature prediction method based on a graph neural network as described in any one of the first aspects.

[0023] According to a third aspect, a computer device includes:

[0024] Memory, used to store instructions.

[0025] A processor is used to execute the instructions so that the computer device performs the operations of a post-layout physical feature prediction method based on a graph neural network as described in any one of the first aspects.

[0026] Beneficial effect: The present invention provides a post-layout physical feature prediction method based on graph neural network, which converts the circuit netlist in the logic synthesis stage into a topological graph composed of nodes and edges, constructs an adjacency matrix according to the connection relationship between nodes, extracts the initial feature vector of each node to obtain the feature matrix, and inputs a graph neural network module composed of an embedding layer, a multi-layer GNN layer, a merging layer and a fully connected layer, aggregates the feature information of neighbor nodes and predicts the half perimeter wirelength (HPWL) of the network after layout.

[0027] The present invention introduces a physical feature prediction model based on graph neural network to estimate the network line length after layout. The prediction result can be used as one of the features of the subsequent early timing prediction framework, which can significantly improve the prediction accuracy of the path delay after layout, thereby guiding designers or tools to optimize, reduce design iterations, and reduce the time cost of chip design.

[0028] The present invention can accurately and efficiently predict the post-layout physical characteristics in the logic synthesis stage to assist in more accurate timing analysis, thereby effectively guiding the pre-layout design and optimization of the circuit, which is of great significance for accelerating the digital integrated circuit design process. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Schematic diagram of the process framework of the physical feature prediction method based on graph neural network.

[0030] Figure 2 The schematic diagram of the process of converting a circuit netlist into a graph data structure is shown in FIG. Figure 2 (a) is a schematic diagram of the circuit network. Figure 2 (b) is a schematic diagram of the graph data structure.

[0031] Figure 3 is a schematic diagram of the construction process of the adjacency matrix, where Figure 3 (a) is a schematic diagram of the graph data structure. Figure 3 (b) is a schematic diagram of the adjacency matrix.

[0032] Figure 4 Schematic diagram of HPWL (posterior half circumference length).

[0033] Figure 5 Schematic diagram of the graph neural network module structure.

[0034] Figure 6 This is a schematic diagram of the implementation process of the GAT (Graph Attention Neural Network) layer, where: Figure 6 (a) is a schematic diagram of the attention coefficient calculation structure. Figure 6 (b) is a schematic diagram of the feature weighted aggregation structure. DETAILED DESCRIPTION

[0035] The following is a clear and complete description of the technical solutions in the examples of the present invention in conjunction with the accompanying drawings in the examples of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the protection scope of the present invention.

[0036] The present invention will be further described below in conjunction with specific embodiments.

[0037] Embodiment 1:

[0038] This embodiment introduces a method for predicting physical features after layout based on graph neural network, which analyzes the circuit netlist structure and converts it into a graph to construct an adjacency matrix; extracts features related to the half perimeter wirelength (HPWL) after layout from the circuit netlist and network-related reports to construct a feature matrix; in order to focus on more global information, a GNN (Graph Neural Network, GNN) model is built to aggregate the neighbor information of the network, obtain high-quality node representation, and predict the half perimeter after layout. The method includes the following steps:

[0039] Step S1: Convert the circuit netlist into a graph data structure. The networks in the circuit netlist are regarded as nodes, and the units connecting two networks are regarded as edges. A graph data structure of nodes and edges is constructed, and an adjacency matrix is ​​obtained from the graph data structure. The values ​​in the adjacency matrix reflect the connection relationship between nodes.

[0040] Step S2: Based on the basic knowledge and related research in the field of line length prediction, the features of the center network itself and its neighboring node network are considered, and the features with high correlation with the prediction task are selected as the input of the subsequent prediction model. According to the graph data structure, the attributes of the center network itself and its neighboring node network are used as feature matrices, and corresponding semi-perimeter labels are generated for each network. The corresponding semi-perimeter labels are used as labels to be learned, and the adjacency matrix, feature matrix and labels to be learned are used as sample data sets to train the line length prediction model and estimate the prediction accuracy.

[0041] Step S3: Build a physical feature prediction network based on graph neural network. Take the adjacency matrix obtained in step S1, the feature matrix obtained in step S2, and the labels to be learned as input, train the physical feature prediction network model, and obtain a trained physical feature prediction network model.

[0042] Step S4: Train and verify the model built in step S3, divide the sample data prepared in step S2 into training set data and test set data, use the training set data to train the model, use the test set data to verify the model prediction accuracy and efficiency, and adjust the trained physical feature prediction network model based on the verification results to obtain the adjusted physical feature prediction network model.

[0043] Step S5: Input the circuit layout diagram to be predicted into the adjusted physical feature prediction network model to obtain a predicted value of the semi-perimeter of the network after layout.

[0044] Furthermore, in step S1, the interconnections between gate units and networks in the circuit netlist are converted into a graph. The physical feature prediction task of the present invention is to predict the physical features of the network after layout. The learning subject is the network rather than the unit, so each network in the circuit is represented as a node in the graph, and the unit connecting each network to other adjacent networks is represented as an edge between two nodes in the graph.

[0045] Furthermore, in step S2, the physical feature prediction task is to estimate the semi-perimeter after layout, and use the semi-perimeter of the network as the label for model prediction. The layout stage completes the placement of standard units but there is no actual connection between units. The line length at this stage is not the same as the actual routing length after wiring, so the semi-perimeter is often used to represent the line length at this stage. To calculate the semi-perimeter, it is necessary to find the smallest rectangle containing the network drive pins and load pins, and the sum of its length and width is the semi-perimeter of the network. The HPWL network is connected through a common unit, which is represented as an edge in the figure.

[0046] Further, in the step S2, for each circuit network to be estimated, its features can be divided into two parts, the first part is the features of the central network itself, which have a direct impact on the semi-perimeter of the network; the second part is the features of the neighboring networks of the central network, which affect the semi-perimeter of the network through complex interaction relationships in the circuit. The neighboring network here refers to the one-hop neighbor of the central network. For the basic features of the central network itself, the area of ​​the driving unit and sink unit of the central network and the number of neighboring networks of the central network are selected. The area of ​​the sink unit is related to the line length. Generally speaking, a large area of ​​the sink unit may have more input and output pins, which will bring more connections and make the line length longer. The number of neighboring networks of the central network reflects the distribution of the networks around the central network. Generally speaking, the more the number of surrounding networks, the more routing lines there are near the central network, and the longer the line length will be. For the features of the neighboring networks of the central network, the number of fan-in networks, the number of fan-out networks, the area of ​​the driving unit, the sum of the area of ​​the sink unit or the standard deviation of the area of ​​the sink unit are selected. Considering that the placement of units in the layout process has mutual influence, this means that there is also mutual influence between adjacent networks. Including the features of neighbor networks in the feature selection process can obtain the mutual influence relationship between networks at longer distances, so that the subsequent graph neural network can learn higher quality node representations.

[0047] Furthermore, in step S3, the constructed physical feature prediction module takes the adjacency matrix, the feature matrix and the generated semi-perimeter label as input, and is composed of an embedding layer, a multi-layer GNN layer, a merging layer and a fully connected layer. The semi-perimeter of the network is used as the label predicted by the model to estimate the semi-perimeter after layout.

[0048] Step S3 specifically includes the following steps:

[0049] S31: Build the embedding layer. The first embedding layer of the module maps the feature vector of the node into a dimensional space, providing the initial embedding vector for the subsequent GNN layer. At the same time, the existence of the embedding layer ensures the consistency and standardization of the input data, which can improve the stability of model training.

[0050] S32: Build the GNN layer. The initial embedding vector obtained by the embedding layer is sent to the multi-layer GNN layer for learning. Assuming that the number of GNN layers is M, the mth GNN layer can aggregate the information of the m-hop neighbors of the central node, so that more global netlist information can be learned. However, too many network layers may cause the representation of the node to tend to aggregate more neighbor information, making it tend to be similar in the update process of each layer, resulting in the problem of over-smoothing, and also reducing the computational efficiency. Taking the above factors into consideration, the graph neural network module of the present invention uses three layers of GNN layers. The initial features of the network contain relatively local information of 2-hop neighbors, while the three-layer GNN layer can aggregate the information of 3-hop neighbors. Therefore, the semi-perimeter physical feature prediction model can focus on more global information from 5-hop neighbors, thereby obtaining a higher quality node embedding representation. Each GNN layer is composed of a Graph Attention Network (GAT) with the same implementation principle. The implementation of the GAT layer includes two processes: attention coefficient calculation and feature weighted aggregation.

[0051] For each network to be predicted, the GAT layer first calculates the attention coefficients of it and all one-hop neighbor networks. For net i and net j, assume that their feature vectors are h i and h j , the calculation of the attention coefficient between net i and net j is actually to learn the correlation between their feature vectors. The feature vectors of net i and net j are linearly mapped and concatenated through the shared parameter W, and then mapped again through W aThe attention coefficient between the two networks is obtained, and then the attention coefficient is normalized by softmax to obtain the attention coefficient of net i to net j. The above attention coefficient calculation assigns different weights to different neighbor nodes according to the feature information contained in them, which is used in the subsequent weighted aggregation process. This processing method can describe the importance of different neighbor nodes. For example, the fan-in network and the fan-out network have different influences on the central network due to their different positions relative to the central network. The existence of the attention coefficient enables the GNN module to better learn the influence of different types of neighbor networks on the central network. At the same time, in order to improve the generalization of the model, the GAT layer is based on a two-head attention mechanism, so that the model can pay attention to the relationship between different types of networks in different attention heads to better adapt to unknown graph data.

[0052] S33: Build merging layer and fully connected layer. The semi-perimeter physical feature prediction task hopes to learn the feature information of the local one-hop and two-hop neighbor network at the same time, as well as the information of the more global neighbor network of more than three hops. Therefore, after learning through three layers of GNN layers, the physical feature prediction model concatenates the embedding vectors of each GNN layer through a merging layer to obtain an embedding vector containing information of different depths. Subsequently, the merged embedding vector is input into the fully connected layer for dimensional transformation to obtain the final node embedding vector of the entire GNN module.

[0053] Furthermore, the specific process of generating the node embedding vector of the GNN module in the semi-perimeter physical feature prediction model is as follows: First, the initial input vector of each network is passed through the embedding layer to obtain the initial embedding vector of the first GNN layer. For each attention head of the GNN layer, the initial embedding vector of the network is the same. Then, the attention coefficient of the node to its neighboring nodes is calculated, and the information of the neighboring nodes is weightedly aggregated using the attention coefficient as the weight, and the aggregated embedding vector is obtained by updating the multi-layer perceptron. Based on the multi-head attention mechanism, the vectors learned under different attentions are concatenated to obtain the node embedding vector of a GNN layer. For multi-layer GNN layers, the vector output by the previous GNN layer is used as the input vector of this layer. Finally, the output of each GNN layer is concatenated to obtain embedding vectors of different depths, which are sent to the multi-layer perceptron to obtain the final node embedding vector.

[0054] The node embedding vectors learned by the graph neural network module will be subsequently input into the multi-layer perceptron in the prediction module for learning, and finally the predicted value of the semi-perimeter of the network after layout will be obtained.

[0055] Embodiment 2:

[0056] This embodiment introduces a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, a post-layout physical feature prediction method based on a graph neural network as described in any one of Embodiment 1 is implemented.

[0057] Embodiment 3:

[0058] A computer device comprising:

[0059] Memory, used to store instructions.

[0060] A processor is used to execute the instructions so that the computer device performs the operations of a post-layout physical feature prediction method based on a graph neural network as described in any one of Example 1.

[0061] Embodiment 4:

[0062] This embodiment introduces a post-layout physical feature prediction method based on a graph neural network (GNN), which analyzes the circuit netlist structure and converts it into a graph to construct an adjacency matrix; and extracts features related to the post-layout half perimeter wirelength (HPWL) from the circuit netlist and network-related reports to construct a feature matrix; in order to focus on more global information, a GNN model is built to aggregate the neighbor information of the network to obtain high-quality node representations to predict the post-layout half perimeter. Figure 1 The overall framework of the physical feature prediction model based on graph neural network is presented. The method comprises the following steps:

[0063] S1: Convert the circuit netlist into a graph data structure. Figure 1 The circuit netlist in (a) is considered as nodes, and the units connecting two networks are considered as edges. According to the connection relationship of the netlist, the circuit netlist is converted into Figure 1 The topology graph composed of nodes and edges in (b) is constructed to represent the graph structure by constructing an adjacency matrix. The values ​​in the matrix reflect the connection relationship between nodes. The benchmark circuits used are from ISCAS'89 and OpenCores. Synopsys' Design Compiler is used for synthesis and Synopsys' IC Compiler is used for physical design under TSMC 22nm process. The network report of the circuit after layout is reported, and Python is used to extract the location information of the network from the network report after layout to construct the required adjacency matrix.

[0064] S2: Based on the basic knowledge and related research in the field of wire length prediction, consider the characteristics of the central network itself and its neighboring node network, and select the features with high correlation with the prediction task as the input of the subsequent prediction model. Generate the corresponding semi-perimeter label for each network as a sample data set to train the wire length prediction model and estimate the prediction accuracy. Use Python to extract network-related features from the circuit synthesis netlist, and calculate the semi-perimeter of the network as a physical feature to obtain the model label.

[0065] S3: Build a physical feature prediction network based on graph neural network. Take the adjacency matrix obtained in step S1, the feature matrix obtained in step S2 and the labels to be learned as input, and train Figure 1 (c) The graph neural network module and Figure 1 (d) shows a physical feature prediction network model composed of fully connected layers to obtain the predicted value of the half perimeter of the network after layout. The physical feature acquisition model introduced in the present invention is implemented using Python, and the code is written with the help of pytorch, tensorflow and scikit-learn environments to implement the physical feature prediction model based on the graph neural network. The model is trained and inferred on a server equipped with 48 CPUs, 12 CPU cores and 1 NVIDIA Tesla V100 GPU core with 32GB of video memory to obtain the half perimeter of the network after layout. During training, the number of layers of the graph neural network GAT is set to 3, the dimensions of each layer are 32, 64, and 64 respectively, the number of attention heads is 2, and the node aggregation method is sum aggregation.

[0066] S4: Train and verify the model built in step S3, divide the sample circuits prepared in step S2 into 6 training set circuits and 3 test set circuits, use the training set data to train the model, and use the test set data to verify the model prediction accuracy and efficiency. Use the correlation coefficient (R) as the evaluation index. Use Python to calculate the physical characteristics to obtain the correlation coefficient index and inference time of the model.

[0067] In the step S1, the interconnections between gate units and networks in the circuit netlist are converted into a graph form.

[0068] A graph is composed of two parts: nodes and edges. Assuming V represents the set of all nodes in a graph and E represents the set of all edges in the graph, the graph can be represented as , represents any node in the graph, It means connecting nodes and nodes There are interconnections between gate units and networks in the circuit netlist, which can be converted into a graph. For different graph learning tasks, the selection of nodes and edges may be different. In the graph learning task with gate units as the main body, the units are usually regarded as nodes, and the interconnections between units are regarded as edges. The physical feature prediction task of the present invention is to predict the semi-perimeter of the network after layout, and the learning subject is the network rather than the unit. Therefore, Figure 2 As shown, each network in the circuit is represented as a node in the graph, and each network is connected to its adjacent network through a common unit, which is represented as an edge in the graph. For example, Figure 2 Net4 in (a) is connected to net5, net6 and net7 through its sink units g, h, i respectively, and connected to net1, net2 and net3 through its driver unit f. After this process, the circuit netlist in the left figure is converted into Figure 2 (b) Graph data structure.

[0069] In order to send the graph structure data obtained by circuit netlist conversion to the graph neural network for learning, it is also necessary to represent it in a form that can be recognized by the graph neural network. , the present invention defines a size of The initial elements of the matrix are all 0. is the number of networks in the circuit netlist. Then add all the networks from 1 to Numbering, Network nodes Indicates that each row and column of the adjacency matrix corresponds to each node. As the central node, the connection between the central node and other nodes is obtained by traversal. and nodes are connected by an edge, then the adjacency matrix Line The value of the column is recorded as 1, otherwise it remains 0. The final adjacency matrix is ​​a symmetric matrix with a diagonal of 1. This is because of the following two points: (1) In the semi-perimeter prediction problem of the present invention, the connection relationship between nodes is bidirectional, so the first column of the adjacency matrix Line The column values ​​and Line The values ​​of the columns are the same, which makes the adjacency matrix symmetric; (2) In order to enable the graph neural network to aggregate the information of the central node itself during aggregation, it is specified that the nodes themselves are connected when constructing the adjacency matrix, which makes the diagonal of the adjacency matrix all 1. Figure 3 The construction process of the above adjacency matrix is ​​described. Figure 3In (a), the red nodes represent the central nodes, and the blue nodes represent the neighbor nodes. Figure 3 In (b), the red and blue positions represent connections between nodes, with element values ​​of 1, and the white positions have element values ​​of 0.

[0070] In step S2, the physical feature prediction task is to estimate the semi-perimeter after layout, and use the semi-perimeter of the network as the label for model prediction. The layout stage completes the placement of standard cells but there is no actual connection between cells. The line length at this stage is different from the actual routing length after routing, so the semi-perimeter is often used to represent the line length at this stage. Figure 4 uses net4 as an example to illustrate the calculation process of the semi-perimeter.

[0071] Figure 4 In the example, the driver pin of net4 is A, and the load pins are B, C, and D. To calculate the semi-perimeter, we need to find the smallest rectangle that contains A, B, C, and D. Half of the perimeter of this smallest rectangle is the semi-perimeter of net4. For a network, assume that the coordinates of its driver pin are , the number of load pins is N, and the coordinates of the i-th load pin are expressed as , then the calculation process of the semi-perimeter of the network can be expressed by formula (1).

[0072] (1)

[0073] in and Represents the left and right boundaries of the smallest rectangle respectively. and Represent the lower and upper boundaries of the minimum rectangle width, respectively. represents the length of the smallest rectangle, It represents the width of the smallest rectangle. The sum of the length and width gives the half perimeter HPWL of the network.

[0074] In step S2, for each circuit network to be estimated, its features can be divided into two parts. The first part is the features of the central network itself, which have a direct impact on the semi-perimeter of the network; the second part is the features of the neighboring network of the central network, which affect the semi-perimeter of the network through complex interactions in the circuit. The neighboring network here refers to the one-hop neighbor of the central network. A hop represents the shortest distance between nodes in the graph.

[0075] by Figure 2 The circuit in the example is used to define the relevant terms. For net4, it has a driver unit f and three sink units g, h and i. The area of ​​the driver unit of net4 is That is the area of ​​unit f; the area of ​​the sink unit of net4 It is the sum of the areas of units g, h, and i. The fan-in network of net4 is the network to which the input pins of the driver unit of net4 are connected, namely net1, net2, and net3. Therefore, the number of fan-in networks of net4 is ; The fan-out network of net4 is the network to which the output pins of the sink unit of net4 are connected, namely net5, net6 and net7, so the number of fan-out networks of net4 is ; net4's 1-hop neighbors include its fan-in network and fan-out network, so the number of net4's 1-hop neighbor networks is .

[0076] For the basic characteristics of the central network itself, the area of ​​the driver unit and sink unit of the central network and the number of neighboring networks of the central network are selected. The area of ​​the unit is related to the line length. Generally speaking, a unit with a large area may have more input and output pins, which will bring more connections and make the line length longer. Considering that the two types of units, driver and sink, may have different effects on the central network, the effect of area on line length is divided into two parts: the area of ​​the driver unit and the area of ​​the sink unit. The number of neighboring networks of the central network reflects the distribution of the networks around the central network. Generally speaking, the more networks around, the more routing lines there are near the central network, and the longer the line length will be. For the same consideration as the area, the effect of the number of neighboring networks on line length is divided into two parts: the number of fan-in networks and the number of fan-out networks.

[0077] For the features of the neighbor networks of the central network, the number of fan-in networks, the number of fan-out networks, the area of ​​the driving unit, and the sum / standard deviation of the area of ​​the sink unit are selected. Considering that the placement of units in the layout process has mutual influence, this means that there is also mutual influence between adjacent networks. Including the features of the neighbor network in the feature selection process can obtain the mutual influence relationship between networks at a longer distance, so that the subsequent graph neural network can learn higher quality node representations. The sum of these basic features of the neighbor network reflects its overall impact on the central network, and the standard deviation reflects the distribution of the impact of these basic features around the central network. For the same considerations as the basic features, these features of the neighbor network are also divided into fan-in networks and fan-out networks. From the above description, it can be seen that the features of the central network itself selected by the present invention contain information about the 1-hop neighbor network, and the features of the neighbor network also contain information about its 1-hop neighbors. Therefore, in terms of the initial features, the 2-hop neighbor information can be paid attention to, which is a relatively local information, while the global information comes from the information of the more distant network, which will be achieved through the subsequent multi-layer GNN model aggregation.

[0078] In step S3, the constructed physical feature prediction module takes the adjacency matrix, feature matrix and generated semi-perimeter labels as input, and is composed of an embedding layer, a multi-layer GNN layer, a merging layer and a fully connected layer. The semi-perimeter of the network is used as the label predicted by the model to estimate the semi-perimeter after layout. The specific structure of the graph neural network module is as follows Figure 5 shown.

[0079] Step S3 specifically includes the following steps:

[0080] S31: Build the embedding layer. The first embedding layer of the module maps the feature vector of the node into a dimensional space, providing the initial embedding vector for the subsequent GNN layer. At the same time, the existence of the embedding layer ensures the consistency and standardization of the input data, which can improve the stability of model training.

[0081] S32: Build the GNN layer. The initial embedding vector obtained by the embedding layer is sent to the multi-layer GNN layer for learning. Assuming that the number of GNN layers is M, the m-th GNN layer can aggregate the information of the m-hop neighbors of the central node, so that more global netlist information can be learned. However, too many network layers may cause the representation of the node to tend to aggregate more neighbor information, making it tend to be similar in the update process of each layer, resulting in the problem of over-smoothing, and also reducing computational efficiency. Taking the above factors into consideration, the graph neural network module of the present invention uses three layers of GNN layers. The initial features of the network contain relatively local information about 2-hop neighbors, while the three-layer GNN layer can aggregate information about 3-hop neighbors. Therefore, the semi-perimeter physical feature prediction model can focus on more global information from 5-hop neighbors, thereby obtaining a higher quality node embedding representation. Each GNN layer is composed of a graph attention neural network (GAT) with the same implementation principle, such as Figure 6 As shown in Figure 2, the implementation of the GAT layer includes two processes: attention coefficient calculation and feature weighted aggregation.

[0082] For each network to be predicted, the GAT layer first calculates the attention coefficients between it and all one-hop neighbor networks. Figure 6 In (a), for net i and net j, assume that their eigenvectors are h i and h j , the calculation of the attention coefficient between net i and net j is actually to learn the correlation between their feature vectors. The feature vectors of net i and net j are linearly mapped and concatenated through the shared parameter W, and then mapped again through W aThe attention coefficient between the two networks is obtained, and then the attention coefficient is normalized by softmax to obtain the attention coefficient of net i to net j. Figure 6 The calculation of the attention coefficient in (b) assigns different weights to different neighbor nodes according to the feature information they contain, which is used in the subsequent weighted aggregation process. This processing method can describe the importance of different neighbor nodes. For example, the fan-in network and the fan-out network have different influences on the central network due to their different positions relative to the central network. The existence of the attention coefficient enables the GNN module to better learn the influence of different types of neighbor networks on the central network. At the same time, in order to improve the generalization of the model, the GAT layer is based on a two-head attention mechanism, which allows the model to pay attention to the relationship between different types of networks in different attention heads to better adapt to unknown graph data.

[0083] S33: Build merging layer and fully connected layer. The semi-perimeter physical feature prediction task hopes to learn the feature information of the local one-hop and two-hop neighbor network at the same time, as well as the information of the more global neighbor network of more than three hops. Therefore, after learning through three layers of GNN layers, the physical feature prediction model concatenates the embedding vectors of each GNN layer through a merging layer to obtain an embedding vector containing information of different depths. Subsequently, the merged embedding vector is input into the fully connected layer for dimensional transformation to obtain the final node embedding vector of the entire GNN module.

[0084] The specific process of generating the node embedding vector of the GNN module in the semi-perimeter physical feature prediction model is as follows: First, the initial input vector of each network is passed through the embedding layer to obtain the initial embedding vector of the first GNN layer. For each attention head of the GNN layer, the initial embedding vector of the network is the same. Then, the attention coefficient of the node to its neighboring nodes is calculated, and the information of the neighboring nodes is weightedly aggregated using the attention coefficient as the weight, and the aggregated embedding vector is obtained by updating the multi-layer perceptron. Based on the multi-head attention mechanism, the vectors learned under different attentions are concatenated to obtain the node embedding vector of a GNN layer. For multi-layer GNN layers, the vector output by the previous GNN layer is used as the input vector of this layer. Finally, the output of each GNN layer is concatenated to obtain embedding vectors of different depths, which are sent to the multi-layer perceptron to obtain the final node embedding vector.

[0085] The node embedding vectors learned by the graph neural network module will be subsequently input into the multi-layer perceptron in the prediction module for learning, and finally the predicted value of the semi-perimeter of the network after layout will be obtained.

[0086] Embodiment 5:

[0087] This embodiment introduces the use of the correlation coefficient R, an evaluation indicator commonly used in wire length estimation work, to describe the correlation between the predicted value of the semi-perimeter length of a network in a netlist and the label value.

[0088] On known circuits, the average value of the correlation coefficient of the half-circumference physical feature prediction model introduced by the present invention can reach 0.9443, and the average value of the correlation coefficient on unknown circuits can reach 0.9071. Whether on known circuits or unknown circuits, the correlation coefficient between the model prediction result and the true value is greater than 0.9, which shows that there is a strong positive correlation between the predicted value and the label value. This strong correlation allows the predicted value to reflect the trend of the true half-circumference, and when physical information is missing in the early design stage, the predicted line length can be used instead of the true value to provide the delay prediction model with physical information on the line to improve the accuracy of the delay prediction model.

[0089] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A post-layout physical feature prediction method based on graph neural network, characterized by: The steps include: Step 1: Obtain a circuit netlist and convert the interconnections between gate units and networks in the circuit netlist into a graph data structure; Step 2: According to the graph data structure, obtain the adjacency matrix, obtain the characteristics of the central network itself and the characteristics of the neighboring network of the central network according to the adjacency matrix, use the characteristics of the central network itself and the characteristics of the neighboring network of the central network as the feature matrix, calculate the semi-perimeter corresponding to each network, use the corresponding semi-perimeter as the label to be learned, and use the adjacency matrix, feature matrix and label to be learned as sample data sets; Step 3: Divide the sample data set into training set data and test set data, use the training set data to train the physical feature prediction network model to obtain a trained physical feature prediction network model, use the test set data to verify the prediction accuracy and efficiency of the trained physical feature prediction network model, and adjust the trained physical feature prediction network model according to the verification results to obtain an adjusted physical feature prediction network model; Step 4: Input the circuit layout diagram to be predicted into the adjusted physical feature prediction network model to obtain the predicted value of the half-perimeter of the network after layout.

2. The method for predicting physical features after layout based on graph neural network according to claim 1, characterized in that: The graph data structure acquisition method specifically includes: The networks in the circuit netlist are considered nodes, and the cells connecting two networks are considered edges; The circuit netlist is converted into a topological graph consisting of nodes and edges according to the connection relationship of the circuit netlist.

3. The method for predicting physical features after layout based on graph neural network according to claim 1, characterized in that: The values ​​in the adjacency matrix reflect the connection relationship between nodes.

4. The method for predicting physical features after layout based on graph neural network according to claim 1, characterized in that: The characteristics of the central network itself include but are not limited to: the area of ​​the driving unit and sink unit of the central network and the number of neighboring networks of the central network; the characteristics of the neighboring networks of the central network include but are not limited to: the number of fan-in networks, the number of fan-out networks, the area of ​​the driving unit, the area of ​​the sink unit and / or the standard deviation of the sink unit area.

5. The method for predicting physical features after layout based on graph neural network according to claim 1, characterized in that: The semi-perimeter corresponding to each network is the sum of the length and width of the smallest rectangle containing the network drive pins and the load pins.

6. The method for predicting physical features after layout based on graph neural network according to claim 1, characterized in that: The physical feature prediction network model includes: an embedding layer, a multi-layer GNN layer, a merging layer and a fully connected layer. The embedding layer is connected in series with the multi-layer GNN layer, and the output end of each GNN layer is also connected to the input end of the merging layer, and the output end of the merging layer is connected to the input end of the fully connected layer; the GNN layer includes a graph attention neural network, which is used to perform attention coefficient calculation and feature weighted aggregation calculation, so as to better learn the influence of different types of neighbor networks on the central network, and pay attention to the relationship between different types of networks in different attention heads.

7. The method for predicting physical features after layout based on graph neural network according to claim 6, characterized in that: The graph attention neural network has 3 layers, the dimensions of each layer are 32, 64 and 64 respectively, the number of attention heads is 2, and the node aggregation method is sum aggregation.

8. The method for predicting physical features after layout based on graph neural network according to claim 1, characterized in that: The training set data is 6 and the test set data is 3.

9. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed by a processor, a post-layout physical feature prediction method based on a graph neural network as described in any one of claims 1 to 8 is implemented.

10. A computer device, characterized in that: include: A memory for storing instructions; A processor is used to execute the instructions so that the computer device performs the operations of a post-layout physical feature prediction method based on a graph neural network as described in any one of claims 1 to 8.

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