Circuit driving device of OLED (Organic Light Emitting Diode) display panel and OLED display panel thereof

Abstract

The invention relates to a circuit driving device of an OLED (Organic Light Emitting Diode) display panel and the OLED display panel. The circuit driving device comprises a plurality of rows of pixel driving circuits, each row of pixel driving circuit comprises a first scanning line, a plurality of pixel driving units and a switch unit, the first end of each pixel driving unit is connected with the first scanning line of the row where the pixel driving unit is located, and the second end of each pixel driving unit is connected with the data line of the column where the pixel driving unit is located; the switch units are connected with the data lines, the first scanning lines act at first levels one by one, when the first target scanning line is at the first level, the target switch unit is closed, the first target scanning line is any scanning line in the first scanning lines, and the target switch unit is the switch unit of the row where the first target scanning line is located. According to the OLED display panel, the technical problem that circuit driving crosstalk is caused when data on the data line of the OLED display panel is changed is solved.

Description

Technical Field

[0001] The present application relates to the technical field of organic light emitting diodes, and in particular to a circuit driving device of an OLED display panel and an OLED display panel thereof. Background Art

[0002] The reason why OLED (Organic Light-Emitting Diode) technology can be widely used is that compared with other technologies, it has the following advantages: low power consumption, fast response speed, wide viewing angle, high resolution display, wide temperature characteristics, soft screen and relatively light finished product. Because of the above technologies, more and more display manufacturers around the world have invested in OLED research and development, which has greatly promoted the industrialization process of OLED. In large sizes, the smallest pixel driving unit of OLED is Figure 1 As shown in the figure, the 3T1C architecture, where T1 is the data control TFT (thin film transistor), responsible for the charging and discharging of capacitor C, T2 is the drive control TFT, responsible for controlling the current reaching the OLED, thereby controlling the brightness of the OLED, and T3 is the sensing TFT, used to detect the current flowing through T2, or the potential of the anode of the OLED device, thereby calculating the threshold voltage of T2. Figure 2 As shown, it is a schematic diagram of an architecture of the prior art, wherein Panel l (102) is a panel, DDI C (104) is a driver chip, S-out (106) is a source output of the driver chip, ELVDD (108) is a high voltage terminal of a power supply, used to provide a power supply voltage for driving the OLED to emit light, and Cc (110) is a parasitic capacitor between S-out and ELVDD inside Panel l. When the data on the data line changes, it will affect the voltage of ELVDD. Figure 1 It can be seen that this will affect the display brightness of the OLED, thereby causing crosstalk problems. Summary of the invention

[0003] The present application provides a circuit driving device of an OLED display panel and an OLED display panel thereof, so as to solve the technical problem of circuit driving crosstalk caused when data on a data line of the OLED display panel changes.

[0004] In a first aspect, the present application provides a circuit driving device for an OLED display panel, comprising: a plurality of rows of pixel driving circuits, each row of the pixel driving circuits comprising a first scan line, a plurality of pixel driving units and a switch unit, a first end of the pixel driving unit being connected to a first scan line of the row in which it is located, a second end of the pixel driving unit being connected to a data line of the column in which it is located, the switch unit being connected to the data line, the first scan lines being at a first level row by row, and when a first target scan line is at the first level, the target switch unit is closed, wherein the first target scan line is any one of the first scan lines, and the target switch unit is a switch unit of the row in which the first target scan line is located.

[0005] As an optional example, when the first target scan line is at the first level, the second target scan line is at the second level, wherein the second target scan line is all scan lines in the first scan line except the first target scan line, and the second level is the opposite level to the first level.

[0006] As an optional example, in the case where the switching unit includes a second scanning line and a plurality of first N-type thin film transistors, one pixel driving unit corresponds to one first N-type thin film transistor, a gate of the first N-type thin film transistor is connected to the second scanning line of its row, and a source and a drain of the first N-type thin film transistor are respectively connected to a data line of its column.

[0007] As an optional example, when the first scan line is at the first level, the second scan line is at the second level, and the first N-type thin film transistor connected to the second scan line is turned off; when the first scan line is at the second level, the second scan line is at the first level, and the first N-type thin film transistor connected to the second scan line is turned on.

[0008] As an optional example, when the first N-type thin film transistor is turned on, the data line connected to the first N-type thin film transistor is connected; when the first N-type thin film transistor is turned off, the data line connected to the first N-type thin film transistor is disconnected.

[0009] As an optional example, one of the above-mentioned pixel driving units includes a capacitor, a second N-type thin film transistor, a third N-type thin film transistor and an organic light-emitting diode, the first end of the above-mentioned capacitor is connected to the drain of the above-mentioned second N-type thin film transistor and the gate of the above-mentioned third N-type thin film transistor, the second end of the above-mentioned capacitor is connected to a power supply, the gate of the above-mentioned second N-type thin film transistor is connected to the first scan line of its row, the source of the above-mentioned second N-type thin film transistor is connected to the data line of its column, the source of the above-mentioned third N-type thin film transistor is connected to the power supply, the drain of the above-mentioned third N-type thin film transistor is connected to the first end of the above-mentioned organic light-emitting diode, and the second end of the above-mentioned organic light-emitting diode is connected to the ground.

[0010] As an optional example, when the switching unit includes a P-type thin film transistor, the gate of the P-type thin film transistor is connected to the first scan line of its row, and the source and drain of the P-type thin film transistor are respectively connected to the data line of its column.

[0011] As an optional example, the first scan lines are at the first level line by line, and when the first target scan line is at the first level, the second target scan line is at the second level, wherein the first target scan line is any one of the first scan lines, and the second target scan line is all of the first scan lines except the first target scan line.

[0012] As an optional example, when the first scan line is at a first level, the P-type thin film transistor connected to the first scan line is turned off, and the data line connected to the P-type thin film transistor is disconnected; when the first scan line is at a second level, the P-type thin film transistor connected to the first scan line is turned on, and the data line connected to the P-type thin film transistor is connected.

[0013] In a second aspect, the present application provides an OLED display panel, comprising the above circuit driving device.

[0014] In an embodiment of the present application, a plurality of rows of pixel driving circuits are used, and each row of the pixel driving circuits includes a first scan line, a plurality of pixel driving units, and a switch unit. The first end of the pixel driving unit is connected to the first scan line of the row where it is located, and the second end of the pixel driving unit is connected to the data line of the column where it is located. The switch unit is connected to the data line. The first scan line is at the first level row by row. When the first target scan line is at the first level, the target switch unit is closed. The first target scan line is any one of the first scan lines, and the target switch unit is a circuit driving device of the switch unit of the row where the first target scan line is located. Since the data line is divided into multiple sections by the switch unit in the circuit driving device, the data line is divided into two situations before the row and after the row through the switch unit. The data line before the row will be disconnected from the data input terminal, and the data line of the row and after will be connected to the data line input terminal. The coupling frequency of the voltage change on the data line to the power supply is reduced by half, and the parasitic capacitance before the row will not participate in the change of data. Thereby, the purpose of reducing power consumption and reducing the occurrence of crosstalk is achieved, and the technical problem of circuit driving crosstalk caused by changes in data on the data line of the OLED display panel is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0016] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0017] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0018] Figure 1 This is a schematic diagram of the structure of the smallest pixel driving unit of OLED;

[0019] Figure 2 It is a schematic diagram of the structure of a circuit driving device of an OLED display panel in the prior art;

[0020] Figure 3 is a schematic structural diagram of a circuit driving device of an optional OLED display panel according to an embodiment of the present application;

[0021] Figure 4 It is a driving principle diagram in the prior art;

[0022] Figure 5 It is the routing distribution of data lines and power lines in the prior art;

[0023] Figure 6 This is a routing distribution diagram of data lines and power lines of a circuit driving device of an optional OLED display panel according to an embodiment of the present application;

[0024] Figure 7 is a partial circuit diagram of an optional circuit driving device of an OLED display panel according to an embodiment of the present application;

[0025] Figure 8 is a partial circuit diagram of a row of pixel driving circuits of a circuit driving device of an optional OLED display panel according to an embodiment of the present application;

[0026] Fig. 9 is a scan line timing diagram of an optional circuit driving device of an OLED display panel according to an embodiment of the present application;

[0027] Fig.10 is a schematic diagram of voltage changes of an optional circuit driving device of an OLED display panel according to an embodiment of the present application;

[0028] Fig.11 This is a partial circuit diagram of an optional circuit driving device of an OLED display panel according to an embodiment of the present application. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0030] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.

[0031] According to a first aspect of an embodiment of the present application, a circuit driving device for an OLED display panel is provided. Optionally, as Figure 3 As shown, the above circuit driving device includes:

[0032] A multi-row pixel driving circuit 302, each row of the pixel driving circuit includes a first scan line 3022, a plurality of pixel driving units 3024 and a switch unit 3026, the first end of the pixel driving unit is connected to the first scan line of the row where it is located, the second end of the pixel driving unit is connected to the data line of the column where it is located, the switch unit is connected to the data line, the first scan line is a first level row by row, when the first target scan line is the first level, the target switch unit is closed, wherein the first target scan line is any one of the first scan lines, and the target switch unit is the switch unit of the row where the first target scan line is located.

[0033] Alternatively, if Figure 4 The driving principle diagram in the prior art is respectively the timing of the scan line and the data line. According to the driving principle, each time the scan line is turned on, the data will change once, and the data line Data and the power supply VDD run through the entire panel, so each data change will be coupled to VDD through the entire data line, so that the image is displayed. Figure 5 As shown in the original routing diagram of the data line Data and VDD of the prior art, the entire display area has overlaps between the two. It is because of this setting that the parasitic capacitance is relatively large. It is difficult to reduce the parasitic capacitance value to an infinitely small value in the hardware part, but this phenomenon can be improved again from the driving level. Therefore, in this embodiment, Figure 6 The current routing distribution diagram of the data line Data and VDD is shown in the diagram, which is the general idea of ​​this article. By adding multiple switch units, the data line Data is cut into multiple parts during data transmission. Specifically, the switch unit is connected in series between each row of pixel drivers. According to the switch unit, the data line Data is divided into two situations: before this row, and after this row. The data line Data before this row will be disconnected from the data input terminal, and the data line Data in this row and after will be connected to the data line input terminal. The data line Data is cut into V segments (V is the V value of the display resolution H*V, that is, the number of rows). The change in voltage on the data line Data reduces the coupling frequency of VDD by half, thereby reducing the occurrence of crosstalk by half. The parasitic capacitance before this row will not participate in the change of data, so that power consumption can be reduced.

[0034] As an optional example, when the first target scan line is at the first level, the second target scan line is at the second level, wherein the second target scan lines are all scan lines in the first scan line except the first target scan line, and the second level is opposite to the first level.

[0035] Optionally, in this embodiment, if Figure 7 As shown in a partial circuit diagram of a circuit driving device, the circuit driving device includes three rows of pixel driving circuits, one pixel driving circuit includes a first scanning line (702), and the pixel driving circuits (1) are charged row by row. When the first scanning line (702(1)) of the first row is at a high level (first level), the first pixel driving circuit (1) is charged, and the first scanning lines of the remaining rows are at a low level (second level). When the first row of pixel driving circuits (1) is charged, the first scanning line (702(1)) of the first row is at a low level, the first scanning line (702(2)) of the second row is at a high level, the second row of pixel driving circuits (2) starts to charge, and the first scanning lines of the remaining rows are at a low level. When the second row of pixel driving circuits (2) is charged, the first scanning line (702(2)) of the second row is at a low level, the first scanning line (702(3)) of the third row is at a high level, the third row of pixel driving circuits (3) starts to charge, and the first scanning lines of the remaining rows are at a low level. When the third row of pixel driving circuits (3) are fully charged, the third row of first scanning line (702(3)) is at a low level, and so on, until all rows of pixel driving circuits are fully charged.

[0036] As an optional example, in the case where the switching unit includes a second scan line and a plurality of first N-type thin film transistors, one pixel driving unit corresponds to one first N-type thin film transistor, a gate of the first N-type thin film transistor is connected to the second scan line of its row, and a source and a drain of the first N-type thin film transistor are respectively connected to a data line of its column.

[0037] Optionally, in this embodiment, if Figure 8 As shown in the partial circuit diagram of a row of pixel driving circuits, a row of pixel driving circuits adds a second scanning line (804) and a plurality of N-type thin film transistors, and an N-type thin film transistor is added to each data line, such as Figure 8 T31 is the first N-type thin film transistor of the third row pixel driving circuit, wherein the gate of the N-type thin film transistor T31 is connected to the second scan line (804) of the row where it is located, and the source and drain of the N-type thin film transistor T31 are respectively connected to the data line of the column where it is located. Similarly, each row of pixel driving units adds a second scan line, and the pixel driving unit adds an N-type thin film transistor, the gate of the newly added N-type thin film transistor is connected to the newly added scan line of the row where it is located, and the source and drain of the newly added N-type thin film transistor are respectively connected to the data line of the column where it is located.

[0038] As an optional example, when the first scan line is at the first level, the second scan line is at the second level, and the first N-type thin film transistor connected to the second scan line is turned off; when the first scan line is at the second level, the second scan line is at the first level, and the first N-type thin film transistor connected to the second scan line is turned on.

[0039] As an optional example, when the first N-type thin film transistor is turned on, the data line connected to the first N-type thin film transistor is connected; when the first N-type thin film transistor is turned off, the data line connected to the first N-type thin film transistor is disconnected.

[0040] Optionally, in this embodiment, if Fig. 9 As shown in the scan line timing diagram, the timing of the first scan line and the second scan line of each row is opposite, and it is necessary to ensure that other rows before the first scan line cannot receive data, that is, they are isolated by the N-type thin film transistor T31. That is, when the first scan line of this row is at a high level (VGH), this row is turned on and the N-type thin film transistor T31 is turned off to ensure that the previous data line does not receive signals. When the first scan line of this row is at a low level (VGL), this row is turned off and the N-type thin film transistor T31 is turned on until the first scan line is turned on and off next time.

[0041] Optionally, in this embodiment, if Figure 7 As shown in the partial circuit diagram of the circuit driving device, a second scanning line (704) is added to each row, and an N-type thin film transistor Tnm is added between the N-type thin film transistor T1 controlling charging in the current row and the N-type thin film transistor T1 in the previous row, and the gates thereof are connected to the second scanning line (704). The timing of the second scanning line (704) is opposite to that of the first scanning line (702). Overall, if the first scanning line (702(2)) of the second row is at a high level and the pixel driving circuit of the second row is charged, the second scanning line (704(2)) of the second row controls the N-type thin film transistors T21 and T22 to be turned off, so that the data lines thereafter are disconnected. Then, the voltage change on the data line will not affect the VDD having a parasitic capacitance with this part, and thus will not cause interference. When the current row is charged, the first scan line (702(2)) of the second row is at a low level, the second scan line (704(2)) of the second row is at a high level, and the second scan line (704(2)) of the second row controls the N-type thin film transistors T21 and T22 to turn on. Then the first scan line (702(3)) of the third row is at a high level, and the second scan line (704(3)) of the third row is at a low level. In particular, with respect to the second scan line (704), except when the current row is charged, it is turned off, and the rest of the time it is turned on, which is exactly the opposite of the logic of the N-type thin film transistor T1 responsible for charging.

[0042] Optionally, in this embodiment, because the device displays the data on the data line except for the data required for charging and discharging, the voltage and current are provided by VDD and VSS during the rest of the luminous time, so this design does not affect charging or device display. Fig.10 Shown are the old and new designs Figure 7Schematic diagram of the voltage changes at points A, B, and C on the data line. Data line (A), data line (B), and data line (C) are respectively Figure 7 From the three points A, B, and C on the data line, it can be seen that except for the voltage at point A before the first scan line (702(1)) of the first row is turned on, there is no voltage in other time periods. Similarly, except for the voltage at point B before the first scan line (702(1)) of the first row and the first scan line (702(2)) of the second row are turned on, there is no voltage in other time periods, and so on. Because the display screen is effectively distributed according to rows and the data lines are cut and isolated, the coupling of parasitic capacitance is improved, thereby reducing the occurrence of crosstalk. Because the parasitic capacitance on the data line will increase power consumption when charging and discharging, the timing control will reduce the parasitic capacitance when the data is charged and discharged, and the power consumption is also reduced.

[0043] As an optional example, a pixel driving unit includes a capacitor, a second N-type thin film transistor, a third N-type thin film transistor and an organic light emitting diode, the first end of the capacitor is connected to the drain of the second N-type thin film transistor and the gate of the third N-type thin film transistor, the second end of the capacitor is connected to a power supply, the gate of the second N-type thin film transistor is connected to the first scan line of its row, the source of the second N-type thin film transistor is connected to the data line of its column, the source of the third N-type thin film transistor is connected to the power supply, the drain of the third N-type thin film transistor is connected to the first end of the organic light emitting diode, and the second end of the organic light emitting diode is connected to ground.

[0044] Optionally, in this embodiment, the circuit structure of a pixel driving unit is as follows: Figure 8 As shown, it includes a capacitor C, a second N-type thin film transistor T1, a third N-type thin film transistor T2 and an organic light emitting diode OLED, a first end of the capacitor C is connected to the drain of the second N-type thin film transistor T1 and the gate of the third N-type thin film transistor T2, a second end of the capacitor C is connected to a power supply VDD, a gate of the second N-type thin film transistor T1 is connected to a first scan line (802) in its row, a source of the second N-type thin film transistor T1 is connected to a data line in its column, a source of the third N-type thin film transistor T2 is connected to the power supply VDD, a drain of the third N-type thin film transistor T2 is connected to a first end of the organic light emitting diode OLED, and a second end of the organic light emitting diode OLED is connected to a ground VSS.

[0045] As an optional example, when the switch unit includes a P-type thin film transistor, the gate of the P-type thin film transistor is connected to the first scan line of its row, and the source and drain of the P-type thin film transistor are respectively connected to the data line of its column.

[0046] Optionally, in this embodiment, for Figure 7 , can also be designed as Fig.11 The circuit diagram shown in FIG. 1 shows that no scan line is added, and the N-type thin film transistor needs to be changed into a P-type thin film transistor. That is, a new P-type thin film transistor is added to the pixel driving unit, and the gate of the new P-type thin film transistor is connected to the scan line of the row where it is located, and the source and drain of the new P-type thin film transistor are respectively connected to the data line of the column where it is located.

[0047] As an optional example, the first scan line is at the first level line by line, and when the first target scan line is at the first level, the second target scan line is at the second level, wherein the first target scan line is any one of the first scan lines, and the second target scan line is all of the first scan lines except the first target scan line.

[0048] Optionally, in this embodiment, if Fig.11 In the circuit diagram shown, the pixel driving circuits are charged row by row. When the first scan line (1102(1)) of the first row is at a high level, the pixel driving circuit of the first row is charged, and the first scan lines of the remaining rows are at a low level. When the pixel driving circuit of the first row is fully charged, the first scan line (1102(1)) of the first row is at a low level, the first scan line (1102(2)) of the second row is at a high level, the pixel driving circuit of the second row starts to charge, and the first scan lines of the remaining rows are at a low level. When the pixel driving circuit of the second row is fully charged, the first scan line (1102(2)) of the second row is at a low level, the first scan line (1102(3)) of the third row is at a high level, the pixel driving circuit of the third row starts to charge, and the first scan lines of the remaining rows are at a low level. When the pixel driving circuit of the third row is fully charged, the first scan line (1102(3)) of the third row is at a low level, and so on, until the pixel driving circuits of all rows are fully charged.

[0049] As an optional example, when the first scan line is at a first level, the P-type thin film transistor connected to the first scan line is turned off, and the data line connected to the P-type thin film transistor is disconnected; when the first scan line is at a second level, the P-type thin film transistor connected to the first scan line is turned on, and the data line connected to the P-type thin film transistor is connected.

[0050] Optionally, in this embodiment, if Fig.11In the circuit diagram shown, if the first scan line (1102(2)) of the second row is at a high level and the pixel driving circuit of the second row is charging, the first scan line (1102(2)) of the second row controls the P-type thin film transistors T21 and T22 to turn off, so that the data line after it is disconnected, then the voltage change on the data line will not affect the VDD with parasitic capacitance with this part, and thus will not cause interference. When the charging of this row is completed, the first scan line (1102(2)) of the second row is at a low level, and the first scan line (1102(2)) of the second row controls the P-type thin film transistors T21 and T22 to turn on, and then the first scan line (1102(3)) of the third row is at a high level. As for the P-type thin film transistor, except when it is turned off when charging this row, it is turned on at other times, which is exactly the opposite of the logic of the N-type thin film transistor T1 responsible for charging. Because the display screen is effectively distributed according to rows and the data lines are cut and isolated, the coupling of the parasitic capacitance is improved, thereby reducing the occurrence of crosstalk. Because the parasitic capacitance on the data line will increase power consumption when charging and discharging, the timing control will reduce the parasitic capacitance when the data is charged and discharged, so the power consumption is also reduced.

[0051] It should be noted that, for the aforementioned circuit driving device embodiments, for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described action sequence, because according to the present application, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0052] According to another aspect of the embodiments of the present application, an OLED display panel is provided, comprising the above circuit driving device.

[0053] For other examples of this embodiment, please refer to the above examples and will not be repeated here.

Claims

1. A circuit driving device for an OLED display panel, characterized in that: It includes multiple rows of pixel driving circuits, each row of the pixel driving circuit includes a first scan line, multiple pixel driving units and a switch unit, the first end of the pixel driving unit is connected to the first scan line of the row where it is located, the second end of the pixel driving unit is connected to the data line of the column where it is located, the switch unit is connected to the data line, the first scan line is a first level row by row, when the first target scan line is the first level, the target switch unit is closed, wherein the first target scan line is any one of the first scan lines, and the target switch unit is the switch unit of the row where the first target scan line is located.

2. The circuit driving device according to claim 1, characterized in that: When the first target scan line is at a first level, the second target scan line is at a second level, wherein the second target scan lines are all scan lines in the first scan lines except the first target scan line, and the second level is opposite to the first level.

3. The circuit driving device according to claim 2, characterized in that: In the case where the switch unit includes a second scan line and a plurality of first N-type thin film transistors, one pixel driving unit corresponds to one first N-type thin film transistor, a gate of the first N-type thin film transistor is connected to the second scan line of its row, and a source and a drain of the first N-type thin film transistor are respectively connected to a data line of its column.

4. The circuit driving device according to claim 3, characterized in that: When the first scan line is at the first level, the second scan line is at the second level, and the first N-type thin film transistor connected to the second scan line is turned off; when the first scan line is at the second level, the second scan line is at the first level, and the first N-type thin film transistor connected to the second scan line is turned on.

5. The circuit driving device according to claim 4, characterized in that: When the first N-type thin film transistor is turned on, the data line connected to the first N-type thin film transistor is connected; when the first N-type thin film transistor is turned off, the data line connected to the first N-type thin film transistor is disconnected.

6. The circuit driving device according to claim 1, characterized in that: One of the pixel driving units includes a capacitor, a second N-type thin film transistor, a third N-type thin film transistor and an organic light emitting diode, wherein a first end of the capacitor is connected to a drain of the second N-type thin film transistor and a gate of the third N-type thin film transistor, a second end of the capacitor is connected to a power supply, a gate of the second N-type thin film transistor is connected to a first scan line of a row where the second N-type thin film transistor is located, a source of the second N-type thin film transistor is connected to a data line of a column where the second N-type thin film transistor is located, a source of the third N-type thin film transistor is connected to a power supply, a drain of the third N-type thin film transistor is connected to a first end of the organic light emitting diode, and a second end of the organic light emitting diode is connected to ground.

7. The circuit driving device according to claim 2, characterized in that: In the case where the switch unit includes a P-type thin film transistor, a gate of the P-type thin film transistor is connected to the first scan line in its row, and a source and a drain of the P-type thin film transistor are respectively connected to a data line in its column.

8. The circuit driving device according to claim 7, characterized in that: The first scan lines are at the first level line by line, and when the first target scan line is at the first level, the second target scan line is at the second level, wherein the first target scan line is any one of the first scan lines, and the second target scan line is all of the first scan lines except the first target scan line.

9. The circuit driving device according to claim 8, characterized in that: When the first scan line is at a first level, the P-type thin film transistor connected to the first scan line is turned off, and the data line connected to the P-type thin film transistor is disconnected; when the first scan line is at a second level, the P-type thin film transistor connected to the first scan line is turned on, and the data line connected to the P-type thin film transistor is connected.

10. An OLED display panel, characterized in that: The OLED display panel comprises the circuit driving device according to any one of claims 1 to 9.

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