Data transmission method and computing device
By introducing transit devices in data transmission, the technology of high -speed serial bus and mailbox channel is used to realize the indirect transmission of data, solve the problem of data transmission convenience and hardware costs in existing technologies, improve transmission efficiency and network performance Essence
Patent Information
- Application Number
- CN202411379985.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-01-28
AI Technical Summary
The prior art is difficult to improve the convenience of data transmission, realize indirect transmission, reduce physical connections, and reduce the hardware cost of data transmission.
The indirect transmission of data through the transit device, the transit device and the data sending device and data receiving equipment are connected through a high -speed serial bus, and the indirect transmission technology of the mailbox channel and the high -speed serial bus can be used to achieve data transmission.
It improves the convenience of data transmission, reduces physical connections, reduces the hardware cost of data transmission, and supports the function of plugging and plugging. It is suitable for data transmission across larger geographical areas.
Smart Images

Figure CN119377140A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of communication technology, and in particular to a method and computing device for transmitting data. Background Art
[0002] Communication plays an extremely important role in modern society. With the development of science and technology, communication technology has evolved from the initial telegraph and telephone to more advanced methods such as wireless communication and optical fiber communication. With the development of technology, it is particularly important to continue to improve the transmission speed and convenience, reduce the cost of data transmission, and meet the growing demand for data processing.
[0003] Therefore, a technical solution is needed to improve the convenience of data transmission, realize indirect transmission, reduce physical connections, and reduce the hardware cost of data transmission. Summary of the invention
[0004] The present invention aims to provide a method and computing device for transmitting data, which can improve the convenience of data transmission, realize indirect transmission, reduce physical connections, and reduce the hardware cost of data transmission.
[0005] According to one aspect of the present invention, a method for transmitting data is provided, the method being used to transmit data from a data sending device to a data receiving device through a transfer device, the data sending device, the transfer device and the data receiving device being cascaded high-speed serial bus devices, the method comprising:
[0006] The data sending device transmits the data to the storage device of the transfer device in a second manner;
[0007] The transfer device receives a first interrupt sent from the data sending device in a first manner;
[0008] After receiving the first interrupt, the transfer device receives an address message and sends the address message to a high-speed serial bus device driver of the transfer device;
[0009] The high-speed serial bus device driver of the transfer device transmits the data at the corresponding address to the memory of the data receiving device through the second method according to the address message.
[0010] According to some embodiments, the high-speed serial bus device driver and the mailbox driver of the transit device are located in the kernel layer of the transit device.
[0011] According to some embodiments, the first mode is a mailbox channel reception interruption;
[0012] The second method is high-speed serial bus direct memory access indirect transmission.
[0013] According to some embodiments, the second method is implemented by calling and executing a high-speed serial bus direct memory access indirect transfer instruction;
[0014] The high-speed serial bus direct memory access indirect transfer instruction is encapsulated in a control function.
[0015] According to some embodiments, after the memory of the data receiving device receives the data, the data receiving device sends a data transmission completion message to the high-speed serial bus device driver of the first device.
[0016] According to some embodiments, when the data sending device is powered on, a high-speed serial bus device driver of the data sending device is automatically loaded at the core layer.
[0017] According to some embodiments, when the transit device is powered on, the high-speed serial bus device driver and mailbox driver of the transit device are automatically loaded at the core layer.
[0018] According to some embodiments, the application layer of the data sending device executes the transmission of data to the memory of the transit device by the second method;
[0019] The application layer of the transfer device receives a first interrupt sent from the data sending device in a first manner, receives an address message, and sends the address message to the high-speed serial bus device driver of the transfer device.
[0020] According to another aspect of the present invention, a computer program product is provided, comprising a computer program, wherein when the computer program is executed by a processor, the method as described above is implemented.
[0021] According to another aspect of the present invention, there is provided a computing device, comprising:
[0022] Processor; and
[0023] A memory storing a computer program, which, when executed by the processor, enables the processor to execute any of the methods described above.
[0024] According to an embodiment of the present invention, the transfer memory of the transfer device receives data from the data sending device, and then the transfer device receives an interrupt sent from the data sending device in a first manner, sends a data receiving success message to the high-speed serial bus device driver after receiving the interrupt, and then transmits the data on the transfer memory to the memory of the data receiving device in a second manner. The present invention can improve the convenience of data transmission, realize indirect transmission, reduce physical connections, and reduce the hardware cost of data transmission.
[0025] According to some embodiments, the transit device may extend the physical range of the network, allowing data to be transmitted across a larger geographic area, thereby building a larger transmission area.
[0026] According to some embodiments, the use of a transfer device can improve the efficiency of data transmission and improve network performance. The use of a transfer device can alleviate network congestion, and by properly configuring the transfer device, load balancing can be achieved to avoid overloading of certain links, thereby improving the performance of the overall network.
[0027] According to some embodiments, the transit device supports a plug-and-play function, which means that when a new device needs to be added or the network structure needs to be changed, it only needs to be simply connected to the corresponding port without rewiring or large-scale adjustments to the existing network.
[0028] It is to be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for describing the embodiments are briefly introduced below.
[0030] Figure 1 A flow chart of a method for transmitting data according to an example embodiment is shown.
[0031] Figure 2 A schematic diagram of a data transmission device according to an example embodiment is shown.
[0032] Figure 3 A schematic diagram showing the operation of a data transmission device according to an example embodiment is shown.
[0033] Figure 4 A block diagram of a computing device is shown according to an exemplary embodiment. DETAILED DESCRIPTION
[0034] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present invention will be comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar parts, and thus their repeated description will be omitted.
[0035] In addition, the described features, structures or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present invention. However, those skilled in the art will appreciate that the technical solution of the present invention can be practiced without one or more of the specific details, or other methods, components, devices, steps, etc. may be adopted. In other cases, known methods, devices, implementations or operations are not shown or described in detail to avoid blurring various aspects of the present invention.
[0036] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.
[0037] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.
[0038] It should be understood that although the terms first, second, third, etc. may be used herein to describe various components, these components should not be limited by these terms. These terms are used to distinguish one component from another component. Therefore, the first component discussed below can be referred to as the second component without departing from the teachings of the present inventive concept. As used herein, the term "and / or" includes any one of the associated listed items and all combinations of one or more.
[0039] The user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in the present invention are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.
[0040] Those skilled in the art will appreciate that the drawings are merely schematic diagrams of example embodiments, and the modules or processes in the drawings are not necessarily necessary for implementing the present invention, and therefore cannot be used to limit the protection scope of the present invention.
[0041] PCIe has become an indispensable part of modern computing systems with its high bandwidth and low latency, and is crucial to improving computer performance. However, during long-distance transmission, the signal strength will be weakened due to the loss of the physical medium, resulting in a decrease in signal quality at the receiving end. On the transmission line, if the impedance is not matched or the line design is improper, reflections and crosstalk may occur, affecting the accuracy of data transmission. In hardware device applications, how to reduce power consumption while ensuring transmission performance is a challenge. Hardware transmission needs to support multiple transmission protocols and ensure interoperability with other devices. Compliance with industry standards and passing necessary certifications are prerequisites for entering the market, which also increases the complexity of the design.
[0042] To this end, the present invention proposes a method for transmitting data, which can improve the convenience of data transmission, realize indirect transmission, reduce physical connections, and reduce the hardware cost of data transmission.
[0043] Before describing the embodiments of the present invention, some terms or concepts involved in the embodiments of the present invention are explained.
[0044] PCIe EP: terminal device, in the PCIe architecture, refers to the terminal device connected to other devices. EP is a functional entity on the PCIe bus, which can be various types of I / O devices, such as graphics cards, sound cards, network cards, storage controllers, etc. PCIeEP, as a key component of the PCIe bus system, is responsible for realizing high-speed and efficient data interaction between I / O devices and the system, and supports flexible resource configuration and advanced power management features.
[0045] Mailbox: Mailbox is a mechanism for communication between PCIe devices, especially in scenarios such as embedded systems, SoCs, or GPUs. Mailbox is usually a special memory area that allows asynchronous, non-blocking message passing between devices.
[0046] Exemplary embodiments of the present invention are described below with reference to the accompanying drawings.
[0047] Figure 1 A flow chart of a method for transmitting data according to an example embodiment is shown.
[0048] See also Figure 1 The present invention is to realize the high-speed serial bus (PCIe) indirect transmission technology through mailbox (Mailbox) and high-speed serial bus direct access memory (PCIe DMA). Figure 2 As shown, when three PCIe devices are cascaded and the data sending device needs to access the data in the memory (DDR) of the data receiving device, the method of the present invention can be used. The work of each communication device can be seen in Figure 3 .
[0049] In S101, the data sending device transmits data to the memory of the transfer device in a second manner.
[0050] When the data sending device is turned on, the high-speed serial bus device driver of the data sending device is automatically loaded, and the application of the data sending device is run. When the transfer device is turned on, the high-speed serial bus device driver and mailbox driver of the transfer device are automatically loaded.
[0051] According to some embodiments, most functions of the driver are encapsulated in a control function (ioctl function), which is a member function of the struct file operations structure. In order to distinguish each function, an instruction code type is defined for each function. In this way, when the application calls ioctl, different types are passed in to implement different functions. The PCIe DMA indirect transmission interface of the data sending device is encapsulated in ioctl, and the ioctl interface command type is 100, that is, the high-speed serial bus directly accesses the memory indirect transmission instruction type100.
[0052] When the data transmission device starts, the automatic loading of the device driver is usually achieved through the configuration of the operating system kernel. For PCIe devices and the system's Mailbox mechanism, their drivers are usually dynamically loaded when the operating system detects the corresponding hardware.
[0053] According to some embodiments, PCIe is an input / output interface standard for connecting high-speed devices to a computer's motherboard, providing higher bandwidth and better performance. PCIe uses a point-to-point serial connection, which means that each device has a link directly connected to the processor, which makes data transfer more efficient and faster.
[0054] Compared with the old parallel bus architecture, PCIe provides a significant bandwidth improvement, supports sending and receiving data at the same time, improves data transmission efficiency, and supports hot-plugging, allowing users to add or remove devices without shutting down the system. PCIe devices can choose different channel numbers as needed to meet the needs of different devices.
[0055] According to some embodiments, when it comes to loading the driver of the PCIe device, the operating system will usually automatically detect and load the required driver during the boot process. This is because the PCIe device follows the plug-and-play principle and can be identified and configured by the system without manual intervention.
[0056] In S103, the transfer device receives a first interrupt sent from the data sending device in a first manner.
[0057] According to some embodiments, the first mode is a mailbox channel reception interruption.
[0058] The transit device uses the mailbox mechanism to handle interrupts. Mailbox can improve the response speed and efficiency of the system, especially when a large number of interrupts need to be handled. The mailbox mechanism is usually used for asynchronous communication, especially in situations where frequent interactions are required between devices. It provides a reliable way to deliver messages or interrupt notifications.
[0059] According to some embodiments, the method of the present invention implements Mailbox through a driver. During the initialization of the driver, the Mailbox needs to be configured, including setting the relevant register address or memory area, and configuring the interrupt handler; when an interrupt occurs, the driver reads the message in the Mailbox according to the preset interrupt handling process, and performs corresponding actions according to the message content; in order to ensure the consistency and integrity of the data, a lock or other synchronization mechanism is usually used to protect the code path accessing the Mailbox.
[0060] The data sending device calls the high-speed serial bus direct access memory indirect transmission instruction type100 in the ioctl function. The data sending device first transmits the data to the memory DDR of the transfer device, and then the data sending device sends a mailbox interrupt to the transfer device, waiting for the completion of the data transmission to the transfer device.
[0061] In S105, after receiving the interrupt, the transfer device receives an address message and sends the address message to the high-speed serial bus device driver of the transfer device.
[0062] According to some embodiments, when data transmission arrives, the data sending device sends an interrupt signal to the transit device through the Mailbox mechanism. After receiving the interrupt signal, the Mailbox driver of the transit device reads the data in the Mailbox. The Mailbox driver sends a confirmation message to the PCIe EP driver, indicating that the data has been successfully received.
[0063] According to some embodiments, during the driver initialization phase, it is necessary to register an interrupt handler to handle interrupts from the transit device, configure the Mailbox, including setting the relevant register address or memory area, and configure the PCIe EP driver interface. When an interrupt occurs, the interrupt handler will be called, read the interrupt information in the Mailbox, and process the corresponding data according to the read information. Send a confirmation message, the data processing is completed, and send a confirmation message to the PCIe EP driver.
[0064] In S107, the high-speed serial bus device driver of the transfer device transmits the data at the corresponding address to the memory of the data receiving device in a second manner according to the address message.
[0065] According to some embodiments, the second method is a high-speed serial bus direct memory access indirect transmission. The second method is implemented by calling and executing a high-speed serial bus direct memory access indirect transmission instruction; the high-speed serial bus direct memory access indirect transmission instruction is encapsulated in a control function. After the memory of the data receiving device receives the data, the data receiving device sends a data transmission completion message to the high-speed serial bus device driver of the first device.
[0066] After receiving the message, the PCIe ep driver on the transit device transfers the data on the DDR of the transit device to the memory DDR of the data receiving device. After the transmission is completed, a message is sent to the PCIe ep driver of the data sending device to inform it of the completion of the transmission, thereby realizing data transmission from the data sending device to the data receiving device.
[0067] Figure 2 A schematic diagram of a data transmission device according to an example embodiment is shown.
[0068] According to some embodiments, the application program of the data sending device is located in the application layer of the data sending device; the high-speed serial bus device driver is located in the kernel layer of the data sending device. The high-speed serial bus device driver and mailbox driver of the transfer device are located in the kernel layer of the transfer device.
[0069] The data sending device and the transfer device perform data transmission and communication via the high-speed serial bus PCIe and Mailbox, and the transfer device and the data receiving device perform data transmission and communication via PCIe.
[0070] The advantage of the data transmission method of the present invention is that communication can be achieved without a physical direct connection, and a method for indirect data transmission is provided to reduce physical connections.
[0071] Figure 4 A block diagram of a computing device according to an example embodiment of the invention is shown.
[0072] like Figure 4 As shown, computing device 30 includes processor 12 and memory 14. Computing device 30 may also include bus 22, network interface 16, and I / O interface 18. Processor 12, memory 14, network interface 16, and I / O interface 18 may communicate with each other via bus 22.
[0073] The processor 12 may include one or more general-purpose CPUs (Central Processing Units, processors), microprocessors, or application-specific integrated circuits, etc., for executing relevant program instructions.
[0074] The memory 14 may include a machine system readable medium in the form of a volatile memory, such as a random access memory (RAM), a read-only memory (ROM) and / or a cache memory. The memory 14 is used to store one or more programs including instructions and data. The processor 12 can read the instructions stored in the memory 14 to execute the above-mentioned method according to the embodiment of the present invention.
[0075] The computing device 30 may also communicate with one or more networks via the network interface 16. The network interface 16 may be a wireless network interface.
[0076] The bus 22 may include an address bus, a data bus, a control bus, etc. The bus 22 provides a path for exchanging information between components.
[0077] It should be noted that, in the specific implementation process, the computing device 30 may also include other components necessary for normal operation. In addition, those skilled in the art may understand that the above device may only include components necessary for implementing the embodiments of this specification, and need not include all components shown in the figure.
[0078] The present invention also provides a computer-readable storage medium having a computer program stored thereon, which implements the steps of the above method when executed by a processor. The computer-readable storage medium may include, but is not limited to, any type of disk, including a floppy disk, an optical disk, a DVD, a CD-ROM, a microdrive, and a magneto-optical disk, a ROM, a RAM, an EPROM, an EEPROM, a DRAM, a VRAM, a flash memory device, a magnetic card or an optical card, a nanosystem (including a molecular memory IC), a network storage device, a cloud storage device, or any type of medium or device suitable for storing instructions and / or data.
[0079] An embodiment of the present invention also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to execute part or all of the steps of any method recorded in the above method embodiments.
[0080] Those skilled in the art can clearly understand that the technical solution of the present invention can be implemented with the help of software and / or hardware. "Unit" and "module" in this specification refer to software and / or hardware that can independently complete or cooperate with other components to complete specific functions, where the hardware can be, for example, a field programmable gate array, an integrated circuit, etc.
[0081] It should be noted that, for the above-mentioned method embodiments, for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should know that the present invention is not limited by the described action sequence, because according to the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.
[0082] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0083] In the several embodiments provided by the present invention, it should be understood that the disclosed devices can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some service interfaces, and the indirect coupling or communication connection of devices or units can be electrical or other forms.
[0084] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0085] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.
[0086] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or the whole or part of the technical solution can be embodied in the form of a software product, which is stored in a memory and includes several instructions for a computer device (which can be a personal computer, server or network device, etc.) to perform all or part of the steps of the methods of various embodiments of the present invention.
[0087] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0088] The exemplary embodiments of the present invention are specifically shown and described above. It should be understood that the present invention is not limited to the detailed structures, configurations or implementations described herein; on the contrary, the present invention is intended to cover various modifications and equivalent configurations included in the spirit and scope of the appended clauses.
Claims
1. A method for transmitting data, characterized in that: The method is used to transmit data from a data sending device to a data receiving device through a transfer device, wherein the data sending device, the transfer device and the data receiving device are cascaded high-speed serial bus devices, and the method comprises: The data sending device transmits the data to the storage device of the transfer device in a second manner; The transfer device receives a first interrupt sent from the data sending device in a first manner; After receiving the first interrupt, the transfer device receives an address message and sends the address message to a high-speed serial bus device driver of the transfer device; The high-speed serial bus device driver of the transfer device transmits the data at the corresponding address to the memory of the data receiving device through the second method according to the address message.
2. The method according to claim 1, characterized in that The high-speed serial bus device driver and mailbox driver of the transfer device are located in the kernel layer of the transfer device.
3. The method according to claim 1, characterized in that The first mode is the mailbox channel receiving interruption; The second method is high-speed serial bus direct memory access indirect transmission.
4. The method according to claim 3, characterized in that The second method is implemented by calling and executing a high-speed serial bus direct memory access indirect transfer instruction; The high-speed serial bus direct memory access indirect transfer instruction is encapsulated in a control function.
5. The method according to claim 1, characterized in that Also includes: After the memory of the data receiving device receives the data, the data receiving device sends a data transmission completion message to the high-speed serial bus device driver of the first device.
6. The method according to claim 1, characterized in that When the data sending device is turned on, the high-speed serial bus device driver of the data sending device is automatically loaded in the core layer.
7. The method according to claim 1, characterized in that When the transfer device is turned on, the high-speed serial bus device driver and the mailbox driver of the transfer device are automatically loaded in the core layer.
8. The method according to claim 1, characterized in that The application layer of the data sending device executes the second method to transmit the data to the memory of the transfer device; The application layer of the transfer device receives a first interrupt sent from the data sending device in a first manner, receives an address message, and sends the address message to the high-speed serial bus device driver of the transfer device.
9. A computer program product, characterized in that The method comprises a computer program, which implements the method according to any one of claims 1 to 8 when being executed by a processor.
10. A computing device, characterized in that: include: processor; as well as Case Number: A memory storing a computer program, which, when executed by the processor, enables the processor to perform the method according to any one of claims 1 to 8.