A Radix-4 FFT Parallel Processing Method

Abstract

The present invention belongs to the field of digital signal sources, and specifically discloses a radix 4 FFT parallel processing method, comprising the following steps: S1. adding sequence numbers to input data; S2. performing four butterfly operations on the sequence numbered data to obtain frequency domain output data; S3. reordering the frequency domain output data to obtain a final output signal. The present invention can perform parallel FFT operations on 256 data at the same time, with a fast operation speed and less hardware resources consumed, thus meeting the sub-band real-time decomposition requirements of the FI-DAC system.

Description

Technical Field

[0001] The invention relates to the field of digital signal sources, in particular to a radix-4 FFT parallel processing method when a broadband signal of an arbitrary wave generator is decomposed into sub-bands. Background Art

[0002] In the field of digital signal sources, arbitrary wave generators have important and extensive applications in military, test and measurement fields such as radar, communications, and electronic countermeasures due to their flexible signal synthesis methods, high frequency resolution, and frequency agility.

[0003] The arbitrary waveform generator adopts a direct digital waveform synthesis structure, and its maximum output bandwidth is limited by the sampling rate of the core device digital-to-analog converter (DAC). Given the current status of domestic chip technology, it is difficult to improve the sampling rate index of DAC chips in a short period of time.

[0004] Based on the M-channel parallel frequency interleaved DAC (FI-DAC) signal synthesis structure, the digital broadband signal x(n) to be synthesized is decomposed into multiple narrowband signals in the frequency domain, and M-channel digital baseband signals are obtained after digital down-conversion and digital down-sampling. ,… ; The digital baseband signal is converted into M analog baseband signals after digital-to-analog conversion ,… , and restored to its original frequency position under the action of the analog mixer, and finally all sub-signals are combined to obtain the required analog broadband signal. The signal synthesis technology based on FI-DAC is currently the best solution for improving the output bandwidth of arbitrary wave generators.

[0005] The FI-DAC system can perform sub-band decomposition in the time domain or in the frequency domain. Compared with the time domain decomposition method of the digital filter, the frequency domain decomposition method does not cause the problem of digital aliasing. When performing sub-band decomposition in the frequency domain, FFT operation is required for the broadband data, and the traditional FFT operation cannot achieve high-speed real-time operation. Summary of the invention

[0006] The purpose of the present invention is to overcome the shortcomings of the prior art and provide a radix-4 FFT parallel processing method, which can perform parallel FFT operations on 256 data at the same time, has a fast operation speed, consumes less hardware resources, and meets the sub-band real-time decomposition requirements of the FI-DAC system.

[0007] The objective of the present invention is achieved through the following technical scheme: A radix 4 FFT parallel processing method comprises the following steps:

[0008] S1. Add serial numbers to the input data;

[0009] S2. The data after adding the sequence number is subjected to 4 butterfly operations to obtain the frequency domain output data;

[0010] S3. Reorder the frequency domain output data to obtain a final output signal.

[0011] The beneficial effects of the present invention are as follows: the present invention can perform parallel FFT operations on 256 data at the same time, with fast operation speed and less hardware resources consumed, thus meeting the sub-band real-time decomposition requirements of the FI-DAC system; the multiplication calculation amount of the FFT of N=256 in the present method reaches The traditional FFT proposed by Cooley and Tukey requires The traditional FFT proposed by Cooley and Tukey has a multiplication calculation amount of 1024, while the multiplication calculation amount of this method is 256. The number of FPGA hardware multipliers required by this method is 1 / 4 of the traditional method, which is conducive to FPGA implementation. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a flow chart of the method of the present invention;

[0013] Figure 2 Schematic diagram of butterfly operation of radix 4 parallel FFT algorithm;

[0014] Figure 3 The signal flow structure diagram of the radix 4 parallel FFT algorithm;

[0015] Figure 4 This is a schematic diagram of digital reverse order R=4;

[0016] Figure 5 This is a schematic diagram of the effect amplitude of the radix-4 parallel FFT algorithm;

[0017] Figure 6 Phase diagram of the effect of the radix-4 parallel FFT algorithm. DETAILED DESCRIPTION

[0018] The technical solution of the present invention is further described in detail below in conjunction with the accompanying drawings, but the protection scope of the present invention is not limited to the following.

[0019] like Figure 1 As shown, a radix-4 FFT parallel processing method comprises the following steps:

[0020] S1. Add serial numbers to the input data;

[0021] S2. The data after adding the sequence number is subjected to 4 butterfly operations to obtain the frequency domain output data;

[0022] We use W= The concept of W, where the superscript W represents the numerator value added to the complex exponential, and the subscript W represents the denominator value: Next, we derive the formula for the radix-4 parallel FFT calculation:

[0023] , for the radix-4 FFT:

[0024]

[0025] To transform the parameters, we have:

[0026]

[0027]

[0028]

[0029]

[0030] Substituting formulas (6), (7), and (8) into formula (5), we obtain:

[0031]

[0032] Equation (9) is an N-point DFT because the phase factor depends on N points, not N / 4. To convert to an N / 4 DFT, we subdivide the DFT into four N / 4-point sequences, X(4 )、X(4 +1), X (4 +2) and X (4 +3). The following are formulas (10) to (13):

[0033]

[0034]

[0035]

[0036]

[0037] Among them are ;

[0038] The schematic diagram of the butterfly operation of the radix-4 parallel FFT algorithm is shown in Figure 2 The left figure shows the input-output correspondence of the butterfly operation and the corresponding rotation factor, and the right figure is the simplified butterfly operation diagram. The four input data are used in formulas (10) to (13) to obtain four output data, which are then multiplied by the rotation factors.

[0039] The 256 data inputs are numbered from 0 to 255 from top to bottom. After 4 butterfly operations, the output of each butterfly operation is multiplied by the corresponding rotation factor and becomes the input of the next butterfly operation. Finally, the frequency domain output data is obtained, and the corresponding serial numbers are reordered to become the frequency domain data of the final FFT calculation. The specific method of reordering is described in the subsequent content. The schematic diagram of the 4 butterfly operations is also the structural diagram of the FPGA operation implementation, see Figure 3 .

[0040] In the first butterfly operation, 256 numbers are recorded as a set, and the set is divided into 4 groups, each with 64 numbers. The 4 numbers in the corresponding positions of the 4 groups are input according to Figure 2 The method shown is based on formulas (10) to (13) to obtain 4 sets of 4 numbers at corresponding positions. After 64 rounds of calculation, 256 numbers are obtained from top to bottom.

[0041] These 4 groups, the first group, are numbered from 0 to 63, and the data remains unchanged.

[0042] The second group, serial numbers from 64 to 127, multiply the data by ,n=0:63.

[0043] The third group, serial numbers from 128 to 191, multiply the data by ,n=0:63.

[0044] The fourth group, serial numbers from 192 to 255, multiply the data by ,n=0:63.

[0045] In the second butterfly operation, the 256 numbers are recorded as 4 sets, and the same butterfly operation is performed on each set. Taking the first set as an example, the set has 64 data. The set is divided into 4 groups, each with 16 numbers. The 4 numbers input at the corresponding positions of the 4 groups are divided into Figure 2 The method shown is based on formulas (10) to (13) to obtain 4 sets of 4 numbers at corresponding positions. After 16 rounds of calculation, the 64 numbers in this set are calculated. 64 numbers are obtained from top to bottom.

[0046] These 4 groups, the first group, are numbered from 0 to 15, and the data remains unchanged.

[0047] The second group, serial numbers from 16 to 31, multiply the data by ,n=0:15.

[0048] The third group, serial numbers from 32 to 47, multiply the data by ,n=0:15.

[0049] The fourth group, serial numbers from 48 to 63, multiply the data by ,n=0:15.

[0050] The other three sets are also operated as set 1, and the second butterfly operation is performed to obtain a total of 256 numbers.

[0051] The third butterfly operation divides the 256 numbers into 16 sets, and each set performs the same butterfly operation. Take the first set as an example. The set has 16 data. The set is divided into 4 groups, each with 4 numbers. The 4 numbers in the corresponding positions of the 4 groups are input according to Figure 2 The method shown is based on formulas (10) to (13) to obtain 4 sets of 4 numbers at corresponding positions. After 4 rounds of calculation, the 16 numbers in this set are calculated. 16 numbers are obtained from top to bottom.

[0052] Of these 4 groups, the first group, numbered from 0 to 3, has data that remains unchanged.

[0053] The second group, numbered from 4 to 7, multiply the data by ,n=0:3.

[0054] The third group, serial numbers from 8 to 11, multiply the data by ,n=0:3.

[0055] The fourth group, serial numbers from 12 to 15, multiply the data by ,n=0:3.

[0056] The other 15 sets are also operated in the same way as set 1. After the third butterfly operation, a total of 256 numbers are obtained.

[0057] The fourth butterfly operation divides the 256 numbers into 64 sets, and each set performs the same butterfly operation. Take the first set as an example. The set has 4 data. The set is divided into 4 groups, each with 1 number. The 4 numbers in the corresponding positions of the 4 groups are input according to Figure 2 The method shown is based on formulas (10) to (13) to obtain 4 sets of 4 numbers at corresponding positions. After one round of calculation, the calculation of the 4 numbers in this set is completed. From top to bottom, 4 numbers are obtained.

[0058] The other 63 sets are also operated in the same way as set 1. After the fourth butterfly operation, a total of 256 numbers are obtained.

[0059] S3. Rearrange the frequency domain output data to obtain a final output signal;

[0060] The output signal of the radix-4 parallel FFT algorithm is that the sequence numbers of the frequency domain signals are arranged in digital reverse order (R=4) and must be reordered to give the correct frequency domain signal.

[0061] like Figure 4As shown in the figure, the output sequence is in reverse order as follows: input sequence number 41, the corresponding output frequency domain sequence number is 26. If 16 data (sequence numbers 0 to 15) are processed by the radix 4 parallel FFT algorithm, the corresponding frequency domain sequence numbers of the output are: 0 4 812 1 5 9 13 2 6 10 14 3 7 11 15, see Table 1 below.

[0062] The final reordering is done by swapping the indices and reversing the values ​​in order. The following table shows the indices and their 4-bit binary values. The table shows the 16 indices for the 16-point FFT and the corresponding binary value for each index in column 2. The third column is the digitally reversed binary value of the second column. The last column is the decimal value of the sequence number corresponding to the output frequency domain data.

[0063] Table 1: The input of the radix-4 parallel FFT algorithm is 16 data, and the corresponding frequency domain index is output

[0064]

[0065] 8 152 216 40 104 168232 56 120 184 248 12 76 140 204 28 92 156 220 44 108 172 236 60 64 128 192 16 80 144 208 32 96 160 224 48 112 176 240 4 68 132 196 20 84148 21236 100 164 228 52 116 180 244 8 72 136 200 24 88 152 216 40 104 168232 56 120 184 248 12 76 140 204 28 92 156 220 44 108 172 236 60 124 188 2521 65 129 19317 81 145 209 33 97 161 225 49 113 177 241 5 69 133 197 21 85 149213 37 101 165 229 53 117 181 245 9 73 137 201 25 89 153 217 41 105 169 23357 121 185 24913 77 141 205 29 93 157 221 45 109 173 237 61 125 189 253 2 66130 194 18 82 146 210 34 98 162 226 50 114 178 242 6 70 134 198 22 86 150 21438 102 166 23054 118 182 246 10 74 138 202 26 90 154 218 42 106 170 234 58122 186 250 14 78 142 206 30 94 158 222 46 110 174 238 62 126 190 254 3 67131 195 19 83 147 21135 51 159 223 47 111 175 239 63 127 191 255 ].

[0066] In the embodiment of the present application, the simulation condition is: set the input 256 test data as: [1,1,1,1,0,0,0,…,0], the first 4 data are 1, and the other data are 0. The test data are input into the radix 4 parallel FFT algorithm and Matlab's FFT function respectively, and the complex numbers are output. The amplitude and phase of the complex numbers are calculated respectively, and the results of the two methods are compared. Figure 5~Figure 6 , the amplitude and phase are equal.

[0067] Although exemplary embodiments of the present invention have been described for illustrative purposes, it will be understood by those skilled in the art that various modifications, additions, and substitutions may be made in form and detail without departing from the scope and spirit of the invention disclosed in the appended claims, and all such changes shall fall within the scope of protection of the appended claims of the present invention, and the various steps in the method claimed for protection by the present invention may be combined together in any combination. Therefore, the description of the embodiments disclosed in the present invention is not intended to limit the scope of the present invention, but is used to describe the present invention. Accordingly, the scope of the present invention is not limited by the above embodiments, but is defined by the claims or their equivalents.

Claims

1. A radix-4 FFT parallel processing method, characterized in that: The following steps are involved: S1. Add serial numbers to the input data; S2. The data after adding the sequence number is subjected to 4 butterfly operations to obtain the frequency domain output data, including: S201. The first butterfly operation: Record 256 numbers as 1 set; In the first butterfly operation, 256 numbers are recorded as a set, which is divided into 4 groups, each with 64 numbers. N=256 is defined, and the 4 numbers at the corresponding positions of the 4 groups are calculated according to the following four transformation formulas: in, , ; , , They represent: the 4 numbers input for FFT operation, ; , , , They represent: the 4 numbers output by the FFT operation, ; represents an imaginary unit; Calculate and get 4 groups of 4 numbers at corresponding positions; after 64 rounds of calculations, get 256 numbers from top to bottom; For the 4 sets of data obtained after the operation: The first group, serial numbers from 0 to 63, the data remains unchanged; The second group, serial numbers from 64 to 127, multiply the data by ,n=0:63; The third group, serial numbers from 128 to 191, multiply the data by ,n=0:63; The fourth group, serial numbers from 192 to 255, multiply the data by ,n=0:63; Among them, n=0:63 means: the value of n is 0~63 respectively; after the processing, 256 data are obtained; S202. Second butterfly operation: In the second butterfly operation, the 256 numbers are divided into 4 sets, and the same butterfly operation is performed on each set; For the first set, which has 64 data, the set is divided into 4 groups, each with 16 numbers, and the 4 numbers input at corresponding positions of the 4 groups are calculated according to the four transformation formulas in step S201 respectively; Calculate and get 4 groups of 4 numbers at corresponding positions; after 16 rounds of calculations, the 64 numbers in this set are calculated; 64 numbers are obtained from top to bottom; Among these four groups of calculated data, the first group, numbered from 0 to 15, has unchanged data; The second group, serial numbers from 16 to 31, multiply the data by ,n=0:15; The third group, serial numbers from 32 to 47, multiply the data by ,n=0:15; The fourth group, serial numbers from 48 to 63, multiply the data by ,n=0:15; Among them, n=0:15 means: the value of n is 0~15 respectively; The other three sets also use the same operation method as the first set, and the second butterfly operation is performed to obtain a total of 256 numbers; S203. The third butterfly operation: The third butterfly operation records the 256 numbers into 16 sets, and each set performs the same butterfly operation: for the first set, the set has 16 data, and the set is divided into 4 groups, each with 4 numbers, and the 4 numbers input at the corresponding positions of the 4 groups are calculated according to the four transformation formulas in step S201 respectively; Calculate and get 4 groups of 4 numbers at corresponding positions; after 4 rounds of calculations, the 16 numbers in this set are calculated, and 16 numbers are obtained from top to bottom; Among these four groups of numbers, the first group, numbered from 0 to 3, has unchanged data; The second group, numbered from 4 to 7, multiply the data by ,n=0:3; The third group, serial numbers from 8 to 11, multiply the data by ,n=0:3; The fourth group, serial numbers from 12 to 15, multiply the data by ,n=0:3; Among them, n=0:3 means: the value of n is 0~3 respectively; The other 15 sets also use the same operation method as the first set, and the third butterfly operation is performed to obtain a total of 256 numbers; S204. The fourth butterfly operation: In the fourth butterfly operation, the 256 numbers are recorded as 64 sets, and the same butterfly operation is performed on each set. For the first set, which has 4 data, the set is divided into 4 groups, each with 1 number, and the 4 numbers input at the corresponding positions of the 4 groups are calculated according to the four transformation formulas in step S201 respectively. After one round of calculation, the 4 numbers in this set are calculated, and 4 numbers are obtained from top to bottom; The other 63 sets also use the same operation method as the first set, and the fourth butterfly operation yields a total of 256 numbers; S3. Reorder the frequency domain output data to obtain a final output signal.

2. The method of claim 1, wherein: There are 256 pieces of input data in total, which are numbered 0 to 255 in the order of input.

3. The method of claim 1, wherein: In the step S3, the frequency domain output data is reordered by digital inversion R=4.

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