Thyristor reliability evaluation method and system
By the reliability assessment method based on the Wiener process, combined with performance degraded data and life data, the problem of low data utilization rate in the existing technology has been solved, and the effective estimation of the Wiener process parameters and the accuracy improvement of the reliability assessment of the gates can be improved. Essence
Patent Information
- Application Number
- CN202411403288.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-09
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2044-10-09
AI Technical Summary
The existing thyristor reliability evaluation methods are difficult to effectively utilize the tail-cut life data and performance parameter degradation data in accelerated aging tests, resulting in low data utilization.
The reliability evaluation method based on the Wiener process is adopted, and through the maximum likelihood estimation method and GIBBS sampling method, combined with performance degraded data, failure life data, and end -end life data, it is estimated that the Wiener process parameters are estimated and calculated the surplus availability of the crystal tube.
The data utilization rate has been improved, the effective estimation of the Wiener process parameters is achieved, and the accuracy and efficiency of the reliability assessment of the gates can be improved.
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Figure CN119377593A_ABST
Abstract
Description
Background Art
[0002] High-voltage direct current transmission projects are an important way to transmit high-power electricity over long distances, and are of great significance to achieving effective energy allocation in my country. Thyristors are the core equipment of converter valves in direct current transmission projects, and reliability assessment of thyristors used in high-voltage direct current transmission projects is of great practical significance to the safe and reliable operation of power grids.
[0003] Thyristors usually have a service life of several decades, and there is little data on thyristor failures under normal service conditions. In order to obtain more aging failure data in a short period of time, thyristors are tested under a stress level higher than normal stress, which is called accelerated aging test. Most existing thyristor reliability assessment methods only analyze the life data in accelerated aging tests, and do not pay attention to the degradation of performance parameters during the thyristor aging process. This will result in a huge waste of data.
[0004] The Wiener process is a random process that is widely used in reliability assessment methods. It is suitable for describing the non-monotonic degradation process of product performance caused by a large number of random micro-losses. Thyristor aging can be regarded as a process of accumulation of a large number of random stress damages, and the degradation of thyristor performance parameters has a non-monotonic trend. Therefore, it is suitable to use the Wiener process to describe the thyristor aging process and conduct reliability assessment.
[0005] The following is an introduction to the Wiener process and its common definition in reliability assessment: The performance parameter data degradation process of a product follows the drift parameter , the diffusion parameter is Wiener process, the performance parameter degradation data is recorded as , then it satisfies the following properties: (1) The change in performance parameters from time t to time t+△t2 follows a normal distribution, that is, ; (2) For any ,Performance parameter changes and Independent of each other; (3) Y(0) = 0 and Y(t) is continuous at t = 0.
[0006] Assume that the performance parameter degradation threshold of the product is l, that is, when the performance parameter degrades to l for the first time, the product is considered to have failed. Assume that the life of the product is T, then the reliability function R(t) of the product is: (1) in, is the standard normal distribution function.
[0007] In the accelerated aging test of thyristors, there must be failure life data (life when the thyristor fails) and truncated life data (test duration of non-failed thyristors). In order to make full use of the test data, it is necessary to merge the above two types of life data with the performance parameter degradation data to jointly estimate the Wiener process parameters. and The commonly used data combination method is to directly fuse all the data to construct a joint likelihood function. However, there are transcendental functions in the likelihood function of truncated life data, which are difficult to solve directly by numerical methods. Summary of the invention
[0008] The technical problem to be solved by the present invention is to provide a thyristor reliability evaluation method and system for the above-mentioned deficiencies in the prior art, which is used to solve the technical problem that the likelihood function part of the truncated data has a transcendental function when the commonly used data combination method directly fuses all data to jointly construct a joint likelihood function, and it is difficult to directly solve it by a numerical method, so as to realize the Wiener process parameter and Estimates.
[0009] The present invention adopts the following technical solutions: A thyristor reliability assessment method comprises the following steps: S1. Using performance degradation data, calculate the estimated parameters according to the maximum likelihood estimation method The initial estimate of ; S2, the parameters to be estimated based on step S1 The initial estimate of Determine the parameters to be estimated The prior distribution of ; S3, based on the prior distribution obtained in step S2 , according to the Gibbs sampling method to obtain the parameters to be estimated Markov chain sample data; S4. Calculate the parameters to be estimated based on the Markov chain sample data obtained in step S3. The estimated value of and thyristor reliability function R (t), and the remaining useful life RUL of the thyristor is calculated.
[0010] Preferably, the parameter to be estimated The initial estimate of Specifically:
[0011]
[0012] in, is the number of discrete time points of the aging test samples, is the sample i at discrete time points The degradation data obtained by measurement, For each thyristor sample at a discrete time point, j = 0, 1, …, m. For the i Samples from time To time The degradation increment.
[0013] Preferably, the parameter to be estimated Likelihood function for: .
[0015] Preferably, the parameters to be estimated are determined The prior distribution of Specifically: When prior information is insufficient, an uninformative prior distribution is used, and the parameters to be estimated all obey a uniform distribution, and the uniform distribution interval surrounds the initial estimated values of the parameters to be estimated.
[0016] Preferably, obtain the parameters to be estimated The Markov chain sample data is as follows: The number of failed samples in the test is M The test duration at failure, i.e., the failure life data, are ; The number of thyristors that have not failed at the end of the test is K ,have , the truncated life data are ; The set of performance degradation data, failure life data and truncated life data is denoted as D; Assume the failure threshold of the thyristor performance parameter is l , when the thyristor performance parameters first degrade to l When , it is regarded as thyristor failure; Set up k At the beginning of the iteration, the model parameter value is , according to the full conditional distribution, the parameter values after iteration are determined in sequence , ; Perform several iterations to obtain Markov chain data samples, remove the first several samples that have not converged, and use the remaining samples as Monte Carlo samples of the parameters to be estimated to estimate the specific values of the parameters to be estimated.
[0017] Preferably, the full conditional distribution is specifically: By full conditional distribution Draw samples ; By full conditional distribution Draw samples .
[0018] Preferably, and The calculation formula of the full conditional distribution is:
[0019]
[0020] in, is the failure life data, For truncated life data, is the sample i at discrete time points The degradation data obtained by measurement, is the time interval between discrete time points.
[0021] Preferably, the probability density distribution of the remaining useful life RUL is for:
[0022] in, is the failure threshold of the thyristor performance parameter, is the performance parameter value of the thyristor at time t, is the variance, For the moment, is the drift parameter.
[0023] Preferably, the parameter to be estimated The estimated values are:
[0024]
[0025] Reliability function R (t) is:
[0026] in, is the number of Monte Carlo samples, is the number of non-converged samples to be removed, is the expectation of the drift parameter, is the number of iterations, It is a collection of performance degradation data, failure life data and truncated life data.
[0027] In a second aspect, an embodiment of the present invention provides a thyristor reliability assessment system, comprising: Input module, using performance degradation data, calculates the estimated parameters according to the maximum likelihood estimation method The initial estimate of ; Distribution module, based on the estimated parameters The initial estimate of Determine the parameters to be estimated The prior distribution of ; Sampling module, based on the obtained prior distribution , according to the Gibbs sampling method to obtain the parameters to be estimated Markov chain sample data; Evaluation module, which calculates the parameters to be estimated based on the obtained Markov chain sample data The estimated value of and thyristor reliability function R (t), and the remaining useful life RUL of the thyristor is calculated.
[0028] In a third aspect, a computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned thyristor reliability evaluation method when executing the computer program.
[0029] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, comprising a computer program, wherein when the computer program is executed by a processor, the steps of the above-mentioned thyristor reliability evaluation method are implemented.
[0030] Compared with the prior art, the present invention has at least the following beneficial effects: Most of the existing thyristor reliability assessment methods only analyze the life data in the accelerated aging test, and do not pay attention to the performance parameter degradation during the aging process of the thyristor. This will cause a huge waste of data. In the accelerated aging test of thyristors, there must be failure life data (life when the thyristor fails) and truncated life data (test duration of non-failed thyristors). In order to make full use of the test data, it is necessary to merge the above two types of life data with the performance parameter degradation data. The thyristor reliability assessment method proposed in the present invention is based on the Wiener process and integrates the performance degradation data and life data. The thyristor reliability model is constructed in combination with the physical meaning of the Wiener process. In view of the problem of lack of degradation data in thyristor tests, the Markov Monte Carlo method is used to jointly model the degradation data and life data; it solves the problem that the likelihood function part of the truncated data has a transcendental function when the commonly used data joint method directly merges all the data to jointly construct the joint likelihood function, which is difficult to be directly solved by numerical methods.
[0031] Furthermore, initial conditions are provided for subsequent iterative processes by obtaining initial values of the parameters to be estimated.
[0032] Furthermore, the likelihood function is set to obtain a more appropriate initial value according to the performance degradation data, so that the subsequent iteration process is more accurate.
[0033] Furthermore, prior distribution is the empirical cognition of things. When there is insufficient or no empirical cognition of the research subject, uniform distribution is used for analysis. The uniform distribution interval contains the initial estimated value of the parameter to be estimated, which is the mathematical premise for subsequent analysis.
[0034] Furthermore, sample data of the posterior distribution of the parameter to be estimated is obtained.
[0035] Furthermore, full conditional distribution is an important step in the Gibbs sampling method to obtain Markov chain data samples, and then the posterior distribution of parameters can be obtained.
[0036] It can be understood that the beneficial effects of the second aspect mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here.
[0037] In summary, the present invention combines the truncated life data in the thyristor accelerated aging test with the failure life data and performance degradation data to achieve the Wiener process parameter and The problem of estimation.
[0038] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings to be used in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0040] Figure 1 is the Markov chain iteration result of the parameter sample to be estimated of the present invention; Figure 2 is a flow chart of the method of the present invention; Figure 3 A schematic diagram of a computer device provided by an embodiment of the present invention; Figure 4 The present invention is a block diagram of an electronic device provided according to an embodiment. DETAILED DESCRIPTION
[0041] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0042] In the description of the present invention, it should be understood that the terms “include” and “comprises” indicate the presence of described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.
[0043] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.
[0044] It should be further understood that the term "and / or" used in the present specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present invention generally indicates that the associated objects are in an "or" relationship.
[0045] It should be understood that, although the terms first, second, third, etc. may be used to describe preset ranges, etc. in the embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are only used to distinguish preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.
[0046] The word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.
[0047] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.
[0048] The present invention provides a thyristor reliability assessment method. Firstly, based on performance degradation data, the maximum likelihood estimation method is used to calculate the initial estimated value of the parameter to be estimated, then the prior distribution of the parameter to be estimated is determined, and then based on all test data, the Gibbs sampling method is used to construct a Markov chain to obtain a Monte Carlo sample set of the parameter to be estimated, and finally the Monte Carlo sample set is used to estimate the parameter value to be estimated and assess the thyristor reliability. The method solves the technical problem that when a commonly used data joint method directly fuses all data to jointly construct a joint likelihood function, a likelihood function part of truncated data has a transcendental function, which is difficult to be directly solved by a numerical method, and the data utilization rate is higher.
[0049] The type of accelerated aging test for thyristors is an electrical endurance test, which places the thyristor in the blocking state under a voltage stress higher than the normal stress to evaluate the degradation of the thyristor blocking performance. The performance parameter evaluated is the thyristor leakage current.
[0050] In this example, a total of 50 thyristors were tested for a total test duration of 520 hours, and 2 thyristors failed during the test; the number of aging test samples is n , for each thyristor sample i At discrete points in time t j Perform measurements to obtain performance degradation data, i.e. , , ;remember Y For all n The degraded data set is obtained by observing samples. Y i For the i The degraded data set of samples is , ;remember For the i Samples from time To time The degradation increment is: M The test duration at failure, i.e., the failure life data, are .
[0051] In addition, the number of thyristors that have not failed at the end of the test is recorded as K ,have , then the truncated life data are The set of performance degradation data, failure life data and truncated life data is denoted as D.
[0052] See also Figure 2 The present invention provides a thyristor reliability evaluation method, comprising the following steps: S1. Calculate the estimated parameters using the maximum likelihood estimation method using performance degradation data The initial estimate of ; Assume that the number of aging test samples is n , for each thyristor sample i At discrete points in time t j Perform measurements to obtain performance degradation data, i.e. .remember Y For all n The degraded data set is obtained by observing samples. Y i For the i The degraded data set of samples is , ;remember For the i Samples from time To time The degradation increment.
[0053] According to the properties of the Wiener process, the parameters to be estimated can be obtained The likelihood function is: (1) Maximizing the likelihood function can obtain the estimated parameters The initial estimate of : , (2) In this example, the performance degradation data is substituted into equation (2) to obtain the estimated parameters: The initial estimate of .
[0054] S2. Determine the parameters to be estimated The prior distribution of ; The prior distribution is determined by the prior information such as the degradation law of the thyristor electrical parameters. When the prior information is insufficient, the non-information prior distribution can be used, that is, the estimated parameters are set to Obey uniform distribution.
[0055] In this example, an uninformative prior distribution is selected. The parameters to be estimated all obey a uniform distribution. The uniform distribution interval surrounds the initial estimated value of the parameter to be estimated. Generally, the lower limit of the interval is less than 1 / 10 of the initial estimated value, and the upper limit is greater than 10 times the initial estimated value. In this example, it is taken as: , .
[0056] S3. Obtain the parameters to be estimated according to the Gibbs sampling method Markov chain sample data; The number of failed samples in the test is M The test duration at failure, i.e., the failure life data, are .
[0057] In addition, the number of thyristors that have not failed at the end of the test is recorded as K ,have , then the truncated life data are ; Let the set of performance degradation data, failure life data and truncated life data be D.
[0058] Assume the failure threshold of the thyristor performance parameter is l , that is, when the thyristor performance parameters first degrade to l When the thyristor fails.
[0059] Give parameters and The calculation formula of the full conditional distribution is: (3) (4) Set up k At the beginning of the iteration, the model parameter value is , according to the full conditional distribution, the parameter values after iteration are determined in sequence , ; Specifically: a) By full conditional distribution Draw samples ; b) By full conditional distribution Draw samples ; Perform several iterations to obtain parameter samples, remove the first several samples that have not converged, and use the remaining samples as Monte Carlo samples of the parameters to be estimated. To ensure the accuracy of the estimation, the number of Monte Carlo samples should be no less than 1000.
[0060] S4. Calculate the parameters to be estimated based on the sample data obtained in step S3. The estimated value of and thyristor reliability function R (t), and calculate the remaining useful life RUL.
[0061] The number of Monte Carlo samples obtained in step S3 is s, and the parameter to be estimated is The estimated values are: , (5) The Monte Carlo sample estimation parameters obtained in step S3 and The joint posterior distribution of , and calculate the reliability function R (t) is: (6) Assume that the performance parameter value of a thyristor at a certain time is , the remaining useful life RUL of the thyristor can be predicted, and the probability density distribution of the remaining useful life RUL for: (7) Step S3 and step S4 can be quickly implemented with the help of WinBUGS software, or can be implemented by MATLAB programming.
[0062] The above software is all open source.
[0063] It will be appreciated by those skilled in the art that various aspects of the present invention may be implemented as systems, methods or program products. Therefore, various aspects of the present invention may be specifically implemented in the following forms, namely: complete hardware implementation, complete software implementation (including firmware, microcode, etc.), or a combination of hardware and software implementations, which may be collectively referred to herein as "circuits", "modules" or "platforms".
[0064] In yet another embodiment of the present invention, a thyristor reliability evaluation system is provided. The system can be used to implement the above thyristor reliability evaluation method. Specifically, the thyristor reliability evaluation system includes an input module, a distribution module, a sampling module and an evaluation module.
[0065] Among them, the input module uses the performance degradation data to calculate the estimated parameters according to the maximum likelihood estimation method The initial estimate of ; Distribution module, based on the estimated parameters The initial estimate of Determine the parameters to be estimated The prior distribution of ; Sampling module, based on the obtained prior distribution , according to the Gibbs sampling method to obtain the parameters to be estimated Markov chain sample data; Evaluation module, which calculates the parameters to be estimated based on the obtained Markov chain sample data The estimated value of and thyristor reliability function R (t), and the remaining useful life RUL of the thyristor is calculated.
[0066] In another embodiment of the present invention, a terminal device is provided, the terminal device includes a processor and a memory, the memory is used to store a computer program, the computer program includes program instructions, and the processor is used to execute the program instructions stored in the computer storage medium. The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc., which are the computing core and control core of the terminal, which are suitable for implementing one or more instructions, and are specifically suitable for loading and executing one or more instructions to implement the corresponding method flow or corresponding functions; the processor described in the embodiment of the present invention can be used for the operation of the thyristor reliability assessment method, including: Using the performance degradation data, the parameters to be estimated are calculated according to the maximum likelihood estimation method. The initial estimate of ; Based on the estimated parameters The initial estimate of Determine the parameters to be estimated The prior distribution of ; Based on the obtained prior distribution , according to the Gibbs sampling method to obtain the parameters to be estimated The Markov chain sample data is obtained; the parameters to be estimated are calculated based on the obtained Markov chain sample data The estimated value of and thyristor reliability function R (t), and the remaining useful life RUL of the thyristor is calculated.
[0067] In another embodiment of the present invention, the present invention also provides a storage medium, specifically a computer-readable storage medium (Memory), which is a memory device in a terminal device for storing programs and data. It is understandable that the computer-readable storage medium here can include both the built-in storage medium in the terminal device and the extended storage medium supported by the terminal device, and can be any tangible medium containing or storing a program, which can be used by an instruction execution system, device or device or used in combination with it. The computer-readable storage medium provides a storage space, which stores the operating system of the terminal. In addition, one or more instructions suitable for being loaded and executed by the processor are also stored in the storage space, and these instructions can be one or more computer programs (including program codes). It should be noted that more specific examples (non-exhaustive list) of the computer-readable storage medium here include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.
[0068] Computer readable storage media also include data signals propagated in baseband or as part of a carrier wave, which carry readable program codes. Such propagated data signals can take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. The readable storage medium can also be any readable medium other than a readable storage medium, which can send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, device, or device. The program code contained on the readable storage medium can be transmitted using any appropriate medium, including but not limited to wireless, wired, optical cable, RF, etc., or any suitable combination of the above.
[0069] Program code for performing the operations of the present invention may be written in any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc., and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., through the Internet using an Internet service provider).
[0070] The processor may load and execute one or more instructions stored in a computer-readable storage medium to implement the corresponding steps of the thyristor reliability evaluation method in the above embodiment; the processor may load and execute the following steps: Using the performance degradation data, the parameters to be estimated are calculated according to the maximum likelihood estimation method. The initial estimate of ; Based on the estimated parameters The initial estimate of Determine the parameters to be estimated The prior distribution of ; Based on the obtained prior distribution , according to the Gibbs sampling method to obtain the parameters to be estimated The Markov chain sample data is obtained; the parameters to be estimated are calculated based on the obtained Markov chain sample data The estimated value of and thyristor reliability function R (t), and the remaining useful life RUL of the thyristor is calculated.
[0071] See also Figure 3 , the terminal device is a computer device, and the computer device 60 of this embodiment includes: a processor 61, a memory 62, and a computer program 63 stored in the memory 62 and executable on the processor 61. When the computer program 63 is executed by the processor 61, the thyristor reliability evaluation method of the embodiment is implemented. To avoid repetition, it is not described one by one here. Alternatively, when the computer program 63 is executed by the processor 61, the functions of each model / unit in the thyristor reliability evaluation system of the embodiment are implemented. To avoid repetition, it is not described one by one here.
[0072] The computer device 60 may be a computing device such as a desktop computer, a notebook, a PDA, or a cloud server. The computer device 60 may include, but is not limited to, a processor 61 and a memory 62. Those skilled in the art will appreciate that Figure 3 This is only an example of the computer device 60 and does not constitute a limitation of the computer device 60. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the computer device may also include input and output devices, network access devices, buses, etc.
[0073] The processor 61 may be a central processing unit (CPU), or other general-purpose processors, central processing units, graphics processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, data processing logic based on quantum computing, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc.
[0074] The memory 62 may be an internal storage unit of the computer device 60, such as a hard disk or memory of the computer device 60. The memory 62 may also be an external storage device of the computer device 60, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc., equipped on the computer device 60.
[0075] Furthermore, the memory 62 may include both an internal storage unit of the computer device 60 and an external storage device. The memory 62 is used to store computer programs and other programs and data required by the computer device. The memory 62 may also be used to temporarily store data that has been output or is to be output.
[0076] Any reference to a memory, database or other medium used in the embodiments provided in the present application may include at least one of a non-volatile and a volatile memory. Non-volatile memory may include a read-only memory (ROM), a magnetic tape, a floppy disk, a flash memory, an optical memory, a high-density embedded non-volatile memory, a resistive random access memory (ReRAM), a magnetic random access memory (MRAM), a ferroelectric random access memory (FRAM), a phase change memory (PCM), a graphene memory, etc. Volatile memory may include a random access memory (RAM) or an external cache memory, etc. As an illustration and not limitation, RAM may be in various forms, such as a static random access memory (SRAM) or a dynamic random access memory (DRAM), etc.
[0077] The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. The non-relational database may include a distributed database based on blockchain, etc., but is not limited thereto. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but is not limited thereto.
[0078] See also Figure 4 The terminal device is an electronic device 600, and the electronic device is in the form of a general-purpose computing device. The components of the electronic device may include, but are not limited to: at least one processing unit 610, at least one storage unit 620, a bus 630 connecting different platform components (including the storage unit 620 and the processing unit 610), a display unit 640, etc.
[0079] The storage unit stores program codes, which can be executed by the processing unit 610, so that the processing unit 610 performs the steps according to various exemplary embodiments of the present invention described in the above method section of this specification. For example, the processing unit 610 can perform the following steps: Figure 2 Follow the steps shown in .
[0080] The storage unit 620 may include a readable medium in the form of a volatile storage unit, such as a random access memory unit (RAM) 6201 and / or a cache memory unit 6202 , and may further include a read-only memory unit (ROM) 6203 .
[0081] The storage unit 620 may also include a program / utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment.
[0082] Bus 630 may represent one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.
[0083] The electronic device 600 may also communicate with one or more external devices 700 (e.g., keyboards, pointing devices, Bluetooth devices, etc.), may also communicate with one or more devices that enable a user to interact with the electronic device 600, and / or communicate with any device that enables the electronic device 600 to communicate with one or more other computing devices (e.g., routers, modems, etc.). Such communication may be performed via an input / output (I / O) interface 650. Furthermore, the electronic device 600 may also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) via a network adapter 660. The network adapter 660 may communicate with other modules of the electronic device 600 via a bus 630. It should be understood that, although not shown in the figure, other hardware and / or software modules may be used in conjunction with the electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage platforms, etc.
[0084] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present invention described and shown in the drawings here can usually be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0085] The Markov chain parameter samples generated in this example are as follows Figure 1 As shown in the figure, the parameter sample values have stabilized after 10 iterations, so the samples of the first 10 iterations are discarded and the subsequent iteration results are used as the Monte Carlo sample set of the parameters to be estimated.
[0086] The concept of reliability interval estimation is introduced to evaluate the data utilization adequacy of reliability evaluation results. The thyristor reliability function solved by equations (1) and (6) is the expected value of reliability, and the reliability interval estimation describes the probability confidence interval of reliability, that is:
[0087] in, is the lower confidence limit, is the upper confidence limit, 1- is the confidence probability. The narrower the confidence interval, the higher the accuracy of the reliability assessment.
[0088] The method of the present invention is used to evaluate and analyze the performance degradation data, failure life data and truncated life data of the accelerated aging test. In addition, as a comparison, the commonly used maximum likelihood estimation method is used to evaluate and analyze the performance degradation data.
[0089] The model parameter estimation and reliability estimation results are shown in the following table:
[0090] From the results in the comparison table, it can be seen that the confidence interval of the reliability estimation result of the present invention is narrow. At the end of this test, a total of 2 thyristors failed, so the actual reliability value of the thyristor is R (520)=48 / 50=0.96, the predicted value of the present invention is R (520)=0.9664, the maximum likelihood estimation method predicts R (520)=0.969.
[0091] The above results indicate that the present invention can fully integrate and utilize failure life data and truncated life data to improve the accuracy of reliability assessment.
[0092] In summary, the present invention provides a thyristor reliability assessment method and system, which solves the problem that the truncated life data of the accelerated aging test is difficult to integrate in the thyristor reliability assessment based on the Wiener process, and can make full use of the test data to improve the accuracy of reliability assessment. And with the help of WinBUGS software, the reliability assessment process can be quickly implemented.
[0093] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.
[0094] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0095] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in the present invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.
[0096] In the embodiments provided by the present invention, it should be understood that the disclosed devices / terminals and methods can be implemented in other ways. For example, the device / terminal embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.
[0097] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0098] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.
[0099] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.
[0100] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0101] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0102] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
[0103] The above contents are only for explaining the technical idea of the present invention and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the claims of the present invention.
Claims
1. A thyristor reliability assessment method, characterized in that: The following steps are involved: S1. Using the performance degradation data, calculate the estimated parameters according to the maximum likelihood estimation method The initial estimate of ; S2, the parameters to be estimated based on step S1 The initial estimate of Determine the parameters to be estimated The prior distribution of ; S3, based on the prior distribution obtained in step S2 , according to the Gibbs sampling method to obtain the parameters to be estimated Markov chain sample data; S4. Calculate the parameters to be estimated based on the Markov chain sample data obtained in step S3. The estimated value of and thyristor reliability function R (t), and the remaining useful life RUL of the thyristor is calculated.
2. The thyristor reliability evaluation method according to claim 1, characterized in that: Parameters to be estimated The initial estimate of Specifically: in, is the number of discrete time points of the aging test samples, is the sample i at discrete time points The degradation data obtained by measurement, For each thyristor sample at a discrete time point, j = 0, 1, …, m; For the i Samples from time To time The degradation increment.
3. The thyristor reliability evaluation method according to claim 2, characterized in that: Parameters to be estimated Likelihood function for: 。 4. The thyristor reliability evaluation method according to claim 1, characterized in that: Determine the parameters to be estimated The prior distribution of Specifically: When prior information is insufficient, an uninformative prior distribution is used, and the parameters to be estimated all obey a uniform distribution, and the uniform distribution interval surrounds the initial estimated values of the parameters to be estimated.
5. The thyristor reliability evaluation method according to claim 1, characterized in that: Get the parameters to be estimated The Markov chain sample data is as follows: The number of failed samples in the test is M The test duration at failure, i.e., the failure life data, are ; The number of thyristors that have not failed at the end of the test is K ,have , the truncated life data are ; The set of performance degradation data, failure life data and truncated life data is denoted as D; Assume the failure threshold of the thyristor performance parameter is l , when the thyristor performance parameters first degrade to l When , it is regarded as thyristor failure; Set up k At the beginning of the iteration, the model parameter value is , according to the full conditional distribution, the parameter values after iteration are determined in sequence , ; Perform several iterations to obtain Markov chain data samples, remove the first several samples that have not converged, and use the remaining samples as Monte Carlo samples of the parameters to be estimated to estimate the specific values of the parameters to be estimated.
6. The thyristor reliability evaluation method according to claim 5, characterized in that: The full conditional distribution is: By full conditional distribution Draw samples ; By full conditional distribution Extracting samples .
7. The thyristor reliability evaluation method according to claim 6, characterized in that: and The calculation formula of the full conditional distribution is: in, is the failure life data, For truncated life data, is the sample i at discrete time points The degradation data obtained by measurement, is the time interval between discrete time points.
8. The thyristor reliability evaluation method according to claim 1, characterized in that: Probability density distribution of remaining useful life RUL for: in, is the failure threshold of the thyristor performance parameter, is the performance parameter value of the thyristor at time t, is the variance, For the moment, is the drift parameter.
9. The thyristor reliability evaluation method according to claim 8, characterized in that: Parameters to be estimated The estimated values are: Reliability function R (t) is: in, is the number of Monte Carlo samples, is the number of non-converged samples to be removed, is the expectation of the drift parameter, is the number of iterations, It is a collection of performance degradation data, failure life data and truncated life data.
10. A thyristor reliability assessment system, characterized in that: include: Input module, using performance degradation data, calculates the estimated parameters according to the maximum likelihood estimation method The initial estimate of ; Distribution module, based on the estimated parameters The initial estimate of Determine the parameters to be estimated The prior distribution of ; Sampling module, based on the obtained prior distribution , according to the Gibbs sampling method to obtain the parameters to be estimated Markov chain sample data; Evaluation module, which calculates the parameters to be estimated based on the obtained Markov chain sample data The estimated value of and thyristor reliability function R (t), and the remaining useful life RUL of the thyristor is calculated.
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