Display panel and display device

By setting the driver in the display panel, the distance and signal output timing of the display area are optimized in the non -display area, and the problem of displaying the display under high PPI is solved, and the efficient signal transmission and multiple display requirements are achieved.

CN119380627APending Publication Date: 2025-01-28XIAMEN TIANMA MICRO ELECTRONICS
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Patent Information

Application Number
CN202411786695.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-05
Publication Date
2025-01-28

AI Technical Summary

Technical Problem

With the increase of display device PPI, it is easy to cause display problems in display devices, and under the demand for high PPI, the demand for improving display mimicry is also increasing.

Method used

Provide a display panel, including the first display area, the second display area, the non -display area, and the driver unit. The driver is set in a non -display area to optimize the distance between the driver and the display area to ensure the signal transmission effect. Adjust the signal output timing of the drive unit, and achieve synchronization or time -sharing display in the first display area and the second display area.

Benefits of technology

By optimizing the distance and signal output timing of the driver and the display area, the overall display effect of the display panel is improved, the requirements of different display panels are improved, and the signal transmission effect of the display panel is improved.

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Abstract

The invention discloses a display panel and a display device. The display panel comprises a first display area, a second display area, a non-display area and a driving unit. The first display area, the non-display area and the second display area are arranged in the first direction; the driving unit is arranged in the non-display area; in the first direction, the projections of the driving unit and the first display area and the second display area are not overlapped; the driving unit drives the first display area and the second display area to synchronously display, or the driving unit drives the first display area and the second display area to timely display. The distance between the driving unit and the first display area and the distance between the driving unit and the second display area are optimized, the signal transmission effect is guaranteed, signal output of the driving unit is correspondingly adjusted according to different display requirements, and the display effect of the display panel is guaranteed.
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Description

Technical Field

[0001] The present invention relates to the technical field of display panels, and in particular to a display panel and a display device. Background Art

[0002] With the increasing development of display technology, display devices have gradually developed wider viewing angles, higher refresh rates, and thinner sizes. Display devices have also been successfully used in various high-end smart devices or display devices as an important window for human-computer interaction in the future intelligent era.

[0003] In order to improve the display realism of display devices, the demand for display devices with high PPI (Pixels Per Inch, pixel density unit) is also increasing. However, as the PPI of display devices increases, display problems of display devices are easily caused. Summary of the invention

[0004] The present invention provides a display panel and a display device to improve the display effect of the display panel.

[0005] In a first aspect, the present invention provides a display panel, the display panel comprising a first display area, a second display area, a non-display area and a driving unit;

[0006] The first display area, the non-display area and the second display area are arranged along a first direction;

[0007] The driving unit is arranged in the non-display area; along the first direction, the projections of the driving unit and the first display area and the second display area do not overlap;

[0008] The driving unit drives the first display area and the second display area to display synchronously, or the driving unit drives the first display area and the second display area to display simultaneously.

[0009] In a second aspect, the present invention provides a display device, comprising the display panel described in any one of the first aspects.

[0010] The technical solution of the embodiment of the present invention provides a display panel, the display panel includes a first display area, a second display area, a non-display area and a driving unit; the first display area, the non-display area and the second display area are arranged along the first direction; the driving unit is arranged in the non-display area; along the first direction, the projections of the driving unit and the first display area and the second display area do not overlap; the distance between the driving unit and the first display area and the second display area is optimized to ensure the signal transmission effect and the overall display effect of the display panel. The driving unit outputs the same signal to the first display area and the second display area at the same time, so that the same row in the first display area and the second display area is charged at the same time, the first display area and the second display area are displayed synchronously, and the same display screen is displayed; or the driving unit outputs the signal to the first display area and the second display area in time-sharing, so that the same row in the first display area and the second display area is charged in time-sharing, the first display area and the second display area are displayed in time-sharing, and the screens of different display areas are displayed. The signal output timing of the driving unit is adjusted according to different display requirements to ensure the display effect of the display panel.

[0011] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0013] Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention;

[0014] Figure 2 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0015] Figure 3 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0016] Figure 4 A signal timing diagram of a display panel provided by an embodiment of the present invention;

[0017] Figure 5 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0018] Figure 6 A schematic structural diagram of a first multiplexing unit provided in an embodiment of the present invention;

[0019] Figure 7 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0020] Figure 8 A schematic structural diagram of another first multiplexing unit provided in an embodiment of the present invention;

[0021] Fig. 9 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0022] Fig.10 A signal timing diagram of a display panel provided by an embodiment of the present invention;

[0023] Fig.11 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0024] Fig.12 A signal timing diagram of another display panel provided by an embodiment of the present invention;

[0025] Fig.13 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0026] Fig.14 A schematic diagram of the structure of a multiplexing unit provided in an embodiment of the present invention;

[0027] Fig.15 A signal timing diagram of another display panel provided by an embodiment of the present invention;

[0028] Fig.16 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0029] Fig.17 A signal timing diagram of another display panel provided by an embodiment of the present invention;

[0030] Fig.18 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0031] Fig.19 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0032] Fig. 20 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0033] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0034] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0035] Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention is shown in FIG. Figure 1 As shown, the display panel 100 includes a first display area 101, a second display area 102, a non-display area 103 and a driving unit 104; the first display area 101, the non-display area 103 and the second display area 102 are arranged along a first direction X; the driving unit 104 is arranged in the non-display area 103; along the first direction X, the projections of the driving unit 104 and the first display area 101 and the second display area 102 do not overlap; the driving unit 104 drives the first display area 101 and the second display area 102 to display synchronously, or the driving unit 104 drives the first display area 101 and the second display area 102 to display in a time-sharing manner.

[0036] The display panel 100 at least includes a first display area 101, a second display area 102, and a non-display area 103 between the first display area 101 and the second display area 102. For example, when the display panel 100 is applied to smart glasses, the first display area 101 may correspond to the left eye display area, and the second display area 102 may correspond to the right eye display area. The display panel 100 also includes a driving unit 104, which provides data signals and input signals to the first display area 101 and the second display area 102 to achieve the display effect of the first display area 101 and the second display area 102. Since the size of the part of the non-display area 103 between the first display area 101 and the second display area 102 along the first direction X is small, it is difficult to accommodate the driving unit 104 and the connection wiring at the same time, the driving unit 104 is arranged on the same side of the first display area 101 and the second display area 102, and is located in the non-display area 103, so that along the first direction X, the projections of the driving unit 104 and the first display area 101 and the second display area 102 do not overlap, and the distance between the driving unit 104 and the first display area 101 and the second display area 102 is optimized, the signal transmission effect is guaranteed, the overall display effect of the display panel 100 is guaranteed, and the size of the display panel 100 is optimized. Figure 1 As shown, the first display area 101 and the second display area 102 share a driving unit 104, and by adjusting the driving unit 104 to output the same signal to the first display area 101 and the second display area 102 respectively, the first display area 101 and the second display area 102 are synchronously displayed, and the first display area 101 and the second display area 102 display the same display picture. Alternatively, by adjusting the driving unit 104 to output different same signals to the first display area 101 and the second display area 102 respectively, the first display area 101 and the second display area 102 are time-divided. The first display area 101 and the second display area 102 display different display pictures, and the three-dimensional sense of the display picture is achieved. According to different display requirements, the signal output of the driving unit 104 is adjusted to ensure the display effect of the display panel 100.

[0037] In the embodiment of the present invention, the driving unit is arranged in the non-display area, and along the first direction, the projections of the driving unit and the first display area and the second display area do not overlap, thereby optimizing the distance between the driving unit and the first display area and the second display area, thereby ensuring the transmission effect of the signal output by the driving unit and the display effect of the display panel. The driving unit is connected to the first display area and the second display area respectively, and the driving unit drives the first display area and the second display area to display synchronously, and the first display area and the second display area display the same display screen. Alternatively, the driving unit drives the first display area and the second display area to display synchronously, and the second display area and the second display area display different display screens. The signal output of the driving unit is reasonably adjusted to meet the different display requirements of the first display area and the second display area.

[0038] Optional, reference Figure 1 The driving unit 104 includes a first side 11 close to the first display area 101, a second side 12 close to the second display area 102, and a third side 13 connecting the first side 11 and the second side 12; the intersection of the first side 11 and the third side 13 is a first vertex A1, and the intersection of the second side 12 and the third side 13 is a second vertex A2; the first display area 101 includes a first bottom side 15 close to the driving unit 104 and a fourth side 14 close to the second display area 102, and the intersection of the first bottom side 15 and the fourth side 14 is a third vertex A3; the second display area 102 includes a second bottom side 16 close to the driving unit 104 and a fifth side 15 close to the first display area 101, and the intersection of the second bottom side 16 and the fifth side 15 is a fourth vertex A4; the distance between the first vertex A1 and the third vertex A3 is equal to the distance between the second vertex A2 and the fourth vertex A4. By setting the driving unit 104 in the non-display area 103, the distance l1 between the driving unit 104 and the first display area 101 is the same as the distance l1 between the driving unit 104 and the second display area 102, the distances from the first display area 101 and the second display area 102 to the driving unit 104 are balanced, the difference in the wiring length between the driving unit 104 and the first display area 101 and the wiring length between the driving unit 104 and the second display area 102 is reduced, the RC loading is reduced, and the display effect is optimized.

[0039] Optional, Figure 2 A schematic diagram of another display panel provided by an embodiment of the present invention, referring to Figure 1 and Figure 2 , the first display area 101 includes a plurality of first data lines 105 extending along the first direction X, and the second display area 102 includes a plurality of second data lines 106 extending along the first direction X; the driving unit 104 includes a plurality of data signal output terminals 107, and the same data signal output terminal 107 of the driving unit 104 is electrically connected to the first data line 105 and the second data line 106 respectively; or, the data signal output terminals 107 of some driving units 104 are connected to the first data line 105 and the data signal output terminals 107 of some driving units 104 are electrically connected to the second data line 106.

[0040] Among them, Figure 1 As shown, the same data signal output terminal 107 of the driving unit 104 can be connected to the first display area 101 via the first data line 105 and connected to the second display area 102 via the second data line 106, thereby reducing the number of data signal output terminals 107 and reducing the manufacturing cost. Figure 2As shown, the driving unit 104 includes a plurality of data signal output terminals 107, some of the data signal output terminals 107 are connected to the first display area 101 via the first data line 105, and some of the data signal output terminals 107 are connected to the second display area 102 via the second data line 106. The first display area 101 and the second display area 102 both use separate data signal output terminals 107 to be connected to the corresponding data lines to ensure accurate transmission of data signals and display effects of the first display area 101 and the second display area 102.

[0041] Optional, Figure 3 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention is shown in FIG. Figure 3 As shown, the first display area 101 includes a plurality of first scan lines 108 extending along the second direction Y; the first display area 101 includes a plurality of second scan lines 109 extending along the second direction Y; the display panel 100 includes a first scan driving circuit 110 and a second scan driving circuit 111; the first scan driving circuit 110 is electrically connected to the first scan lines 108; the second scan circuit corresponds to the second scan lines 109; the driving unit 104 includes a first output terminal 112; the first output terminal 112 is electrically connected to the first scan driving circuit 110 and the second scan driving circuit 111 respectively; wherein the first direction X intersects with the second direction Y.

[0042] The first scanning driving circuit 110 outputs a scanning signal, the first scanning driving circuit 110 is electrically connected to the first scanning line 108 of the first display area 101, and the scanning signal is transmitted through the first scanning line 108, thereby ensuring the display effect of the first display area 101. The second scanning driving circuit 111 outputs a scanning signal, the second scanning driving circuit 111 is electrically connected to the second scanning line 109 of the second display area 102, and the scanning signal is transmitted through the second scanning line 109, thereby ensuring the display effect of the second display area 102. The driving unit 104 includes a first output terminal 112, the first output terminal 112 is electrically connected to the first scanning driving unit 104 and the second scanning driving unit 104 respectively, and the first output terminal 112 outputs an output signal, so that the first scanning driving unit 104 and the second scanning driving unit 104 work simultaneously, so as to provide scanning signals to the first display area 101 and the second display area 102 at the same time. When providing a scan signal to the same row in the first display area 101 and the second display area 102, the data signal output terminal 107 of the driving unit 104 is controlled to output data signals to the first display area 101 and the second display area 102 at the same time, so that the first display area 101 and the second display area 102 are displayed synchronously, thereby improving the charging time and ensuring the display effect of the display panel 100.

[0043] Optional, Figure 4 A signal timing diagram of a display panel provided by an embodiment of the present invention, such as Figure 4As shown, the first scan driving circuit 110 outputs a first scan signal Gout1, and the second scan driving circuit 111 outputs a second scan signal Gout2. In the same display frame refresh cycle, the enabling phase of the first scan signal overlaps with the enabling phase of the second scan signal.

[0044] Wherein, the first scanning signal Gout1 and the second scanning signal Gout2 both include an enable phase and a disable phase located between adjacent enable phases. For example, if the transistor is a P-type transistor, the low-level signal phase is the enable phase of the P-type transistor, and the high-level signal phase is the disable phase of the P-type transistor. Similarly, if the transistor is an N-type transistor, the low-level signal phase is the disable phase of the N-type transistor, and the high-level signal phase is the enable phase of the N-type transistor. Figure 4 As shown, the first scan driving circuit 110 outputs the first scan signal Gout1, and the second scan driving circuit 111 outputs the second scan signal Gout2. In the same display screen refresh cycle, the enabling phase of the first scan signal Gout1 overlaps with the enabling phase of the second scan signal Gout2. For example, Figure 4 As shown, the signal stage in which the first scanning signal Gout1 and the second scanning signal Gout2 are at a high level is the enabling stage, and the signal stage in which the first scanning signal Gout1 and the second scanning signal Gout2 are at a low level is the non-enabling stage. The driving unit 104 outputs data signals to the first display area 101 and the second display area 102. The first display area 101 and the second display area 102 generally include red light-emitting transistors, green light-emitting transistors, and blue light-emitting transistors to achieve color display effects. The data signals may include a red data signal CKHR, a green data signal CKHG, and a blue data signal CKHB. The enabling stages of the red data signal CKHR, the green data signal CKHG, and the blue data signal CKHB do not overlap, so that the transistors with the same light-emitting color in the first display area 101 and the second display area 102 in the same row are in a conducting state at the same time, ensuring that the first display area 101 and the second display area 102 display synchronously.

[0045] Optional, Figure 5 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention, Figure 6 A structural diagram of a first multiplexing unit provided in an embodiment of the present invention is as follows: Figure 5 and Figure 6As shown, the display panel 100 also includes a multiplexing unit 113, and the multiplexing unit 113 includes at least one first multiplexing unit 114; the first multiplexing unit 114 includes a data signal input terminal 115, M signal output terminals 116, N control terminals 117 and M switch transistors 118, wherein M≥2, N<M, and M and N are positive integers; the first electrodes of the M switch transistors 118 are electrically connected to the same data signal input terminal 115, and the data signal input terminal 115 is electrically connected to the data signal output terminal 107; the gates of some of the switch transistors 118 are electrically connected to the same control terminal 117, and the control terminal 117 is electrically connected to the driving unit 104; the second electrodes of the M switch transistors 118 are electrically connected to the M signal output terminals 116 one by one, and some of the signal output terminals 116 are electrically connected to the first data line 105, and some of the signal output terminals 116 are electrically connected to the second data line 106.

[0046] Among them, a first multiplexing unit 114 is provided in the display panel 100, and the first multiplexing unit 114 enables the same data signal to be transmitted to different data lines respectively. Exemplarily, the first multiplexing unit 114 includes a data signal input terminal 115, four signal output terminals 116, two control terminals 117 and four switch transistors 118, the first electrodes of the plurality of switch transistors 118 are connected to the same data signal output terminal 107 via the same data signal input terminal 115, the gates of some switch transistors 118 are connected to the same control terminal 117, the driving unit 104 is electrically connected to the control terminal 117, and the driving unit 104 outputs a control signal to control the on or off state of the switch transistor 118. The second electrodes of the plurality of switching transistors 118 are electrically connected to the plurality of signal output terminals 116 in a one-to-one correspondence. The signal output terminals 116 of the switching transistors 118 controlled by the same control terminal 117 can be electrically connected to the first data line 105 and the second data line 106 corresponding to the light-emitting transistors having the same light-emitting color, so as to synchronously charge the light-emitting transistors having the same light-emitting color in the first display area 101 and the second display area 102, thereby ensuring synchronous display of the first display area 101 and the second display area 102.

[0047] Optional, Figure 7 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention, Figure 8 A schematic diagram of the structure of another first multiplexing unit provided in an embodiment of the present invention is shown in FIG. Figure 7 and Figure 8As shown, the display panel 100 further includes a data connection line 119, the data connection line 119 includes a first sub-data connection line 1191 and a second sub-data connection line 1192 extending along a first direction X, the first sub-data connection line 1191 and the second sub-data connection line 1192 are connected to the same data signal output terminal 107; the switch transistor 118 includes a first transistor 1181 connected to the first data line 105 and a second transistor 1182 connected to the second data line 106; the first sub-data connection line 1191 is connected to the first data line 105 and the second sub-data connection line 1192 is connected to the first data line 106; The first electrode of the transistor 1181 is electrically connected, and the second sub-data connection line 1192 is electrically connected to the first electrode of the second transistor 1182; the length of the first sub-data connection line 1191 is L1, and the cross-sectional area along the second direction Y is S1; the length of the second sub-data connection line 1192 is L2, and the cross-sectional area along the second direction Y is S2; the first direction X intersects the second direction Y; wherein, when L1<L2, S1<S2; or, when L1>L2, S1>S2; or, when L1=L2, S1=S2.

[0048] When the same data signal output terminal 107 of the driving unit 104 is respectively connected to the first data line 105 of the first display area 101 and the second data line 106 of the second display area 102, there is a difference between the distance between the same data signal output terminal 107 and the first data line 105 and the distance between the same data signal output terminal 107 and the second data line 106, that is, there is a difference between the first sub-data connection line 1191 and the second sub-data connection line 1192 corresponding to the first display area 101, according to R=ρL / S, R is impedance, ρ is the density of the data connection line 119, L is the length of the data connection line 119, and S is the cross-sectional area of ​​the data connection line 119. When the length of the first sub-data connection line 1191 is greater than the length of the second sub-data connection line 1192 along the first direction X, the cross-sectional area of ​​the first sub-data connection line 1191 can be adjusted to be greater than the cross-sectional area of ​​the second sub-data connection line 1192. When the length L1 of the first sub-data connection line 1191 is smaller than the length L2 of the second sub-data connection line 1192 along the first direction X, the cross-sectional area S1 of the first sub-data connection line 1191 can be adjusted to be smaller than the cross-sectional area S2 of the second sub-data connection line 1192. When the length L1 of the first sub-data connection line 1191 is equal to the length L2 of the second sub-data connection line 1192 along the first direction X, the cross-sectional area S1 of the first sub-data connection line 1191 can be adjusted to be equal to the cross-sectional area S2 of the second sub-data connection line 1192, so that the impedances of the first sub-data connection line 1191 and the second sub-data connection line 1192 are equal. This balances the RC loading in the first sub-data connection line 1191 and the second sub-data connection line 1192, and ensures the synchronous display effect of the first display area 101 and the second display area 102.

[0049] Optional, Fig. 9 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention is shown in FIG. Fig. 9 As shown, the first multiplexing unit 114 includes a first multiplexing subunit 1141 and a second multiplexing subunit 1142 corresponding to the first display area 101, and a third multiplexing subunit 1143 and a fourth multiplexing subunit 1144 corresponding to the second display area 102; along the second direction Y, the second multiplexing subunit 1142 is located on the side of the first multiplexing subunit 1141 away from the driving unit 104, and the fourth multiplexing subunit 1144 is located on the side of the third multiplexing subunit 1143 away from the driving unit 104; the driving unit 104 includes a data signal output terminal 107, and the data signal output terminal 107 includes a first data signal output terminal 1071 and a second data signal output terminal 1072. Along the first direction X, the first data signal output terminal 1071 is located on the side close to the first display area 101 , the second data signal output terminal 1072 is located on the side close to the second display area 102; the first data signal output terminal 1071 is electrically connected to the plurality of first data lines 105 via the first multiplexing subunit 1141, and the first data signal output terminal 1071 is electrically connected to the plurality of second data lines 106 via the third multiplexing subunit 1143; the second data signal output terminal 1072 is electrically connected to the plurality of first data lines 105 via the second multiplexing subunit 1142, and the second data signal output terminal 1072 is electrically connected to the plurality of second data lines 106 via the fourth multiplexing subunit 1144; the first multiplexing subunit 1141 and the third multiplexing subunit 1143 are turned on at the same time, and the second multiplexing subunit 1142 and the fourth multiplexing subunit 1144 are turned on at the same time; wherein the first direction X intersects with the second direction Y.

[0050] Since a plurality of data lines are provided in the first display area 101 and the second display area 102, in order to ensure the display effect of the first display area 101 and the second display area 102, the first display area 101 corresponds to the first multiplexing subunit 1141 and the second multiplexing subunit 1142, and the second display area 102 corresponds to the third multiplexing subunit 1143 and the fourth multiplexing subunit 1144. Exemplarily, the first display area 101 includes 6480 rows of first data lines 105, the second display area 101 includes 6480 rows of second data lines 106, the first multiplexing subunit 1141 corresponds to the first data lines 105 of 1-3240 rows, the second multiplexing subunit 1142 corresponds to the first data lines 105 of 3241 rows; the third multiplexing subunit 1143 corresponds to the second data lines 106 of 1-3240 rows, and the fourth multiplexing subunit 1144 corresponds to the second data lines 106 of 3241 rows. The driving unit 104 includes a first data signal output terminal 1071 and a second data signal output terminal 1072. The first data signal output terminal 1071 is transmitted to the first display area 101 via the first multiplexing subunit 1141 and is transmitted to the second display area 102 via the third multiplexing subunit 1143. The second data signal output terminal 1072 is transmitted to the first display area 101 via the second multiplexing subunit 1142 and is transmitted to the second display area 102 via the fourth multiplexing subunit 1144, so that the same data signal output terminal 107 can simultaneously output data signals to the data lines of the same column in the first display area 101 and the second display area 102, thereby ensuring the synchronous display effect of the first display area 101 and the second display area 102.

[0051] Optional, Fig.10 A signal timing diagram of a display panel provided by an embodiment of the present invention, such as Fig.10 As shown, the signal outputted from the first data signal output terminal 1071 includes the first data signal CKH1 outputted to the first multiplexing subunit 1141 and the second data signal CKH2 outputted to the third multiplexing subunit 1143, and the second data signal output terminal 1072 includes the third data signal CKH3 outputted to the second multiplexing subunit 1142 and the fourth data signal CKH4 outputted to the fourth multiplexing subunit 1144; within the same display screen refresh cycle, the length of the enable phase of the first data signal CKH1 is shorter than the length of the enable phase of the second data signal CKH2; and the length of the enable phase of the third data signal CKH3 is longer than the length of the enable phase of the fourth data signal CKH4.

[0052] Among them, since there is a difference between the distance between the first data signal output terminal 1071 and the first display area 101 and the distance between the first data signal output terminal 1071 and the second display area 102, illustratively, the distance between the first data signal output terminal 1071 and the first display area 101 is smaller than the distance between the first data signal output terminal 1071 and the second display area 102, the length of the enable phase of the first data signal CKH1 output to the first multiplexing subunit 1141 through the first data signal output terminal 1071 is adjusted to be smaller than the length of the enable phase of the second data signal CKH2 output to the third multiplexing subunit 1143 through the first data signal output terminal 1071, and the charging difference caused by the difference in the routing length of the data connection line 119 corresponding to the first data signal output terminal 1071 is balanced. The scan driving unit simultaneously outputs the scan signal to the same column of the first display area 101 and the second display area 102 to ensure the synchronous display effect of the first display area 101 and the second display area 102. The distance between the second data signal output terminal 1072 and the first display area 101 is greater than the distance between the second data signal output terminal 1072 and the second display area 102, and the length of the enable phase of the third data signal CKH3 output to the second multiplexing subunit 1142 via the second data signal output terminal 1072 is adjusted to be greater than the length of the enable phase of the fourth data signal CKH4 output to the fourth multiplexing subunit 1144 via the second data signal output terminal 1072, and the charging difference caused by the difference in the routing length of the data connection line 119 corresponding to the second data signal output terminal 1072 is balanced. The scan driving unit simultaneously outputs the scan signal to the same column of the first display area 101 and the second display area 102 to ensure the synchronous display effect of the first display area 101 and the second display area 102.

[0053] Optional, Fig.11 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention is shown in FIG. Fig.11 As shown, the first display area 101 includes a plurality of first scan lines 108 extending along the second direction Y; the first display area 101 includes a plurality of second scan lines 109 extending along the second direction Y; the display panel 100 includes a first scan driving circuit 110 and a second scan driving circuit 111; the first scan driving circuit 110 is electrically connected to the first scan lines 108; the second scan circuit corresponds to the second scan lines 109; the driving unit 104 includes a second output terminal 120 and a third output terminal 121; the second output terminal 120 is electrically connected to the first scan driving circuit 110, and the third output terminal 121 is electrically connected to the second scan driving circuit 111; wherein the first direction X intersects with the second direction Y.

[0054] The first scanning driving circuit 110 outputs a scanning signal, the first scanning driving circuit 110 is electrically connected to the first scanning line 108 of the first display area 101, and the scanning signal is transmitted through the first scanning line 108, thereby ensuring the display effect of the first display area 101. The second scanning driving circuit 111 outputs a scanning signal, the second scanning driving circuit 111 is electrically connected to the second scanning line 109 of the second display area 102, and the scanning signal is transmitted through the second scanning line 109, thereby ensuring the display effect of the second display area 102. The driving unit 104 includes a second output terminal 120 and a third output terminal 121, the second output terminal 120 is electrically connected to the first scanning driving unit 104, and the second output terminal 120 outputs an output signal, so that the first scanning driving circuit 110 works and provides a scanning signal to the first display area 101; the third output terminal 121 is electrically connected to the second scanning driving unit 104, and the third output terminal 121 outputs an output signal, so that the second scanning driving unit 104 works and provides a scanning signal to the second display area 102. By adjusting the time-sharing, a scanning signal is provided to the same row in the first display area 101 and the second display area 102 , so that the first display area 101 and the second display area 102 are displayed in a time-sharing manner, thereby ensuring the display effect of the display panel 100 .

[0055] Optional, Fig.12 Another signal timing diagram of a display panel provided by an embodiment of the present invention is as follows: Fig.12 As shown, the first scan driving circuit 110 outputs the first scan signal Gout1, and the second scan driving circuit 111 outputs the second scan signal Gout2. In the same display screen refresh cycle, the enabling phase of the first scan signal Gout1 does not overlap with the enabling phase of the second scan signal Gout2.

[0056] The first scan driving circuit 110 outputs a first scan signal Gout1, and the second scan driving circuit 111 outputs a second scan signal Gout2. In the same display image refresh cycle, the enabling phase of the first scan signal Gout1 does not overlap with the enabling phase of the second scan signal Gout2. The driving unit 104 outputs a first sub-data signal to the first display area 101 and a second sub-data signal to the second display area 102. In order to achieve a color display effect, the first display area 101 and the second display area 102 generally include a red light-emitting transistor, a green light-emitting transistor and a blue light-emitting transistor. The first sub-data signal may include a first red data signal CKH1R, a first green data signal CKH1G and a first blue data signal CKH1B, and the enable stages of the first red data signal CKH1R, the first green data signal CKH1G and the first blue data signal CKH1B do not overlap; the second sub-data signal may include a second red data signal CKH2R, a second green data signal CKH2G and a second blue data signal CKH2B, and the enable stages of the second red data signal CKH2R, the second green data signal CKH2G and the second blue data signal CKH2B do not overlap, and the enable stages of the first sub-data signal and the second sub-data signal do not overlap. The light emitting transistors in the first display area 101 in the same row are in the on state, and the light emitting transistors in the second display area 102 are in the off state; or the light emitting transistors in the first display area 101 in the same row are in the off state, and the light emitting transistors in the second display area 102 are in the on state, so as to ensure that the first display area 101 and the second display area 102 are displayed in time sharing, so that the first display area 101 and the second display area 102 display different display images.

[0057] Optional, Fig.13 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention is shown in FIG. Fig.13 As shown, the display panel 100 includes a multiplexing unit 113, and the multiplexing unit 113 includes a second multiplexing unit 122 and a third multiplexing unit 123; the second multiplexing unit 122 is electrically connected to the first data line 105, and the third multiplexing unit 123 is electrically connected to the second data line 106; the driving unit 104 includes a data signal output terminal 107, and the same data signal output terminal 107 is electrically connected to the second multiplexing unit 122 and the third multiplexing unit 123 respectively, and the second multiplexing unit 122 and the third multiplexing unit 123 are turned on in time division.

[0058] Among them, a second multiplexing unit 122 is provided in the display panel 100, the second multiplexing unit 122 corresponds to the first display area 101, and the signal output terminal 116 of the second multiplexing unit 122 is electrically connected to the first data line 105. A third multiplexing unit 123 is also provided in the display panel 100, the third multiplexing unit 123 corresponds to the second display area 102, and the signal output terminal 116 of the third multiplexing unit is electrically connected to the second data line 106. The same data signal output terminal 107 of the driving unit 104 can provide data signals to the second multiplexing unit 122 and the third multiplexing unit 123 at the same time, and adjust the conduction time of the switch transistor 118 in the second multiplexing unit 122 and the third multiplexing unit 123, so that the second multiplexing unit 122 and the third multiplexing unit 123 are turned on in time division, so as to realize that the first display area 101 and the second display area 102 display different display pictures.

[0059] Optional, Fig.14 A schematic diagram of the structure of a multiplexing unit provided in an embodiment of the present invention is shown in FIG. Fig.14 As shown, the second multiplexing unit 122 includes a first data signal input terminal 124, a first signal output terminals 125, b first control terminals 126 and a first switch transistors 127, and the third multiplexing unit 123 includes a second data signal input terminal 128, c second signal output terminals 129, d second control terminals 130 and c second switch transistors 131; wherein a≥2, b≥2, b<a, d<c, a, b, c and d are all positive integers; the first electrodes of the a first switch transistors 127 are electrically connected to the same first data signal input terminal 124, and the first data signal input terminal 124 is electrically connected to the data signal output terminal 107; the gates of some of the first switch transistors 127 are electrically connected to the same first control terminal 126, and the first control terminal 126 is electrically connected to the driving unit 104; the gates of the a first switch transistors 127 are electrically connected to the same first control terminal 126, and the first control terminal 126 is electrically connected to the driving unit 104; The two electrodes are electrically connected to a first signal output terminals 125 in a one-to-one correspondence, and the first signal output terminals 125 are electrically connected to the first data line 105; the first electrodes of c second switch transistors 131 are electrically connected to the same second data signal input terminal 128, and the second data signal input terminal 128 is electrically connected to the data signal output terminal 107; the gates of some second switch transistors 131 are electrically connected to the same second control terminal 130, and the second control terminal 130 is electrically connected to the driving unit 104; the second electrodes of c second switch transistors 131 are electrically connected to c second signal output terminals 129 in a one-to-one correspondence, and the second signal output terminal 129 is electrically connected to the second data line 106; the first control terminal 126 outputs a first control signal, and the second control terminal 130 outputs a second control signal; in the same display screen refresh cycle, the enable phase of the first control signal and the enable phase of the second control signal do not overlap.

[0060] The first data signal input terminal 124 in the second multiplexing unit 122 receives the data signal output by the data signal output terminal 107 of the driving unit 104. The second multiplexing unit 122 includes a first data signal input terminal 124, two first signal output terminals 125, two first control terminals 126 and two first switch transistors 127. The first electrodes of the plurality of first switch transistors 127 are connected to the same first data signal input terminal 124, the gates of some of the first switch transistors 127 are connected to the same first control terminal 126, the driving unit 104 is electrically connected to the first control terminal 126, and the driving unit 104 outputs a control signal to control the on or off state of the first switch transistor 127. The second electrodes of the plurality of first switch transistors 127 are electrically connected to the plurality of first signal output terminals 125 in a one-to-one correspondence. The first signal output terminals 125 of the first switch transistors 127 controlled by the same first control terminal 126 can be electrically connected to the first data line 105 of the first display area 101 to synchronously charge the plurality of light-emitting transistors in the first display area 101. The second data signal input terminal 128 in the third multiplexing unit 123 receives the data signal output by the data signal output terminal 107 of the driving unit 104. The third multiplexing unit 123 includes a second data signal input terminal 128, two second signal output terminals 129, two second control terminals 130 and two second switch transistors 131. The first electrodes of the plurality of second switch transistors 131 are connected to the same second data signal input terminal 128, the gates of some second switch transistors 131 are connected to the same second control terminal 130, the driving unit 104 is electrically connected to the second control terminal 130, and the driving unit 104 outputs a control signal to control the on or off state of the second switch transistor 131. The second electrodes of the plurality of second switch transistors 131 are electrically connected to the plurality of second signal output terminals 129 in a one-to-one correspondence. The second signal output terminals 129 of the second switch transistors 131 controlled by the same second control terminal 130 can be electrically connected to the second data line 106 of the second display area 102 to synchronously charge the plurality of light-emitting transistors in the second display area 102.

[0061] Fig.15 Another signal timing diagram of a display panel provided by an embodiment of the present invention is as follows: Fig.15As shown, within the same display screen refresh cycle, the enable phase of the first control terminal 126 in the second multiplexing unit 122 outputting the first control signal CGout1 does not overlap with the enable phase of the second control terminal 130 in the third multiplexing unit 123 outputting the second control signal CGout2, and data signals are not written to the same column in the first display area 101 and the second display area 102 at the same time. Exemplarily, after the data signal is written to the first column in the first display area 101, the data signal is written to the second column in the second display area 102, and so on, thereby ensuring the time-sharing display of the first display area 101 and the second display area 102, and realizing that the first display area 101 and the second display area 102 display different display screens.

[0062] Optional, Fig.16 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention is shown in FIG. Fig.16 As shown, the second multiplexing unit 122 includes a fifth multiplexing subunit 1221 and a sixth multiplexing subunit 1222, and the third multiplexing unit 123 includes a seventh multiplexing subunit 1231 and an eighth multiplexing subunit 1232; along the second direction Y, the sixth multiplexing subunit 1222 is located on the side of the fifth multiplexing subunit 1221 away from the driving unit 104, and the eighth multiplexing subunit 1232 is located on the side of the seventh multiplexing subunit 1231 away from the driving unit 104; the data signal output terminal 107 includes a third data signal output terminal 1073 and a fourth data signal output terminal 1074, and along the first direction X, the third data signal output terminal 1073 is located on the side close to the first display area 101, and the fourth data signal output terminal 1074 is located on the side close to the first display area 101. 74 is located near the second display area 102; the third data signal output terminal 1073 is electrically connected to the plurality of first data lines 105 via the fifth multiplexing subunit 1221, and the third data signal output terminal 1073 is electrically connected to the plurality of second data lines 106 via the seventh multiplexing subunit 1231; the fourth data signal output terminal 1074 is electrically connected to the plurality of first data lines 105 via the sixth multiplexing subunit 1222, and the fourth data signal output terminal 1074 is electrically connected to the plurality of second data lines 106 via the eighth multiplexing subunit 1232; the fifth multiplexing unit 113 and the seventh multiplexing unit 113 are turned on in time division, and the sixth multiplexing unit 113 and the seventh multiplexing unit 113 are turned on at the same time; wherein the first direction X intersects with the second direction Y.

[0063] When the display images in the first display area 101 and the second display area 102 are different, the driving unit 104 needs to control the first display area 101 and the second display area 102 in a time-sharing manner. A plurality of data lines are provided in the first display area 101 and the second display area 102. To ensure accurate control, the first display area 101 is provided with a fifth multiplexing subunit 1221 and a sixth multiplexing subunit 1222, and the second display area 102 is provided with a seventh multiplexing subunit 1231 and an eighth multiplexing subunit 1232. , exemplarily, the first display area 101 includes 6480 rows of first data lines 105, the second display area 101 includes 6480 rows of second data lines 106, the fifth multiplexing subunit 1221 corresponds to the first data lines 105 of 1-3240 rows, the sixth multiplexing subunit 1222 corresponds to the first data lines 105 of 3241 rows; the seventh multiplexing subunit 1231 corresponds to the second data lines 106 of 1-3240 rows, and the eighth multiplexing subunit 1232 corresponds to the second data lines 106 of 3241 rows. Multiple multiplexing subunits are set to balance the wiring distance between the driving unit 104 and the first display area 101 and the wiring distance between the driving unit 104 and the second display area 102, and optimize the display effect of the first display area 101 and the second display area 102. The driving unit 104 includes a third data signal output terminal 1073 close to the first display area 101 and a fourth data signal output terminal 1074 close to the second display area 102. The data signal output by the third data signal output terminal 1073 is transmitted to the first display area 101 via the fifth multiplexing subunit 1221 and is transmitted to the second display area 102 via the seventh multiplexing subunit 1231. At this time, the driving unit 104 needs to control the fifth multiplexing subunit 1221 and the seventh multiplexing subunit 1231 to be turned on in time-sharing manner, so that the data signal is transmitted to the first display area 101 and the second display area 102 in time-sharing manner. The data signal output by the fourth data signal output terminal 1074 is transmitted to the first display area 101 via the sixth multiplexing subunit 1222 and is transmitted to the second display area 102 via the eighth multiplexing subunit 1232. At this time, the driving unit 104 needs to control the sixth multiplexing subunit 1222 and the eighth multiplexing subunit 1232 to be turned on in time-sharing manner, so that the data signal is transmitted to the first display area 101 and the second display area 102 in time-sharing manner, thereby ensuring the time-sharing display effect of the first display area 101 and the second display area 102.

[0064] Optional, Fig.17 Another signal timing diagram of a display panel provided by an embodiment of the present invention is as follows: Fig.17As shown, the signal output by the third data signal output terminal 1073 includes the fifth data signal CKH5 output to the fifth multiplexing sub-unit 1221 and the sixth data signal CKH6 output to the seventh multiplexing sub-unit 1231, and the fourth data signal output terminal 1074 includes the seventh data signal CKH7 output to the sixth multiplexing sub-unit 1222 and the eighth data signal CKH8 output to the eighth multiplexing sub-unit 1232; within the same display screen refresh cycle, the length W5 of the enable phase of the fifth data signal CKH5 is less than the length W6 of the enable phase of the sixth data signal CKH6; and the length W7 of the enable phase of the seventh data signal CKH7 is greater than the length W8 of the enable phase of the eighth data CKH8.

[0065] Among them, since there is a difference between the distance between the third data signal output terminal 1073 and the first display area 101 and the distance between the third data signal output terminal 1073 and the second display area 102, exemplarily, the distance between the third data signal output terminal 1073 and the first display area 101 is smaller than the distance between the third data signal output terminal 1073 and the second display area 102, and the length W5 of the enable phase of the fifth data signal CKH5 output to the fifth multiplexing sub-unit 1221 via the third data signal output terminal 1073 is adjusted to be smaller than the length W6 of the enable phase of the sixth data signal CKH6 output to the seventh multiplexing sub-unit 1231 via the third data signal output terminal 1073, so as to balance the charging difference caused by the difference in the routing length of the data connection line 119 corresponding to the third data signal output terminal 1073, and ensure the time-sharing display effect of the first display area 101 and the second display area 102. The distance between the fourth data signal output terminal 1074 and the first display area 101 is greater than the distance between the fourth data signal output terminal 1074 and the second display area 102. The length W7 of the enable phase of the seventh data signal CKH7 output to the sixth multiplexing sub-unit 1222 via the fourth data signal output terminal 1074 is adjusted to be greater than the length W8 of the enable phase of the eighth data signal CKH8 output to the eighth multiplexing sub-unit 1232 via the fourth data signal output terminal 1074. The charging difference caused by the difference in the routing length of the data connection line 119 corresponding to the fourth data signal output terminal 1074 is balanced to ensure the time-sharing display effect of the first display area 101 and the second display area 102.

[0066] Optional, Fig.18 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention, Fig.19 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention is shown in FIG. Fig.18 and Fig.19As shown, the display panel 100 also includes a flexible circuit board 132. Along the second direction Y, the flexible circuit board 132 is located on the side of the driving unit 104 away from the first display area 101 and the second display area 102. The flexible circuit board 132 includes a first control interface 1321 and a second control interface 1322. The first control interface 1321 and the second control interface 1322 are respectively communicated with the driving unit 104; wherein the first direction X intersects with the second direction Y.

[0067] The first control interface 1321 and the second control interface 1322 are arranged on the flexible circuit board 132, the first control interface 1321 and the second control structure are arranged at intervals, the first control interface 1321 and the second control interface 1322 are both connected to the drive unit 104 for communication, and the image data is transmitted to the first display area 101 and the second display area 102 via the drive unit 104. The first control interface 1321 is arranged on the side close to the first display area 101, and the second control interface 1322 is arranged on the side close to the second display area 102. For example, Fig.18 As shown, the first control interface 1321 can be set to control the first display area 101, and the second control interface 1321 can be set to control the second display area 102; or Fig.19 As shown, the first display area 101 and the second display area 102 are partitioned, the first display area 101 includes a first display sub-area 1011 along the second direction Y, close to the driving unit 104 and a second display sub-area 1012 away from the driving unit 104, the second display area 102 includes a third display sub-area 1021 along the second direction Y, close to the driving unit 104 and a fourth display sub-area 1022 away from the driving unit 104, a first control interface 1321 can be set to control the first display sub-area 1011 and the third display sub-area 1021, and a second control structure 1322 can be set to control the second display sub-area 1012 and the fourth display sub-area 1022, so as to ensure the display effect of the display panel 100.

[0068] Based on the same inventive concept, Fig. 20 A schematic diagram of a display device according to an embodiment of the present invention is shown in FIG. Fig. 20 As shown, the display device 200 includes the display panel 100 described in the above embodiment.

[0069] It should be noted that since the display device provided in this embodiment has the same or corresponding beneficial effects as the display panel 100 in the above embodiment, no further description is given here. The display device 200 provided in the embodiment of the present invention can be Fig. 20The smart glasses shown can also be any electronic product with a display function, including but not limited to the following categories: mobile phones, televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc. The embodiments of the present invention do not specifically limit this.

[0070] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A display panel, characterized in that: The display panel includes a first display area, a second display area, a non-display area and a driving unit; The first display area, the non-display area and the second display area are arranged along a first direction; The driving unit is arranged in the non-display area; along the first direction, the projections of the driving unit and the first display area and the second display area do not overlap; The driving unit drives the first display area and the second display area to display synchronously, or the driving unit drives the first display area and the second display area to display simultaneously.

2. The display panel according to claim 1, characterized in that: The driving unit comprises a first side close to the first display area, a second side close to the second display area, and a third side connecting the first side and the second side; an intersection point of the first side and the third side is a first vertex, and an intersection point of the second side and the third side is a second vertex; The first display area includes a first bottom edge close to the driving unit and a fourth side edge close to the second display area, and an intersection of the first bottom edge and the fourth side edge is a third vertex; The second display area includes a second bottom edge close to the driving unit and a fifth side edge close to the first display area, and an intersection of the second bottom edge and the fifth side edge is a fourth vertex; The distance between the first vertex and the third vertex is equal to the distance between the second vertex and the fourth vertex.

3. The display panel according to claim 1, characterized in that: The first display area includes a plurality of first data lines extending along the first direction, and the second display area includes a plurality of second data lines extending along the first direction; The driving unit includes multiple data signal output terminals, and the same data signal output terminal of the driving unit is electrically connected to the first data line and the second data line respectively; or, the data signal output terminals of some of the driving units are connected to the first data line and the data signal output terminals of some of the driving units are electrically connected to the second data line.

4. The display panel according to claim 3, characterized in that: The first display area includes a plurality of first scan lines extending along a second direction; the first display area includes a plurality of second scan lines extending along the second direction; The display panel includes a first scan driving circuit and a second scan driving circuit; The first scan driving circuit is electrically connected to the first scan line; the second scan circuit corresponds to the second scan line; The driving unit comprises a first output terminal; the first output terminal is electrically connected to the first scanning driving circuit and the second scanning driving circuit respectively; The first direction intersects with the second direction.

5. The display panel according to claim 4, characterized in that: The first scan driving circuit outputs a first scan signal, and the second scan driving circuit outputs a second scan signal. In the same display image refresh cycle, an enabling phase of the first scan signal overlaps with an enabling phase of the second scan signal.

6. The display panel according to claim 3, characterized in that: The display panel further comprises a multiplexing unit, wherein the multiplexing unit comprises at least one first multiplexing unit; The first multiplexing unit includes a data signal input terminal, M signal output terminals, N control terminals and M switch transistors, wherein M≥2, N<M, and M and N are positive integers; The first electrodes of the M switch transistors are electrically connected to the same data signal input terminal, and the data signal input terminal is electrically connected to the data signal output terminal; The gates of some of the switch transistors are electrically connected to the same control terminal, and the control terminal is electrically connected to the driving unit; The second electrodes of the M switch transistors are electrically connected to the M signal output ends in a one-to-one correspondence, some of the signal output ends are electrically connected to the first data line, and some of the signal output ends are electrically connected to the second data line.

7. The display panel according to claim 6, characterized in that: The display panel further includes a data connection line, the data connection line includes a first sub-data connection line and a second sub-data connection line extending along a first direction, the first sub-data connection line and the second sub-data connection line are connected to the same data signal output terminal; the switch transistor includes a first transistor connected to the first data line and a second transistor connected to the second data line; the first sub-data connection line is electrically connected to a first electrode of the first transistor, and the second sub-data connection line is electrically connected to a first electrode of the second transistor; The length of the first sub-data connection line is L1, and the cross-sectional area along the second direction is S1; the length of the second sub-data connection line is L2, and the cross-sectional area along the second direction is S2; the first direction intersects the second direction; Among them, when L1<L2, S1<S2; or, when L1>L2, S1>S2; or, when L1=L2, S1=S2.

8. The display panel according to claim 6, characterized in that: The first multiplexing unit includes a first multiplexing subunit and a second multiplexing subunit corresponding to the first display area and a third multiplexing subunit and a fourth multiplexing subunit corresponding to the second display area; Along the second direction, the second multiplexing subunit is located on a side of the first multiplexing subunit away from the driving unit, and the fourth multiplexing subunit is located on a side of the third multiplexing subunit away from the driving unit; The driving unit includes a data signal output terminal, the data signal output terminal includes a first data signal output terminal and a second data signal output terminal, along the first direction, the first data signal output terminal is located near the first display area, and the second data signal output terminal is located near the second display area; The first data signal output end is electrically connected to the plurality of first data lines via the first multiplexing subunit, and the first data signal output end is electrically connected to the plurality of second data lines via the third multiplexing subunit; the second data signal output end is electrically connected to the plurality of first data lines via the second multiplexing subunit, and the second data signal output end is electrically connected to the plurality of second data lines via the fourth multiplexing subunit; The first multiplexing subunit and the third multiplexing subunit are turned on at the same time, and the second multiplexing subunit and the fourth multiplexing subunit are turned on at the same time; The first direction intersects with the second direction.

9. The display panel according to claim 8, characterized in that: The signal outputted by the first data signal output terminal includes a first data signal outputted to the first multiplexing subunit and a second data signal outputted to the third multiplexing subunit, and the signal outputted by the second data signal output terminal includes a third data signal outputted to the second multiplexing subunit and a fourth data signal outputted to the fourth multiplexing subunit; In the same display frame refresh cycle, the length of the enable phase of the first data signal is shorter than the length of the enable phase of the second data signal; and the length of the enable phase of the third data signal is longer than the length of the enable phase of the fourth data signal.

10. The display panel according to claim 3, characterized in that: The first display area includes a plurality of first scan lines extending along a second direction; the first display area includes a plurality of second scan lines extending along the second direction; The display panel includes a first scan driving circuit and a second scan driving circuit; The first scan driving circuit is electrically connected to the first scan line; the second scan circuit corresponds to the second scan line; The driving unit comprises a second output terminal and a third output terminal; the second output terminal is electrically connected to the first scanning driving circuit, and the third output terminal is electrically connected to the second scanning driving circuit; The first direction intersects with the second direction.

11. The display panel according to claim 10, characterized in that: The first scan driving circuit outputs a first scan signal, and the second scan driving circuit outputs a second scan signal. In the same display image refresh cycle, an enabling phase of the first scan signal does not overlap with an enabling phase of the second scan signal.

12. The display panel according to claim 3, characterized in that: The display panel includes a multiplexing unit, and the multiplexing unit includes a second multiplexing unit and a third multiplexing unit; The second multiplexing unit is electrically connected to the first data line, and the third multiplexing unit is electrically connected to the second data line; The driving unit comprises a data signal output terminal, and the same data signal output terminal is electrically connected to the second multiplexing unit and the third multiplexing unit respectively, and the second multiplexing unit and the third multiplexing unit are turned on in time division.

13. The display panel according to claim 12, characterized in that: The second multiplexing unit includes a first data signal input terminal, a first signal output terminals, b first control terminals and a first switch transistors, and the third multiplexing unit includes a second data signal input terminal, c second signal output terminals, d second control terminals and c second switch transistors; wherein a≥2, b≥2, b<a, d<c, and a, b, c and d are all positive integers; The first electrodes of a first switch transistors are electrically connected to the same first data signal input terminal, and the first data signal input terminal is electrically connected to the data signal output terminal; the gates of some of the first switch transistors are electrically connected to the same first control terminal, and the first control terminal is electrically connected to the driving unit; the second electrodes of a first switch transistors are electrically connected to a first signal output terminal in a one-to-one correspondence, and the first signal output terminal is electrically connected to the first data line; The first electrodes of c second switch transistors are electrically connected to the same second data signal input terminal, and the second data signal input terminal is electrically connected to the data signal output terminal; the gates of some of the second switch transistors are electrically connected to the same second control terminal, and the second control terminal is electrically connected to the driving unit; the second electrodes of c second switch transistors are electrically connected to c second signal output terminals in a one-to-one correspondence, and the second signal output terminals are electrically connected to the second data line; The first control terminal outputs a first control signal, and the second control terminal outputs a second control signal; In the same display image refresh cycle, the enabling phase of the first control signal does not overlap with the enabling phase of the second control signal.

14. The display panel according to claim 13, characterized in that: The second multiplexing unit includes a fifth multiplexing subunit and a sixth multiplexing subunit, and the third multiplexing unit includes a seventh multiplexing subunit and an eighth multiplexing subunit; Along the second direction, the sixth multiplexing subunit is located on a side of the fifth multiplexing subunit away from the driving unit, and the eighth multiplexing subunit is located on a side of the seventh multiplexing subunit away from the driving unit; The data signal output end includes a third data signal output end and a fourth data signal output end. Along the first direction, the third data signal output end is located near the first display area, and the fourth data signal output end is located near the second display area. The third data signal output terminal is electrically connected to the plurality of first data lines via the fifth multiplexing sub-unit, and the third data signal output terminal is electrically connected to the plurality of second data lines via the seventh multiplexing sub-unit; the fourth data signal output terminal is electrically connected to the plurality of first data lines via the sixth multiplexing sub-unit, and the fourth data signal output terminal is electrically connected to the plurality of second data lines via the eighth multiplexing sub-unit; The fifth multiplexing unit and the seventh multiplexing unit are turned on in time division, and the sixth multiplexing unit and the seventh multiplexing unit are turned on at the same time; The first direction intersects with the second direction.

15. The display panel according to claim 14, characterized in that: The signal outputted by the third data signal output terminal includes a fifth data signal outputted to the fifth multiplexing subunit and a sixth data signal outputted to the seventh multiplexing subunit, and the signal outputted by the fourth data signal output terminal includes a seventh data signal outputted to the sixth multiplexing subunit and an eighth data signal outputted to the eighth multiplexing subunit; In the same display frame refresh cycle, the length of the enable phase of the fifth data signal is shorter than the length of the enable phase of the sixth data signal; and the length of the enable phase of the seventh data signal is longer than the length of the enable phase of the eighth data.

16. The display panel according to claim 1, characterized in that: The display panel also includes a flexible circuit board, which is located on a side of the driving unit away from the first display area and the second display area along a second direction, and the flexible circuit board includes a first control interface and a second control interface, and the first control interface and the second control interface are respectively communicated with the driving unit; wherein the first direction intersects with the second direction.

17. A display device, characterized in that: A display panel comprising any one of claims 1-16.

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