Wavelength division multiplexer, network structure determination method and device thereof, equipment and storage medium

Abstract

The invention relates to a wavelength division multiplexer, a network structure method and device of the wavelength division multiplexer, computer equipment and a computer readable storage medium. The method comprises the following steps: acquiring an initial network structure of the wavelength division multiplexer, wherein the initial network structure comprises a plurality of closed loop paths; the closed loop path is determined based on series connection of transistors; obtaining the current of the transistor in a power-on state, and determining the coil current of each closed loop path in the initial network structure according to the current of the transistor; and determining a target network structure of the wavelength division multiplexer through the circling flow of each closed loop path. According to the target network structure determined by the method, processing of certain frequency bands on external signals can be conveniently realized, and the initial network structure can be adjusted according to a use scene to obtain the target network structure and the wavelength division multiplexer applying the target network structure, so that the flexibility of the wavelength division multiplexer is improved.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a wavelength division multiplexer and a network structure method, device, computer equipment and computer-readable storage medium thereof. Background Art

[0002] The splitter can separate the signals according to the different frequencies of the input signals, which can be signals in the form of energy such as light, electricity, sound, and heat. The multiplexer can generate new signal waveforms by superimposing single-frequency signals according to certain rules, but the various splitters and multiplexers currently used in the market are fixed structures, and the filtering frequency band cannot be set according to needs, resulting in poor flexibility of the splitter multiplexer. Summary of the invention

[0003] Based on this, it is necessary to provide a network structure method, device, computer equipment and computer-readable storage medium of a wavelength division multiplexer that can improve the flexibility of the wavelength division multiplexer in order to solve the above technical problems.

[0004] In a first aspect, the present application provides a method for determining a network structure of a wavelength division multiplexer, the method comprising:

[0005] Acquire an initial network structure of the wavelength division multiplexer, wherein the initial network structure includes a plurality of closed loop paths; the closed loop paths are determined based on the series connection of transistors;

[0006] Acquire the current of the transistor in a power-on state, and determine the circular current of each closed-loop path in the initial network structure according to the current of the transistor;

[0007] The target network structure of the wavelength division multiplexer is determined by the loop flow of each closed loop path.

[0008] In one embodiment, the method for determining the closed loop path includes:

[0009] Obtain each group of transistors in the initial network structure;

[0010] For each group of transistors, the source of one transistor is connected in series with the drain of another transistor to determine a basic circle in the initial network structure;

[0011] By combining the basic circles, each closed loop path in the initial network structure is determined.

[0012] In one embodiment, determining the current of each closed loop path in the initial network structure according to the current of the transistor includes:

[0013] For each of the closed loop paths, based on the currents of the transistors that determine the closed loop path, the circular current of the closed loop path is determined according to a kinetic equation and a matrix tree generation theory.

[0014] In one embodiment, determining the target network structure of the wavelength division multiplexer by the loop flow of each of the closed loop paths includes:

[0015] Sorting the circular flows of each of the closed loop paths to determine the dominant circular flow;

[0016] Determining a closed loop dominant path according to the dominant circle flow;

[0017] The first target transistor of the dominant path of the closed loop is turned on to determine the target network structure of the wavelength division multiplexer.

[0018] In one embodiment, the method further comprises:

[0019] When the frequency drift rate of the electrical signal received by the target network structure is greater than the frequency drift threshold, receiving the adjustment signal sent by the target network structure;

[0020] A new target network structure is determined according to the adjustment signal.

[0021] In one embodiment, the adjustment signal carries a frequency drift rate; and determining a new target network structure according to the adjustment signal includes:

[0022] Determining a target closed loop path according to the frequency drift rate, turning on a second target transistor of the target closed loop path, and determining a new initial network structure;

[0023] Determining the loop flow of each new closed loop path according to the new initial network structure;

[0024] Determining a new closed loop dominant path through the circular flows of each of the new closed loop paths;

[0025] The third target transistor of the new closed-loop dominant path is turned on to determine a new target network structure of the wavelength division multiplexer.

[0026] In a second aspect, the present application further provides a wavelength division multiplexer, the wavelength division multiplexer comprising:

[0027] A target network structure is used to obtain an initial electrical signal through an input port; the initial electrical signal carries a signal frequency; according to the signal frequency, a target closed loop path is determined from a closed loop path, and the initial electrical signal is filtered through the target closed loop path to obtain each single frequency filter; each single frequency filter is superimposed to determine a target electrical signal; and the target electrical signal is output through an output port, wherein the closed loop path is determined based on the series connection of transistors;

[0028] Wherein, the target network structure is determined based on any one of claims 1 to 6.

[0029] In a third aspect, the present application further provides a network structure determination device for a wavelength division multiplexer, the device comprising:

[0030] An acquisition module, used for acquiring an initial network structure of the wavelength division multiplexer, wherein the initial network structure includes a plurality of closed loop paths; the closed loop paths are determined based on the series connection of transistors;

[0031] A loop current determination module, used for obtaining the current of the transistor in a power-on state, and determining the loop current of each closed loop path in the initial network structure according to the current of the transistor;

[0032] The target network structure determination module is used to determine the target network structure of the wavelength division multiplexer through the loop flow of each closed loop path.

[0033] In a fourth aspect, the present application further provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the above method when executing the computer program.

[0034] In a fifth aspect, the present application also provides a computer-readable storage medium having a computer program stored thereon, and the computer program implements the steps of the above method when executed by a processor.

[0035] The above-mentioned wavelength division multiplexer and the network structure method, device, computer equipment and computer-readable storage medium of the wavelength division multiplexer are as follows: firstly, an initial network structure of the wavelength division multiplexer is obtained, and the initial network structure includes a plurality of closed loop paths; the closed loop paths are determined based on the series connection of transistors; the Fourier transformation of the external signal from the time domain to the frequency domain is performed using the different opening times of the transistors, and each closed loop path corresponds to a filtering frequency; thereby, filtering processing of the external signal at different frequencies can be realized; secondly, the current of the transistor is obtained in the power-on state, and the loop current of each closed loop path in the initial network structure is calculated according to the current of the transistor; finally, the target network structure of the wavelength division multiplexer is determined according to the loop current of each closed loop path, and according to the loop current of different closed loop paths, it is determined which closed loop paths should be turned on and which closed loop paths should be turned off, thereby determining the target network structure, so as to realize the processing of certain frequency bands of the external signal through the target network structure, because the target network structure composed of closed loop paths of different filtering frequency bands is determined according to the loop current of different closed loop paths, and the wavelength division multiplexer with this target network structure is applied, thereby improving the flexibility of the wavelength division multiplexer. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0037] FIG1 is a schematic flow chart of a method for determining a network structure of a wavelength division multiplexer in one embodiment;

[0038] FIG2 is a schematic flow chart of a method for determining a closed loop path in one embodiment;

[0039] FIG3 is a schematic diagram of each group of MOS tubes in an initial network structure in one embodiment;

[0040] FIG4 is a schematic diagram showing a source of a transistor connected in series with a drain of another transistor in one embodiment;

[0041] FIG5 is a schematic diagram of a closed loop path obtained by combining basic circles in one embodiment;

[0042] FIG6 is a schematic diagram of nodes and edges in a directed graph in one embodiment;

[0043] FIG7 is a schematic diagram of a process for determining a target network structure according to a circle flow in one embodiment;

[0044] FIG8 is a schematic diagram of a process for adjusting a target network structure in one embodiment;

[0045] FIG9 is a schematic diagram of a process for determining a new target network structure according to an adjustment signal in one embodiment;

[0046] FIG10 is a schematic diagram of a wavelength division multiplexer receiving an input signal and outputting an output signal in one embodiment;

[0047] FIG11 is a structural block diagram of a device for determining a network structure of a wavelength division multiplexer in one embodiment;

[0048] FIG. 12 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0050] The network structure determination method of the wavelength division multiplexer involved in the embodiment of the present application can be applied to the network structure determination device of the wavelength division multiplexer, and the network structure determination device of the wavelength division multiplexer can be a processor or a control chip; the processor or control chip can be applied to the wavelength division multiplexer or other devices.

[0051] In one embodiment, as shown in FIG1 , a method for determining a network structure of a wavelength division multiplexer is provided. This embodiment uses the method applied to a control chip as an example for illustration. It can be understood that the method can also be applied to a wavelength division multiplexer, and can also be applied to a system including a terminal and a server. In this embodiment, the method includes the following steps S102 to S106. Among them:

[0052] Step S102, obtaining an initial network structure of the wavelength division multiplexer, the initial network structure including a plurality of closed loop paths; the closed loop paths are determined based on the series connection of transistors.

[0053] The initial network structure includes a plurality of closed loop paths; the closed loop paths are determined based on the series connection of transistors, and each closed loop path can also be called a cycle. The transistor can be a metal oxide semiconductor field effect transistor (Metal Oxide Semiconductor Field Effect Transistor, MOSFET), referred to as MOS tube.

[0054] Optionally, before the control chip obtains the initial network structure of the wavelength division multiplexer, the control chip first provides a basic network connection structure at the metal layer according to the pre-simulation result. The initial network structure can also be randomly generated and may be inaccurate for external signal processing.

[0055] Optionally, the control chip obtains the initial network structure of the wavelength division multiplexer, and the initial network structure consists of M closed loop paths, and each closed loop path may include the same number of transistors or different numbers of transistors. For example, closed loop path 1 includes x transistors; closed loop path 2 includes y transistors; closed loop path 3 includes z transistors, and the initial network structure may include hundreds of MOS tubes.

[0056] Step S104, obtaining the current of the transistor in the power-on state, and determining the circular current of each closed loop path in the initial network structure according to the current of the transistor.

[0057] Among them, loop current is a physical concept used to measure the speed of the system's state change on a closed loop path (loop), thereby reflecting the activity of this path and indirectly reflecting the importance of its contribution to the entire transmission process. Loop current is also called circulation flux. Loop current is a factor that determines the connectivity between transistors.

[0058] Optionally, the initial network structure is powered on, and the current of each transistor is measured. The initial network structure sends the current of each transistor to the control chip, and the control chip obtains the current of the transistor in the powered-on state, and determines the circulation flow of each closed loop path in the initial network structure according to the current of the transistor, that is, the circulation flux of each cycle. The control chip subsequently adjusts the on and off states of the transistors in the initial network structure, and determines which closed loop path transistors are turned on and which closed loop path transistors are turned off through the circulation flow.

[0059] Step S106: determining the target network structure of the wavelength division multiplexer through the loop flows of each closed loop path.

[0060] Optionally, the control chip sorts the specific values ​​of the loop currents of each closed loop path, determines the importance of different closed loop paths, turns on the transistors of important closed loop paths, and turns off the transistors of unimportant or redundant closed loop paths, thereby completing the adjustment of the on and off states of the transistors in the initial network structure, thereby determining the target network structure of the wavelength division multiplexer.

[0061] In the above-mentioned method for determining the network structure of the wavelength division multiplexer, the initial network structure of the wavelength division multiplexer is first obtained, and the initial network structure includes several closed loop paths; the closed loop paths are determined based on the series connection of transistors; the Fourier transformation of the external signal from the time domain to the frequency domain is performed using the different opening times of the transistors, and each closed loop path corresponds to a filtering frequency; thereby, filtering of the external signal at different frequencies can be realized; secondly, the current of the transistor is obtained in the power-on state, and the loop current of each closed loop path in the initial network structure is calculated according to the current of the transistor; finally, the target network structure of the wavelength division multiplexer is determined by the loop current of each closed loop path, and the transistors in which closed loop paths should be turned on and which closed loop paths should be turned off are determined according to the loop current of different closed loop paths, thereby determining the target network structure, so as to realize the processing of certain frequency bands of the external signal through the target network structure, and since the target network structure composed of closed loop paths of different filtering frequency bands is determined according to the loop current of different closed loop paths, the initial network structure can also be adjusted according to the usage scenario to obtain the target network structure. The wavelength division multiplexer using this target network structure improves the flexibility of the wavelength division multiplexer.

[0062] In an exemplary embodiment, as shown in FIG2 , the method for determining a closed loop path includes steps S202 to S206 .

[0063] Step S202, obtaining each group of transistors in the initial network structure.

[0064] Each group of transistors is a random number of transistors in the initial network.

[0065] Optionally, if the initial network structure may include several MOS tubes; or may include dozens, hundreds, or even thousands of MOS tubes, then there may be several groups, dozens, hundreds, or even thousands of groups of MOS tubes in the initial network structure, and the number of MOS tubes in each group may be determined according to actual needs, and no specific limitation is made here.

[0066] Optionally, as shown in FIG3 , each dot in the figure is a MOS tube; assuming that 1, 6, 7 are a group of MOS tubes, 2, 3, 9 are a group of MOS tubes, 1, 2, 3, 4 are a group of MOS tubes, 2, 3, 4, 5 are a group of MOS tubes, 2, 5, 8, 9 are a group of MOS tubes, and 1, 2, 9, 8, 7 are a group of MOS tubes. The control chip obtains each group of transistors as described above in the initial network structure.

[0067] Step S204 , for each group of transistors, the source of one transistor is connected in series with the drain of another transistor to determine a basic circle in the initial network structure.

[0068] The transistor includes a source, denoted by S, and a drain, denoted by D.

[0069] Optionally, the control chip connects each group of MOS tubes in the initial network structure in series, as shown in FIG4 , and can determine a number of fundamental cycles in the initial network structure by connecting the source end of one MOS tube with the drain end of another MOS tube. The number of groups of MOS tubes is the same as the number of fundamental cycles, and the number of groups of fundamental cycles corresponds to the number of groups of MOS tubes in the initial network structure.

[0070] As shown in Figure 5, the black dots represent each MOS tube, and the black lines between MOS tubes are edges, which represent that there is a certain connection between the two MOS tubes. If any point pair (i, j) and (j, i) correspond to the same edge, the graph is called an undirected graph, otherwise it is called a directed network. Figure 5 is an undirected graph. For example, nodes 1, 2, 3, and 4 are four MOS tubes, and the edges are the connections between pairs of MOS tubes. In Figure 5, there is a basic circle C1, including MOS tubes 1, 2, and 3; there is a basic circle C2, including MOS tubes 2, 3, and 4.

[0071] Step S206, determining each closed loop path in the initial network structure by combining basic circles.

[0072] Optionally, any closed loop path in the initial network structure can be obtained by a linear combination of the fundamental cycles {c1, c2, ..., cv}. For example, the control chip selects {c1, c2} as the fundamental cycle to obtain the closed loop path (cycle), following the operation rule: c = c1 + c2. Similarly, any closed loop path (cycle) can be decomposed into fundamental cycles.

[0073] In this embodiment, each closed loop path can be determined by combining basic circles to form an initial network structure, and the initial network structure can be adjusted to form a plurality of different filtering frequency bands.

[0074] In an exemplary embodiment, the loop current of each closed loop path in the initial network structure is determined according to the current of the transistor, including: for each closed loop path, based on the current of each transistor determining the closed loop path, according to the kinetic equation and the matrix tree generation theory, the loop current of the closed loop path is determined.

[0075] Among them, in the directed graph, as shown in Figure 6, the mos tubes included in the closed loop path are numbered 2-1-3-4, and the closed loop path is k2,1-k1,3-k3,4-k4,2. k2,1 represents the edge between the mos tube numbered 2 and the mos tube numbered 1; k1,3 represents the edge between the mos tube numbered 1 and the mos tube numbered 3; k3,4 represents the edge between the mos tube numbered 3 and the mos tube numbered 4; k4,2 represents the edge between the mos tube numbered 4 and the mos tube numbered 2.

[0076] Optionally, for each closed loop path, the control chip determines the current of each transistor of the closed loop path. The dynamic equation is given by Liouville representation to obtain a steady-state solution, and the loop current of the closed loop path is calculated by combining the dynamic master equation matrix with the matrix-tree theorem in algebraic graph theory. The vector sum of all loop currents flowing through the closed loop path is the current vector of the closed loop path. Specifically, these dynamic systems can often be described by the master equation, formula (1):

[0077] Formula (1)

[0078] Where, ki,j represents the edge connecting MOS tube node i and MOS tube node j; kj,i represents the edge connecting MOS tube node j and MOS tube node i; Indicates the probability that the particle is at the xi node; Represents the probability that the particle is at the xj node.

[0079] When the system reaches a steady state, formula (1) is 0, and According to Cramer's rule, we can calculate the probability of each edge , in algebraic graph theory, For all spanning trees with roots at node i, the value of multiplying their respective weights and then summing them up is the physical image of all possible processes in which the system eventually evolves to state i. is the value obtained by multiplying the weights of all spanning trees rooted at each node and then summing them up. Based on the above description, further expansion can be obtained to obtain the graph theory expression of the cycle flow as follows:

[0080] Formula (2)

[0081] In the formula, It is the circular flow value along the closed loop path (cycle, C) in the clockwise (+) direction or counterclockwise (-) direction. It is the weight along the closed loop path C in the clockwise (+) direction or counterclockwise (-) direction. Describes the possibility that the system will eventually evolve to any node on the closed loop path C.

[0082] In this embodiment, the activity level of each closed loop path is determined by the circle flow, and the dominant path can be determined later.

[0083] In an exemplary embodiment, as shown in FIG7 , the target network structure of the wavelength division multiplexer is determined by the loop flow of each closed loop path, including steps S702 to S706 .

[0084] Step S702, sorting the circle flows of each closed loop path to determine the dominant circle flow.

[0085] Optionally, the specific data of the circle flow can be called the circle flow value. The control chip sorts the circle flow values ​​of each closed loop path. The larger the circle flow value, the more important the closed loop path is in the initial network structure; conversely, the larger the circle flow value, the more important the closed loop path is in the initial network structure. The control chip uses the circle flow with a large circle flow value as the dominant circle flow, such as selecting the circle flow with the first m in the sorting as the dominant circle flow.

[0086] Step S704, determining the closed loop dominant path according to the dominant circle flow.

[0087] Optionally, each cycle flow corresponds to a closed loop path, and the control chip uses the closed loop path corresponding to the dominant cycle flow as the closed loop dominant path.

[0088] Step S706 , turning on the first target transistor of the closed loop dominant path to determine the target network structure of the wavelength division multiplexer.

[0089] Optionally, the control chip turns on the first target transistor of each closed loop dominant path and turns off the transistors of other non-closed loop dominant paths. The control chip can achieve this by turning off the gate voltage of the transistor or by blowing it through an electronic fuse (eFUSE).

[0090] If there are m closed loop paths in the initial network structure, the corresponding loop current values ​​of the m closed loop paths are calculated. The m loop current values ​​are sorted, and the n closed loop paths corresponding to the maximum loop current values ​​are selected as the closed loop dominant paths. The first target transistor in the closed loop dominant path is turned on, thereby determining the target network structure, where n < m.

[0091] In this embodiment, the dominant path is determined by the loop current value, and the target network structure can be determined quickly and accurately by turning on the first target transistor on the dominant path.

[0092] In an exemplary embodiment, as shown in FIG8 , adjusting the target network structure includes steps S802 to S804. In which:

[0093] Step S802: When the frequency drift rate of the electrical signal received by the target network structure is greater than the frequency drift threshold, an adjustment signal sent by the target network structure is received.

[0094] When external noise changes (such as temperature, electric field, vibration), the external wave signal received by the target network structure through the receiving end, that is, the electrical signal, will be disturbed. When the frequency drift rate of the electrical signal is greater than the frequency drift threshold, the target network structure sends an adjustment signal to the control chip through the receiving end, and the control chip receives the adjustment signal.

[0095] Step S804: determining a new target network structure according to the adjustment signal.

[0096] Optionally, the control chip turns on and off the MOS tube of the target network structure according to the adjustment signal, thereby determining a new target network structure.

[0097] In this embodiment, the background noise frequency of the calibrated working environment can be automatically adjusted according to the change of the working environment, so as to select the optimal MOSFET path for connection.

[0098] In an exemplary embodiment, as shown in FIG9 , the adjustment signal carries a frequency drift rate; determining a new target network structure according to the adjustment signal includes steps S902 to S906. In which:

[0099] Step S902, determining a target closed loop path according to the frequency drift rate, turning on a second target transistor of the target closed loop path, and determining a new initial network structure.

[0100] Optionally, the control chip determines whether the frequency drift rate is a frequency blue shift or a frequency red shift according to the frequency drift rate, wherein the phenomenon of frequency reduction is called red shift, and the phenomenon of frequency increase is called blue shift. The control chip selects different target closed loop paths according to the frequency blue shift or red shift, and the second target transistor of the target closed loop path can be turned on by applying a working voltage to the gate, thereby determining a new initial network structure.

[0101] Step S904: determining the loop flow of each new closed loop path according to the new initial network structure.

[0102] Optionally, after determining a new initial network structure, that is, turning on MOSs of different frequencies, the control chip will obtain the loop current value for determining each new closed loop path according to the current of each MOS tube.

[0103] Step S906, determining a new closed loop dominant path through the circular flows of each new closed loop path.

[0104] Optionally, a new closed loop dominant path is recalculated according to the circular flow values ​​of each new closed loop path. For example, the closed loop path with the largest circular flow value can be used as the closed loop dominant path. The closed loop dominant path is the most important closed loop path.

[0105] Step S908 , turning on the third target transistor of the new closed loop dominant path to determine a new target network structure of the wavelength division multiplexer.

[0106] Optionally, the control chip turns on the third target transistor of the new closed loop dominant path to determine the new target network structure of the wavelength splitter. The control chip can also verify the wavelength splitting result under the new target network structure, and if there is still frequency drift, the above process is re-executed until the frequency is stable.

[0107] In this embodiment, by selecting a MOSFET path that meets the working environment for connection according to the adjustment signal, the above calibration and adjustment help to output a single electrical signal with a stable frequency.

[0108] In an exemplary embodiment, a control chip is applied to a wavelength division multiplexer, and the control chip obtains an initial network structure of the wavelength division multiplexer, and the initial network structure includes a plurality of closed-loop paths; the closed-loop paths are determined based on the series connection of transistors; the control chip obtains the current of the transistors in the power-on state, and for each closed-loop path, based on the current of each transistor determining the closed-loop path, determines the circular current of the closed-loop path according to the kinetic equation and the matrix tree generation theory.

[0109] The control chip sorts the loop currents of each closed loop path to determine the dominant loop current; determines the closed loop dominant path according to the dominant loop current; turns on the first target transistor of the closed loop dominant path to determine the target network structure of the wavelength division multiplexer.

[0110] When the frequency drift rate of the electrical signal received by the target network structure is greater than the frequency drift threshold, the control chip receives the adjustment signal sent by the target network structure; the regulation signal carries the frequency drift rate; according to the frequency drift rate, the target closed loop path is determined, the second target transistor of the target closed loop path is turned on, and a new initial network structure is determined; according to the new initial network structure, the circulation of each new closed loop path is determined; through the circulation of each new closed loop path, a new closed loop dominant path is determined; the third target transistor of the new closed loop dominant path is turned on to determine the new target network structure of the wavelength division multiplexer.

[0111] Among them, the method for determining the closed loop path includes: obtaining each group of transistors in the initial network structure; for each group of transistors, connecting the source of one transistor in series with the drain of another transistor to determine the basic circle in the initial network structure; and determining each closed loop path in the initial network structure by combining the basic circles.

[0112] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0113] In an exemplary embodiment, a wavelength division multiplexer includes: a target network structure for obtaining an initial electrical signal through an input port; the initial electrical signal carries a signal frequency; according to the signal frequency, a target closed loop path is determined from a closed loop path, and the initial electrical signal is filtered through the target closed loop path to obtain each single frequency filter; each single frequency filter is superimposed to determine the target electrical signal; and the target electrical signal is output through an output port, wherein the closed loop path is determined based on transistors in series; wherein the target network structure is determined based on the steps in the above-mentioned embodiment.

[0114] The wavelength division multiplexer of the present application can be a single-input-multiple-output device, and can also be expanded to a multi-input-multiple-output device. As shown in FIG10 , the source terminals (source) and drain terminals (drain) of hundreds of MOS tubes are connected in series according to the target network structure determined by the above method.

[0115] The wavelength division multiplexer including the target network structure receives the initial electrical signal through the signal input port, such as the input signal in FIG10; the initial electrical signal carries the signal frequency; according to the signal frequency, the target closed loop path is determined from the closed loop path, and the initial electrical signal is filtered through the target closed loop path to obtain each single frequency filter; that is, the input signal with a specific frequency will be output to the corresponding port according to the specific network route to form a single frequency filter, such as output 1 and output 2 in FIG10. By analogy, other frequencies can also use MOS tubes with other opening frequencies.

[0116] In Figure 10, a node in the network structure represents a MOSFET. If two MOSFETs are connected (called edges in graph theory), it means that the two MOSFETs are connected in series. After a noisy input signal is filtered by the target network structure, it is divided into two different frequency signals and output from the corresponding output ports, such as output 1 and output 2 in Figure 10. If the original signal is needed, the signals of the two output ports can be superimposed and input to the same input port (without considering the phase effect), and the input signal corresponding to the original main frequency can be obtained, completing the use of the multiplexer.

[0117] Since the same MOS tube is connected by different closed loop paths in the target network structure, it can play the same role in several closed loop paths, thereby reducing the volume of the wavelength division multiplexer. Compared with traditional technology, only a few hundred MOS tubes are needed, and the cost is low, the manufacturing process level requirements are low, and it can be widely used in various pre-filtering devices.

[0118] The initial network structure can be adjusted according to the usage scenario to form a target network structure with multiple filtering frequency bands, including a wavelength division multiplexer of the target network structure that can adapt to signal processing in a variety of application environments.

[0119] In addition, it can also be placed in a harsh detection environment without maintenance, and many can be placed to form an "ensemble" to achieve strong robustness. When the background noise frequency of the working environment is received, the adjustment signal will be received to adjust the target network structure. The adjustment calculation can be performed through a neural network, or it can be replaced by other intelligent optimization algorithms, such as genetic algorithms, particle swarm algorithms, etc. Taking the neural network as an example, the general neural network will use the Sigmoid function for judgment, and the cycle flux value is used here instead. The wave splitter can adjust and calibrate the background noise frequency of the working environment according to the changes in the working environment, so as to select the optimal MOSFET path for connection. The above calibration helps to output a single electrical signal with a stable frequency.

[0120] Based on the same inventive concept, the embodiment of the present application also provides a network structure determination device for a wavelength division multiplexer for implementing the network structure determination method of the wavelength division multiplexer involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in the embodiments of the network structure determination device for one or more wavelength division multiplexers provided below can refer to the limitations of the network structure determination method for the wavelength division multiplexer in the above text, and will not be repeated here.

[0121] In an exemplary embodiment, as shown in FIG11 , a network structure determination device for a wavelength division multiplexer is provided, comprising: an acquisition module 1101, a circle flow determination module 1102 and a target network structure determination module 1103, wherein:

[0122] An acquisition module 1101 is used to acquire an initial network structure of a wavelength division multiplexer, wherein the initial network structure includes a plurality of closed loop paths; the closed loop paths are determined based on the series connection of transistors;

[0123] The loop current determination module 1102 is used to obtain the current of the transistor in the power-on state, and determine the loop current of each closed loop path in the initial network structure according to the current of the transistor;

[0124] The target network structure determination module 1103 is used to determine the target network structure of the wavelength division multiplexer through the loop flows of each closed loop path.

[0125] In an exemplary embodiment, a network structure determination device of a wavelength division multiplexer further includes:

[0126] The closed loop path determination module is used to obtain each group of transistors in the initial network structure; for each group of transistors, the source of one transistor is connected in series with the drain of another transistor to determine the basic circle in the initial network structure; and each closed loop path in the initial network structure is determined by combining the basic circles.

[0127] In an exemplary embodiment, the circulation determination module 1102 is further used to: for each closed loop path, determine the circulation of the closed loop path based on the current of each transistor determining the closed loop path, according to the dynamic equation and the matrix tree generation theory.

[0128] In an exemplary embodiment, the target network structure determination module 1103 includes:

[0129] The dominant circle flow determination unit is used to sort the circle flows of each closed loop path and determine the dominant circle flow.

[0130] The dominant path determination unit is used to determine the dominant path of the closed loop according to the dominant circle flow.

[0131] The target network structure determination unit is used to turn on the first target transistor of the closed loop dominant path to determine the target network structure of the wavelength division multiplexer.

[0132] In an exemplary embodiment, a network structure determination device of a wavelength division multiplexer further includes:

[0133] The adjustment module is used to receive an adjustment signal sent by the target network structure when the frequency drift rate of the electrical signal received by the target network structure is greater than a frequency drift threshold; and determine a new target network structure according to the adjustment signal.

[0134] In an exemplary embodiment, the adjustment signal carries a frequency drift rate; the adjustment module is also used to: determine the target closed loop path according to the frequency drift rate, turn on the second target transistor of the target closed loop path, and determine a new initial network structure; determine the circulation of each new closed loop path according to the new initial network structure; determine the new closed loop dominant path through the circulation of each new closed loop path; turn on the third target transistor of the new closed loop dominant path to determine the new target network structure of the wavelength division multiplexer.

[0135] Each module in the above-mentioned network structure determination device of the wavelength division multiplexer can be implemented in whole or in part by software, hardware and their combination. Each of the above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.

[0136] In an exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be shown in FIG12. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. The processor, the memory and the input / output interface are connected via a system bus, and the communication interface is connected to the system bus via the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store network structure determination data. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, a method for determining the network structure of a wavelength division multiplexer is implemented.

[0137] Those skilled in the art will understand that the structure shown in FIG. 12 is merely a block diagram of a partial structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different arrangement of components.

[0138] In one embodiment, a computer device is further provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above method embodiments when executing the computer program.

[0139] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0140] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0141] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0142] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A method for determining a network structure of a wavelength division multiplexer, characterized in that: The method comprises: Acquire an initial network structure of the wavelength division multiplexer, wherein the initial network structure includes a plurality of closed loop paths; the closed loop paths are determined based on the series connection of transistors; Acquire the current of the transistor in a power-on state, and determine the circular current of each closed-loop path in the initial network structure according to the current of the transistor; The target network structure of the wavelength division multiplexer is determined by the loop flow of each closed loop path.

2. The method according to claim 1, characterized in that The method for determining the closed loop path comprises: Obtain each group of transistors in the initial network structure; For each group of transistors, the source of one transistor is connected in series with the drain of another transistor to determine a basic circle in the initial network structure; By combining the basic circles, each closed loop path in the initial network structure is determined.

3. The method according to claim 1, characterized in that Determining the current of each closed loop path in the initial network structure according to the current of the transistor includes: For each of the closed loop paths, based on the currents of the transistors that determine the closed loop path, the circular current of the closed loop path is determined according to a kinetic equation and a matrix tree generation theory.

4. The method according to claim 1, characterized in that Determining the target network structure of the wavelength division multiplexer by the loop flow of each of the closed loop paths includes: Sorting the circular flows of each of the closed loop paths to determine the dominant circular flow; Determining a closed loop dominant path according to the dominant circle flow; The first target transistor of the dominant path of the closed loop is turned on to determine the target network structure of the wavelength division multiplexer.

5. The method according to claim 1, characterized in that: The method further comprises: When the frequency drift rate of the electrical signal received by the target network structure is greater than the frequency drift threshold, receiving the adjustment signal sent by the target network structure; A new target network structure is determined according to the adjustment signal.

6. The method according to claim 5, characterized in that The adjustment signal carries a frequency drift rate; and determining a new target network structure according to the adjustment signal includes: Determining a target closed loop path according to the frequency drift rate, turning on a second target transistor of the target closed loop path, and determining a new initial network structure; Determining the loop flow of each new closed loop path according to the new initial network structure; Determining a new closed loop dominant path through the circular flows of each of the new closed loop paths; The third target transistor of the new closed-loop dominant path is turned on to determine a new target network structure of the wavelength division multiplexer.

7. A wavelength division multiplexer, characterized in that: The wavelength division multiplexer comprises: A target network structure is used to obtain an initial electrical signal through an input port; the initial electrical signal carries a signal frequency; according to the signal frequency, a target closed loop path is determined from a closed loop path, and the initial electrical signal is filtered through the target closed loop path to obtain each single frequency filter; each single frequency filter is superimposed to determine a target electrical signal; and the target electrical signal is output through an output port, wherein the closed loop path is determined based on the series connection of transistors; Wherein, the target network structure is determined based on any one of claims 1 to 6.

8. A device for determining a network structure of a wavelength division multiplexer, characterized in that: The device comprises: An acquisition module, used for acquiring an initial network structure of the wavelength division multiplexer, wherein the initial network structure includes a plurality of closed loop paths; the closed loop paths are determined based on the series connection of transistors; A loop current determination module, used for obtaining the current of the transistor in a power-on state, and determining the loop current of each closed loop path in the initial network structure according to the current of the transistor; The target network structure determination module is used to determine the target network structure of the wavelength division multiplexer through the loop flow of each closed loop path.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

Images