Driver chip parameter calculation method, device and medium
By removing the EEPROM in the FTTR gateway and using the initial configuration data and calibration points, the high operating cost and data deviation caused by EEPROM are solved, and a higher precision driver chip parameter calculation is achieved.
Patent Information
- Application Number
- CN202411946202.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-04-15
- Estimated Expiration
- 2044-12-27
AI Technical Summary
In the existing FTTR gateway, the lower-connected BOB driver chip and the EEPROM that store PON driver chip data have problems with high operating costs and data deviations, resulting in large errors in obtaining the operating parameters of the driver chip.
By removing the EEPROM, the initial configuration data is used to write to the driver chip registers, and real-time calibration is achieved through the setting of calibration points to improve the accuracy of parameter calculation.
The normal operation of the PON underlinked FTTR main gateway without EEPROM is achieved, the parameter calculation accuracy is improved, and the error accumulation caused by EEPROM is eliminated.
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Figure CN119383499B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of communication network technology, and in particular to a method, device and medium for calculating parameters of a driver chip. Background Art
[0002] In the current home gateway industry, the relevant components of the FTTR gateway downstream PON device include downstream BOB driver chips and EEPROMs that store PON driver chip data. Driver chips have dual closed loops and single closed loops. Dual closed loops have good performance and are suitable for use in the early stages of project development. After the driver chip is paired with EPPROM, the FTTR gateway only needs a small amount of work to adapt and run, and has high stability.
[0003] However, the operation cost of setting up both the downstream BOB driver chip and the EEPROM for storing the PON driver chip data is high. At the same time, when it is necessary to obtain the current operating parameters of the driver chip, the storage and reading of the data depend on the fixed pre-stored data in the EEPROM. The data in the EEPROM deviates over time or with increased frequency of use, resulting in inaccurate operating parameters obtained subsequently and large errors. Summary of the invention
[0004] The main purpose of the present application is to provide a parameter calculation method, device and medium for a driver chip, aiming to enable the downlink PON of the FTTR main gateway to work normally when the EEPROM is removed from the driver chip. At the same time, compared with the current parameter calculation method of the driver chip with EEPROM, the present application realizes real-time calibration by setting calibration points and removing the EEPROM operation, thereby improving the calculation accuracy of the parameters and eliminating the error accumulation caused by the EEPROM.
[0005] To achieve the above object, the present application provides a parameter calculation method of a driver chip, which is applied to a driving system, wherein the driving system includes a driver chip and a flash memory device, wherein the driver chip is used to drive a downstream PON device of an FTTR main gateway device, and the downstream PON device does not include an EEPROM memory;
[0006] The method comprises:
[0007] Acquire initial configuration data corresponding to the driver chip, and write the initial configuration data into a register of the driver chip;
[0008] Calibrate the driver chip to obtain a parameter calibration point, wherein the parameter calibration point includes a register reading value and a calibration value, the register reading value is used to represent the register address corresponding to the parameter of the driver chip, and the calibration value is used to represent the measurement value corresponding to the parameter of the driver chip;
[0009] Based on the parameter calibration point and the register reading value corresponding to the driver chip, a target value corresponding to the parameter of the driver chip is obtained, wherein the target value is used to represent the current actual size of the parameter.
[0010] Specifically, the initial configuration data is stored in the flash memory device, and the acquiring the initial configuration data corresponding to the driver chip and writing the initial configuration data into the register of the driver chip includes:
[0011] Reading initial configuration data in the flash memory device;
[0012] In response to the startup completion operation of the gateway system corresponding to the FTTR master gateway device, the initial configuration data is written into the register of the driver chip.
[0013] Specifically, the parameter calibration point includes a first parameter calibration point and a second parameter calibration point;
[0014] The obtaining a target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip includes:
[0015] Obtaining the slope of a straight line passing through the first parameter calibration point and the second parameter calibration point;
[0016] The target value is calculated by linear interpolation based on the first parameter calibration point, the second parameter calibration point, the slope, and a register reading value corresponding to the driver chip.
[0017] Specifically, the obtaining the slope of a straight line passing through the first parameter calibration point and the second parameter calibration point includes:
[0018] The slope is calculated by the following formula:
[0019]
[0020] in, is the slope, The register reading value for the first parameter calibration point, The register value for the second parameter calibration point is read, is the calibration value of the first parameter calibration point, is the calibration value of the second parameter calibration point.
[0021] Specifically, the target value is calculated by linear interpolation based on the first parameter calibration point, the second parameter calibration point, the slope and the register reading value corresponding to the driver chip, including:
[0022] The target value is calculated by the following formula:
[0023]
[0024] in, Read the value of the register corresponding to the driver chip, is the target value.
[0025] Specifically, the parameter calibration point includes at least three sub-parameter calibration points;
[0026] The obtaining a target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip includes:
[0027] Based on the parameter calibration points, construct an initial polynomial, wherein the initial polynomial is used to characterize the relationship between the register address of the driver chip and the calibration value of the driver chip;
[0028] Based on the coefficients in the initial polynomial, construct the coefficient vector corresponding to the coefficients;
[0029] Based on the parameter calibration points, construct a calibration matrix and a calibration vector respectively, wherein the calibration matrix includes a power combination of register reading values of each sub-parameter calibration point, and the calibration vector includes calibration values of each sub-parameter calibration point;
[0030] Solving the coefficient vector by the least square method to obtain update coefficients;
[0031] Based on the update coefficient, updating the initial polynomial to obtain an updated polynomial;
[0032] The target value is calculated based on the updated polynomial and the register reading value corresponding to the driver chip.
[0033] Specifically, solving the coefficient vector by the least square method to obtain the update coefficient includes:
[0034] The update coefficients are obtained by solving the coefficient vector by the following equation:
[0035]
[0036] in, represents the calibration matrix, represents the calibration vector, represents the transposed matrix corresponding to the calibration matrix, represents the coefficient vector.
[0037] Specifically, the coefficients of the initial polynomial include a first coefficient, a second coefficient, and a third coefficient, and the initial polynomial is represented by the following calculation formula:
[0038]
[0039] in, Indicates the register read value, , and Represent the first coefficient, the second coefficient and the third coefficient respectively.
[0040] To achieve the above object, the present application also provides a parameter calculation device for a driver chip, which is applied to a driving system, wherein the driving system includes a driver chip and a flash memory device, wherein the driver chip is used to drive a downstream PON device of an FTTR main gateway device, wherein the downstream PON device does not include an EEPROM memory;
[0041] The device comprises:
[0042] The first unit is used to obtain initial configuration data corresponding to the driver chip, and write the initial configuration data into the register of the driver chip;
[0043] A second unit is used to perform calibration processing on the driver chip to obtain a parameter calibration point, wherein the parameter calibration point includes a register reading value and a calibration value, the register reading value is used to represent the register address corresponding to the parameter of the driver chip, and the calibration value is used to represent the measurement value corresponding to the parameter of the driver chip;
[0044] The third unit is used to obtain a target value corresponding to the parameter of the driver chip based on the parameter calibration point and a register reading value corresponding to the driver chip, wherein the target value is used to represent a current actual size of the parameter.
[0045] To achieve the above objectives, the present application also provides a medium, wherein the medium stores a plurality of instructions, wherein the instructions are suitable for a processor to load to execute the steps in any one of the methods provided in the present application.
[0046] The present application provides a parameter calculation method, device and medium for a driver chip, which are applied to a driving system. The driving system includes a driver chip and a flash memory device. The driver chip is used to drive a downstream PON device of an FTTR main gateway device, and the downstream PON device does not include an EEPROM memory. The method includes the following contents: first, obtaining initial configuration data corresponding to the driver chip, and writing the initial configuration data into a register of the driver chip; then, calibrating the driver chip to obtain a parameter calibration point; based on the parameter calibration point and the register reading value corresponding to the driver chip, finally accurately obtaining the target value corresponding to the parameter of the driver chip, realizing real-time calibration, improving the calculation accuracy of the parameter, and eliminating the error accumulation caused by the EEPROM.
[0047] The present application can enable the downlink PON of the FTTR main gateway to work normally when the EEPROM is removed from the driver chip. At the same time, compared with the current parameter calculation method of the driver chip with EEPROM, the present application realizes real-time calibration by setting calibration points and removing the EEPROM operation, thereby improving the calculation accuracy of the parameters and eliminating the error accumulation caused by the EEPROM. BRIEF DESCRIPTION OF THE DRAWINGS
[0048] Figure 1 A schematic diagram of a process flow provided for an embodiment of the present application;
[0049] Figure 2 A schematic diagram of the structure of a parameter calculation device for a driver chip provided in an embodiment of the present application;
[0050] Reference numerals: first unit - 201 , second unit - 202 , third unit - 203 . DETAILED DESCRIPTION
[0051] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.
[0052] Since the downstream BOB driver chip and the EEPROM that stores the PON driver chip data are set at the same time, the operating cost is high; at the same time, when the current operating parameters of the driver chip need to be obtained, the storage and reading of the data rely on the fixed pre-stored data in the EEPROM. The data in the EEPROM deviates over time or with increased frequency of use, resulting in inaccurate operating parameters obtained subsequently and large errors.
[0053] Therefore, the embodiments of the present application provide a parameter calculation method, device and medium for a driver chip to solve practical technical problems.
[0054] In some embodiments, the device may be specifically integrated into an electronic device, and the electronic device may be a terminal, a server, or other device.
[0055] In some embodiments, the server may also be implemented in the form of a terminal.
[0056] Among them, the server can be an independent physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, CDN (Content Delivery Network), as well as big data and artificial intelligence platforms.
[0057] The terminal may be a smart phone, a tablet computer, a laptop computer, a desktop computer, a smart speaker, a smart watch, etc., but is not limited thereto. The terminal and the server may be directly or indirectly connected via wired or wireless communication, and this application does not limit this.
[0058] It should be noted that the serial numbers of the following embodiments are not intended to limit the preferred order of the embodiments.
[0059] The embodiment of the present application provides a parameter calculation method for a driver chip, which can enable the downlink PON of the FTTR main gateway to work normally when the EEPROM is removed from the driver chip. At the same time, compared with the current parameter calculation method of the driver chip with EEPROM, the present application realizes real-time calibration through the setting of calibration points and the operation of removing the EEPROM, thereby improving the calculation accuracy of the parameters and eliminating the error accumulation caused by the EEPROM.
[0060] In some embodiments, the method is applied to a driving system, the driving system comprising a driving chip and a flash memory device, the driving chip is used to drive a downstream PON device of a FTTR main gateway device, and the downstream PON device does not include an EEPROM memory.
[0061] FTTR (Fiber to The Room) is an all-optical network solution designed to extend high-speed Internet connections directly to every room in a home or office environment via optical fiber. The FTTR master gateway device is usually the core component of this solution, responsible for converting the optical fiber signal from the ISP (Internet Service Provider) into a network signal that can be used within the home and further distributed to slave devices in each room. A notable feature of the FTTR solution is that it not only increases network speed but also improves network stability, because optical fiber has better transmission performance and anti-interference capabilities than traditional copper cables. In addition, by deploying optical fiber in every room, it can ensure that there is a stable network connection in every corner, which is especially useful for large residences or offices.
[0062] PON (Passive Optical Network) is a technology that uses optical fiber for data transmission. The special feature is that it uses passive optical splitters (i.e. no power is required), thus reducing the cost of network construction and maintenance. PON technologies include EPON (Ethernet PON), GPON (Gigabit PON) and XG-PON (10G PON).
[0063] The downstream PON device of the FTTR main gateway device refers to the main gateway device as the entry point of the home or office network in the FTTR architecture, which is connected to a larger PON network. This means that the main gateway device is responsible for uploading the data inside the home or office to the PON network through optical fiber, and receiving data from the PON network and distributing it to the internal network.
[0064] In some embodiments, the driver chip may be a driver chip of model UX3326 that adopts single closed-loop control. Generally, the single closed-loop UX3326 driver chip has the following features:
[0065] Single closed-loop control: The chip integrates a speed control loop that can automatically adjust the motor speed to achieve the set target speed;
[0066] High integration: Most functions required for motor control are integrated internally, such as inverter, current detection, protection circuit, etc.
[0067] Protection function: usually includes over-current protection, over-temperature protection, under-voltage lockout and other functions to ensure the safety of the motor under abnormal conditions;
[0068] PWM speed regulation: PWM (pulse width modulation) technology is used to adjust the speed of the motor and provide smooth speed control;
[0069] Easy to use: Due to the high degree of integration, the external circuit is relatively simple, easy to design and debug.
[0070] EEPROM memory is a memory based on EEPROM (Electrically Erasable Programmable Read-Only Memory), which is an electrically erasable programmable read-only memory. It is a non-volatile memory that can be electrically erased and reprogrammed multiple times during its life cycle. Unlike traditional EPROM (Ultraviolet Erasable Programmable Read-Only Memory), EEPROM does not require physical contact with ultraviolet rays to erase data, and data can be updated directly in the system. However, the data in the EEPROM deviates over time or with increased frequency of use, so the downlink PON device does not include EEPROM memory, but uses a flash memory device in the drive system to store data.
[0071] like Figure 1 As shown, the specific process of the method can be as follows:
[0072] S110 , acquiring initial configuration data corresponding to a driver chip, and writing the initial configuration data into a register of the driver chip.
[0073] In some embodiments, the initial configuration data is stored in the flash memory device, and the step of obtaining the initial configuration data corresponding to the driver chip and writing the initial configuration data into the register of the driver chip includes the following steps S111 to S112:
[0074] S111. Read initial configuration data in the flash memory device.
[0075] In some embodiments, Flash Memory devices are a type of non-volatile memory that is widely used in applications that require large-capacity storage. Although EEPROM is still very useful in some applications, in many cases, Flash Memory devices have become the first choice to replace EEPROM.
[0076] The flash memory device may include the following flash memory:
[0077] 1. NOR Flash:
[0078] Features:
[0079] Random access: supports byte-level reads, similar to SRAM or DRAM.
[0080] Fast read speed: Faster than NAND Flash, suitable for code execution.
[0081] Smaller capacity: Usually smaller than NAND Flash, suitable for storing code and small amounts of data.
[0082] Erase and write cycles: The number of erase and write cycles is usually between 100,000 and 1,000,000 times.
[0083] application:
[0084] Stores firmware and program code.
[0085] Small database and configuration file storage.
[0086] 2. NAND Flash:
[0087] Features:
[0088] Large capacity: suitable for storing large amounts of data, such as file systems, multimedia content, etc.
[0089] Low cost: The cost per unit capacity is lower than NOR Flash.
[0090] Block erase: The erase operation must be performed in units of larger blocks, which is not suitable for frequent erasing of small amounts of data.
[0091] Slower writing speed: Writing and erasing speeds are relatively slow.
[0092] application:
[0093] Large-capacity storage devices, such as SSDs (solid-state drives), USB flash drives, etc.
[0094] File system storage, suitable for storing large amounts of data.
[0095] 3. Serial Flash:
[0096] Features:
[0097] Serial interface: usually uses SPI or I²C interface, suitable for embedded systems.
[0098] Miniaturization: Small size, suitable for space-constrained applications.
[0099] Low power consumption: suitable for battery-powered devices.
[0100] Multiple capacities: Available in capacities ranging from a few KB to hundreds of MB.
[0101] application:
[0102] Stores configuration data, calibration parameters, etc.
[0103] Program storage for embedded systems.
[0104] In some embodiments, the initial configuration data is a set of parameters that need to be set during the startup or initialization process of the driver chip, which determine the working mode, characteristics and protection mechanism of the driver chip. The initial configuration data is usually set through the register of the driver chip and can be communicated through a serial interface (such as I²C, SPI) or other dedicated interfaces.
[0105] S112: In response to the completion of the startup operation of the gateway system corresponding to the FTTR master gateway device, write the initial configuration data into the register of the driver chip.
[0106] In some embodiments, OLT (Optical Line Terminal) is a key component of fiber-optic broadband access networks such as fiber to the home (FTTH), fiber to the building (FTTB) or fiber to the curb (FTTC). In these network architectures, OLT is located at the service provider's central office (CO), responsible for converting electrical signals into optical signals and transmitting them to the user's ONU (Optical Network Unit) or ONT (Optical Network Terminal) through the optical fiber network.
[0107] Specifically, the OLT in the FTTR main gateway device is responsible for converting the PON (Passive Optical Network) signal from the operator into a signal that can be used within the home, and managing the ONT (Optical Network Terminal) device within the home.
[0108] In some embodiments, after the gateway system corresponding to the FTTR main gateway device is started, the initial configuration data is written into the register of the driver chip, and the working mode, characteristics and protection mechanism of the driver chip are determined by the initial configuration data.
[0109] S120, calibrating the driver chip to obtain a parameter calibration point, wherein the parameter calibration point includes a register reading value and a calibration value, the register reading value is used to characterize a register address corresponding to the parameter of the driver chip, and the calibration value is used to characterize a measurement value corresponding to the parameter of the driver chip.
[0110] In some embodiments, the receiving light power, transmitting light power, temperature, current, voltage, etc. of the driver chip are calibrated in the laboratory using instruments.
[0111] For example, if the current room temperature measurement value corresponds to the register read value in the register of the driver chip, the register read value and the current room temperature measurement value can be written into the FTTR main gateway device as a set of calibration data for storage, or can be written into the flash memory device for storage.
[0112] S130, obtaining a target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip, wherein the target value is used to represent a current actual size of the parameter.
[0113] In some embodiments, the parameter calibration points include a first parameter calibration point and a second parameter calibration point.
[0114] In some embodiments, obtaining the target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip includes the following steps S131 to S132:
[0115] S131. Obtain the slope of a straight line passing through the first parameter calibration point and the second parameter calibration point.
[0116] In some embodiments, the obtaining of the slope of the straight line passing through the first parameter calibration point and the second parameter calibration point includes the following specific implementation process:
[0117] The slope is calculated by the following formula:
[0118]
[0119] in, is the slope, The register reading value for the first parameter calibration point, The register value for the second parameter calibration point is read, is the calibration value of the first parameter calibration point, is the calibration value of the second parameter calibration point.
[0120] Since the area between the two calibration points selected in the above embodiment is a linear area, the slope of the straight line between the two points can be calculated by the two calibration points. k And write it to the FTTR main gateway device for storage.
[0121] S132. Calculate the target value by linear interpolation based on the first parameter calibration point, the second parameter calibration point, the slope, and a register reading value corresponding to the driver chip.
[0122] In some embodiments, the target value is calculated by linear interpolation based on the first parameter calibration point, the second parameter calibration point, the slope and the register reading value corresponding to the driver chip, including the specific implementation process shown below:
[0123] The target value is calculated by the following formula:
[0124]
[0125] in, Read the value of the register corresponding to the driver chip, is the target value.
[0126] In some embodiments, the parameter calibration point includes at least three sub-parameter calibration points.
[0127] Specifically, if the parameter of the driver chip is a nonlinear function within its interval, at least three sub-parameter calibration points are required to reflect the nonlinear relationship between the register read value and the calibration value.
[0128] In some embodiments, obtaining the target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip includes steps A1 to A6 as shown below:
[0129] A1. Constructing an initial polynomial based on the parameter calibration points, wherein the initial polynomial is used to characterize the relationship between the register address of the driver chip and the calibration value of the driver chip.
[0130] In some embodiments, the coefficients of the initial polynomial include a first coefficient, a second coefficient, and a third coefficient, and the initial polynomial is represented by the following calculation formula:
[0131]
[0132] in, Indicates the register read value, , and Represent the first coefficient, the second coefficient and the third coefficient respectively.
[0133] A2. Based on the coefficients in the initial polynomial, construct the coefficient vector corresponding to the coefficients.
[0134] In some embodiments, constructing the coefficient vector includes the following specific implementation process:
[0135] Determine the highest power of the polynomial: First determine the highest power of the polynomial n , which is the exponent of the highest-degree term in the polynomial;
[0136] List all coefficients: Start with the highest power and write the coefficient of each term in order. If a power has a coefficient of zero, list the zero explicitly;
[0137] Order the coefficients: Arrange the coefficients from high to low power. x n Starting from the coefficient of x 0 The coefficient of (constant term);
[0138] Form a coefficient vector: Put the coefficients obtained in the above steps into a vector to form a coefficient vector.
[0139] A3. Based on the parameter calibration points, construct a calibration matrix and a calibration vector respectively, wherein the calibration matrix includes a power combination of register reading values of each sub-parameter calibration point, and the calibration vector includes the calibration value of each sub-parameter calibration point.
[0140] In some embodiments, the parameter reference point includes three sub-parameter reference points, the order of the initial polynomial is 2, the calibration matrix is a 3×(2+1) matrix, and the calibration vector is a 3-dimensional column vector.
[0141] A4. Solve the coefficient vector by the least square method to obtain the updated coefficient.
[0142] In some embodiments, solving the coefficient vector by the least square method to obtain the update coefficient includes the following specific implementation process:
[0143] The update coefficients are obtained by solving the coefficient vector by the following equation:
[0144]
[0145] in, represents the calibration matrix, represents the calibration vector, represents the transposed matrix corresponding to the calibration matrix, represents the coefficient vector.
[0146] A5. Based on the update coefficient, update the initial polynomial to obtain an updated polynomial.
[0147] In some embodiments, solving for , and ,Will , and Substitute into the initial polynomial to obtain the updated polynomial.
[0148] A6. Calculate the target value based on the updated polynomial and the register reading value corresponding to the driver chip.
[0149] In some embodiments, the target value corresponding to the register read value is predicted by the updated polynomial, and the target value is regarded as reflecting the actual value of the operating parameter of the driver chip.
[0150] The embodiment of the present application first obtains initial configuration data corresponding to the driver chip, and writes the initial configuration data into the register of the driver chip; then, the driver chip is calibrated to obtain parameter calibration points; based on the parameter calibration points and the register reading values corresponding to the driver chip, the target values corresponding to the parameters of the driver chip are finally accurately obtained, thereby realizing real-time calibration, improving the calculation accuracy of the parameters, and eliminating the error accumulation caused by the EEPROM.
[0151] In order to further explain the present application, a specific embodiment is described below:
[0152] This embodiment realizes real-time calibration by setting calibration points and removing the operation of EEPROM, improves the calculation accuracy of parameters, and eliminates the error accumulation caused by EEPROM. The following processing is performed:
[0153] (i) After the gateway system corresponding to the FTTR main gateway device is started, the OLT starts to start. During the startup process, the application layer program of the OLT reads the initial configuration data stored in the flash memory device and writes it into the register of UX3326, so that UX3326 can start working.
[0154] (ii) After the initial configuration data is written, the calibration point can be set, but the calibration point needs to be set within the linear range or a range close to the linear range to ensure that the acquired data does not deviate too much from the actual value.
[0155] (III) The first calibration point of the current of the driver chip is (0x7002, 58), and the second calibration point is (0x7012, 66). The first value in the calibration point, such as 0x7002, is the current value described in the register, and the second value in the calibration point, such as 58mA, is the actual current value measured. In this way, the straight line between the two calibration points represents the current change in this interval, and a straight line slope can be obtained through the two calibration points. k (0.5), when we read the current value described as 0x7010 from the register, we can get the actual current value of the driver chip through the formula, that is, bias =0.5*(0x7012-0x7010)+58=65mA.
[0156] In summary, the present application provides a parameter calculation method for a driver chip, which can enable the downlink PON of the FTTR main gateway to work normally when the EEPROM is removed from the driver chip. At the same time, compared with the current parameter calculation method of the driver chip with EEPROM, the present application realizes real-time calibration through the setting of calibration points and the operation of removing the EEPROM, thereby improving the calculation accuracy of the parameters and eliminating the error accumulation caused by the EEPROM.
[0157] In order to better implement the above method, the embodiment of the present application also provides a parameter calculation device for a driver chip, which can be integrated in an electronic device, and the electronic device can be a terminal, a server, etc. Among them, the terminal can be a mobile phone, a tablet computer, a smart Bluetooth device, a laptop, a personal computer, etc.; the server can be a single server or a server cluster composed of multiple servers.
[0158] For example, in this embodiment, the method of the embodiment of the present application is described in detail by taking the parameter calculation device of the driver chip being specifically integrated into the terminal as an example.
[0159] For example, Figure 2 As shown, the device is applied to a driving system, the driving system includes a driving chip and a flash memory device, the driving chip is used to drive a downstream PON device of a FTTR main gateway device, and the downstream PON device does not include an EEPROM memory;
[0160] The parameter calculation device of the driver chip may include a first unit 201, a second unit 202, and a third unit 203, as follows:
[0161] The first unit 201 is used to obtain initial configuration data corresponding to the driver chip, and write the initial configuration data into the register of the driver chip;
[0162] The second unit 202 is used to calibrate the driver chip to obtain a parameter calibration point, wherein the parameter calibration point includes a register reading value and a calibration value, the register reading value is used to represent the register address corresponding to the parameter of the driver chip, and the calibration value is used to represent the measurement value corresponding to the parameter of the driver chip;
[0163] The third unit 203 is used to obtain a target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip, wherein the target value is used to represent the current actual size of the parameter.
[0164] In specific implementation, the above units can be implemented as independent entities, or can be arbitrarily combined to be implemented as the same or several entities. The specific implementation of the above units can refer to the previous method embodiments, which will not be repeated here.
[0165] It can be seen from the above that the embodiment of the present application can enable the downlink PON of the FTTR main gateway to work normally when the EEPROM is removed from the driver chip. At the same time, compared with the current parameter calculation method of the driver chip with EEPROM, the present application realizes real-time calibration through the setting of calibration points and the operation of removing the EEPROM, thereby improving the calculation accuracy of the parameters and eliminating the error accumulation caused by the EEPROM.
[0166] Those skilled in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be completed by instructions, or by controlling related hardware through instructions. The instructions may be stored in a medium and loaded and executed by a processor.
[0167] To this end, an embodiment of the present application provides a medium in which a plurality of instructions are stored, and the instructions can be loaded by a processor to execute the steps in any of the parameter calculation methods of a driver chip provided in the embodiment of the present application. For example, the instructions can execute the following steps:
[0168] Acquire initial configuration data corresponding to the driver chip, and write the initial configuration data into a register of the driver chip;
[0169] Calibrate the driver chip to obtain a parameter calibration point, wherein the parameter calibration point includes a register reading value and a calibration value, the register reading value is used to represent the register address corresponding to the parameter of the driver chip, and the calibration value is used to represent the measurement value corresponding to the parameter of the driver chip;
[0170] Based on the parameter calibration point and the register reading value corresponding to the driver chip, a target value corresponding to the parameter of the driver chip is obtained, wherein the target value is used to represent the current actual size of the parameter.
[0171] The medium may include: a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.
[0172] According to one aspect of the present application, a computer program product or a computer program is provided, the computer program product or the computer program includes a computer instruction, the computer instruction is stored in a medium. A processor of a computer device reads the computer instruction from the medium, and the processor executes the computer instruction, so that the computer device executes the method provided in various optional implementations provided in the above embodiments.
[0173] Since the instructions stored in the medium can execute the steps in any of the driver chip parameter calculation methods provided in the embodiments of the present application, the beneficial effects that can be achieved by any of the driver chip parameter calculation methods provided in the embodiments of the present application can be achieved. For details, please refer to the previous embodiments and will not be repeated here.
[0174] The above is a detailed introduction to the parameter calculation method, device and medium of a driver chip provided in the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for technical personnel in this field, according to the ideas of the present application, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as a limitation on the present application.
Claims
1. A method for calculating parameters of a driver chip, characterized in that: Applied to a driving system, the driving system includes a driving chip and a flash memory device, the driving chip is used to drive a downstream PON device of an FTTR main gateway device, and the downstream PON device does not include an EEPROM memory; The method comprises: Acquire initial configuration data corresponding to the driver chip, and write the initial configuration data into a register of the driver chip; Calibrate the driver chip to obtain a parameter calibration point, wherein the parameter calibration point includes a register reading value and a calibration value, the register reading value is used to represent the register address corresponding to the parameter of the driver chip, and the calibration value is used to represent the measurement value corresponding to the parameter of the driver chip; Based on the parameter calibration point and the register reading value corresponding to the driver chip, a target value corresponding to the parameter of the driver chip is obtained, wherein the target value is used to represent the current actual size of the parameter; The parameter calibration point includes at least three sub-parameter calibration points; The obtaining a target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip includes: Based on the parameter calibration points, construct an initial polynomial, wherein the initial polynomial is used to characterize the relationship between the register address of the driver chip and the calibration value of the driver chip; Based on the coefficients in the initial polynomial, construct the coefficient vector corresponding to the coefficients; Based on the parameter calibration points, construct a calibration matrix and a calibration vector respectively, wherein the calibration matrix includes a power combination of register reading values of each sub-parameter calibration point, and the calibration vector includes calibration values of each sub-parameter calibration point; Solving the coefficient vector by the least square method to obtain update coefficients; Based on the update coefficient, updating the initial polynomial to obtain an updated polynomial; The target value is calculated based on the updated polynomial and the register reading value corresponding to the driver chip.
2. The method according to claim 1, characterized in that The initial configuration data is stored in the flash memory device, and the acquiring the initial configuration data corresponding to the driver chip and writing the initial configuration data into the register of the driver chip includes: Reading initial configuration data in the flash memory device; In response to the startup completion operation of the gateway system corresponding to the FTTR master gateway device, the initial configuration data is written into the register of the driver chip.
3. The method according to claim 1, characterized in that The parameter calibration points include a first parameter calibration point and a second parameter calibration point; The obtaining a target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip includes: Obtaining the slope of a straight line passing through the first parameter calibration point and the second parameter calibration point; The target value is calculated by linear interpolation based on the first parameter calibration point, the second parameter calibration point, the slope, and a register reading value corresponding to the driver chip.
4. The method according to claim 3, characterized in that The obtaining the slope of a straight line passing through the first parameter calibration point and the second parameter calibration point includes: The slope is calculated by the following formula: Wherein, k is the slope, A1 is the register reading value of the first parameter calibration point, A2 is the register reading value of the second parameter calibration point, V1 is the calibration value of the first parameter calibration point, and V2 is the calibration value of the second parameter calibration point.
5. The method according to claim 4, characterized in that The target value is calculated by linear interpolation based on the first parameter calibration point, the second parameter calibration point, the slope, and the register reading value corresponding to the driver chip, including: The target value is calculated by the following formula: In i =k*(A2-A i )+V1 Among them, A i is the register value corresponding to the driver chip, V i is the target value.
6. The method according to claim 1, characterized in that Solving the coefficient vector by the least square method to obtain the update coefficients includes: The update coefficients are obtained by solving the coefficient vector by the following equation: X T Send=X T Yes Wherein, X represents the calibration matrix, Y represents the calibration vector, and X T represents the transposed matrix corresponding to the calibration matrix, and a represents the coefficient vector.
7. The method according to claim 1, characterized in that The coefficients of the initial polynomial include a first coefficient, a second coefficient and a third coefficient, and the initial polynomial is represented by the following calculation formula: P(A)=a2·A 2 +a1·A+a0 Wherein, A represents the register read value, a0, a1 and a2 represent the first coefficient, the second coefficient and the third coefficient respectively.
8. A parameter calculation device for a driver chip, characterized in that: Applied to a driving system, the driving system includes a driving chip and a flash memory device, the driving chip is used to drive a downstream PON device of an FTTR main gateway device, and the downstream PON device does not include an EEPROM memory; The device comprises: The first unit is used to obtain initial configuration data corresponding to the driver chip, and write the initial configuration data into the register of the driver chip; A second unit is used to perform calibration processing on the driver chip to obtain a parameter calibration point, wherein the parameter calibration point includes a register reading value and a calibration value, the register reading value is used to represent the register address corresponding to the parameter of the driver chip, and the calibration value is used to represent the measurement value corresponding to the parameter of the driver chip; A third unit is used to obtain a target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip, wherein the target value is used to characterize the current actual value of the parameter; the parameter calibration point includes at least three sub-parameter calibration points; The obtaining a target value corresponding to the parameter of the driver chip based on the parameter calibration point and the register reading value corresponding to the driver chip includes: Based on the parameter calibration points, construct an initial polynomial, wherein the initial polynomial is used to characterize the relationship between the register address of the driver chip and the calibration value of the driver chip; Based on the coefficients in the initial polynomial, construct the coefficient vector corresponding to the coefficients; Based on the parameter calibration points, construct a calibration matrix and a calibration vector respectively, wherein the calibration matrix includes a power combination of register reading values of each sub-parameter calibration point, and the calibration vector includes calibration values of each sub-parameter calibration point; Solving the coefficient vector by the least square method to obtain update coefficients; Based on the update coefficient, updating the initial polynomial to obtain an updated polynomial; The target value is calculated based on the updated polynomial and the register reading value corresponding to the driver chip.
9. A medium, characterized in that The medium stores a plurality of instructions, and the instructions are suitable for being loaded by a processor to execute the steps in the method according to any one of claims 1 to 7.
Citation Information
Patent Citations
Method and system for FTTR main gateway downlink optical port to use BOB
CN116801143A