MCU power control circuit

Abstract

The present invention provides an MCU power supply control circuit, comprising an MCU, an external voltage generating module, and a first resistor. The MCU has a first power supply terminal, a second power supply terminal, a third power supply terminal, and an internal first voltage generating module. The first power supply terminal is an input terminal, which receives input from an external power supply and supplies power to the MCU. The second power supply terminal is an output terminal, which is connected to the first power supply terminal via an internal first voltage generating module. The internal first voltage generating module generates a first intermediate voltage, which is output to the outside by the second power supply terminal. The third power supply terminal is a core voltage terminal, which provides a core working voltage to the core inside the MCU. The second power supply terminal is coupled to the first end of the first resistor and the input end of the external voltage generating module. The second end of the first resistor is grounded. The output end of the external voltage generating module is coupled to the third power supply terminal. The MCU switches between standby and wake-up modes through the second power supply terminal. The MCU power supply control circuit of the present invention has low power consumption.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to an MCU power supply control circuit. Background Art

[0002] In the existing scheme, the MCU power control circuit is generally mainly to set a resistor voltage divider circuit between the main power input and an IO port, and enable the external voltage generation module through the voltage divider point to meet the timing control requirements of the MCU in different modes (standby, wake-up). However, in this scheme, when the MCU enters the standby mode, although the pull-down of the IO port can shut down the operation of the external voltage generation module, the current path between the main power input and the external voltage generation module (via a resistor in the resistor voltage divider circuit) is still not completely shut down, so there is still a certain amount of static current consumption, which is contrary to the low power consumption goal of the entire system in standby mode. Summary of the invention

[0003] The object of the present invention is to provide an MCU power supply control circuit with low power consumption.

[0004] To achieve the above object, the present invention provides the following technical solutions:

[0005] The present invention provides an MCU power control circuit, which includes an MCU, an external voltage generating module, and a first resistor. The MCU has a first power supply terminal, a second power supply terminal, a third power supply terminal, and an internal first voltage generating module. The first power supply terminal is an input terminal, which receives input from an external power supply and supplies power to the MCU. The second power supply terminal is an output terminal, which is connected to the first power supply terminal via the internal first voltage generating module. The internal first voltage generating module generates a first intermediate voltage, which is output to the outside by the second power supply terminal. The third power supply terminal is a core voltage terminal, which provides a core working voltage to the core inside the MCU. The second power supply terminal is coupled to the first end of the first resistor and the input end of the external voltage generating module. The second end of the first resistor is grounded. The output end of the external voltage generating module is coupled to the third power supply terminal. The MCU switches between a standby mode and a wake-up mode through the second power supply terminal.

[0006] In one embodiment, the MCU also includes a fourth power supply terminal and an internal second voltage generating module. The fourth power supply terminal is an input terminal, connected to the output terminal of the external voltage generating module, and connected to the third power supply terminal via the internal second voltage generating module. The internal second voltage generating module generates the core operating voltage and provides it to the third power supply terminal.

[0007] In one embodiment, the MCU power control circuit also includes a first NMOS tube, a first PMOS tube, a second resistor, and a third resistor. The first power supply end is connected to the drain end of the first NMOS tube and the gate end of the first PMOS tube via the third resistor, and is also directly connected to the source end of the first PMOS tube. The second power supply end is connected to the gate end of the first NMOS tube, the source end of the first NMOS tube is grounded, the drain end of the first PMOS tube is grounded via the second resistor, and the drain end of the first PMOS tube is connected to the input end of the external voltage generating module.

[0008] In one embodiment, the MCU power control circuit further includes a current limiting resistor, and the second power supply end is connected to the input end of the external voltage generating module and the first end of the first resistor via the current limiting resistor.

[0009] In one implementation, the external voltage generating module is a DC-DC circuit or a VR circuit.

[0010] The present invention also provides an MCU power control circuit, which includes an MCU, an external voltage generating module, and a first resistor. The MCU has a first power supply terminal, a second power supply terminal, a third power supply terminal, a first IO terminal, and an internal first voltage generating module. The first power supply terminal is an input terminal, which receives input from an external power supply and supplies power to the MCU. The second power supply terminal is an output terminal, which is connected to the first power supply terminal via the internal first voltage generating module. The internal first voltage generating module generates a first intermediate voltage, which is output to the outside by the second power supply terminal. The third power supply terminal is a core voltage terminal, which provides a core working voltage to the core inside the MCU. The first IO terminal is an output terminal, which is controlled by the MCU alone. The second power supply terminal is coupled to the input terminal of the external voltage generating module via the first resistor, and the first IO terminal is also coupled to the input terminal of the external voltage generating module. The output terminal of the external voltage generating module is coupled to the third power supply terminal. The MCU switches between standby and wake-up modes through the second power supply terminal and the first IO terminal.

[0011] In one embodiment, the MCU also includes a fourth power supply terminal and an internal second voltage generating module. The fourth power supply terminal is an input terminal, connected to the output terminal of the external voltage generating module, and connected to the third power supply terminal via the internal second voltage generating module. The internal second voltage generating module generates the core operating voltage and provides it to the third power supply terminal.

[0012] In one embodiment, the MCU power control circuit also includes a first NMOS tube, a first PMOS tube, a second resistor, and a third resistor. The first power supply end is connected to the drain end of the first NMOS tube and the gate end of the first PMOS tube via the third resistor, and is also directly connected to the source end of the first PMOS tube. The second power supply end is coupled to the gate end of the first NMOS tube via the first resistor, the source end of the first NMOS tube is grounded, the drain end of the first PMOS tube is connected to the first IO end via the second resistor, and the first IO end is connected to the input end of the external voltage generating module.

[0013] In one implementation, the first IO terminal is also connected to the gate terminal of the first NMOS transistor.

[0014] In one implementation, the external voltage generating module is a DC-DC circuit or a VR circuit.

[0015] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0016] The MCU power control circuit of the present invention switches the system standby and wake-up modes through the second power supply terminal (not the main power supply input terminal of the MCU). When entering the standby mode, the second power supply terminal is also in a shut-off state, and all circuits outside the MCU are shut down and no longer work. There is no current flow outside the MCU, and there is no current consumption, so the standby static power consumption is very small and the system power consumption is low. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 A schematic diagram of the structure of an MCU power supply control circuit provided in the first embodiment of the present invention;

[0019] Figure 2 A schematic diagram of the structure of an MCU power supply control circuit provided in a second embodiment of the present invention;

[0020] Figure 3 A schematic diagram of the structure of an MCU power supply control circuit provided in the third embodiment of the present invention;

[0021] Figure 4 A schematic diagram of the structure of an MCU power supply control circuit provided in a fourth embodiment of the present invention;

[0022] Figure 5 A schematic diagram of the structure of an MCU power supply control circuit provided in a fifth embodiment of the present invention;

[0023] Figure 6 A schematic diagram of the structure of an MCU power control circuit provided by a sixth embodiment of the present invention;

[0024] Figure 7 A schematic structural diagram of an MCU power supply control circuit provided in a seventh embodiment of the present invention;

[0025] Figure 8 A schematic structural diagram of an MCU power control circuit provided in the eighth embodiment of the present invention. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the present invention will be described clearly and completely below. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative work belong to the scope of protection of the present invention. It should be noted that the description order of the following embodiments is not used as a limitation on the preferred order of the embodiments of the present invention. In the following embodiments, the description of each embodiment has its own emphasis. For the parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments.

[0027] See also Figure 1 As shown, the first embodiment of the present invention provides an MCU power control circuit, the MCU power control circuit includes an MCU, an external voltage generating module, and a first resistor R1. The MCU has a first power terminal V5, a second power terminal V25, a third power terminal VCORE, and an internal first voltage generating module (not shown). The first power terminal V5 is an input terminal, which receives input from an external power supply and supplies power to the MCU. The second power terminal V25 is an output terminal, which is connected to the first power terminal V5 via the internal first voltage generating module. The internal first voltage generating module generates a first intermediate voltage, which is output to the outside by the second power terminal V25. The third power terminal VCORE is a core voltage terminal, which provides a core working voltage to the core inside the MCU. The second power terminal V25 is coupled to the first end of the first resistor R1 and the input end of the external voltage generating module. The second end of the first resistor R1 is grounded GND. The output end of the external voltage generating module is coupled to the third power terminal VCORE. The MCU switches between standby and wake-up modes through the second power terminal V25.

[0028] Specifically, when the system is initially powered on, the first power supply terminal V5, which is the main power input terminal of the MCU, receives input from the external power supply, the voltage rises, the internal first voltage generation module works, generates a first intermediate voltage and provides it to the second power supply terminal V25, the voltage of the second power supply terminal V25 rises, reaches the enable threshold of the external voltage generation module, the external voltage generation module works to output the core working voltage and provides it to the third power supply terminal VCORE, the core (Core) in the MCU works, and the whole system enters a normal operating state. Among them, the external voltage generation module can be a DC-DC (direct current voltage converter) circuit or a VR (Linear Voltage Regulator) circuit. When the system enters the standby mode, the MCU turns off the second power supply terminal V25 according to the instruction to enter the standby mode, and the second power supply terminal V25 is pulled down by the first resistor R1 to ensure that the voltage received by the input terminal of the external voltage generation module drops to the shutdown threshold of the external voltage generation module, the external voltage generation module is turned off, the third power supply terminal VCORE is powered off, and the system enters the standby state. When the system wakes up, the MCU enables the second power supply terminal V25 according to the exit standby mode instruction, and the voltage of the second power supply terminal V25 resumes rising and reaches the enable threshold of the external voltage generation module. The external voltage generation module continues to work and outputs the core working voltage to the third power supply terminal VCORE, and the system returns to normal operation. The MCU power control circuit of the present invention switches the system standby and wake-up modes through the second power supply terminal V25 (not the main power input terminal of the MCU). When entering the standby mode, the second power supply terminal V25 is also in the off state, and all circuits outside the MCU are turned off and no longer work. There is no current flow outside the MCU, and there is no current consumption, so the standby static power consumption is very small and the system power consumption is low.

[0029] See also Figure 2 As shown, the second embodiment of the present invention provides an MCU power supply control circuit, relative to Figure 1 The MCU power control circuit of the first embodiment is shown, and the MCU power control circuit of the second embodiment further includes a fourth power terminal VM and an internal second voltage generating module (not shown). The fourth power terminal VM is an input terminal, connected to the output terminal of the external voltage generating module, and connected to the third power terminal VCORE via the internal second voltage generating module. The internal second voltage generating module generates the core operating voltage and provides it to the third power terminal VCORE.

[0030] Right now, Figure 1 In the MCU power control circuit of the first embodiment shown, the output end of the external voltage generating module is directly connected to the third power supply end VCORE, that is, the supply end of the core working voltage. Figure 2In the MCU power control circuit of the second embodiment shown, the output end of the external voltage generation module is indirectly connected to the third power end VCORE (the end providing the core working voltage) via the fourth power end VM. The voltage provided by the external voltage generation module received by the fourth power end VM can be called the second intermediate voltage. The second intermediate voltage enters the MCU through the fourth power end VM to provide the MCU with a richer voltage requirement of other modules in the MCU, and generates a core working voltage via the internal second voltage generation module to provide (via the third power end VCORE) to the core for operation (the third power end VCORE and the fourth power end VM are already present in each MCU and can be configured and selected for use according to different needs). In the second embodiment, the working principles of system power-on, system standby, and system wake-up are completely consistent with the working principles of the MCU power control circuit of the first embodiment above, and the core working voltage is generated by the internal second voltage generation module and provided to the core for use, which can avoid the situation where the output voltage ripple and noise of the external voltage generation module are relatively large and cannot meet the core working voltage (especially when the external voltage generation module is a DC-DC circuit, its output voltage ripple and noise may be relatively large and may not meet the requirements of the core working voltage).

[0031] See also Figure 3 As shown, the third embodiment of the present invention provides an MCU power control circuit, relative to Figure 1 The MCU power control circuit of the first embodiment is shown, and the MCU power control circuit of the third embodiment further includes a first NMOS tube N1, a first PMOS tube P1, a second resistor R2, and a third resistor R3. The first power supply terminal V5 is connected to the drain terminal of the first NMOS tube N1 and the gate terminal of the first PMOS tube P1 via the third resistor R3, and is also directly connected to the source terminal of the first PMOS tube P1. The second power supply terminal V25 is connected to the gate terminal of the first NMOS tube N1, the source terminal of the first NMOS tube N1 is grounded GND, the drain terminal of the first PMOS tube P1 is grounded GND via the second resistor R2, and the drain terminal of the first PMOS tube P1 is connected to the input terminal of the external voltage generating module.

[0032] The first NMOS tube N1, the first PMOS tube P1, the second resistor R2, and the third resistor R3 form a two-stage inverter structure, which serves as a level conversion circuit. When the system is powered on and awakened, the first intermediate voltage output by the second power supply terminal V25 is converted into a third intermediate voltage to adapt to the voltage required by the enable signal of the external voltage generation module. Because the voltage of the enable signal of some external voltage generation modules is not necessarily exactly the first intermediate voltage output by the second power supply terminal V25, but is between the external power supply voltage received by the first power supply terminal V5 and the first intermediate voltage output by the second power supply terminal V25. For example, in a typical MCU power control circuit, the external power supply voltage received by the first power supply terminal V5 is 5V, and the first intermediate voltage output by the second power supply terminal V25 is 2.5V. In some systems, the enable signal of the external voltage generation module is also 2.5V, then the first intermediate voltage output by the second power supply terminal V25 can be directly used, such as the first embodiment and the second embodiment. However, in some systems, the enable signal of the external voltage generation module is 3.6V, and the first NMOS tube N1, the first PMOS tube P1, the second resistor R2, and the third resistor R3 in the third embodiment are required to perform level conversion. The working principle of the MCU power control circuit system power-on, system standby, and system wake-up in the third embodiment is completely consistent with the working principle of the MCU power control circuit in the first embodiment. When entering the standby mode, the second power supply terminal V25 is also in the off state, and all circuits outside the MCU are turned off and no longer work (including the first NMOS tube N1, the first PMOS tube P1, the second resistor R2, and the third resistor R3 are all turned off and no longer work), and there is no current flow outside the MCU, and there is no current consumption, so the standby static power consumption is very small, and the system power consumption is low.

[0033] See also Figure 4 As shown, the fourth embodiment of the present invention provides an MCU power control circuit. Figure 3 The third embodiment of the MCU power control circuit shown is relative to Figure 1 The MCU power control circuit of the first embodiment shown in the figure further includes a first NMOS transistor N1, a first PMOS transistor P1, a second resistor R2, and a third resistor R3. Figure 4 The fourth embodiment of the MCU power control circuit shown is relative to Figure 2 The MCU power control circuit of the second embodiment shown in the figure also includes a first NMOS transistor N1, a first PMOS transistor P1, a second resistor R2, and a third resistor R3, and the working principles of the first NMOS transistor N1, the first PMOS transistor P1, the second resistor R2, and the third resistor R3 are the same as those of the first NMOS transistor N1, the first PMOS transistor P1, the second resistor R2, and the third resistor R3. Figure 3The working principles of the first NMOS tube N1, the first PMOS tube P1, the second resistor R2, and the third resistor R3 in the MCU power control circuit of the third embodiment are completely consistent, and the working principles of system power-on, system standby, and system wake-up of the MCU power control circuit of the fourth embodiment are also completely consistent with the working principles of the MCU power control circuit of the second embodiment, and the above will not be repeated here.

[0034] Please refer back to Figure 1 or Figure 2 As shown, in one embodiment, the MCU power control circuit further includes a current limiting resistor R0 (as shown in the dotted box in the figure), and the second power supply terminal V25 is connected to the input terminal of the external voltage generating module and the first end of the first resistor R1 via the current limiting resistor R0. In this way, the circuit can work more stably. Moreover, the current limiting resistor R0 also forms a voltage divider network with the first resistor R1, which can facilitate meeting the voltage requirement of the enable signal of the external voltage generating module.

[0035] See also Figure 5 As shown, the fifth embodiment of the present invention provides an MCU power control circuit, the MCU power control circuit includes an MCU, an external voltage generating module, and a first resistor R1. The MCU has a first power supply terminal V5, a second power supply terminal V25, a third power supply terminal VCORE, a first IO terminal IO1, and an internal first voltage generating module. The first power supply terminal V5 is an input terminal, which receives input from an external power supply to power the MCU. The second power supply terminal V25 is an output terminal, which is connected to the first power supply terminal V5 via the internal first voltage generating module. The internal first voltage generating module generates a first intermediate voltage, which is generated by the first intermediate voltage. The second power supply terminal V25 is output to the outside, the third power supply terminal VCORE is a core voltage terminal, which provides a core operating voltage to the core inside the MCU, the first IO terminal IO1 is an output terminal, and the output is independently controlled by the MCU, the second power supply terminal V25 is coupled to the input terminal of the external voltage generating module via the first resistor R1, the first IO terminal IO1 is also coupled to the input terminal of the external voltage generating module, and the output terminal of the external voltage generating module is coupled to the third power supply terminal VCORE, and the MCU switches between standby and wake-up modes through the second power supply terminal V25 and the first IO terminal IO1.

[0036] Figure 5 The fifth embodiment shown is a MCU power supply control circuit and Figure 1 The main differences of the MCU power supply control circuit in the first embodiment are: Figure 1 The MCU power control circuit of the first embodiment shown is that the MCU only uses the second power terminal V25 to switch between the standby mode and the wake-up mode. Figure 5The fifth embodiment of the MCU power control circuit shown is that the MCU uses the second power terminal V25 and the first IO terminal IO1 to switch between standby and wake-up modes, because some systems can allow the second power terminal V25 to be turned off before the third power terminal VCORE (the first, second, third, and fourth embodiments are all applicable to this), while some systems require the second power terminal V25 to be turned off later than the third power terminal VCORE (the fifth, and the sixth, seventh, and eighth embodiments to be described later are all applicable to this), because the second power terminal V25 also needs to supply power to other modules in the system. Of course, it is obvious that the first, second, third, and fourth embodiments have an advantage over the fifth, sixth, seventh, and eighth embodiments in that they do not occupy the IO port of the MCU. The specific working principle of the fifth embodiment of the MCU power control circuit is as follows.

[0037] When the system is initially powered on, the first power supply terminal V5, which is the main power input terminal of the MCU, receives input from an external power supply, the voltage rises, and the internal first voltage generating module starts working to generate a first intermediate voltage to provide to the second power supply terminal V25. The voltage of the second power supply terminal V25 rises and reaches the enabling threshold of the external voltage generating module. At the same time, the first IO terminal IO1 is in a high-impedance state, and the external voltage generating module works to output the core working voltage to the third power supply terminal VCORE. The core in the MCU starts working, and the entire system enters a normal operating state. The first IO terminal IO1 outputs a high level or maintains a high-impedance state. When the system enters the standby mode, the MCU first maintains the normal output of the second power supply terminal V25 according to the instruction to enter the standby mode, and the first IO terminal IO1 outputs a low level. The first resistor R1 is used to ensure that the voltage received by the input terminal of the external voltage generation module drops to the shutdown threshold of the external voltage generation module (if there is no first resistor R1, because the driving capability of the second power supply terminal V25 is often greater than the driving capability of the first IO terminal IO1, the voltage actually received by the input terminal of the external voltage generation module may not be too low (although the output of the first IO terminal IO1 is already low), and will not drop to the shutdown threshold of the external voltage generation module), the external voltage generation module is turned off, the third power supply terminal VCORE is powered off, and the second power supply terminal V25 is turned off again (controlled by the MCU separately), and the system enters the standby state. When the system wakes up, the MCU enables the second power supply terminal V25 to be powered on and the first IO terminal IO1 to output a high level or return to a high impedance state according to the instruction to exit the standby mode, reaching the enable threshold of the external voltage generation module, and the external voltage generation module continues to work, and the output core working voltage is provided to the third power supply terminal VCORE, and the system returns to a normal operating state. Similarly, the MCU power control circuit of the present invention switches the system standby and wake-up modes through the second power terminal V25 (not the main power input terminal of the MCU) and the first IO terminal IO1. When entering the standby mode, the second power terminal V25 is also in the off state, and the first IO terminal IO1 is also at a low level. All circuits outside the MCU are turned off and no longer work. There is no current flowing outside the MCU, and there is no current consumption, so the standby static power consumption is very small and the system power consumption is low.

[0038] See also Figure 6 As shown, the sixth embodiment of the present invention provides an MCU power control circuit. Figure 2 The MCU power supply control circuit of the second embodiment shown is relative to Figure 1 The MCU power control circuit of the first embodiment shown in the figure further includes a fourth power terminal VM, an internal second voltage generating module, Figure 6 The sixth embodiment of the MCU power control circuit is shown relative to Figure 5The fifth embodiment MCU power control circuit shown also includes a fourth power terminal VM and an internal second voltage generating module. The fourth power terminal VM is an input terminal, connected to the output terminal of the external voltage generating module, and connected to the third power terminal VCORE via the internal second voltage generating module. The internal second voltage generating module generates the core operating voltage and provides it to the third power terminal VCORE.

[0039] Likewise, Figure 5 In the fifth embodiment of the MCU power control circuit, the output terminal of the external voltage generating module is directly connected to the third power terminal VCORE, that is, the supply terminal of the core working voltage. Figure 6 In the sixth embodiment of the MCU power control circuit, the output end of the external voltage generating module is indirectly connected to the third power end VCORE (the end providing the core working voltage) via the fourth power end VM. In the sixth embodiment, the working principles of system power-on, system standby, and system wake-up are completely consistent with the working principles of the fifth embodiment of the MCU power control circuit. Similarly, in this way, it is possible to avoid the situation where the output voltage ripple and noise of the external voltage generating module are relatively large and cannot meet the core working voltage.

[0040] See also Figure 7 As shown, the seventh embodiment of the present invention provides an MCU power control circuit. Figure 3 The third embodiment of the MCU power control circuit shown is relative to Figure 1 The MCU power control circuit of the first embodiment shown in the figure further includes a first NMOS transistor N1, a first PMOS transistor P1, a second resistor R2, and a third resistor R3. Figure 7 The seventh embodiment of the MCU power control circuit is shown relative to Figure 5 The fifth embodiment MCU power control circuit shown also includes a first NMOS tube N1, a first PMOS tube P1, a second resistor R2, and a third resistor R3. The first power supply terminal V5 is connected to the drain terminal of the first NMOS tube N1 and the gate terminal of the first PMOS tube P1 via the third resistor R3, and is also directly connected to the source terminal of the first PMOS tube P1. The second power supply terminal V25 is coupled to the gate terminal of the first NMOS tube N1 via the first resistor R1. The source terminal of the first NMOS tube N1 is grounded GND. The drain terminal of the first PMOS tube P1 is connected to the first IO terminal IO1 via the second resistor R2, and the first IO terminal IO1 is connected to the input terminal of the external voltage generating module.

[0041] Similarly, the first NMOS transistor N1, the first PMOS transistor P1, the second resistor R2, and the third resistor R3 form a two-stage inverter structure as a level conversion circuit, which converts the first intermediate voltage output by the second power supply terminal V25 into a third intermediate voltage when the system is powered on and awakened, so as to adapt to the voltage required by the enable signal of the external voltage generation module. The working principle of the MCU power control circuit system power-on, system standby, and system awakening in the seventh embodiment is completely consistent with the working principle of the MCU power control circuit in the fifth embodiment, and will not be repeated here.

[0042] See also Figure 8 As shown, the eighth embodiment of the present invention provides an MCU power control circuit. Figure 4 The fourth embodiment of the MCU power control circuit shown is relative to Figure 2 The MCU power control circuit of the second embodiment shown in the figure further includes a first NMOS transistor N1, a first PMOS transistor P1, a second resistor R2, and a third resistor R3. Figure 8 The MCU power supply control circuit of the eighth embodiment shown is relative to Figure 6 The sixth embodiment MCU power control circuit also includes a first NMOS transistor N1, a first PMOS transistor P1, a second resistor R2, and a third resistor R3, and the working principles of the first NMOS transistor N1, the first PMOS transistor P1, the second resistor R2, and the third resistor R3 are the same as those of the first NMOS transistor N1, the first PMOS transistor P1, the second resistor R2, and the third resistor R3. Figure 7 The working principles of the first NMOS tube N1, the first PMOS tube P1, the second resistor R2, and the third resistor R3 in the MCU power control circuit of the seventh embodiment are completely consistent, and the working principles of system power-on, system standby, and system wake-up of the MCU power control circuit of the eighth embodiment are also completely consistent with the working principles of the MCU power control circuit of the sixth embodiment, and the above will not be repeated here.

[0043] See also Figure 7 or Figure 8 As shown, in one embodiment, the first IO terminal IO1 is also connected to the gate terminal of the first NMOS tube N1 (as shown by the dotted line in the figure). In this way, the first NMOS tube N1 and the first PMOS tube P1 can be turned off earlier in the standby mode, reducing the time of the current path and further reducing power consumption. If the first IO terminal IO1 is not connected to the gate terminal of the first NMOS tube N1, the first NMOS tube N1 and the first PMOS tube P1 need to be turned off only after the second power supply terminal V25 is turned off; and the first IO terminal IO1 is connected to the gate terminal of the first NMOS tube N1, in conjunction with the first resistor R1, when the first IO terminal is at a low level, it can ensure that the first NMOS tube N1 and the first PMOS tube P1 are turned off, reducing the time of the current path and further reducing power consumption.

[0044] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0045] The MCU power control circuit of the present invention switches the system standby and wake-up modes through the second power supply terminal (not the main power supply input terminal of the MCU). When entering the standby mode, the second power supply terminal is also in a shut-off state, and all circuits outside the MCU are shut down and no longer work. There is no current flow outside the MCU, and there is no current consumption, so the standby static power consumption is very small and the system power consumption is low.

[0046] The above is only a specific implementation of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims. In addition, the specification uses specific examples to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. The content of this specification should not be understood as a limitation on the present invention.

Claims

1. An MCU power control circuit, characterized in that: The MCU power control circuit includes an MCU, an external voltage generating module, and a first resistor. The MCU has a first power supply terminal, a second power supply terminal, a third power supply terminal, and an internal first voltage generating module. The first power supply terminal is an input terminal, which receives input from an external power supply and supplies power to the MCU. The second power supply terminal is an output terminal, which is connected to the first power supply terminal via the internal first voltage generating module. The internal first voltage generating module generates a first intermediate voltage, which is output to the outside by the second power supply terminal. The third power supply terminal is a core voltage terminal, which provides a core working voltage to the core inside the MCU. The second power supply terminal is coupled to the first end of the first resistor and the input end of the external voltage generating module. The second end of the first resistor is connected to the The output end of the external voltage generating module is coupled to the third power supply end, and the MCU switches between the standby mode and the wake-up mode through the second power supply end; the MCU power supply control circuit also includes a first NMOS tube, a first PMOS tube, a second resistor, and a third resistor. The first power supply end is connected to the drain end of the first NMOS tube and the gate end of the first PMOS tube via the third resistor, and is also directly connected to the source end of the first PMOS tube. The second power supply end is connected to the gate end of the first NMOS tube, the source end of the first NMOS tube is grounded, the drain end of the first PMOS tube is grounded via the second resistor, and the drain end of the first PMOS tube is connected to the input end of the external voltage generating module.

2. The MCU power control circuit according to claim 1, characterized in that: The MCU also includes a fourth power supply terminal and an internal second voltage generating module. The fourth power supply terminal is an input terminal, connected to the output terminal of the external voltage generating module, and connected to the third power supply terminal via the internal second voltage generating module. The internal second voltage generating module generates the core operating voltage and provides it to the third power supply terminal.

3. The MCU power control circuit according to claim 1 or 2, characterized in that: The MCU power control circuit also includes a current limiting resistor, and the second power supply end is connected to the input end of the external voltage generating module and the first end of the first resistor via the current limiting resistor.

4. The MCU power control circuit according to claim 1, characterized in that: The external voltage generating module is a DC-DC circuit or a VR circuit.

5. An MCU power control circuit, characterized in that: The MCU power control circuit includes an MCU, an external voltage generating module, and a first resistor. The MCU has a first power supply terminal, a second power supply terminal, a third power supply terminal, a first IO terminal, and an internal first voltage generating module. The first power supply terminal is an input terminal, which receives input from an external power supply and supplies power to the MCU. The second power supply terminal is an output terminal, which is connected to the first power supply terminal via the internal first voltage generating module. The internal first voltage generating module generates a first intermediate voltage, which is output to the outside from the second power supply terminal. The third power supply terminal is a core voltage terminal, which provides a core working voltage to the core inside the MCU. The first IO terminal is an output terminal, which is controlled by the MCU alone. The second power supply terminal is coupled to the input terminal of the external voltage generating module via the first resistor, and the first IO terminal is also connected to the external The input end of the voltage generating module is coupled, the output end of the external voltage generating module is coupled to the third power supply end, and the MCU switches between the standby mode and the wake-up mode through the second power supply end and the first IO end; the MCU power control circuit also includes a first NMOS tube, a first PMOS tube, a second resistor, and a third resistor. The first power supply end is connected to the drain end of the first NMOS tube and the gate end of the first PMOS tube via the third resistor, and is also directly connected to the source end of the first PMOS tube. The second power supply end is coupled to the gate end of the first NMOS tube via the first resistor, the source end of the first NMOS tube is grounded, the drain end of the first PMOS tube is connected to the first IO end via the second resistor, and the first IO end is connected to the input end of the external voltage generating module.

6. The MCU power control circuit according to claim 5, characterized in that: The MCU also includes a fourth power supply terminal and an internal second voltage generating module. The fourth power supply terminal is an input terminal, connected to the output terminal of the external voltage generating module, and connected to the third power supply terminal via the internal second voltage generating module. The internal second voltage generating module generates the core operating voltage and provides it to the third power supply terminal.

7. The MCU power control circuit according to claim 5, characterized in that: The first IO terminal is also connected to the gate terminal of the first NMOS transistor.

8. The MCU power control circuit according to claim 5, characterized in that: The external voltage generating module is a DC-DC circuit or a VR circuit.

Images