Ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output divider circuit

Abstract

The application discloses an ultra-wideband reconfigurable injection locking multi-mode single-ended input / output frequency divider circuit, comprising an input unit, a frequency division circuit connected with the input unit, and an output unit connected with the frequency division circuit, wherein the frequency division circuit comprises an injection locking two-frequency division circuit and an injection locking three-frequency division circuit; the input unit utilizes a balun structure circuit, so that the injection locking two-frequency division circuit and the injection locking three-frequency division circuit are the same single-ended input; and the output unit utilizes a Multi-tank resonant network structure to realize single-ended output of two / three frequency division modes. The application can realize better efficacy, ultra-wideband performance, lower cost and easy integration in the design of a wideband millimeter wave phase-locked loop chip.

Description

Technical Field

[0001] This invention relates to the field of frequency divider circuit technology, and in particular to an ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit. Specifically, it is a reconfigurable, ultra-wideband, single-ended input / output, low-power frequency divider link that can switch modes, has both two-way and three-way frequency division modes, and is capable of reconfiguration. Background Technology

[0002] Millimeter-wave wireless communication and radar are research hotspots in academia and industry, and millimeter-wave phase-locked loop (PLL) systems are crucial components, their performance directly affecting the overall performance of the millimeter-wave system. With the development of wireless communication and radar applications, there is a growing demand for increasing bandwidth in millimeter-wave PLL systems while simultaneously reducing power loss and chip area. Voltage-controlled oscillators (VCOs) and prescalers, as two key modules in PLL systems, contribute significantly to power loss and chip area, and together determine the bandwidth of the PLL system.

[0003] In millimeter-wave phase-locked loop (PLL) systems, the reference signal frequency provided by the crystal oscillator is typically too low. The oscillator output signal frequency needs to be divided to a level comparable to the reference frequency in order to lock the PLL. The first-stage frequency divider immediately following the oscillator is usually called the prescaler. As the first-stage divider, the prescaler operates at a relatively high frequency and requires a wide operating range to cover the operating frequency of the voltage-controlled oscillator (VCO). Therefore, designing a broadband, low-power millimeter-wave prescaler is crucial.

[0004] In the millimeter-wave band, injection-locked structures based on LC resonators are an excellent option for prescalers. These structures operate at high frequencies, offer superior phase noise performance compared to other types of prescalers, and suffer from low power loss due to their high-quality resonant cavity. However, this also limits the bandwidth. Therefore, injection-locked prescalers for millimeter-wave applications require a trade-off between power consumption and locking range.

[0005] With the development of technology, an injection-locked frequency divider based on a multi-stage transformer structure has been proposed. It achieves bandwidth expansion by coupling multiple LC resonant cavities. Although the bandwidth performance of the injection-locked frequency divider is improved, its range is still limited, and this single-mode frequency divider can only provide a fixed division ratio. Summary of the Invention

[0006] The present application aims to overcome the deficiencies and shortcomings of the prior art, and provide an ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit. The wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit can solve the defect of narrow locking range of the single-mode injection-locked frequency divider structure in the background art, not only improve the frequency division bandwidth and obtain low power consumption performance, but also provide more flexible frequency division mode for the system. The use of such a dual-mode injection-locked frequency divider in the design of a wideband millimeter wave phase-locked loop chip can achieve better performance, ultra-wideband performance, lower cost and easy integration.

[0007] An ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit, comprising an input unit, a frequency division circuit connected to the input unit, and an output unit connected to the frequency division circuit, wherein the frequency division circuit comprises an injection-locked two-division frequency circuit and an injection-locked three-division frequency circuit; the input unit uses a balun structure circuit, so that the injection-locked two-division frequency circuit and the injection-locked three-division frequency circuit are the same single-ended input, and the output unit uses a Multi-tank resonant network structure to realize two-mode single-ended output of two / three division frequency.

[0008] The balun structure circuit is a single-to-differential balun structure circuit.

[0009] The balun structure circuit is connected to two bias circuits, one being a bias circuit of an injection tube of the two-division frequency circuit, and the other being a bias circuit of two differential injection tubes of the three-division frequency circuit.

[0010] The balun structure circuit is composed of a differential inductor L6 and a differential inductor L7 coupled by a coupling coefficient k4, the bias circuit of the injection tube of the two-division frequency circuit is composed of a port V bias4 and a resistor R2, and the bias circuit of the two differential injection tubes of the three-division frequency circuit is composed of a port V bias3 and the differential inductor L7; one end of the differential inductor L6 is grounded, and the other end is connected to one end of the resistor R2 and the input port V in , the gate port V inj_DIV2 of the injection transistor of the injection-locked two-division frequency circuit, and the two ends of the differential inductor L7 are connected to the gate ports V inj_DIV3- and V inj_DIV3+ of the differential injection transistors of the injection-locked three-division frequency circuit, the port V bias3 is connected to the center tap of the differential inductor L7, and the other end of the resistor R2 is connected to the port V bias4 .

[0011] The injection-locked two-division frequency circuit comprises a cross-coupled tube composed of a transistor M1 and a transistor M2, a transistor M Inj_DIV2, a resonant cavity composed of a differential capacitor C1 and a differential inductor L1, two peak inductors L4; the gate of transistor M inj_DIV2 is connected to port V inj_DIV2 , the source and the drain of each transistor are connected to one end of a peak inductor L4, the drain of transistor M1 and transistor M2, a differential capacitor C1 is connected in parallel with a differential inductor L1, the two ends of the differential inductor L1 are connected to one end of two peak inductors L4, the source of transistor M1 and transistor M2 is connected to ground after being connected to each other, the gate and the drain of transistor M1 and transistor M2 are cross-connected, the drain of transistor M5 connected at the center tap of the differential inductor L1 serves as a tail current source of the injection-locked frequency division circuit, and the source of transistor M5 is connected to V DD , and the gate is connected to port V bias1 .

[0012] The injection-locked frequency division circuit includes a cross-coupled transistor composed of transistor M3 and transistor M4, two transistors M inj_DIV3+ , M inj_DIV3- , a transistor M reuse for current reuse, a resonant cavity composed of a differential capacitor C2 and a differential inductor L2 in parallel, and two peak inductors L5; two transistors M inj_DIV3+ , M inj_DIV3- , the source of each transistor is connected to the gate of transistor M reuse , the source of transistor M reuse is connected to the drain of transistor M inj_DIV3- , one end of a peak inductor L5, and the drain of transistor M4, the drain of transistor M reuse is connected to the drain of transistor M inj_DIV3+ , the other end of a peak inductor L5, and the drain of transistor M3, the drain of transistor M inj_DIV3+ , M inj_DIV3- , the gate of each transistor is connected to port V inj_DIV3+ , V inj_DIV3- , the other end of the two peak inductors L5 is connected to the two ends of the differential inductor L2, the source of transistor M3 and transistor M4 is connected to ground after being connected to each other, and the gate and the drain of transistor M3 and transistor M4 are cross-connected; the drain of transistor M6 connected at the center tap of the differential inductor L2 serves as a tail current source of the injection-locked frequency division circuit, and the source of transistor M6 is connected to V DD , and the gate is connected to port V bias2 .

[0013] The Multi-tank resonant network structure includes an inductor L3, one end of the inductor L3 is connected to ground through a resistor R1, the other end is connected to an output port V out , and the other end is connected to an output port V out , to realize single-ended output in two / three frequency division modes.

[0014] The differential inductance L1 is coupled with the inductance L3 through the coupling coefficient k1 and coupled with the differential inductance L2 through the coupling coefficient k3, and the inductance L3 is coupled with the inductance L2 through the coupling coefficient k2, thereby forming a three-order Multi-tank resonant network structure.

[0015] The on / off state of the transistor M5 and the transistor M6 is controlled by controlling the bias voltage; at the same time, one transistor is in the on state, and the other transistor is in the off state, thereby controlling the switching of the two / three frequency division modes; the DC bias voltage of the input on transistor M5 is input from the port V bias1 The DC bias voltage of the input on transistor M5 is input from the port V bias2 The transistor M5 is turned on, and the transistor M6 is turned off, and at this time, the two frequency division mode is adopted, and vice versa, the three frequency division mode is adopted.

[0016] The design steps of the super wideband reconfigurable injection locking multi-mode single-ended input / output frequency divider circuit are as follows:

[0017] The indexes of the designed millimeter wave frequency division circuit are determined, including bandwidth, noise, power consumption, and chip area;

[0018] The frequency division ratios of the two modes are determined according to the set indexes, the frequency division ranges of the two modes are divided, the core circuits of the two modes are debugged according to the divided bandwidths, and the parameters of the core circuits are determined;

[0019] The common output structure is debugged according to the core parameters of the two modes, the parameters of the Multi-tank passive load are determined, the preliminary schematic design is realized, the core and the passive load parameters are iteratively optimized through multiple post-simulations, until the circuit meets the specified index parameters, and the final schematic design is completed;

[0020] The layout of the Multi-tank resonant cavity structure is planned according to the chip area index and the device parameters of each resonant cavity, the post-simulation is carried out after the whole layout design is completed, the layout is iteratively optimized through multiple post-simulations, and the overall circuit design is completed.

[0021] The super wideband reconfigurable injection locking multi-mode single-ended input / output frequency divider circuit has the advantages of wide working bandwidth, low power consumption, multi-mode switching, current multiplexing, single-ended input / output, etc., and solves the key problems of narrow bandwidth of the injection locking frequency divider, low injection efficiency of the three frequency division link, high power consumption of the pre-frequency divider used in the phase-locked loop system, system integration, etc., finally realizes the wide bandwidth performance, low power loss and low phase noise of the radio frequency millimeter wave frequency division link, and achieves the purposes of easy integration, low cost and low power consumption of the chip. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 is a schematic diagram of the super wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit of the present application. DETAILED DESCRIPTION

[0023] The present application will be further described below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely intended to explain the present application and are not intended to limit the present application.

[0024] Referring to Figure 1 The super wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit of the present application comprises an input unit, a frequency divider circuit composed of an injection-locked two-dividing frequency circuit and an injection-locked three-dividing frequency circuit, and an output unit. The input unit uses a balun structure to make the injection-locked two-dividing frequency circuit and the injection-locked three-dividing frequency circuit share the same single-ended input, and the output unit uses a Multi-tank resonant network structure to realize single-ended output in two / three dividing frequency modes. The Multi-tank resonant network structure can not only expand the bandwidth of each core through a multi-stage transformer, but also achieve the best output matching of the output signal through the selection of appropriate passive inductors and coupling coefficients,

[0025] In the present application, the injection-locked two-dividing frequency circuit and the injection-locked three-dividing frequency circuit of the frequency divider circuit both adopt an injection-locked structure, which includes a pair of cross-coupled tubes, an injection tube, a peak inductance structure, and a passive matching network. In addition, the injection-locked three-dividing frequency structure also introduces a current multiplexing structure to improve the injection efficiency of three-dividing frequency and facilitate the matching of the output signal power in two / three dividing frequency modes. In addition, a transistor is added as a tail current source to each frequency divider circuit to control the switching of the two modes through the tail current source bias voltage.

[0026] Specifically, the input unit comprises two bias circuits and a single-to-differential balun structure circuit, as shown in Figure 1 As shown in the left circuit, the two bias circuits include a bias circuit for the injection tube of the two-dividing frequency circuit and a bias circuit for the two differential injection tubes of the three-dividing frequency circuit.

[0027] The bias circuit for the injection tube of the two-dividing frequency circuit is composed of a port V bias4 and a resistor R2; the bias circuit for the two differential injection tubes of the three-dividing frequency circuit is composed of a port V bias3 and a differential inductor L7; and the single-to-differential balun structure is composed of two differential inductors L6 and two differential inductors L7 coupled through a coupling coefficient k4. The input port V in of the input unit is connected to two branches, one of which is directly connected to the injection transistor gate port V inj_DIV2The other branch is connected to the gate ports V of the two differential injection transistors in the three-way frequency divider circuit via a single-to-differential balun structure. inj_DIV3+ and V inj_DIV3+ Therefore, single-ended input in both two-way and three-way frequency modes is achieved.

[0028] The frequency divider circuit of the present invention is as follows: Figure 1 The circuit diagram on the right shows an injection-locked divider circuit at the top, an injection-locked divider circuit at the bottom, and an output matching structure in the middle. Transistors M5 and M6 are the tail current sources for the injection-locked divider and divider circuits, respectively, and are used as switches to switch between the two modes: by controlling the current from port V... bias1 and port V bias2 The bias voltage is used to control the on / off state of transistors M5 and M6. At any given time, only one transistor is on, and the other is off, thus controlling the switching between two-way and three-way frequency modes. If port V... bias1 The DC bias voltage of the input turn-on transistor M5, port V bias2 If the input voltage is 0V, transistor M5 will turn on and transistor M6 will turn off, which is the divide-by-two mode. Otherwise, it is the divide-by-three mode.

[0029] like Figure 1 As shown on the right, in the divide-by-two mode, the injection-locked divide-by-two circuit includes a cross-coupled transistor consisting of transistors M1 and M2, and transistor M acting as the injection transistor. inj_DIV2 The system consists of a peak inductor L4, a transistor M5 serving as the tail current source, and a resonant cavity composed of a differential capacitor C1 and a differential inductor L1. The resonant cavity composed of the differential capacitor C1 and the differential inductor L1 is coupled to the inductor L3 of the output unit through a coupling coefficient k1, and to the differential inductor L2 of the injection-locked three-way frequency divider circuit through a coupling coefficient k3, forming a third-order multi-tank resonant network structure.

[0030] Among them, cross-coupled transistors M1 and M2 provide negative resistance for the injection-locked divider circuit to ensure that the circuit continues to oscillate when no millimeter-wave injection signal is applied, and that it operates near the operating frequency after the divider is divided by two; transistor M inj_DIV2 As an injection tube, it has a mixing function, injecting frequency into transistor M. inj_DIV2 gate port V inj_DIV2 Injecting millimeter-wave signals, while transistor M inj_DIV2 The input signals to the source and drain are oscillation signals generated by the circuit itself. These two signals are transmitted through transistor M, which acts as an injection transistor. inj_DIV2The frequency is mixed, and an injection-locked structure is used to accurately output the divided signal, which is then input to the multi-tank resonant network. The output matching circuit has three resonant cavities: the first resonant cavity, which is directly connected to the injection-locked divider circuit and consists of the inductor L1 and capacitor C1; the second resonant cavity, which is connected to the output port V... out The second resonant cavity is formed by the connected inductor L3, and the third resonant cavity is formed by the sum of the equivalent total capacitance of the inductor L2 and capacitor C2 and all parasitic capacitances of the injection-locked three-way frequency divider circuit in the off state.

[0031] The first resonant cavity is coupled to the second and third resonant cavities through coupling coefficients k1 and k3, respectively, forming a third-order multi-tank resonant network structure. The peak inductance L4 is used to realize a high-impedance gain passive output load, which effectively improves the bandwidth in the divide-by-two mode.

[0032] like Figure 1 As shown on the right, in the three-way frequency division mode, the injection-locked three-way frequency division circuit includes a cross-coupled transistor consisting of transistor M3 and transistor M4, and two transistors M1 and M2 acting as differential injection transistors. inj_DIV3+ M inj_DIV3- Transistor M used for current multiplexing reuse The resonant cavity consists of a peak inductor L5, a transistor M6 serving as the tail current source, and a differential capacitor C2 and a differential inductor L2. The resonant cavity composed of the differential capacitor C2 and the differential inductor L2 is coupled to the inductor L3 through the coupling coefficient k2 and to the differential inductor L1 through the coupling coefficient k3, forming a third-order multi-tank resonant network structure.

[0033] Among them, cross-coupled transistors M3 and M4 provide negative resistance for the injection-locked three-way frequency divider circuit to ensure that the circuit continues to oscillate and operates near the operating frequency after the frequency divider is divided when no fully differential millimeter-wave injection signal is applied; two transistors M inj_DIV3+ M inj_DIV3- As a differential injection transistor, it functions as a mixer, injecting frequency into transistor M. inj_DIV3+ M inj_DIV3- gate port V inj_DIV3+ and V inj_DIV3- Simultaneously injecting a fully differential millimeter-wave signal, while transistor M... inj_DIV3+ M inj_DIV3- The drain input signal is an oscillation signal generated by the circuit itself. The two signals are injected through two differential injection transistors M. inj_DIV3+ M inj_DIV3- The mixing process, along with the injection-locked structure, accurately obtains the signal after frequency division, which is then input to the Multi-tank resonant network.

[0034] In the present application, when working in the tripler mode, in addition to the path of the above-mentioned divided frequency signal, the design also considers the difference in injection efficiency between the tripler and the doubler, so a current multiplexing structure is introduced into the injection-locked tripler core to improve the injection efficiency in the tripler mode, and then the output signal power in the two modes is matched well. inj_DIV3+ inj_DIV3- The gate of a current multiplexing transistor M reuse is connected at the common mode point CM of the two differential transistors M inj_DIV3+ and M inj_DIV3- When two completely differential millimeter wave signals are injected into the gate ports V reuse and V inj_DIV3- at the same time, the common mode point CM will output a tripler signal with a frequency of twice the frequency, and then this signal is recycled and introduced into the gate port of the transistor M reuse to form a doubler injection structure, and the specific mixing principle is the same as that in the doubler mode, thereby achieving the effect of current multiplexing.

[0035] When working in the tripler mode, similarly, the output matching circuit has three resonant cavities: the first resonant cavity composed of the inductor L2 and the capacitor C2 directly connected to the injection-locked tripler circuit, the second resonant cavity composed of the inductor L3 connected to the output port V out , and the third resonant cavity composed of the sum of the inductor L1 and the capacitor C1 and the equivalent total capacitance of all parasitic capacitances of the injection-locked doubler circuit in the off state.

[0036] The first resonant cavity is coupled to the second and third resonant cavities through coupling coefficients k2 and k3, respectively, to form a three-order Multi-tank resonant network structure, and the peak inductance L5 is used to realize a high-impedance gain output passive load, effectively improving the bandwidth in the tripler mode.

[0037] The output signals in the two modes of the doubler / tripler of the present application are all through the resonant cavity composed of the inductor L3 in the Multi-tank resonant network structure, which is connected to the output port V out , thereby outputting the divided frequency signals in different modes.

[0038] The circuit of the present application can be realized in almost all millimeter wave integrated circuit processes, and has the characteristics of single input / output, flexible frequency division mode, ultra-wideband and low loss, which is very convenient for integration into radio frequency millimeter wave circuits.

[0039] The ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit proposed in the present application mainly includes the following steps in the circuit design:

[0040] (1) determine the index of the designed millimeter wave frequency division circuit, including bandwidth, noise, power consumption, chip area.

[0041] (2) according to the index set, determine the frequency division ratio of two modes, divide the frequency division range of two modes, debug the core circuit of two modes according to the divided bandwidth, and determine the parameters of the core circuit.

[0042] (3) according to the core parameters of two modes, debug the common output structure, determine the coefficients of Multi-tank passive load, realize the preliminary schematic design, and optimize the core and passive load parameters through multiple post-simulation iterations until the circuit meets the specified parameters, and complete the final schematic design.

[0043] (4) according to the chip area index and the device parameters of each resonant cavity, plan the layout of Multi-tank resonant cavity structure, complete the whole layout design, and then perform post-simulation, multiple post-simulation iterations are optimized, and the overall circuit design is completed.

[0044] The super wideband reconfigurable injection locking multi-mode single-ended input / output frequency divider circuit can realize mode switching by controlling the tail current source mode, so that the chip is miniaturized and more easily integrated.

[0045] The super wideband reconfigurable injection locking multi-mode single-ended input / output frequency divider circuit proposed in the application uses Multi-tank resonant network structure as the output matching network, and introduces peak inductance to realize high impedance gain passive load design, which not only greatly improves the frequency division bandwidth, but also effectively reduces the power loss of the frequency divider, to realize a high-performance millimeter wave phase-locked loop system.

[0046] The super wideband reconfigurable injection locking multi-mode single-ended input / output frequency divider circuit proposed in the application realizes single-ended input / output through the balun structure and Multi-tank resonant network structure, so that the frequency divider is more easily integrated into the millimeter wave phase-locked loop system and is convenient for testing.

[0047] The super wideband reconfigurable injection locking multi-mode single-ended input / output frequency divider circuit proposed in the application uses a three-order Multi-tank resonant network as the output matching by designing injection locking two frequency divider circuit and injection locking three frequency divider circuit two core circuits, which reduces the area of the dual-mode frequency divider and provides flexible frequency division mode. In addition, the core structure is flexible, and according to the scene application needs, it can also be designed as two / four frequency division mode, etc., which is more targeted and adaptive.

[0048] The foregoing merely illustrates the principles of the application and various embodiments are now described with reference to the drawings. This application is not limited to the precise details and

[0049] Thus, the embodiments are to be considered in all respects as illustrative and not restrictive, the scope of the application to be indicated by the appended claims rather than the foregoing description, all changes which come within the meaning and range of equivalency of the claims are to be embraced therein.

[0050] Furthermore, it is to be understood that the application can be carried out by specifically different embodiments and that each disclosed embodiment is only representative of the many alternatives and combinations in which the application is capable of being carried out. It is therefore apparent that there is a combination of features that can be used to further advantage within the scope of the present application.

Claims

1. A frequency divider circuit with ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output, characterized in that, The circuit includes an input unit, a frequency divider circuit connected to the input unit, and an output unit connected to the frequency divider circuit. The frequency divider circuit includes an injection-locked divider-by-two circuit and an injection-locked divider-by-three circuit. The input unit utilizes a balun circuit to make the injection-locked divider-by-two circuit and the injection-locked divider-by-three circuit a single-ended input. The output unit utilizes... Multi- tank The resonant network structure enables single-ended output in both two-way and three-way frequency conversion modes. The balun structure circuit is connected to two bias circuits: one is the bias circuit for the injection tube of the divide-by-two circuit, and the other is the bias circuit for the two differential injection tubes of the divide-by-three circuit. The balun circuit consists of a differential inductor. L 6 and a differential inductor L 7 Through coupling coefficient k 4 The coupling consists of a bias circuit for the injection transistor in a frequency divider circuit, which is composed of ports. V bias4 and resistance R 2 The bias circuit for the two differential injection transistors in the three-way frequency divider circuit consists of ports. V bias3 and differential inductance L 7 Composition; differential inductor L 6 One end is grounded, and the other end is connected to a resistor. R 2 One end, input port V in The gate port of the injection transistor in the injection-locked divider circuit. V inj_DIV2 The two ends of the differential inductor L7 are connected to the gate port of the differential injection transistor in the locked three-way frequency divider circuit. V inj_DIV3- , V inj_DIV3+ The center tap of the differential inductor L7 is connected to the port. V bias3 ; The Multi-tank The resonant network structure includes an inductor L 3 ， inductance L 3 One end is connected to a resistor R 1 The other end is connected to the output port. V out Through the output port V out This enables single-ended output in both two-way and three-way frequency conversion modes. Injection lock-in differential inductor in divide-by-two circuit L 1 Through coupling coefficients respectively k 1 With inductance L 3 Coupling, through coupling coefficient k 3 Differential inductor in injection-locked three-way frequency divider circuit L 2 Coupling, inductor L3 through coupling coefficient k 2 With inductance L 2 Coupling, forming a third order Multi-tank Resonant network structure.

2. The ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit according to claim 1, characterized in that, The balun circuit is a single-turn differential balun circuit.

3. The ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit according to claim 1, characterized in that, The injection-locked frequency divider circuit includes transistors. M 1 and transistors M 2 The cross-coupled transistor and the transistor acting as an injection tube M Inj_DIV2 A differential capacitor C 1 and a differential inductor L 1 The resonant cavity consists of two peak inductors. L 4 ; transistor M inj_DIV2 gate port V inj_DIV2 The source and drain are each connected to a peak inductor. L 4 One end of the transistor M 1 and transistors M 2 The drain connection, a differential capacitor C 1 With differential inductor L 1 Parallel, differential inductors L 1 The two ends are respectively connected to two peak inductors L 4 One end, transistor M 1 and transistors M 2 After the source is connected to ground, the transistor... M 1 and transistors M 2 The gate and drain are cross-connected, and the differential inductor... L 1 The center tap is connected to a transistor that serves as the tail current source for the injection-locked divider circuit. M 5 The drain of the transistor M 5 source terminal V DD Gate connection port V bias1 .

4. The ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit according to claim 3, characterized in that, The injection-locked frequency divider circuit includes transistors. M 3 and transistors M 4 The cross-coupled transistor and the two transistors acting as differential injection transistors M inj_DIV3+ , M inj_DIV3- Transistors used for current multiplexing M reuse A differential capacitor C 2 and a differential inductor L 2 The resonant cavity is composed of two peak inductors connected in parallel. L 5 Two transistors M inj_DIV3+ , M inj_DIV3- After the source is connected to the transistor M reuse The gates are connected, and the transistors are connected. M reuse Source-connected transistor M inj_DIV3- The drain, a peak inductance L 5 one end and transistor M 4 The drain of the transistor M reuse drain-connected transistor M inj_DIV3+ The drain, another peak inductance L 5 one end and transistor M 3 The drain of the transistor M inj_DIV3+ , M inj_DIV3- The gates are respectively connected to the port. V inj_DIV3+ , V inj_DIV3- Two peak inductors L 5 The other end is connected to the differential inductor. L 2 The two ends are connected, transistor M 3 and transistors M 4 After the source is connected to ground, the transistor... M 3 and transistors M 4 The gate and drain are cross-connected; differential inductor L 2 The center tap is connected to a transistor that serves as the tail current source for the injection-locked frequency divider circuit. M 6 The drain of the transistor M 6 source terminal V DD Gate connection port V bias2 .

5. The ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit according to claim 4, characterized in that, The transistor is controlled by controlling the bias voltage. M 5 and transistors M 6 On / off state; same During time, one transistor is in the on state while the other is in the off state, thus controlling the switching between two-way and three-way frequency modes; from the port V bias1 Input turn-on transistor M 5 DC bias voltage, port V bias2 Then enter 0 V Voltage, then transistor M 5 On, transistor M 6 When turned off, it is in two-way frequency division mode; otherwise, it is in three-way frequency division mode.

6. The ultra-wideband reconfigurable injection-locked multi-mode single-ended input / output frequency divider circuit according to claim 1, characterized in that, The design steps are as follows: Determine the specifications of the designed millimeter-wave frequency divider circuit, including bandwidth, noise, power consumption, and chip area; Determine the frequency division ratio for the two modes based on the set indicators, divide the frequency division range for the two modes, debug the core circuits of the two modes according to the divided bandwidth, and determine the parameters of the core circuits. The common output structure is debugged based on the core parameters of the two modes to determine... Multi-tank The various coefficients of the passive load are used to achieve the initial schematic design. Multiple simulation iterations are then used to optimize the core and passive load parameters until the circuit meets the specified parameters, thus completing the final schematic design. Planning is based on chip area specifications and device parameters for each resonator. Multi-tank The layout of the resonant cavity structure is designed. After the entire layout is completed, parameters are extracted and simulation is performed. The layout is optimized through multiple simulation iterations to complete the overall circuit design.

Images