Enhanced AlGaN / GaN HEMT device comprising an embedding layer

Abstract

Enhanced AlGaN / GaN HEMT devices including an embedded layer are disclosed. The device includes, from bottom to top, a silicon substrate, a nucleation layer, a buffer layer, a P-embedded layer, an N-embedded layer, a channel layer, a barrier layer, and a passivation layer, with a source and a drain on either side of the passivation layer, a p-GaN layer between the source and the drain, and a gate above the p-GaN layer. The drain extends from the passivation layer surface to the channel layer upper surface and is in direct electrical contact with the channel layer, the barrier layer, and the passivation layer. The p-GaN layer is embedded in the passivation layer up to the upper surface of the barrier layer. The source extends from the passivation layer surface into the P-embedded layer and is in direct electrical contact with the P-type embedded layer, the N-type embedded layer, the channel layer, the barrier layer, and the passivation layer. The present application optimizes the dynamic on-resistance characteristics of the device while improving the off-state voltage blocking capability of the device without sacrificing output characteristics.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductor devices, and relates to a structure design of an enhancement-mode AlGaN / GaN HEMT device, in particular to an enhancement-mode AlGaN / GaN HEMT device containing an embedded layer. BACKGROUND

[0002] The enhancement-mode AlGaN / GaN HEMT device has high off-state breakdown voltage, small on-resistance, high working temperature and high working frequency, and is one of the research hotspots in the field of semiconductor devices today. However, there are some serious reliability problems in its practical application. The dynamic on-resistance refers to the phenomenon that the saturation current density and the on-resistance are degraded compared with the static value when the AlGaN / GaN HEMT device is switched to the on-state after being subjected to high drain bias stress in the off-state.

[0003] The dynamic on-resistance problem of the enhancement-mode AlGaN / GaN HEMT device reduces the device performance, increases the system loss, reduces the conversion efficiency, and seriously limits its further development. In order to solve this problem, researchers mostly focus on the optimization of the surface process or the design of the electrode structure of the device, and have proposed device surface passivation, gate field plate structure, hybrid drain-gate injection structure and other technologies. However, there are still few related technologies based on the internal structure of the device, and the existing related technologies based on the internal structure of the device, such as buffer layer growth process optimization, are often difficult to suppress the dynamic on-resistance degradation of the device while taking into account other performance indicators. Therefore, it is still a technical focus for those skilled in the art to suppress the dynamic on-resistance degradation of the enhancement-mode AlGaN / GaN HEMT device without excessively damaging other performance indicators. SUMMARY

[0004] The present application proposes an enhancement-mode AlGaN / GaN HEMT device containing an embedded layer to solve the problems in the prior art. By introducing an embedded layer into the conventional enhancement-mode AlGaN / GaN HEMT device, the dynamic on-resistance degradation problem of the enhancement-mode AlGaN / GaN HEMT device is improved, and the device reliability is improved.

[0005] The enhancement-mode AlGaN / GaN HEMT device containing an embedded layer comprises, from bottom to top, a silicon substrate, a nucleation layer, a buffer layer, a P embedded layer, an N embedded layer, a channel layer, a barrier layer and a passivation layer, and a source and a drain located on both sides of the passivation layer, a p-GaN layer located between the source and the drain, and a gate located above the p-GaN layer.

[0006] The drain extends from the surface of the passivation layer to the upper surface of the channel layer and directly contacts the channel layer, the barrier layer and the passivation layer. The p-GaN layer is embedded in the passivation layer until it contacts the upper surface of the barrier layer. The source extends from the surface of the passivation layer into the P-embedded layer and directly contacts the P-embedded layer, the N-embedded layer, the channel layer, the barrier layer and the passivation layer.

[0007] The N-embedded layer material is Al 0.1 Ga 0.9 N with a thickness of 0.5-1 μm and an N-type doping concentration of 1×10 14 cm -3 ~1×10 16 cm -3 The P-embedded layer material is Al 0.1 Ga 0.9 N with a thickness of 0.5-1 μm and a P-type doping concentration of 5×10 17 cm -3 ~5×10 18 cm -3 .

[0008] Preferably, the height of the source inside the P-embedded layer is 0.2-0.8 μm.

[0009] Preferably, the C doping concentration in the buffer layer is 1×10 16 cm -3 ~1×10 18 cm -3 and the unintentional N-type doping concentration is 1×10 15 cm -3 .

[0010] Preferably, the buffer layer material is Al 0.1 Ga 0.9 N with a thickness of 2-4 μm.

[0011] Preferably, the barrier layer material is Al 0.23 Ga 0.77 N with a thickness of 0.015 μm.

[0012] Preferably, the material of the p-GaN gate is GaN with a P-type doping concentration of 3×10 17 cm -3 and a lateral distance from the drain of 5.0-8.0 μm.

[0013] Preferably, the passivation layer material is Si3N4 with a thickness of 0.2 μm.

[0014] The present application has the following advantages:

[0015] 1. Compared with the conventional enhancement-mode AlGaN / GaN HEMT device, by adding the upper and lower stacked N and P embedded layers between the channel layer and the buffer layer, the PN junction is formed and the potential barrier between the buffer layer and the channel layer is raised, effectively suppressing the leakage of channel carriers to the buffer layer, and thus suppressing the buffer layer leakage of the device, thereby effectively improving the off-state voltage resistance of the conventional enhancement-mode AlGaN / GaN HEMT device.

[0016] 2. Compared with the conventional enhancement-mode AlGaN / GaN HEMT device, when subjected to drain electric stress, the P-type doping in the P embedded layer in the new device can effectively suppress the capture of channel electrons by buffer layer defects, while compensating for the depletion of holes in the buffer layer, thereby effectively improving the dynamic on-resistance degradation problem of the device.

[0017] 3. Compared with the traditional device with a back barrier layer, the new device improves the voltage resistance of the device through the PN junction formed between the N and P embedded layers, avoiding the reduction of the channel layer two-dimensional electron gas concentration caused by the large Al component of the back barrier layer. On the other hand, since the N-type embedded layer is located between the P-type embedded layer and the channel layer, it effectively isolates the P-type impurities in the P-type embedded layer from the 2DEG in the channel layer. In summary, the addition of N and P embedded layers can improve the performance of the device while ensuring that the basic electrical characteristics of the device are not affected. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 is a schematic diagram of a conventional enhancement-mode AlGaN / GaN HEMT device structure.

[0019] Figure 2 is a schematic diagram of an enhancement-mode AlGaN / GaN HEMT device structure containing embedded layers.

[0020] Figure 3 is a graph of the output and transfer characteristics of different enhancement-mode AlGaN / GaN HEMT devices measured in Example 1.

[0021] Figure 4 is a graph of the breakdown characteristics of different enhancement-mode AlGaN / GaN HEMT devices measured in Example 1.

[0022] Figure 5 is the performance results of different enhancement-mode AlGaN / GaN HEMT devices after being subjected to different sizes of drain voltage stress, measured in Example 1.

[0023] Figure 6 is a graph of the output and transfer characteristics of different enhancement-mode AlGaN / GaN HEMT devices measured in Example 2.

[0024] Figure 7 Breakdown characteristic curves of different enhancement-mode AlGaN / GaN HEMT devices measured in Example 2.

[0025] Figure 8 The performance results of different enhancement-mode AlGaN / GaN HEMT devices measured in Example 2 under different drain voltage stresses. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described in detail below with reference to the accompanying drawings.

[0027] Conventional enhancement-mode AlGaN / GaN HEMT devices in the prior art, such as Figure 1 As shown, the device includes, from bottom to top, a silicon substrate 12, a nucleation layer 11, a buffer layer 10, a channel layer 7, a barrier layer 6, and a passivation layer 5, as well as a P-GaN layer 4, a source electrode 1, and a drain electrode 2 disposed above the passivation layer 5. The P-GaN layer 4 is embedded in the passivation layer 5 until it contacts the upper surface of the barrier layer 6, and the gate electrode 3 is disposed directly above the P-GaN layer 4. The source electrode 1 and drain electrode 2 are respectively disposed on opposite sides of the barrier layer 6, and both the source electrode 1 and drain electrode 2 extend to the interface between the channel layer 7 and the barrier layer 6, forming electrical contacts with the channel layer 7, the barrier layer 6, and the passivation layer 5 of the device. The buffer layer 10 is made of Al. 0.1 Ga 0.9 N, with a thickness of 2μm~4μm, and an unintentional N-type doping concentration of 1×10⁻⁶. 15 cm -3 The C doping concentration is 1×10 16 cm -3 ~1×10 18 cm -3 The p-GaN layer 4 is made of GaN with a p-type doping concentration of 3 × 10⁻⁶. 17 cm -3 The lateral distance between the passivation layer 5 and the drain 2 is 5.0 μm to 8.0 μm. The passivation layer 5 is made of Si3N4 and has a thickness of 0.2 μm. The barrier layer 6 is made of Al. 0.23 Ga 0.77 N, with a thickness of 0.015 μm.

[0028] This application proposes an enhanced AlGaN / GaN HEMT device with an embedded layer, such as... Figure 2As shown, compared with the conventional enhanced AlGaN / GaN HEMT device, the N embedded layer 8 and the P embedded layer 9 are added between the buffer layer 10 and the channel layer 7, and the source electrode 1 extends into the P embedded layer 9 and directly contacts with the N embedded layer 8, the P embedded layer 9, the channel layer 7, the barrier layer 6 and the passivation layer 5. The material of the N embedded layer 8 is Al 0.1 Ga 0.9 N, the thickness is 0.5-1 μm, the N type doping concentration is 1×10 14 cm -3 ~1×10 16 cm -3 . The material of the P embedded layer 9 is Al 0.1 Ga 0.9 N, the thickness is 0.5-1 μm, the P type doping concentration is 5×10 17 cm -3 ~5×10 18 cm -3 . The depth of the source electrode 1 extending into the P embedded layer 9 is 0.2-0.8 μm.

[0029] Example 1

[0030] The enhanced AlGaN / GaN HEMT devices shown in Figure 1 、 2 are modeled and simulated by using the Sentaurus TCAD semiconductor device simulation software, and the output characteristics, transfer characteristics, off-state voltage resistance characteristics and dynamic on-resistance characteristics are compared. In the simulation, the gate-drain spacing is 5 μm, the buffer layer thickness is 2 μm, the P embedded layer thickness is 1 μm, the P type doping concentration is 1×10 18 cm -3 , the N embedded layer thickness is 1 μm, the N type doping concentration is 1×10 15 cm -3 , and the depth of the source electrode 1 extending into the P embedded layer 9 is 0.5 μm.

[0031] As Figure 3As shown, (a) and (b) are the output and transfer characteristic curves of the two devices, respectively. In (a), the horizontal axis represents the drain voltage and the vertical axis represents the drain current. The simulation bias conditions are: the gate bias is constant at 3V or 5V, and the drain bias gradually increases from 0V to 10V. According to the curve in (a), the enhancement-mode AlGaN / GaN HEMT device with an embedding layer proposed in this application has an output characteristic curve that is basically consistent with that of conventional enhancement-mode AlGaN / GaN HEMT devices. This is mainly because the N-type embedding layer is located between the P-type embedding layer and the channel layer, effectively suppressing the influence of P-type impurities in the P-type embedding layer on 2DEG in the channel, thereby suppressing the influence of the P-type embedding layer on the device output characteristics. In (b), the horizontal axis represents the gate voltage and the vertical axis represents the drain current. The simulation bias conditions are: the drain bias is constant at 10V, and the gate bias gradually increases from 0V to 7V. According to the curve in (b), since the N-embedded layer greatly shields the influence of the P-embedded layer on the channel 2DEG, the enhancement AlGaN / GaN HEMT device with the embedded layer proposed in this application has a transfer characteristic curve that is basically consistent with that of conventional enhancement AlGaN / GaN HEMT devices.

[0032] like Figure 4 The figure shows the off-state breakdown characteristic curves, where the horizontal axis represents the drain voltage and the vertical axis represents the drain current. The simulation bias conditions are: zero gate-source bias, and drain bias gradually increasing from 0V. The simulation results show that the V values ​​of the two compared devices... BR Significant differences exist in L gd At a thickness of 5 μm, the V0 of a conventional enhancement-mode AlGaN / GaN HEMT device is... BR The voltage is 505V, while the V of the enhanced AlGaN / GaN HEMT device with an embedded layer proposed in this application is 505V. BR The voltage is 940V. This is because the stacked N-type embedding layer 8 and P-type embedding layer 9 raise the energy band between the buffer layer and the channel layer, effectively suppressing the leakage of channel carriers to the buffer layer in the off state; and, when the device is subjected to the off-state drain voltage stress, the PN junction is reverse biased, sharing part of the drain voltage, making the device's bulk potential distribution more uniform.

[0033] like Figure 5 As shown, (a) and (b) are the output characteristic curves of the two devices after being subjected to drain voltage stresses of different magnitudes, (c) is the relationship curve between the normalized on-resistance R / R0 of the two devices and the magnitude of the drain voltage stress, and (d) is a schematic diagram of the dynamic on-resistance characteristic test waveform of the two devices, where R0 is the static on-resistance and R is the on-resistance after stress. Figure 5(d) As shown, the dynamic on-resistance degradation characteristics of the two devices were characterized by applying drain voltage stress on both devices. Before the stress, the static output characteristics and static on-resistance (V d =0V) of both devices were measured. Then in phase I, the drain voltage of both devices was swept to a high voltage (0~200V). Thereafter, the stress phase II was entered, in which the gate 3 and source 1 of the devices were grounded, while the drain 2 was stressed with a constant voltage. The stress lasted for t stress . Then phase III was entered, in which the drain stress was removed in 1 μs. Then the dynamic output characteristics and dynamic on-resistance test phases IV and V were entered. In phase IV, the gate voltage was swept to 5V, and then in phase V, the drain voltage was swept to 10V. The whole test lasted for t test . Finally, the dynamic output characteristics of both devices were obtained as shown in (a) and (b), and the normalized on-resistance versus the magnitude of the drain stress of both devices was obtained as shown in (c). As can be seen from (a), the conventional enhancement-mode AlGaN / GaN HEMT device showed obvious dynamic on-resistance degradation and output characteristics degradation after being subjected to off-state drain stress. In contrast, as can be seen from (b), the enhancement-mode AlGaN / GaN HEMT device containing the embedded layer proposed by the present application can obviously inhibit the dynamic on-resistance degradation and output characteristics degradation. As can be seen from (c), for the conventional enhancement-mode AlGaN / GaN HEMT device, the on-resistance increased by 289% compared to the static on-resistance after being subjected to off-state drain stress with a magnitude of 200V, while the on-resistance of the enhancement-mode AlGaN / GaN HEMT device containing the embedded layer proposed by the present application only increased by 139%.

[0034] The hole depletion in the buffer layer and the residual negative charge region in the buffer layer, which electrically couple to the 2DEG, are one of the main mechanisms of the dynamic on-resistance degradation of the conventional enhancement-mode AlGaN / GaN HEMT device. In the enhancement-mode AlGaN / GaN HEMT device containing the embedded layer proposed by the present application, when subjected to off-state drain stress, the P-type embedded layer 9 electrically connected to the source 1 is biased, and the holes therein are emitted to the buffer layer 10. Since the P-type embedded layer 9 has a high concentration of P-type impurities, these sufficient P-type impurities injected into the buffer layer inhibit the hole depletion in the buffer layer 10 and neutralize the residual negative charge region in the buffer 10. On the other hand, the PN junction formed by the two embedded layers raises the height of the potential barrier between the channel layer and the buffer layer, inhibits the leakage of electrons in the channel to the buffer layer 10, and thus reduces the number of electrons trapped in the buffer layer 10 during the electrical stress, thereby effectively optimizing the dynamic on-resistance degradation problem in the conventional enhancement-mode AlGaN / GaN HEMT device.

[0035] Example 2

[0036] This example is based on Example 1, and the thickness of the P-type embedded layer and the N-type embedded layer is adjusted to 0.5 μm. The output and transfer characteristics of different enhancement-mode AlGaN / GaN HEMT devices are measured Figure 6 As shown, when the thickness of the P-type embedded layer and the N-type embedded layer is 0.5 μm, the enhancement-mode AlGaN / GaN HEMT device containing the embedded layer proposed by the present application still has substantially consistent output characteristics and transfer characteristics with the conventional enhancement-mode AlGaN / GaN HEMT device.

[0037] The breakdown characteristics of different enhancement-mode AlGaN / GaN HEMT devices are measured Figure 7 As shown, when the thickness of the P-type embedded layer and the N-type embedded layer is 0.5 μm, the V BR is 785 V, which is obviously improved compared with 505 V of the conventional enhancement-mode AlGaN / GaN HEMT device. However, compared with 940 V when the thickness of the P-type embedded layer and the N-type embedded layer is 1 μm, the improvement effect of the new device on V BR is weakened, which is mainly because: when the device bears off-state voltage, the thicker the P-type and N-type embedded layers, the wider the depletion region of the PN junction, and the better the effect of bearing off-state voltage and optimizing the body electric field distribution.

[0038] The performance results of different enhancement-mode AlGaN / GaN HEMT devices after being subjected to stress of different sizes of drain voltages Figure 8 As shown, when the thickness of the P-type embedded layer and the N-type embedded layer is 0.5 μm, compared with the conventional enhancement-mode AlGaN / GaN HEMT device, the enhancement-mode AlGaN / GaN HEMT device containing the embedded layer proposed by the present application can still obviously inhibit the degradation of dynamic on-resistance and output characteristics. However, compared with the case when the thickness of the P-type embedded layer and the N-type embedded layer is 1 μm, the inhibition capacity is weakened, which is mainly because: the thicker the embedded layer, the more the total amount of P-type doped impurities in the P-type embedded layer, and thus the stronger the inhibition effect of the P-type embedded layer on the electron capture in the buffer layer.

[0039] Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application. It should be noted that the above description is only a specific embodiment of the present application, and does not limit the present application. Any modification and optimization made within the spirit and principles of the present application shall be covered by the scope of the claims of the present application.

Claims

1. An enhancement AlGaN / GaN HEMT device including an embedded layer, comprising a silicon substrate, a nucleation layer, a buffer layer, a channel layer, a barrier layer and a passivation layer stacked from bottom to top, and source and drain electrodes located on both sides of the passivation layer, a p-GaN layer located between the source and drain electrodes, and a gate electrode located above the p-GaN layer. The drain extends from the surface of the passivation layer to the upper surface of the channel layer and is in direct electrical contact with the channel layer, the barrier layer, and the passivation layer; the p-GaN layer is embedded in the passivation layer until it contacts the upper surface of the barrier layer; characterized in that: An N-type embedding layer and a P-type embedding layer are stacked vertically between the channel layer and the buffer layer; the source extends from the surface of the passivation layer into the P-type embedding layer and is in direct electrical contact with the P-type embedding layer, the N-type embedding layer, the channel layer, the barrier layer, and the passivation layer; since the N-type embedding layer is located between the P-type embedding layer and the channel layer, it effectively isolates the influence of P-type impurities in the P-type embedding layer on the 2DEG in the channel layer; The N-type embedding layer material is Al. 0.1 Ga 0.9 N, with a thickness of 0.5 μm to 1 μm and an N-type doping concentration of 1 × 10⁻⁶. 14 cm -3 ~1×10 16 cm -3 ; The P-type embedding layer material is Al. 0.1 Ga 0.9 N, with a thickness of 0.5 μm to 1 μm, and a P-type doping concentration of 5 × 10⁻⁶. 17 cm -3 ~5×10 18 cm -3 .

2. The enhanced AlGaN / GaN HEMT device including an embedding layer as described in claim 1, characterized in that: The height of the source electrode inside the P-type embedding layer is 0.2 μm to 0.8 μm.

3. The enhanced AlGaN / GaN HEMT device including an embedding layer as described in claim 1, characterized in that: The C doping concentration in the buffer layer is 1×10⁻⁶. 16 cm -3 ~1×10 18 cm -3 The unintentional N-type doping concentration is 1×10⁻⁶. 15 cm -3 .

4. The enhanced AlGaN / GaN HEMT device including an embedding layer as described in claim 1 or 3, characterized in that: The buffer layer material is Al. 0.1 Ga 0.9 N, with a thickness of 2μm~4μm.

5. The enhanced AlGaN / GaN HEMT device including an embedding layer as described in claim 1, characterized in that: The barrier layer material is Al. 0.23 Ga 0.77 N, with a thickness of 0.015 μm.

6. The enhanced AlGaN / GaN HEMT device including an embedding layer as described in claim 1, characterized in that: The p-GaN layer is made of GaN, with a p-type doping concentration of 3 × 10⁻⁶. 17 cm -3 .

7. The enhanced AlGaN / GaN HEMT device including an embedding layer as described in claim 1 or 6, characterized in that: The lateral distance between the p-GaN layer and the drain is 5.0 μm to 8.0 μm.

8. The enhanced AlGaN / GaN HEMT device including an embedding layer as described in claim 1, characterized in that: The passivation layer material is Si3N4, and the thickness is 0.2μm.

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