Phase estimation method, signal processing channel and storage medium
By superimposing the original input signal and cancelling signal, digital-to-analog conversion and spectrum analysis are used to perform digital-to-analog conversion and spectrum analysis, the process of obtaining harmonics or spurious phases in the DAC output signal is simplified, and the accuracy dependence and complexity problems in the prior art are solved. Efficient and accurate phase estimation is achieved.
Patent Information
- Application Number
- CN202411813270.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-11
- Publication Date
- 2025-02-11
AI Technical Summary
The prior art is difficult to simplify obtaining harmonic or spurious phases in digital-to-analog converter (DAC) output signals, and high-precision analysis instruments are costly and complex to use.
By acquiring the original input signal and cancelling signal, the input DAC is superimposed for digital-to-analog conversion, and the analog signal is analyzed to obtain the harmonic or spurious phase. The specific steps include generating a phase table to be measured, traversing each phase value, obtaining an amplitude estimate value, and finally determining the phase corresponding to the minimum amplitude estimate value.
The phase estimation process is simplified, the dependence on high-precision analysis instruments is reduced, and the efficiency and accuracy of harmonic or spurious phase acquisition in the DAC output signal is improved.
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Figure CN119414088A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of signal processing technology, and in particular to a phase estimation method, a signal processing channel and a storage medium. Background Art
[0002] As an important device for converting digital signals into analog signals, the Digital-to-Analog Converter (DAC) is widely used in all walks of life. However, due to the influence of nonlinear factors such as mismatch of internal components of the DAC, the output of the DAC always contains other signals besides the main signal of the input signal, which in turn affects the spurious free dynamic range (SFDR) of the DAC. Among them, the harmonics and spurs corresponding to the main signal in the output signal of the DAC have a greater impact on SFDR.
[0003] In the current technical solution, other analytical instruments are mainly used to analyze the analog signal output by DAC to directly analyze the harmonic phase of harmonics or the spurious phase of spurious signals. However, this requires high accuracy of the analytical instrument, and the cost of high-precision analytical instruments is also relatively high. In addition, the direct analysis process is complicated and not suitable for large-scale applications. Therefore, a new technical solution is needed to obtain the phase of harmonics or spurious signals generated by DAC. Summary of the invention
[0004] The main technical problem solved by the present application is how to simplify the acquisition of the phase of harmonics or spurious generated by DAC.
[0005] According to the first aspect, an embodiment provides a phase estimation method, including:
[0006] Acquire an original input signal and a cancellation signal, wherein the cancellation signal is generated based on the harmonic frequency and harmonic amplitude value of the harmonics of the original input signal or based on the spurious frequency and spurious amplitude value of the spurious of the original input signal, and any phase value in a phase table to be measured; wherein the phase table to be measured includes M phase values, and M is a positive integer greater than 1;
[0007] Superimposing the cancellation signal and the original input signal to obtain a digital signal to be tested;
[0008] Inputting the digital signal to be tested into a DAC for digital-to-analog conversion to obtain an analog signal to be tested, performing spectrum analysis on the analog signal to be tested, and obtaining an amplitude estimation value of a harmonic frequency or a spurious frequency corresponding to any phase value;
[0009] The cancellation signals corresponding to the M phase values are traversed to obtain M amplitude estimation values corresponding to the M phase values, and the phase corresponding to the minimum amplitude estimation value is obtained based on the M amplitude estimation values and the corresponding phase values.
[0010] In some embodiments, obtaining the phase corresponding to the minimum amplitude estimation value based on the M amplitude estimation values and the corresponding phase values includes:
[0011] Obtaining the minimum value among the M amplitude estimation values;
[0012] Determine whether the minimum value among the M amplitude estimation values is a minimum value;
[0013] If it is a minimum value, determining the phase corresponding to the minimum value is the phase corresponding to the amplitude estimation minimum value;
[0014] If it is not a minimum value, the maximum value among the M amplitude estimation values is obtained, and the phase corresponding to the amplitude estimation minimum value is determined according to the phase corresponding to the maximum value.
[0015] In some embodiments, the M phase values are sorted according to magnitude and correspond to numbers 1-M respectively;
[0016] The determining whether the minimum value among the M amplitude estimation values is a minimum value comprises:
[0017] If it is determined that the index m corresponding to the minimum value among the M amplitude estimation values is between (1, M), then it is determined that the minimum value among the M amplitude estimation values is a minimum value;
[0018] If it is determined that the label m corresponding to the minimum value among the M amplitude estimation values is outside (1, M), it is determined that the minimum value among the M amplitude estimation values is not a minimum value; wherein 1≤m≤M, and m is a positive integer.
[0019] In some embodiments, determining the phase corresponding to the minimum amplitude estimation value according to the phase corresponding to the maximum value includes:
[0020] Shifting the phase corresponding to the maximum value by a preset phase so that the shifted phase corresponds to the amplitude estimation minimum value;
[0021] The shifted phase is output, where the shifted phase is the phase corresponding to the minimum value of the amplitude estimation.
[0022] In some embodiments, if the phase value corresponding to the maximum value is between [0, π), the preset phase of the translation is π;
[0023] If the phase value corresponding to the maximum value is between [π, 2π), the preset phase of the translation is -π.
[0024] The shifted phase is the sum of the phase value corresponding to the maximum value and the shifted preset phase.
[0025] In some embodiments, the phase table to be measured is generated by:
[0026] M phase values are divided from the phase range [a, a+π] according to a preset phase interval to generate the phase table to be measured; wherein a is a phase greater than or equal to 0 and less than or equal to π.
[0027] or,
[0028] Obtain estimated phase empirical values, and generate the phase table to be measured according to the estimated phase empirical values.
[0029] In some embodiments, obtaining the estimated phase empirical value includes:
[0030] Obtaining a phase estimation value corresponding to a harmonic frequency or a spurious frequency of a known input signal after the known input signal is input into the DAC;
[0031] Based on the frequency relationship between the known input signal and the original input signal, the estimated phase empirical value corresponding to the harmonic of the original input signal is obtained from the phase estimation value; or, based on the frequency relationship between the known input signal and the original input signal, and the frequency relationship between the spurious frequencies of the known input signal and the spurious frequencies of the original input signal, the estimated phase empirical value corresponding to the spurs of the original input signal is obtained from the phase estimation value.
[0032] In some embodiments, the performing spectrum analysis on the simulated signal to be tested includes:
[0033] Inputting the simulated signal to be tested into a spectrum analyzer for spectrum analysis;
[0034] or,
[0035] The simulated signal to be tested is input into an analog-to-digital converter for analog-to-digital conversion and then subjected to Fourier transform processing for spectrum analysis.
[0036] In some embodiments, for harmonics, the frequency of the corresponding cancellation signal is the harmonic frequency of the harmonics of the original input signal;
[0037] For spurious signals, the frequency of the corresponding cancellation signal is the spurious frequency of the spurious signals of the original input signal.
[0038] According to a second aspect, an embodiment provides a signal processing channel for implementing the phase estimation method as described in the first aspect, wherein the signal processing channel comprises at least two DDS phase accumulators, and the signal processing circuits where each of the DDS phase accumulators is located are connected in parallel, and the number of parallel connections is defined as an integer H greater than 1;
[0039] One of the signal processing circuits including a DDS phase accumulator generates the original input signal after phase-to-amplitude conversion processing and attenuation processing, and the remaining signal processing circuits including DDS phase accumulators generate cancellation signals corresponding to harmonics or cancellation signals corresponding to spurious signals based on the phase values in the phase table to be tested through phase-to-amplitude conversion processing.
[0040] In some embodiments, the signal processing channel is used to process multiple harmonics, or multiple spurious signals, or at least one harmonic and at least one spurious signal. If the value of H is ≥3, the remaining other signal processing circuits including the DDS phase accumulator are used to generate cancellation signals corresponding to multiple harmonics, or cancellation signals corresponding to multiple spurious signals, or cancellation signals corresponding to at least one harmonic and at least one spurious signal respectively.
[0041] The maximum number of times the remaining signal processing circuits including the DDS phase accumulator are called is equal to the sum of the number of harmonics and the number of spurious signals.
[0042] In some embodiments, the signal processing channel also includes a phase counter and a memory, wherein the phase counter is used to accumulate and count the M phase values corresponding to the cancellation signal during traversal, and the memory is used to store each phase value in the phase table to be tested and its corresponding each amplitude estimation value.
[0043] In some embodiments, obtaining a total number L of harmonics and spurious signals to be processed;
[0044] Divide the total number L by H-1 and round up to get the number of times the signal processing channel is called;
[0045] According to the number of times the signal processing channel is called, the phase counter and the memory are reset to clear the amplitude estimation value and the corresponding phase value stored in history.
[0046] According to the third aspect, an embodiment provides a computer-readable storage medium, on which a program is stored, and the program can be executed by a processor to implement the method as described in the first aspect.
[0047] According to the phase estimation method, signal processing channel and storage medium of the above-mentioned embodiment, after the original input signal and the cancellation signal are superimposed, if the phase of the harmonic frequency or spurious frequency corresponding to the original input signal is in phase with the phase of the harmonic frequency or spurious frequency corresponding to the cancellation signal, the amplitude estimation value of the harmonic frequency or spurious frequency corresponding to the phase reaches the maximum value, and vice versa, if the phase is reversed, the amplitude estimation value of the harmonic frequency or spurious frequency corresponding to the phase reaches the minimum value. Therefore, based on traversing each phase value in the phase table to be tested, each amplitude estimation value corresponding to each phase value is obtained, and based on each amplitude estimation value and the corresponding phase value, the phase corresponding to the minimum amplitude estimation value is obtained. Since the phase corresponding to the minimum amplitude estimation value can be obtained mainly by superimposing the cancellation signal and the original input signal, and analyzing the amplitude estimation value corresponding to the harmonic frequency or spurious frequency in the simulated signal to be tested, the phase estimation process is simplified. BRIEF DESCRIPTION OF THE DRAWINGS
[0048] Figure 1 A schematic diagram of the structure of a signal processing channel according to an embodiment;
[0049] Figure 2 A schematic diagram of the structure of a signal processing channel in another embodiment;
[0050] Figure 3 A phase estimation flow chart of a signal processing channel of an embodiment;
[0051] Figure 4 A recording diagram of harmonic amplitudes of an embodiment;
[0052] Figure 5 A flow chart of a phase estimation method according to an embodiment. DETAILED DESCRIPTION
[0053] The present application is further described in detail below by specific embodiments in conjunction with the accompanying drawings. Wherein similar elements in different embodiments use associated similar element numbers. In the following embodiments, many detailed descriptions are intended to enable the present application to be better understood. However, those skilled in the art can easily recognize that some of the features can be omitted in different situations, or can be replaced by other elements, materials, and methods. In some cases, some operations related to the present application are not shown or described in the specification, in order to avoid the core part of the present application being overwhelmed by too much description, and for those skilled in the art, it is not necessary to describe these related operations in detail, and the related operations can be fully understood according to the description in the specification and the general technical knowledge in the art.
[0054] In addition, the features, operations or characteristics described in the specification can be combined in any appropriate manner to form various implementations. At the same time, the steps or actions in the method description can also be interchanged or adjusted in a manner that is obvious to those skilled in the art. Therefore, the various sequences in the specification and the drawings are only for the purpose of clearly describing a certain embodiment and are not meant to be a required sequence, unless otherwise specified that a certain sequence must be followed.
[0055] The serial numbers of the components in this document, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings).
[0056] In some embodiments of the present application, when two signals of the same frequency are superimposed, if the two signals are in phase, the superimposed amplitude will increase, and if the two signals are in anti-phase, the superimposed amplitude will cancel out. The original input signal and the cancellation signal are obtained, and then the cancellation signal and the original input signal are superimposed, and the DAC performs digital-to-analog conversion, and finally the analog signal output by the digital-to-analog converter is analyzed to obtain the amplitude estimation value corresponding to the harmonic frequency or the spurious frequency. If the phase of the harmonic frequency or the spurious frequency corresponding to the original input signal is in phase with the phase of the harmonic frequency or the spurious frequency corresponding to the cancellation signal, the amplitude estimation value of the harmonic frequency or the spurious frequency corresponding to the phase reaches the maximum value, otherwise if the phase is in anti-phase, the amplitude estimation value of the harmonic frequency or the spurious frequency corresponding to the phase reaches the minimum value. Therefore, based on traversing each phase value in the phase table to be measured, each amplitude estimation value corresponding to each phase value is obtained, and based on each amplitude estimation value and the corresponding phase value, the phase corresponding to the minimum amplitude estimation value is obtained. Since the phase corresponding to the minimum amplitude estimation value can be obtained mainly by superimposing the cancellation signal and the original input signal and analyzing the amplitude estimation value corresponding to the harmonic frequency or spurious frequency in the simulated test signal, the phase estimation process is simplified.
[0057] Some embodiments provide a signal processing channel, please refer to Figure 1 The signal processing channel includes at least two DDS phase accumulators 10, and the signal processing circuits where each DDS phase accumulator 10 is located are connected in parallel, and the number of parallel connections is defined as an integer H greater than 1.
[0058] The DDS phase accumulator 10 is used to complete the accumulation of phase values according to the received frequency control word to obtain a phase accumulation value. Figure 2In some embodiments, the components within the signal processing circuit where each DDS phase accumulator 10 is located are connected in series. For example, the DDS phase accumulator 10 includes a phase adder and a phase register connected in series. The phase register is used to output the current accumulated phase to the phase adder. The phase adder adds the frequency control word and the accumulated phase output by the phase register, and sends the result of the addition to the phase register for the next phase accumulation. In some embodiments, the frequency control word can be generated based on a processor, wherein the processor can also be used to adjust the initial phase of the phase register. In some embodiments, the processor can be implemented based on a device with data processing capabilities such as a CPU, an FPGA, and a single-chip microcomputer. Among them, the frequency control word is determined by the frequency of the input signal, the clock frequency, and the total number of bits of the DDS phase accumulator 10.
[0059] In some embodiments, the signal processing circuit where each DDS phase accumulator 10 is located can be configured with a phase amplitude mapping module 20, and the phase amplitude mapping module 20 is used to obtain the corresponding signal amplitude according to the phase accumulation value output by the corresponding DDS phase accumulator 10, and output the corresponding digital waveform signal. In some embodiments, the phase amplitude mapping module 20 can obtain the signal amplitude corresponding to the phase accumulation value based on a phase lookup table, for example, the phase lookup table can be a sine lookup table. In some embodiments, the phase amplitude mapping module 20 can also calculate the signal amplitude corresponding to the phase accumulation value in real time based on algorithms such as coordinate rotation.
[0060] In some embodiments, the signal processing circuits where the DDS phase accumulators 10 are located may also share a phase-amplitude mapping module 20 , for example, the phase-amplitude mapping module 20 is multiplexed between the DDS phase accumulators 10 .
[0061] In some embodiments, the digital waveform signal output by the phase amplitude mapping module 20 can be converted from digital to analog by the digital-to-analog conversion unit 30 to output an analog waveform signal. In some embodiments, the digital-to-analog conversion unit 30 can realize the digital-to-analog conversion of the signal based on an analog-to-digital converter. In some embodiments, the digital-to-analog conversion unit 30 can also include a signal adder, which is used to superimpose multiple digital waveform signals and then output them to the analog-to-digital converter to realize the digital-to-analog conversion of the superimposed signal.
[0062] In the above embodiment, each signal processing circuit including a DDS phase accumulator 10 is used to generate a digital waveform signal. Therefore, each time the signal processing circuit is adjusted, a digital waveform signal can be generated to correspond to a harmonic or spurious cancellation signal, and each time the signal processing channel is adjusted, a plurality of digital waveform signals corresponding to the number of DDS phase accumulators 10 can be generated to correspond to multiple harmonics, or multiple spurious signals, or spurious and harmonic cancellation signals.
[0063] The above is some description of the signal processing channel, please refer to Figure 3 ,The following describes the process of phase estimation based on the signal processing channel in detail.
[0064] The original input signal is obtained, wherein one of the signal processing channels includes a signal processing circuit of a DDS phase accumulator 10, and generates the original input signal after phase-amplitude conversion processing and attenuation processing.
[0065] In some embodiments, the signal processing circuit may further include an attenuator, so that attenuation processing of the signal is performed based on the attenuator.
[0066] In some embodiments, the harmonics of the original input signal may include one harmonic or multiple harmonics, for example, the second harmonic or the third harmonic, or multiple harmonics such as the second harmonic and the third harmonic, so the cancellation signal may be a signal corresponding to the second harmonic or the third harmonic, or a signal corresponding to multiple harmonics such as the second harmonic and the third harmonic. In some embodiments, the spurious of the original input signal may include one spurious or multiple spurious, so the cancellation signal may be a signal corresponding to one spurious, or a signal corresponding to multiple spurious. In this embodiment, the harmonics and spurious of the original input signal refer to the harmonics and spurious generated after the original input signal is input into the DAC.
[0067] The cancellation signal is obtained, and the remaining signal processing circuits including the DDS phase accumulator 10 in the signal processing channel are subjected to phase-amplitude conversion processing based on the phase value in the phase table to be measured to generate a cancellation signal corresponding to the harmonic or a cancellation signal corresponding to the spurious.
[0068] In some embodiments, before obtaining the cancellation signal, the original input signal may be input into a digital-to-analog converter for digital-to-analog conversion to obtain an analog input signal corresponding to the output of the digital-to-analog converter, and then the analog input signal may be subjected to spectrum analysis to obtain an estimated amplitude value of the harmonics of the original input signal. Alternatively, the spurious frequency and spurious amplitude value of the original input signal may be obtained, for example, based on the spurious frequency and spurious amplitude value of the original input signal known by other measuring equipment.
[0069] In some embodiments, the analog input signal may be converted into a digital signal based on an analog-to-digital converter to obtain a corresponding digital signal, and then the digital signal may be transformed from the time domain to the frequency domain based on a processor or an external data processing device, such as performing a fast Fourier transform (FFT) process, and then analyzing the transformed frequency domain signal to obtain an amplitude estimate of the harmonic of the original input signal. Since the frequency of the FFT may have a deviation, the obtained amplitude estimate may be selected as the amplitude corresponding to the harmonic frequency of the harmonic, or may be selected as the maximum amplitude within a frequency range around the harmonic frequency.
[0070] A cancellation signal is generated based on the harmonic frequency and harmonic amplitude values of the harmonics of the original input signal or based on the spurious frequency and spurious amplitude values of the spurs of the original input signal and any phase value in the phase table to be measured.
[0071] In some embodiments, M phase values uniformly distributed in the phase range [a, a+π] are divided according to a preset phase interval to generate a phase table to be measured. Wherein, a is a phase greater than or equal to 0 and less than or equal to π, and in some embodiments, a can take a value of 0. In this embodiment, after the original input signal is superimposed with the cancellation signal, the amplitude estimation value corresponding to the harmonic or spurious signal and the phase value in the phase table to be measured have a specific relationship, for example, when the phase value is the same as the phase of the corresponding harmonic or spurious signal, the amplitude estimation value reaches a maximum value, and vice versa, when the phase is reversed, the amplitude estimation value reaches a minimum value, and the change of the amplitude estimation value is symmetrical based on the change of the phase value in the phase table to be measured, that is, the change of the amplitude estimation value corresponding to the phase value in any π range is symmetrical with the change of the amplitude estimation value corresponding to the phase value in another π range. Therefore, the phase table to be measured is generated based on any π range, and the phase estimation can be performed based on the symmetry, thereby reducing the amount of calculation to simplify the complexity of the process. In some embodiments, the selected phase can be formed into a corresponding phase table to be measured and stored, so that it can be adjusted directly based on the phase in the phase table to be measured.
[0072] In some embodiments, an estimated phase empirical value is obtained, and a phase table to be measured is generated based on the estimated phase empirical value. In some embodiments, M phase values uniformly distributed may be selected based on the front and rear ranges of the estimated phase empirical value to generate the phase table to be measured, for example, the estimated phase empirical value is taken as the center position, and M phase values uniformly distributed are selected in a preset range greater than the estimated phase empirical value and a preset range less than the estimated phase empirical value. In some embodiments, for each original input signal without an estimated phase empirical value, the phase table to be measured generated based on the phase range [a, a+π] may be shared, and for each original input signal with an estimated phase empirical value, the phase table to be measured generated based on the estimated phase empirical value may be used.
[0073] In some embodiments, after the known input signal is input into the DAC, the phase estimation value corresponding to the harmonic frequency or spurious frequency of the known input signal is obtained, wherein, since there is a certain relationship between the frequency of the signal and the phase of the signal, the phase corresponding to the harmonic frequency or spurious frequency of the original input signal can be estimated based on the frequency of the known input signal and the phase estimation value corresponding to the harmonic frequency or spurious frequency of the known input signal. For example, if the frequency between the known input signal and the original input signal is different, based on the frequency relationship between the known input signal and the original input signal, the estimated phase empirical value corresponding to the harmonic of the original input signal is obtained from the phase estimation value corresponding to the harmonic, or based on the frequency relationship between the known input signal and the original input signal, and the frequency relationship between the spurious frequency of the spurious of the known input signal and the spurious frequency of the spurious of the original input signal, the estimated phase empirical value corresponding to the spurious of the original input signal is obtained from the phase estimation value corresponding to the spurious. For example, if the frequency between the known input signal and the original input signal is the same, the phase estimation value corresponding to the harmonic is used as the estimated phase empirical value corresponding to the harmonic of the original input signal. For example, if the spurious frequency of the spurious input signal is known to be the same as the spurious frequency of the original input signal, the phase estimation value corresponding to the spurious frequency is used as the estimated phase empirical value corresponding to the spurious of the original input signal.
[0074] In the above embodiment, when signals of the same frequency are input to the same digital-to-analog converter, the phases corresponding to the generated harmonics are substantially consistent. Therefore, for a known input signal for which phase estimation has been completed, the estimated phase position obtained can be used for subsequent processing without the need for repeated acquisition. In addition, for an original input signal for which phase estimation has not been completed, the phase of the harmonic corresponding to the original input signal can be predicted based on the phase of the harmonic of the known input signal, and then the phase of the original input signal can be estimated based on the predicted phase, thereby further simplifying the acquisition complexity and improving the accuracy of the phase estimation.
[0075] In some embodiments, when generating a cancellation signal, for harmonics, the frequency of the corresponding cancellation signal is the harmonic frequency of the harmonic of the original input signal, and for spurious, the frequency of the corresponding cancellation signal is the spurious frequency of the spurious of the original input signal.
[0076] In some embodiments, when the original input signal is obtained by attenuation, the amplitude of the digital signal to be measured after the original input signal is superimposed with the cancellation signal can be made to meet the maximum input range of the digital-to-analog converter or be less than the maximum input range. In some embodiments, when the amplitude of the digital signal to be measured meets the maximum input range of the digital-to-analog converter, the digital-to-analog converter can be fully utilized to improve the subsequent data processing accuracy. In some embodiments, the amplitude of the original input signal attenuation can be controlled by a processor or by an external data processing device.
[0077] In some embodiments, the remaining other signal processing circuits including the DDS phase accumulator 10 may generate a cancellation signal corresponding to a harmonic or a cancellation signal corresponding to a spurious signal. In some embodiments, the remaining other signal processing circuits including the DDS phase accumulator 10 may generate cancellation signals corresponding to multiple harmonics, or cancellation signals corresponding to multiple spurious signals, or cancellation signals corresponding to at least one harmonic and at least one spurious signal. The cancellation signals may be generated separately based on multiple signal processing circuits including the DDS phase accumulator 10, or may be generated by multiplexing based on one signal processing circuit including the DDS phase accumulator 10.
[0078] For example, if the value of H is ≥3, the remaining other paths including the signal processing circuit of the DDS phase accumulator 10 are used to generate cancellation signals corresponding to multiple harmonics, or cancellation signals corresponding to multiple spurious signals, or cancellation signals corresponding to at least one harmonic and at least one spurious signal. The maximum number of times the remaining other paths including the signal processing circuit of the DDS phase accumulator 10 are called is equal to the sum of the number of harmonics and the number of spurious signals, wherein each time the signal processing circuit is called, a cancellation signal corresponding to a harmonic or a cancellation signal corresponding to a spurious signal is generated.
[0079] The cancellation signal and the original input signal are superimposed to obtain a digital test signal, the digital test signal is input into a DAC for digital-to-analog conversion to obtain an analog test signal, and the analog test signal is subjected to spectrum analysis to obtain an amplitude estimation value of a harmonic frequency or a spurious frequency corresponding to any phase value.
[0080] In some embodiments, the analog signal to be tested can also be converted into digital form based on an analog-to-digital converter to obtain a corresponding digital signal, and then the processor or external data processing device transforms the digital signal from the time domain to the frequency domain, such as performing a fast Fourier transform (FFT) process, and then analyzing the transformed frequency domain signal to obtain an amplitude estimation value corresponding to the harmonic frequency or spurious frequency in the analog signal to be tested. In some embodiments, the analog signal to be tested can also be directly input into a spectrum analyzer for spectrum analysis.
[0081] The cancellation signals corresponding to the M phase values are traversed to obtain M amplitude estimation values corresponding to the M phase values, and the phase corresponding to the minimum amplitude estimation value is obtained based on the M amplitude estimation values and the corresponding phase values.
[0082] In some embodiments, when traversing, the signal processing channel may also include a phase counter and a memory, the phase counter is used to accumulate and count the M phase values corresponding to the cancellation signal during traversal, and the memory is used to store each phase value in the phase table to be tested and its corresponding amplitude estimation values.
[0083] In some embodiments, the minimum value among the M amplitude estimation values is obtained, and it is determined whether the minimum value among the M amplitude estimation values is a minimum value. If it is a minimum value, the phase corresponding to the minimum value is determined to be the phase corresponding to the amplitude estimation minimum value. If it is not a minimum value, the maximum value among the M amplitude estimation values is obtained, and the phase corresponding to the amplitude estimation minimum value is determined according to the phase corresponding to the maximum value.
[0084] In some embodiments, the M phase values in the phase table to be measured are sorted by size and correspond to labels 1-M respectively, for example, sorted from small to large or from large to small. Then, when judging whether the minimum value among the M amplitude estimation values is a minimum value, it is judged whether the label m corresponding to the minimum value among the M amplitude estimation values is between (1, M), where 1≤m≤M, and m is a positive integer. If the label m is between (1, M), that is, it is not the label of the two end points, then it is determined that the phase corresponding to the minimum value is the phase corresponding to the minimum value of the amplitude estimation. If the label m is not between (1, M), that is, it is the label of the two end points, then it is determined that the minimum value is not a minimum value.
[0085] In this embodiment, since the amplitude estimation value changes with the phase value in a certain regular pattern, such as a sinusoidal wave-like change, first increasing and then decreasing or first decreasing and then increasing, the maximum value in the amplitude estimation value is usually also the maximum value, and the minimum value in the amplitude estimation value is usually also the minimum value.
[0086] In some embodiments, when determining the phase corresponding to the minimum value of the amplitude estimate based on the phase corresponding to the maximum value, the phase corresponding to the maximum value is shifted by a preset phase so that the shifted phase corresponds to the minimum value of the amplitude estimate, and the shifted phase is output, where the shifted phase is the phase corresponding to the minimum value of the amplitude estimate. In this embodiment, when the minimum value does not meet the minimum value condition, since the phase corresponding to the maximum value or the maximum value is in antiphase with the phase corresponding to the minimum value, the phase corresponding to the minimum value of the amplitude estimate can be determined based on the maximum value or the maximum value.
[0087] In some embodiments, if the phase value corresponding to the maximum value is between [0, π), the preset phase of the translation is π, and if the phase value corresponding to the maximum value is between [π, 2π), the preset phase of the translation is -π. The phase after translation is the sum of the phase value corresponding to the maximum value and the preset phase of the translation. In this embodiment, based on the phase range in which the phase value corresponding to the maximum value is located, different addition and subtraction operations are performed on the phase value corresponding to the maximum value, so that the phase after translation is always a positive value, which is convenient for subsequent use and calculation.
[0088] In the above embodiments, the signal processing channel can process at least one harmonic or spurious wave, or can process harmonics and spurious waves. In some embodiments, the total number L of harmonics and spurious waves to be processed is obtained, the total number L is divided by H-1 and rounded up to obtain the number of times the signal processing channel is called, and the phase counter and the memory are reset according to the number of times the signal processing channel is called to clear the amplitude estimation value and its corresponding phase value stored in history. Each time the signal processing channel is called, H-1 harmonics or spurious waves can be processed.
[0089] In some embodiments, a reset operation is required when calling a signal processing channel to avoid mutual interference. For example, if it is detected that the signal processing channel has been cleared before being called, no reset is required; if it is detected that the signal processing channel has not been cleared before being called, a reset and clearing operation is required. Therefore, when resetting the phase counter and the memory according to the number of times the signal processing channel is called, the number of times the signal processing channel is called can be the same as the number of resets. For example, a reset and clearing operation is performed before each call to the signal processing channel. When it is detected that the signal processing channel has been cleared, the number of times the signal processing channel is called can be less than the number of resets.
[0090] The following is an illustration through specific embodiments.
[0091] Assume that the input frequency f_in of the original input signal is 30MHz, then calculate the frequency control word based on the input frequency f_in, and then calculate the phase sequence output by the DDS phase accumulator 10, address the sine lookup table according to the output phase sequence, obtain the full-scale signal, and then multiply the full-scale signal by the attenuation coefficient α=0.95 and input it to the DAC. Assuming that the harmonics to be estimated are the second harmonic and the third harmonic, their frequencies are f_2=2*f_in=60MHz and f_3=3*f_in=90MHz respectively.
[0092] Assume that the number of phase points selected from the phase range [0,π] is M = 20, then the phase value of the mth phase point in the phase table to be measured is set to In some embodiments, when obtaining the estimated phase empirical value, a phase value is selected near the estimated phase empirical value. For example, if the estimated phase empirical value is π / 4, then
[0093] First, the original input signal is input into the DAC, and the ADC is used to sample the output signal of the DAC, and then FFT is performed to record the original amplitude estimation values of the second harmonic f_2 and the third harmonic f_3 respectively. Since the frequency of the FFT may have deviations, the recorded amplitude can be selected as the maximum value within a given range around f_2 and f_3.
[0094] Select a phase value θ_m from the phase table to be tested in order, and generate the corresponding harmonic cancellation signal according to the second harmonic frequency f_2, the third harmonic frequency f_3 and the corresponding original harmonic amplitude value. The generation process of the cancellation signal is similar to that of the original input signal. Its input frequency is the frequency of the harmonic, and then the frequency control word and phase sequence are calculated in sequence to obtain the full-scale signal, that is, the original amplitude estimation value. The cancellation signal is superimposed on the original input signal and input into the DAC to obtain the simulated phase test signal output by the DAC.
[0095] When the original input signal is a signal related to θ_m, the corresponding simulated phase test signal is input into the DAC, and the ADC is used to sample the output signal of the DAC, and then FFT is performed, and the amplitude A_(m_2) corresponding to the second harmonic and the amplitude A_(m_3) corresponding to the third harmonic are recorded, m = 0, 1, ..., 19. For example, please refer to Figure 4 , where the phase number is divided into phase values corresponding to 0-19, and the estimated amplitude value is the recorded amplitude corresponding to the phase number.
[0096] After completing the test of all phase points, select the extreme values from all recorded second harmonic and third harmonic amplitudes A_(m_2) / A_(m_3), m=0,1,…,19. If there is no extreme value, select the minimum or maximum value for output. Among them, if there is an extreme value and the extreme value is a minimum value, the phase value θ_m corresponding to the output value A_(m_i) is output as the harmonic phase of the i-th harmonic, and the subscript i represents the i-th harmonic. If the extreme value is a maximum value, the phase value θ_m corresponding to the output value A_(m_i) is increased by π or subtracted by π and output as the harmonic phase of the i-th harmonic, and the subscript i represents the i-th harmonic.
[0097] The above is the description of the signal processing channel.
[0098] Some embodiments provide a phase estimation method, which can be applied to the above-mentioned signal processing channel. Figure 5 , the harmonic phase acquisition method includes the following steps:
[0099] Step 100: Obtain an original input signal and a cancellation signal. The cancellation signal is generated based on the harmonic frequency and harmonic amplitude value of the harmonics of the original input signal or based on the spurious frequency and spurious amplitude value of the spurious of the original input signal, and any phase value in the phase table to be tested; wherein the phase table to be tested includes M phase values, and M is a positive integer greater than 1.
[0100] Step 110: superimpose the cancellation signal and the original input signal to obtain a digital signal to be tested.
[0101] Step 120: Obtain an estimated value of the amplitude of the harmonic frequency or spurious frequency corresponding to the phase value. Input the digital signal to be tested into the DAC for digital-to-analog conversion to obtain an analog signal to be tested, perform spectrum analysis on the analog signal to be tested, and obtain an estimated value of the amplitude of the harmonic frequency or spurious frequency corresponding to any phase value.
[0102] Step 130: Obtain the phase corresponding to the minimum amplitude estimation value. Traverse the cancellation signals corresponding to the M phase values to obtain M amplitude estimation values corresponding to the M phase values, and obtain the phase corresponding to the minimum amplitude estimation value based on the M amplitude estimation values and the corresponding phase values.
[0103] Some embodiments provide a computer-readable storage medium having a program stored thereon, which can be executed by a processor to implement the above-mentioned phase estimation method.
[0104] Those skilled in the art will appreciate that all or part of the functions of the various methods in the above-mentioned embodiments can be implemented by hardware or by computer programs. When all or part of the functions in the above-mentioned embodiments are implemented by computer programs, the program can be stored in a computer-readable storage medium, and the storage medium can include: read-only memory, random access memory, disk, optical disk, hard disk, etc., and the program is executed by a computer to implement the above-mentioned functions. For example, the program is stored in the memory of the device, and when the program in the memory is executed by the processor, all or part of the above-mentioned functions can be implemented. In addition, when all or part of the functions in the above-mentioned embodiments are implemented by computer programs, the program can also be stored in a storage medium such as a server, another computer, disk, optical disk, flash disk or mobile hard disk, and can be downloaded or copied and saved in the memory of the local device, or the system of the local device is updated, and when the program in the memory is executed by the processor, all or part of the functions in the above-mentioned embodiments can be implemented.
[0105] The above specific examples are used to illustrate the present application, which is only used to help understand the present application and is not intended to limit the present application. For technicians in the technical field to which the present application belongs, they can also make some simple deductions, deformations or substitutions based on the ideas of the present application.
Claims
1. A phase estimation method, characterized in that: include: Acquire an original input signal and a cancellation signal, wherein the cancellation signal is generated based on the harmonic frequency and harmonic amplitude value of the harmonics of the original input signal or based on the spurious frequency and spurious amplitude value of the spurious of the original input signal, and any phase value in a phase table to be measured; wherein the phase table to be measured includes M phase values, and M is a positive integer greater than 1; Superimposing the cancellation signal and the original input signal to obtain a digital signal to be tested; Inputting the digital signal to be tested into a DAC for digital-to-analog conversion to obtain an analog signal to be tested, performing spectrum analysis on the analog signal to be tested, and obtaining an amplitude estimation value of a harmonic frequency or a spurious frequency corresponding to any phase value; The cancellation signals corresponding to the M phase values are traversed to obtain M amplitude estimation values corresponding to the M phase values, and the phase corresponding to the minimum amplitude estimation value is obtained based on the M amplitude estimation values and the corresponding phase values.
2. The phase estimation method according to claim 1, characterized in that: The obtaining, based on the M amplitude estimation values and the corresponding phase values, a phase corresponding to the minimum amplitude estimation value comprises: Obtaining a minimum value among the M amplitude estimation values; Determine whether the minimum value among the M amplitude estimation values is a minimum value; If it is a minimum value, determining the phase corresponding to the minimum value is the phase corresponding to the amplitude estimation minimum value; If it is not a minimum value, the maximum value among the M amplitude estimation values is obtained, and the phase corresponding to the amplitude estimation minimum value is determined according to the phase corresponding to the maximum value.
3. The phase estimation method according to claim 2, characterized in that: The M phase values are sorted according to their magnitudes and correspond to numbers 1-M respectively; The determining whether the minimum value among the M amplitude estimation values is a minimum value comprises: If it is determined that the index m corresponding to the minimum value among the M amplitude estimation values is between (1, M), then it is determined that the minimum value among the M amplitude estimation values is a minimum value; If it is determined that the index m corresponding to the minimum value among the M amplitude estimation values is outside (1, M), it is determined that the minimum value among the M amplitude estimation values is not a minimum value; Wherein, 1≤m≤M, and m is a positive integer.
4. The phase estimation method according to claim 2, characterized in that: The determining, according to the phase corresponding to the maximum value, the phase corresponding to the amplitude estimation minimum value comprises: Shifting the phase corresponding to the maximum value by a preset phase so that the shifted phase corresponds to the amplitude estimation minimum value; The shifted phase is output, where the shifted phase is the phase corresponding to the minimum value of the amplitude estimation.
5. The phase estimation method according to claim 4, characterized in that: If the phase value corresponding to the maximum value is between [0, π), the preset phase of the translation is π; If the phase value corresponding to the maximum value is between [π, 2π), the preset phase of the translation is -π; The shifted phase is the sum of the phase value corresponding to the maximum value and the shifted preset phase.
6. The phase estimation method according to claim 1, wherein: The phase table to be measured is generated in the following manner: M phase values are divided from the phase range [a, a+π] according to a preset phase interval to generate the phase table to be measured; wherein a is a phase greater than or equal to 0 and less than or equal to π. or, Obtain estimated phase empirical values, and generate the phase table to be measured according to the estimated phase empirical values.
7. The phase estimation method according to claim 6, characterized in that: The obtaining of the estimated phase empirical value comprises: Obtaining a phase estimation value corresponding to a harmonic frequency or a spurious frequency of a known input signal after the known input signal is input into the DAC; Based on the frequency relationship between the known input signal and the original input signal, the estimated phase empirical value corresponding to the harmonic of the original input signal is obtained from the phase estimation value; or, Based on the frequency relationship between the known input signal and the original input signal, and the frequency relationship between the spurious frequency of the known input signal and the spurious frequency of the original input signal, the estimated phase empirical value corresponding to the spur of the original input signal is obtained from the phase estimation value.
8. The phase estimation method according to claim 1, characterized in that: The performing spectrum analysis on the simulated signal to be tested comprises: Inputting the simulated signal to be tested into a spectrum analyzer for spectrum analysis; or, The simulated signal to be tested is input into an analog-to-digital converter for analog-to-digital conversion and then subjected to Fourier transform processing for spectrum analysis.
9. The phase estimation method according to claim 1, characterized in that: For harmonics, the frequency of the corresponding cancellation signal is the harmonic frequency of the harmonic of the original input signal; For spurious signals, the frequency of the corresponding cancellation signal is the spurious frequency of the spurious signals of the original input signal.
10. A signal processing channel, characterized in that: Used to implement the phase estimation method according to any one of claims 1 to 9, the signal processing channel includes at least two DDS phase accumulators, and the signal processing circuits where each of the DDS phase accumulators is located are connected in parallel, and the number of parallel connections is defined as an integer H greater than 1; One of the signal processing circuits including a DDS phase accumulator generates the original input signal after phase-to-amplitude conversion processing and attenuation processing, and the remaining signal processing circuits including DDS phase accumulators generate cancellation signals corresponding to harmonics or cancellation signals corresponding to spurious signals based on the phase values in the phase table to be tested through phase-to-amplitude conversion processing.
11. The signal processing channel according to claim 10, characterized in that The signal processing channel is used to process multiple harmonics, or multiple spurious signals, or at least one harmonic and at least one spurious signal. If the value of H is ≥3, the remaining signal processing circuits including the DDS phase accumulator are used to generate cancellation signals corresponding to multiple harmonics, or cancellation signals corresponding to multiple spurious signals, or cancellation signals corresponding to at least one harmonic and at least one spurious signal respectively. The maximum number of times the remaining signal processing circuits including the DDS phase accumulator are called is equal to the sum of the number of harmonics and the number of spurious signals.
12. The signal processing channel according to claim 11, characterized in that The signal processing channel also includes a phase counter and a memory. The phase counter is used to accumulate and count the M phase values corresponding to the cancellation signal during traversal, and the memory is used to store each phase value in the phase table to be tested and each corresponding amplitude estimation value.
13. The signal processing channel according to claim 12, characterized in that: Obtain the total number L of harmonics and spurious signals to be processed; Divide the total number L by H-1 and round up to get the number of times the signal processing channel is called; According to the number of times the signal processing channel is called, the phase counter and the memory are reset to clear the amplitude estimation value and the corresponding phase value stored in history.
14. A computer-readable storage medium, characterized in that: The medium stores a program, which can be executed by a processor to implement the method according to any one of claims 1 to 9.