Line adaptive fault ride-through method based on excitation transformer tap quick zeroing

Abstract

The application provides a line adaptive fault ride-through method based on excitation transformer gear quick zero adjustment, which comprises the following steps: configuring a mutual exclusion thyristor group on the secondary side of a symmetric double-core phase-shifting transformer and setting a monitoring point on the primary side; when the monitoring point receives a line fault signal, a trigger pulse is applied to the thyristor pair corresponding to the zero gear tap of the excitation transformer to remove the trigger pulse of the remaining thyristor pairs; the equivalent impedance of the zero gear is obtained according to the nameplate parameters; the first impedance is obtained by compensating the measured impedance of the current line according to the equivalent impedance of the zero gear; the second impedance is obtained by compensating the measured impedance of the adjacent line according to the equivalent impedance of the zero gear; and the line fault is judged and acted according to the first impedance and the second impedance. The application utilizes the control strategy of the thyristor group during the line fault and the adaptive compensation algorithm of the distance protection to eliminate the influence of the symmetric double-core phase-shifting transformer on the line distance protection.

Description

Technical Field

[0001] The present invention relates to the technical field of dual-core phase-shifting transformer protection, and in particular to a line adaptive fault ride-through method based on rapid zeroing of an excitation transformer gear. Background Art

[0002] The power system needs to vigorously develop renewable energy generation and integrate it into the grid. However, the integration of a high proportion of renewable energy into the grid may bring a series of problems to the power system. Therefore, in order to ensure that the power system has high flexibility and regulation capabilities, corresponding measures must be taken. The application of power flow control equipment can effectively improve power flow distribution and enhance the transmission capacity of the power grid, and is an important means of regulating the power system. The dual-core phase-shifting transformer is a device used for power flow regulation. It consists of two parts: a series transformer and an excitation transformer. It can adjust the phase of the current and voltage of the transmission line to achieve line power flow regulation.

[0003] However, due to the phase-shifting function and equivalent impedance of the phase-shifting transformer itself, when adjusting the power flow at different gears, the original line impedance distribution, voltage and current signals in the power system will inevitably change to varying degrees. These signals are important configuration and setting basis for line distance protection. When a fault occurs, it may cause the protection to refuse to operate or malfunction, and may also have a certain impact on the line fault location.

[0004] In summary, phase-shifting transformers play an important role as devices for power flow regulation. However, the adaptability of symmetrical dual-core phase-shifting transformers for line protection still faces challenges in engineering configuration and implementation. Further research and improvement are needed, as well as the development of new fault ride-through solutions. Summary of the Invention

[0005] In response to the problems existing in the prior art, the present invention provides a line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position, which utilizes the control strategy of the thyristor group and the distance protection adaptive compensation algorithm during line faults to eliminate the influence of the connection of a symmetrical double-core phase-shifting transformer on the line distance protection.

[0006] To achieve the above object, the present invention adopts the following technical solution: a line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear, comprising the following steps:

[0007] A mutually exclusive thyristor group is configured on the secondary side of each phase of the excitation transformer of a symmetrical dual-core phase-shifting transformer; the mutually exclusive thyristor group includes a plurality of thyristor pairs, each of which includes two thyristors connected in reverse parallel; a plurality of gear taps are provided on the secondary winding of each phase of the excitation transformer, and the gear taps correspond one-to-one with the thyristor pairs; one end of each thyristor pair is connected to the corresponding gear tap, and the other end of each thyristor pair is connected to the output terminal of each phase of the excitation transformer; the gear taps include at least a zero-gear tap;

[0008] The primary side common terminal of each phase of the excitation transformer is grounded, and a monitoring point is respectively set between the primary side common terminal of each phase of the excitation transformer and the grounding point;

[0009] When the monitoring point receives a line fault signal, applying a trigger pulse to the thyristor pair corresponding to the zero-speed tap of each phase of the excitation transformer, and removing the trigger pulses of the remaining thyristor pairs;

[0010] Obtaining nameplate parameters of the symmetrical double-core phase-shifting transformer; obtaining the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters;

[0011] Acquire the current level line and adjacent lines based on the symmetrical double-core phase-shifting transformer;

[0012] Acquire the measured impedance of the current-stage line according to the current-stage line, and acquire the measured impedance of the adjacent line according to the adjacent line;

[0013] Compensating the measured impedance of the current-stage circuit according to the zero-range equivalent impedance to obtain a first impedance;

[0014] Compensating the measured impedance of the adjacent line according to the zero-range equivalent impedance to obtain a second impedance;

[0015] A line fault is determined and action is taken according to the first impedance and the second impedance.

[0016] Furthermore, the nameplate parameters include the primary winding impedance of the series transformer, the secondary winding impedance of the series transformer and the transformation ratio of the series transformer.

[0017] Furthermore, a plurality of zero-crossing points are provided on the primary winding of each phase of the excitation transformer, and the zero-crossing points correspond one-to-one to the gear taps. When the primary side of any phase of the excitation transformer receives a line fault signal, a trigger pulse is applied to the corresponding thyristor pair at the zero-crossing point corresponding to the zero-gear tap.

[0018] Further, the primary side and the secondary side of the series transformer of the symmetrical double-core phase-shifting transformer are respectively connected in a delta shape.

[0019] Further, the primary side and the secondary side of the excitation transformer of the symmetrical double-core phase-shifting transformer are respectively connected in a star shape.

[0020] Further, one of the tap taps on the secondary side winding of the excitation transformer of the symmetrical double-core phase-shifting transformer is provided with one of the tap taps.

[0021] A fault ride-through protection circuit for implementing the line adaptive fault ride-through method based on the rapid zero adjustment of the tap of the excitation transformer, comprising the symmetrical double-core phase-shifting transformer and three of the mutually exclusive thyristor groups;

[0022] The symmetrical double-core phase-shifting transformer comprises a series transformer and an excitation transformer; each phase of the excitation transformer is provided with one of the mutually exclusive thyristor groups on the secondary side, and each phase of the excitation transformer is provided with a plurality of tap taps on the secondary side winding; the primary side common end of each phase of the excitation transformer is grounded, and each phase of the excitation transformer is provided with one of the monitoring points between the primary side common end and the grounding point.

[0023] The mutually exclusive thyristor group comprises a plurality of thyristor pairs, and the tap taps and the thyristor pairs are in one-to-one correspondence; each of the thyristor pairs comprises two thyristors connected in anti-parallel, one end of each of the thyristor pairs is connected to the corresponding tap tap, and the other end of each of the thyristor pairs is connected to the output end of each phase of the excitation transformer; the tap taps at least comprise a zero tap tap.

[0024] Further, the series transformer comprises a first transformer, a second transformer and a third transformer, and the excitation transformer comprises a fourth transformer, a fifth transformer and a sixth transformer.

[0025] The primary side of the first transformer is connected in series on the A-phase bus, the primary side of the second transformer is connected in series on the B-phase bus, and the primary side of the third transformer is connected in series on the C-phase bus.

[0026] The primary side winding of the first transformer is provided with a first tap, the primary side winding of the second transformer is provided with a second tap, and the primary side winding of the third transformer is provided with a third tap.

[0027] The fourth transformer comprises a first input end, a first common end, a first reference end and a first output end, the fifth transformer comprises a second input end, a second common end, a second reference end and a second output end, and the sixth transformer comprises a third input end, a third common end, a third reference end and a third output end.

[0028] The first tap is connected to the first input terminal, the second tap is connected to the second input terminal, and the third tap is connected to the third input terminal;

[0029] The first common terminal, the second common terminal and the third common terminal are grounded respectively, and a monitoring point is respectively provided between the first common terminal and the grounding point, between the second common terminal and the grounding point, and between the third common terminal and the grounding point;

[0030] The first reference terminal, the second reference terminal and the third reference terminal are grounded respectively;

[0031] The first end of the secondary side of the first transformer and the tail end of the secondary side of the second transformer are respectively connected to the third output end, the first end of the secondary side of the second transformer and the tail end of the secondary side of the third transformer are respectively connected to the first output end, and the first end of the secondary side of the third transformer and the tail end of the secondary side of the first transformer are respectively connected to the second output end.

[0032] Furthermore, a plurality of the gear taps are evenly arranged between the zero gear position and the full gear position on the secondary winding of the excitation transformer.

[0033] An electronic device for implementing the line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position, comprising a monitoring module, a control module, a calculation module and a fault determination module;

[0034] The monitoring module:

[0035] for receiving a line fault signal from the monitoring point and generating a fault feedback signal to send to the control module;

[0036] The control module:

[0037] Used to receive the fault feedback signal;

[0038] for applying a trigger pulse to the thyristor pair corresponding to the zero-speed tap of each phase of the excitation transformer according to the line feedback signal, and removing the trigger pulses of the remaining thyristor pairs;

[0039] Used to send a control feedback signal to the calculation module;

[0040] The calculation module:

[0041] Used to calculate the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters of the symmetrical double-core phase-shifting transformer;

[0042] Used to obtain the current level line and adjacent lines based on the symmetrical double-core phase-shifting transformer;

[0043] Used to obtain the measured impedance of the current-level line according to the current-level line, and obtain the measured impedance of the adjacent line according to the adjacent line;

[0044] Used to receive the control feedback signal;

[0045] Used to compensate the measured impedance of the current stage circuit according to the zero-gear equivalent impedance based on the control feedback signal to obtain a first impedance;

[0046] for compensating the measured impedance of the adjacent line according to the zero-gear equivalent impedance based on the control feedback signal to obtain a second impedance;

[0047] for sending the first impedance and the second impedance to the fault determination module;

[0048] The fault determination module.

[0049] Used to identify and take action on line faults based on the first impedance and the second impedance.

[0050] Compared with the prior art, the present invention has the following beneficial effects:

[0051] Based on the structure of a symmetrical dual-core phase-shifting transformer, the present invention installs a mutually exclusive thyristor group on the secondary side of the excitation transformer of the symmetrical dual-core phase-shifting transformer, utilizes the control strategy of the thyristor group during line faults and the adaptive compensation algorithm for distance protection, thereby eliminating the influence of the access of the symmetrical dual-core phase-shifting transformer on the line distance protection, and has guiding significance for the engineering application and promotion of the symmetrical dual-core phase-shifting transformer. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 Schematic diagram of the flow of the line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to the present invention;

[0053] Figure 2 This is a schematic diagram of the main structure of the symmetrical double-core phase-shifting transformer of the present invention after connecting to the mutually exclusive thyristor group and the CT configuration diagram;

[0054] Figure 3 This is a structural diagram of the excitation transformer of the present invention connected to a mutually exclusive thyristor group;

[0055] Figure 4 This is a single-phase equivalent circuit diagram of the symmetrical double-core phase-shifting transformer of the present invention;

[0056] Figure 5 This is a schematic diagram of a symmetrical dual-core phase-shifting transformer connected to a double-terminal power supply system according to an embodiment of the present invention;

[0057] Figure 6 It is a schematic diagram of the principle structure of the electronic device of the present invention.

[0058] Among them, the figure markings are: 11, A phase bus; 12, B phase bus; 13, C phase bus; 201, series transformer; 202, excitation transformer; 21, first transformer; 211, first tap; 22, second transformer; 221, second tap; 23, third transformer; 231, third tap; 24, fourth transformer; 241, first input terminal; 242, first common terminal; 243, first reference terminal; 244, first output terminal; 25, fifth transformer; 251, second input terminal; 252, second common terminal; 253, second reference terminal; 254, second output terminal; 26, sixth transformer; 261, third input terminal; 262, third common terminal; 263, third reference terminal; 264, third output terminal; 27, mutually exclusive thyristor group; 271, thyristor pair; 272, gear tap; 28, monitoring point. DETAILED DESCRIPTION

[0059] It is worth noting that the methods used in the present invention are all conventional methods unless otherwise specified; the raw materials and devices used are all conventional commercially available products, and their sources are not specifically limited unless otherwise specified.

[0060] After a symmetrical double-core phase-shifting transformer is connected to the line, when the gear changes, the phase-shifting angle and the equivalent impedance of the symmetrical double-core phase-shifting transformer will change accordingly, thereby affecting the measured impedance at the protection installation to varying degrees.

[0061] See also Figure 1 A line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position includes the following steps:

[0062] The secondary side of each phase of the excitation transformer 202 of the symmetrical double-core phase-shifting transformer is configured with a mutually exclusive thyristor group; the mutually exclusive thyristor group includes a plurality of thyristor pairs 271, Figure 3 K0, K1, ..., K6, K7, and K8 are thyristor pairs 271, each of which includes two thyristors connected in reverse parallel. A plurality of gear taps 272 are provided on the secondary winding of each phase of the excitation transformer 202. The gear taps 272 correspond one to one with the thyristor pairs 271. One end of the thyristor pair 271 is connected to the corresponding gear tap 272, and the other end of the thyristor pair 271 is connected to the output end of each phase of the excitation transformer 202. The gear taps 272 include at least a zero-gear tap. Figure 3 The gear tap 272 corresponding to K0 is the zero gear tap;

[0063] Preferably, a gear tap 272 is provided on each gear of the secondary winding of the excitation transformer 202 of the symmetrical double-core phase-shifting transformer;

[0064] The primary winding of each phase of the excitation transformer 202 is provided with a number of zero-crossing points, which correspond one-to-one to the gear taps 272. When the primary side of any phase of the excitation transformer 202 receives a line fault signal, a trigger pulse is applied to the corresponding thyristor pair 271 at the zero-crossing point corresponding to the zero-gear tap.

[0065] Those skilled in the art will know that the symmetrical double-core phase-shifting transformer includes a series transformer and an excitation transformer. Figure 2-4 , preferably, the primary side and the secondary side of the series transformer 201 of the symmetrical double-core phase-shifting transformer are respectively connected in a triangle;

[0066] The primary and secondary sides of the excitation transformer 202 of the symmetrical double-core phase-shifting transformer are star-connected;

[0067] The series transformer 201 includes a first transformer 21, a second transformer 22 and a third transformer 23, and the excitation transformer 202 includes a fourth transformer 24, a fifth transformer 25 and a sixth transformer 26;

[0068] The primary side of the first transformer 21 is connected in series to the A-phase bus 11 , the primary side of the second transformer 22 is connected in series to the B-phase bus 12 , and the primary side of the third transformer 23 is connected in series to the C-phase bus 13 ;

[0069] A first tap 211 is provided on the primary winding of the first transformer 21, a second tap 221 is provided on the primary winding of the second transformer 22, and a third tap 231 is provided on the primary winding of the third transformer 23.

[0070] The fourth transformer 24 includes a first input terminal 241, a first common terminal 242, a first reference terminal 243, and a first output terminal 244. The fifth transformer 25 includes a second input terminal 251, a second common terminal 252, a second reference terminal 253, and a second output terminal 254. The sixth transformer 26 includes a third input terminal 261, a third common terminal 262, a third reference terminal 263, and a third output terminal 264.

[0071] The first tap 211 is connected to the first input terminal 241, the second tap 221 is connected to the second input terminal 251, and the third tap 231 is connected to the third input terminal 261. The first tap 211, the second tap 221 and the third tap 231 respectively provide excitation for the excitation transformer 202;

[0072] The first common terminal 242, the second common terminal 252 and the third common terminal 262 are grounded respectively, and a monitoring point 28 is provided between the first common terminal 242 and the grounding point, between the second common terminal 252 and the grounding point, and between the third common terminal 262 and the grounding point;

[0073] The first reference terminal 243 , the second reference terminal 253 , and the third reference terminal 263 are grounded respectively;

[0074] The secondary side head end of the first transformer 21 and the secondary side tail end of the second transformer 22 are respectively connected to the third output terminal 264, the secondary side head end of the second transformer 22 and the secondary side tail end of the third transformer 23 are respectively connected to the first output terminal 244, and the secondary side head end of the third transformer 23 and the secondary side tail end of the first transformer 21 are respectively connected to the second output terminal 254.

[0075] The primary common terminal of each phase of the excitation transformer 202 is grounded, and a monitoring point 28 is set between the primary common terminal of each phase of the excitation transformer 202 and the grounding point. The monitoring point 28 is used to collect the current of the primary side of the excitation transformer 202;

[0076] When the monitoring point 28 receives a line fault signal, a trigger pulse is applied to the thyristor pair 271 corresponding to the zero-shift tap of each phase of the excitation transformer 202, and the trigger pulses of the remaining thyristor pairs 271 are removed at the same time, so as to achieve zero-shift adjustment, that is, to achieve rapid zero-shift adjustment of the phase shift of the symmetrical dual-core phase-shifting transformer, that is, the phase shift angle of the symmetrical dual-core phase-shifting transformer is 0. At this time, the zero-shift equivalent impedance of the symmetrical dual-core phase-shifting transformer is a constant value.

[0077] Obtain the nameplate parameters of a symmetrical double-core phase-shifting transformer; obtain the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer based on the nameplate parameters; the nameplate parameters include the primary winding impedance of the series transformer, the secondary winding impedance of the series transformer, and the series transformer ratio;

[0078] According to Figure 4 The equivalent circuit of the symmetrical double-core phase-shifting transformer shown in FIG. 1 can obtain the equivalent impedance of the symmetrical double-core phase-shifting transformer and the ideal phase-shifting angle of the symmetrical double-core phase-shifting transformer as shown in equations (1) and (2) respectively:

[0079]

[0080] Where Z eq is the equivalent impedance of the symmetrical double-core phase-shifting transformer, Z AS is the impedance of the primary winding of the series transformer, Z A2 is the secondary winding impedance of the series transformer, Z ET1 is the primary winding impedance of the excitation transformer, Z ET2 is the secondary winding impedance of the excitation transformer, is the ideal phase shift angle of the symmetrical double-core phase-shifting transformer, j is the imaginary unit, and n ET is the series transformer ratio, n ST is the series transformer ratio;

[0081] In the above formula (1) and formula (2), n ET and Z ET2 It will change according to the gear position;

[0082] When the gear is adjusted to zero, n ET Approximate diagnosis of infinity, excitation transformer secondary winding impedance Z ET2 is 0, at this time the ideal phase shift angle of the symmetrical double-core phase-shifting transformer is is 0, then the zero-speed equivalent impedance of the symmetrical double-core phase-shifting transformer is:

[0083]

[0084] Where Z eq0 is the zero-speed equivalent impedance of the symmetrical double-core phase-shifting transformer, Z AS is the impedance of the primary winding of the series transformer, Z A2 is the secondary winding impedance of the series transformer, n ST is the series transformer ratio;

[0085] Based on the symmetrical double-core phase-shifting transformer, obtain the current level line and adjacent lines, see Figure 5 ,For a symmetrical double-core phase-shifting transformer, the line between protection 1 and protection 2 is the current line, and the line on the left side of protection 1 and the line on the right side of protection 2 are adjacent lines;

[0086] Obtain the measured impedance of the current level line based on the current level line, and obtain the measured impedance of the adjacent line based on the adjacent line;

[0087] See also Figure 5 , E S and E r is the power supply voltage connected on both sides of the line, Z S and Z r Corresponding to the equivalent impedance of the power supply connected on both sides, Z L1 is the line impedance of line L1, Z L2 is the line impedance of line L2, is the ideal phase shift angle of the symmetrical double-core phase-shifting transformer, Z eq is the equivalent impedance of the symmetrical double-core phase-shifting transformer, is the input side voltage of the symmetrical double-core phase-shifting transformer, is the input side current of the symmetrical double-core phase-shifting transformer, is the output side voltage of the symmetrical double-core phase-shifting transformer, The output current of the symmetrical double-core phase-shifting transformer, is the bus voltage, I ris the bus current. For protection 2, when a single-phase grounding fault occurs at k1, since the fault circuit does not contain a symmetrical double-core phase-shifting transformer, the connection of the symmetrical double-core phase-shifting transformer has no effect on distance protection stage I. When a phase A grounding fault occurs at k2, the measured impedance of protection 2 is:

[0088]

[0089] Where Z AG2 U is the measured impedance of protection 2 when phase A is grounded. rA The measured voltage of protection 2, I rA To measure the current for protection 2, is the first intermediate value, is the second intermediate value, is the third intermediate value, U f2 is the voltage at the fault point k2, β is the ratio of the distance from the fault location to the protection installation to the total length of the line;

[0090] Regarding the equivalent impedance of a symmetrical dual-core phase-shifting transformer, when the gear position is adjusted, the equivalent impedance of the symmetrical dual-core phase-shifting transformer changes, affecting the measured impedance of the protection. Simultaneously, due to the influence of the zero-sequence current, the zero-sequence compensation coefficient of the symmetrical dual-core phase-shifting transformer also changes. Regarding the fault point voltage, due to the influence of the phase shift angle of the symmetrical dual-core phase-shifting transformer, the positive- and negative-sequence voltages measured at the protection installation will be offset, and this offset will change with gear position adjustment. Therefore, the measured impedance will not reflect the specific fault location, and the distance protection will not operate correctly. Directly applying phase compensation to the measured voltage and current will not determine the fault segment. For protection 2, direct compensation works properly when the fault occurs at k2. However, when the fault occurs at k1, the above analysis shows that the measured impedance is not affected by the symmetrical dual-core phase-shifting transformer and no compensation is required. Direct compensation would actually cause the distance protection to fail to operate.

[0091] When the phase shift of the symmetrical double-core phase-shifting transformer is quickly adjusted to zero, it is equivalent to inserting a zero-level equivalent impedance Z in series at the output of protection 1. eq0 For the constant impedance of protection 2, no compensation is required for section I; for section II and section III of protection 2, only the corresponding measured impedance needs to be compensated. eq0 The compensation can avoid the influence of phase shift;

[0092] Compensating the measured impedance of the current level line according to the zero-range equivalent impedance to obtain a first impedance;

[0093] Compensating the measured impedance of the adjacent line according to the zero-range equivalent impedance to obtain a second impedance;

[0094] According to the first impedance and the second impedance, the line fault is judged and acted; based on the distance protection algorithm of the first impedance and the second impedance obtained after compensation, the line fault is judged and acted, specifically, Figure 5 When a single-phase grounding fault occurs at k1, the simulation results of the measured impedance at protection 1 using the traditional distance protection method and the fault ride-through method proposed in this disclosure are shown in Table 1:

[0095] Table 1 Simulation results of the measured impedance at protection 1 using the traditional distance protection method and the fault ride-through method proposed in this disclosure

[0096]

[0097] It can be seen that when a single-phase grounding fault occurs at line k1, due to the influence of the symmetrical double-core phase-shifting transformer, the measured impedance of the traditional distance protection at protection 1 is significantly different from the line positive-sequence impedance, and cannot reflect the fault distance. The measured impedance may fall outside the distance protection section I action zone, and distance protection 1 cannot operate correctly. The fast zeroing line adaptive fault ride-through method provided by the present disclosure measures a measured impedance at protection 1 that is in good agreement with the line positive-sequence impedance, can correctly reflect the fault distance, and the measured impedance at protection 1 falls within the distance protection section II action zone, and distance protection 1 can operate correctly.

[0098] See also Figure 2 , a fault ride-through protection circuit for realizing a line adaptive fault ride-through method based on rapid zeroing of an excitation transformer gear, comprising a symmetrical double-core phase-shifting transformer and three mutually exclusive thyristor groups 27;

[0099] A symmetrical dual-core phase-shifting transformer includes a series transformer 201 and an excitation transformer 202. Each phase of the excitation transformer 202 is provided with a mutually exclusive thyristor group 27 on the secondary side. Each phase of the excitation transformer 202 has a plurality of gear taps on the secondary winding. The primary common terminal of each phase of the excitation transformer 202 is grounded, and a monitoring point 28 is provided between the primary common terminal of each phase of the excitation transformer 202 and the grounding point.

[0100] The mutually exclusive thyristor group 27 includes a plurality of thyristor pairs 271, and the gear taps 272 correspond to the thyristor pairs 271 one by one. The thyristor pair 271 includes two thyristors connected in reverse parallel, one end of the thyristor pair is connected to the corresponding gear tap 272, and the other end of the thyristor pair 271 is connected to the output end of each phase of the excitation transformer 202; the gear tap 272 includes at least a zero gear tap, see Figure 3 The gear tap 272 corresponding to K0 is a zero gear tap.

[0101] Preferably, several tap position taps 272 are evenly arranged between zero position and full position on the secondary winding of the excitation transformer 202, and the thyristor group 27, as the on-load tap changer of the excitation transformer 202, can adjust the size and direction of the phase shift, see Figure 3 The tap position tap 272 corresponding to K0 in the middle is the zero position tap, which is the zero position when K0 is on and the other thyristor pairs 271 are off, and is the full position phase shift, i.e. the full position, when K8 is on and the other thyristor pairs 271 are off.

[0102] Referring to Figure 6 An electronic device for implementing a line adaptive fault ride-through method based on fast zero adjustment of excitation transformer position, comprising a monitoring module, a control module, a calculation module and a fault determination module;

[0103] The monitoring module comprises:

[0104] for receiving line fault signals from the monitoring point 28 and generating fault feedback signals sent to the control module;

[0105] The control module comprises:

[0106] for receiving fault feedback signals;

[0107] for applying trigger pulses to the thyristor pairs 271 corresponding to the zero position tap of each phase of the excitation transformer 202 according to the line feedback signals, while removing the trigger pulses of the remaining thyristor pairs 271;

[0108] for sending control feedback signals to the calculation module;

[0109] The calculation module comprises:

[0110] for calculating the zero position equivalent impedance of the symmetric double-core phase shift transformer according to the nameplate parameters of the symmetric double-core phase shift transformer;

[0111] for obtaining the current line and the adjacent line based on the symmetric double-core phase shift transformer;

[0112] for obtaining the measured impedance of the current line according to the current line and the measured impedance of the adjacent line according to the adjacent line;

[0113] for receiving control feedback signals;

[0114] for obtaining the first impedance by compensating the measured impedance of the current line according to the zero position equivalent impedance based on the control feedback signals;

[0115] for obtaining the second impedance by compensating the measured impedance of the adjacent line according to the zero position equivalent impedance based on the control feedback signals;

[0116] for sending the first impedance and the second impedance to the fault determination module;

[0117] Fault determination module.

[0118] Used to identify and take action on line faults based on the first impedance and the second impedance.

[0119] Finally, it should be noted that the above content is only used to illustrate the technical solution of the present invention, rather than to limit the scope of protection of the present invention. Simple modifications or equivalent substitutions of the technical solution of the present invention by ordinary technicians in this field do not deviate from the essence and scope of the technical solution of the present invention.

Claims

1. A line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear, characterized by: The following steps are involved: A mutually exclusive thyristor group is configured on the secondary side of each phase of the excitation transformer of a symmetrical dual-core phase-shifting transformer; the mutually exclusive thyristor group includes a plurality of thyristor pairs, each of which includes two thyristors connected in reverse parallel; a plurality of gear taps are provided on the secondary winding of each phase of the excitation transformer, and the gear taps correspond one-to-one with the thyristor pairs; one end of each thyristor pair is connected to the corresponding gear tap, and the other end of each thyristor pair is connected to the output terminal of each phase of the excitation transformer; the gear taps include at least a zero-gear tap; The primary side common terminal of each phase of the excitation transformer is grounded, and a monitoring point is respectively set between the primary side common terminal of each phase of the excitation transformer and the grounding point; When the monitoring point receives a line fault signal, applying a trigger pulse to the thyristor pair corresponding to the zero-speed tap of each phase of the excitation transformer, and removing the trigger pulses of the remaining thyristor pairs; Obtaining nameplate parameters of the symmetrical double-core phase-shifting transformer; obtaining the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters; Acquire the current level line and adjacent lines based on the symmetrical double-core phase-shifting transformer; Acquire the measured impedance of the current-stage line according to the current-stage line, and acquire the measured impedance of the adjacent line according to the adjacent line; Compensating the measured impedance of the current-stage circuit according to the zero-range equivalent impedance to obtain a first impedance; Compensating the measured impedance of the adjacent line according to the zero-range equivalent impedance to obtain a second impedance; A line fault is determined and action is taken according to the first impedance and the second impedance.

2. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: The nameplate parameters include the series transformer primary winding impedance, the series transformer secondary winding impedance and the series transformer ratio.

3. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: A plurality of zero-crossing points are provided on the primary winding of each phase of the excitation transformer, and the zero-crossing points correspond one-to-one to the gear taps. When the primary side of any phase of the excitation transformer receives a line fault signal, a trigger pulse is applied to the corresponding thyristor pair at the zero-crossing point corresponding to the zero-gear tap.

4. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: The primary side and the secondary side of the series transformer of the symmetrical double-core phase-shifting transformer are respectively connected in a triangle.

5. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: The primary side and the secondary side of the excitation transformer of the symmetrical double-core phase-shifting transformer are respectively star-connected.

6. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: A gear tap is provided on each gear position of the secondary winding of the excitation transformer of the symmetrical double-core phase-shifting transformer.

7. A fault ride-through protection circuit, used to implement the line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to any one of claims 1 to 6, characterized in that: It includes the symmetrical double-core phase-shifting transformer and three mutually exclusive thyristor groups; The symmetrical double-core phase-shifting transformer includes a series transformer and an excitation transformer; each phase of the excitation transformer is provided with a mutually exclusive thyristor group on the secondary side, and each phase of the excitation transformer is provided with a plurality of gear taps on the secondary winding; the primary common terminal of each phase of the excitation transformer is grounded, and a monitoring point is provided between the primary common terminal of each phase of the excitation transformer and the grounding point; The mutually exclusive thyristor group includes a plurality of thyristor pairs, and the gear taps correspond to the thyristor pairs one by one; the thyristor pair includes two thyristors connected in reverse parallel, one end of the thyristor pair is connected to the corresponding gear tap, and the other end of the thyristor pair is connected to the output end of each phase of the excitation transformer; the gear taps include at least a zero-gear tap.

8. The fault ride-through protection circuit according to claim 7, wherein: The series transformer includes a first transformer, a second transformer and a third transformer, and the excitation transformer includes a fourth transformer, a fifth transformer and a sixth transformer; The primary side of the first transformer is connected in series to the A-phase bus, the primary side of the second transformer is connected in series to the B-phase bus, and the primary side of the third transformer is connected in series to the C-phase bus; The primary winding of the first transformer is provided with a first tap, the primary winding of the second transformer is provided with a second tap, and the primary winding of the third transformer is provided with a third tap; The fourth transformer includes a first input terminal, a first common terminal, a first reference terminal and a first output terminal, the fifth transformer includes a second input terminal, a second common terminal, a second reference terminal and a second output terminal, and the sixth transformer includes a third input terminal, a third common terminal, a third reference terminal and a third output terminal; The first tap is connected to the first input terminal, the second tap is connected to the second input terminal, and the third tap is connected to the third input terminal; The first common terminal, the second common terminal and the third common terminal are grounded respectively, and a monitoring point is respectively provided between the first common terminal and the grounding point, between the second common terminal and the grounding point, and between the third common terminal and the grounding point; The first reference terminal, the second reference terminal and the third reference terminal are grounded respectively; The first end of the secondary side of the first transformer and the tail end of the secondary side of the second transformer are respectively connected to the third output end, the first end of the secondary side of the second transformer and the tail end of the secondary side of the third transformer are respectively connected to the first output end, and the first end of the secondary side of the third transformer and the tail end of the secondary side of the first transformer are respectively connected to the second output end.

9. The fault ride-through protection circuit according to claim 7, wherein: A plurality of the gear taps are evenly arranged between the zero gear position and the full gear position on the secondary winding of the excitation transformer.

10. An electronic device for implementing the line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to any one of claims 1 to 6, characterized in that: It includes a monitoring module, a control module, a calculation module and a fault determination module; The monitoring module: for receiving a line fault signal from the monitoring point and generating a fault feedback signal to send to the control module; The control module: Used to receive the fault feedback signal; for applying a trigger pulse to the thyristor pair corresponding to the zero-speed tap of each phase of the excitation transformer according to the line feedback signal, and removing the trigger pulses of the remaining thyristor pairs; Used to send a control feedback signal to the calculation module; The calculation module: Used to calculate the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters of the symmetrical double-core phase-shifting transformer; Used to obtain the current level line and adjacent lines based on the symmetrical double-core phase-shifting transformer; Used to obtain the measured impedance of the current-level line according to the current-level line, and obtain the measured impedance of the adjacent line according to the adjacent line; Used to receive the control feedback signal; Used to compensate the measured impedance of the current stage circuit according to the zero-gear equivalent impedance based on the control feedback signal to obtain a first impedance; for compensating the measured impedance of the adjacent line according to the zero-gear equivalent impedance based on the control feedback signal to obtain a second impedance; for sending the first impedance and the second impedance to the fault determination module; The fault determination module: Used to identify and take action on line faults based on the first impedance and the second impedance.

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