A nitride light emitting diode epitaxial wafer and a method of fabricating the same

Abstract

The application discloses a nitride light-emitting diode epitaxial wafer and a preparation method thereof, and relates to the technical field of semiconductor devices. The nitride light-emitting diode epitaxial wafer comprises a substrate, a buffer layer, an N-type layer, a combination layer, an electron blocking layer and a P-type layer which are sequentially stacked on the substrate; the combination layer comprises an electron trap layer and a polarization layer which are sequentially grown from bottom to top; the electron trap layer comprises Mg-doped ScGaN layers and BGaN layers which are periodically and alternately grown from bottom to top; and the polarization layer comprises N-face polar quantum well layers, N-face polar quantum barrier layers, Ga-face polar AlGaN layers and N-face polar Si-doped InAlGaN layers which are periodically and alternately grown from bottom to top. The nitride light-emitting diode epitaxial wafer can increase the effective recombination efficiency of holes and electrons, reduce electron overflow and reduce the Stark efficiency of multiple quantum wells, thereby improving the light-emitting efficiency of a GaN-based LED chip, and solving the problem of low light-emitting efficiency of a current GaN-based LED.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor devices, in particular to a nitride light-emitting diode epitaxial wafer and a preparation method thereof. BACKGROUND

[0002] Semiconductor light-emitting diodes have the advantages of small volume, strong controllability of light-emitting waveband, high light efficiency, low heat loss, small light decay, energy saving and environmental protection, and are widely used in full-color display, backlight source, signal lamp, optoelectronic computer interconnection and short-distance communication, and gradually become a research hotspot in the field of electronic and electrical physics.

[0003] Gallium nitride material has a series of advantages such as wide band gap, high electron mobility, high thermal conductivity and high stability, and therefore has a wide application and huge market prospect in high-brightness blue light-emitting diodes. The main structure of the traditional GaN-based LED epitaxial structure includes a substrate, a buffer layer, an N-type layer, a multi-quantum well layer, an electron blocking layer, a P-type layer and a P-type contact layer. Due to the inherent polarization effect of GaN-based material, the band bending in the multi-quantum well layer of the traditional GaN-based LED epitaxial structure caused by the Stark effect reduces the overlap of wave functions, thereby reducing the effective recombination efficiency of holes and electrons, resulting in a decrease in light-emitting efficiency; and since electrons have a faster migration speed and a larger quantity than holes, the uncombined electrons will cause electron overflow, reducing the anti-static ability and further reducing the light-emitting efficiency. Therefore, how to improve the light-emitting efficiency of GaN-based LED is the focus of the LED industry and the main target of current research and development. SUMMARY

[0004] In view of the deficiencies of the prior art, the present application aims to provide a nitride light-emitting diode epitaxial wafer which can increase the effective recombination efficiency of holes and electrons, reduce electron overflow and reduce the Stark efficiency of the multi-quantum well, thereby improving the light-emitting efficiency of the GaN-based LED chip and solving the problem of low light-emitting efficiency of the current GaN-based LED.

[0005] Another object of the present application is to provide a preparation method of a nitride light-emitting diode epitaxial wafer for preparing the above-mentioned nitride light-emitting diode epitaxial wafer.

[0006] To achieve this object, the present application adopts the following technical solutions:

[0007] A nitride light-emitting diode epitaxial wafer comprises a substrate, and further comprises a buffer layer, an N-type layer, a combination layer, an electron blocking layer and a P-type layer which are sequentially stacked on the substrate;

[0008] The combination layer comprises an electron trap layer and a polarization layer which are sequentially stacked and grown from bottom to top;

[0009] The electron trap layer comprises Mg-doped ScGaN layers and BGaN layers which are periodically and alternately grown from bottom to top.

[0010] The polarization layer comprises N-polar quantum well layers, N-polar quantum barrier layers, Ga-polar AlGaN layers and N-polar Si-doped InAlGaN layers which are periodically and alternately grown from bottom to top.

[0011] As an improvement of the above scheme, the thickness of the N-polar Si-doped InAlGaN layer is 3-3.5 nm.

[0012] The doping concentration of Si element in the N-polar Si-doped InAlGaN layer 424 is 1×10 14 -5×10 16 atoms / cm 3 .

[0013] As an improvement of the above scheme, the proportion of Al component in the Ga-polar AlGaN layer is 0-0.3, and in the periodic growth, the Al component in the Ga-polar AlGaN layer presents an increasing trend in each period.

[0014] The thickness of the Ga-polar AlGaN layer is 0-110 nm.

[0015] As an improvement of the above scheme, the N-polar quantum well layer is an InGaN layer with a thickness of 2-3.5 nm.

[0016] The N-polar quantum barrier layer is an HGaN layer, H is any one or a combination of more than one of In, Al, B, Sc and Y; the thickness of the N-polar quantum barrier layer is 9-16 nm.

[0017] As an improvement of the above scheme, the thickness of the Mg-doped ScGaN layer is 3-5 nm, and the doping concentration of Mg element in the Mg-doped ScGaN layer is 1×10 14 -1×10 16 atoms / cm 3 .

[0018] The thickness of the BGaN layer is 3-5 nm.

[0019] As an improvement of the above scheme, the number of periods of the electron trap layer is 3-6.

[0020] The number of periods of the polarization layer is 7-11.

[0021] The growth temperature of the combined layer is 780-1000℃, and the growth pressure is 100-500 torr.

[0022] As the improvement of the above scheme, the electron blocking layer is an AlInGaN layer, the proportion of Al component in the electron blocking layer is 0.005-0.1, and the proportion of In component is 0.01-0.2.

[0023] The thickness of the electron blocking layer 5 is 10-40 nm, the growth temperature is 900-1000 DEG C, and the pressure is 100-300 torr.

[0024] Correspondingly, the application also provides a preparation method of the nitride light emitting diode epitaxial wafer, which is used for preparing the above nitride light emitting diode epitaxial wafer and comprises the following steps:

[0025] (1) providing a substrate;

[0026] (2) depositing a buffer layer on the substrate;

[0027] (3) depositing an N-type layer on the buffer layer;

[0028] (4) depositing a combination layer on the N-type layer;

[0029] (5) depositing an electron blocking layer on the combination layer;

[0030] (6) depositing a P-type layer on the electron blocking layer.

[0031] As the improvement of the above scheme, before the step (3) of depositing the N-type layer on the buffer layer, the method further comprises the step of pretreating the substrate with the deposited buffer layer, and the pretreatment method is as follows:

[0032] The substrate with the plated buffer layer is transferred into the MOCVD equipment, and then pretreated in H2 atmosphere for 1-10 min, and the treatment temperature is 1000-1200 DEG C, and then the substrate is subjected to nitriding treatment.

[0033] As the improvement of the above scheme, the N-type layer comprises a non-doped GaN layer and a Si-doped n-type GaN layer, and the step (3) of depositing the N-type layer on the buffer layer comprises the following steps:

[0034] a. depositing the non-doped GaN layer on the buffer layer; wherein the growth temperature of the non-doped GaN layer is 1050 DEG C-1200 DEG C, the growth pressure is 100-600 torr, and the thickness is 1-5 microns;

[0035] b. depositing the Si-doped n-type GaN layer on the non-doped GaN layer; wherein the growth temperature of the Si-doped n-type GaN layer is 1050 DEG C-1200 DEG C, the growth pressure is 100-600 torr, the thickness is 2-3 microns, and the Si doping concentration is 1x10 19 -5x10 19 atoms / cm 3 .

[0036] The present application has the following beneficial effects: compared with the conventional LED epitaxial structure using a general multi-quantum well layer between the N-type layer and the electron blocking layer, the nitride light emitting diode epitaxial wafer of the present application improves and optimizes the overall structure, and sets a combination layer between the N-type layer and the electron blocking layer. The combination layer comprises an electron trap layer and a polarization layer which are sequentially stacked from bottom to top; the electron trap layer is an alternating structure of Mg-doped ScGaN layers and BGaN layers; and the polarization layer comprises N-polar quantum well layers, N-polar quantum barrier layers, Ga-polar AlGaN layers and N-polar Si-doped InAlGaN layers which are sequentially and periodically alternately grown from bottom to top. The present application improves and optimizes the structure of the epitaxial wafer, which can increase the effective recombination efficiency of holes and electrons, reduce electron overflow and reduce the Stark efficiency of the multi-quantum well, thereby improving the light emitting efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0037] Figure 1 is a structural schematic diagram of the nitride light emitting diode epitaxial wafer of the present application embodiment 1;

[0038] The substrate 1, the buffer layer 2, the N-type layer 3, the combination layer 4, the electron blocking layer 5, the P-type layer 6, the electron trap layer 41, the polarization layer 42, the Mg-doped ScGaN layer 411, the BGaN layer 412, the N-polar quantum well layer 421, the N-polar quantum barrier layer 422, the Ga-polar AlGaN layer 423, and the N-polar Si-doped InAlGaN layer 424. DETAILED DESCRIPTION

[0039] In order to make the objectives, technical solutions and advantages of the present application clearer, the following will further describe the present application in detail with reference to the drawings. The present application can be realized in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0040] The technical or conditions not specified in the embodiments are carried out according to the technical or conditions described in the literature in the art or according to the product manual. The raw materials not specified by the manufacturer are conventional products that can be obtained by purchase.

[0041] As shown in Figure 1 The nitride light emitting diode epitaxial wafer of the present application comprises a substrate 1, and further comprises a buffer layer 2, an N-type layer 3, a combination layer 4, an electron blocking layer 5 and a P-type layer 6 which are sequentially stacked on the substrate 1;

[0042] The combination layer 4 comprises an electron trap layer 41 and a polarization layer 42 which are sequentially stacked from bottom to top;

[0043] The electron trap layer 41 comprises Mg-doped ScGaN layers 411 and BGaN layers 412 alternately grown from bottom to top.

[0044] The polarization layer 42 comprises N-polar quantum well layers 421, N-polar quantum barrier layers 422, Ga-polar AlGaN layers 423, and N-polar Si-doped InAlGaN layers 424 alternately grown from bottom to top.

[0045] It is worth noting that, compared with the conventional LED epitaxial structure which adopts a conventional multi-quantum well layer between the N-type layer 3 and the electron blocking layer 5, the nitride light-emitting diode epitaxial wafer of the present application improves and optimizes the overall structure, and sets a combination layer 4 between the N-type layer 3 and the electron blocking layer 5. The combination layer 4 comprises an electron trap layer 41 and a polarization layer 42 stacked from bottom to top. The electron trap layer 41 is an alternating structure of Mg-doped ScGaN layers 411 and BGaN layers 412. The polarization layer 42 comprises N-polar quantum well layers 421, N-polar quantum barrier layers 422, Ga-polar AlGaN layers 423, and N-polar Si-doped InAlGaN layers 424 alternately grown from bottom to top. The present application improves and optimizes the structure of the epitaxial wafer, which can increase the effective recombination efficiency of holes and electrons, reduce electron overflow and reduce the Stark efficiency of the multi-quantum well, thereby improving the light-emitting efficiency.

[0046] Specifically, in the N-polar quantum well layer 421 of the present application, the direction of the polarization field is opposite to the direction of the applied bias field, and the polarization field weakens the total electric field in the quantum well, which causes the quantum well energy band to flatten and the electron-hole wave function to overlap more, thereby improving the light-emitting efficiency of the quantum well. At the same time, the N-polar quantum well layer 421, the N-polar quantum barrier layer 422, and the N-polar Si-doped InAlGaN layer 424 in the present application are all N-polar, which alternates with the Ga-polar AlGaN layer 423, can reduce the spontaneous polarization effect, reduce non-radiative recombination, cause the quantum well energy band to flatten, and the electron-hole wave function to overlap more. At the same time, the Ga-polarity relative to the N-polarity can effectively improve the crystal quality of the quantum well, reduce the incorporation of impurities, improve the clarity of the interface, reduce the risk of leakage, and improve the effective recombination light-emitting efficiency of the combination layer 4.

[0047] Further, the polarization field of the N-polar quantum well layer 421, the N-polar quantum barrier layer 422 and the N-polar Si-doped InAlGaN layer 424 is in the same direction as the external electric field, and the polarization field and the external electric field jointly accelerate the injection of electrons and holes to the well layer, further improves the carrier injection efficiency, increases the light emitting efficiency of the multi-quantum well, and reduces the loss of operating voltage. The Ga-polar AlGaN layer 423 in the combined layer can phase-ly improve the barrier to prevent electron overflow; at the same time, the N-polar Si-doped InAlGaN layer 424 in the combined layer is polarized doping, which can continuously reduce the operating voltage, reduce the lattice mismatch between layers, reduce the generation of defects, thereby improve the effective radiation recombination efficiency, and further improve the light emitting efficiency. The electron trap layer 41 is an alternating structure of the Mg-doped ScGaN layer 411 and the BGaN layer 412. The BGaN layer continuously twists the penetrating dislocation of the underlying layer before the growth of the combined layer, reduces the extension of the dislocation, and can improve the crystal quality of the combined layer and reduce the generation of piezoelectric polarization; in the Mg-doped ScGaN layer 411, the Mg doping continuously consumes excessive electrons, the Mg-doped ScGaN layer 411 can improve the barrier height, slow down the electron migration speed, and further improve the antistatic ability of the chip, thereby improving the light emitting efficiency.

[0048] Further, the thickness of the N-polar Si-doped InAlGaN layer 424 is 3-3.5 nm, and is exemplarily 3 nm, 3.1 nm, 3.2 nm, 3.3 nm, 3.4 nm or 3.5 nm, but is not limited thereto.

[0049] The doping concentration of the Si element in the N-polar Si-doped InAlGaN layer 424 is 1×10 14 -5×10 16 atoms / cm 3 .

[0050] More preferably, when the N-polar Si-doped InAlGaN layer 424 is periodically grown, the doping concentration of the Si element is periodically decreased in the epitaxial growth direction, and the growth atmosphere is N2 and NH3, which can reduce the operating voltage and reduce the lattice mismatch between layers, thereby reducing the generation of defects and improving the effective radiation recombination efficiency.

[0051] Specifically, the doping concentration of the Si element in the N-polar Si-doped InAlGaN layer 424 is 1×10 14 -5×10 16 atoms / cm 3 , and is exemplarily 1×10 14 , 2×10 14 , 3×10 14 , 5×10 14 , 7×10 141x10 15 3x10 15 5x10 15 8x10 15 1x10 16 3x10 16 5x10 16 atoms / cm 3 .

[0052] Further explanation, the proportion of Al component in the Ga-face polarity AlGaN layer 423 is 0-0.3, and in the periodic growth, the Al component in the Ga-face polarity AlGaN layer 423 presents a gradually increasing change trend in each period;

[0053] The thickness of the Ga-face polarity AlGaN layer 423 is 0-110nm.

[0054] As preferred, the Ga-face polarity AlGaN layer 423 is grown in a gradual change mode of Al component of 0 to 0.3, i.e. the Al component is linearly changed from 0 to 0.3, which can improve the barrier in stages, block the electron overflow, and further improve the light emitting efficiency of the nitride light emitting diode epitaxial wafer.

[0055] As preferred, the thickness of the Ga-face polarity AlGaN layer 423 is 0-110nm, and in the periodic growth, the thickness of the Ga-face polarity AlGaN layer 423 gradually decreases, and the thickness decreasing amplitude is 5-10nm, and the growth atmosphere is H2 growth.

[0056] Further explanation, the N-face polarity quantum well layer 421 is an InGaN layer, and the thickness is 2-3.5nm, and the examples are 2nm, 2.2nm, 2.5nm, 2.8nm, 3nm, 3.3nm, and 3.5nm, but are not limited thereto; the growth atmosphere of the N-face polarity quantum well layer 421 is N2, NH3 growth;

[0057] The N-face polarity quantum barrier layer 422 is an HGaN layer, and H is any one or a combination of more than one of In, Al, B, Sc, and Y; the example of H is In, i.e. the N-face polarity quantum barrier layer 422 is an InGaN layer; H is Al, i.e. the N-face polarity quantum barrier layer 422 is an AlGaN layer; H is B, i.e. the N-face polarity quantum barrier layer 422 is a BGaN layer; H is Sc, i.e. the N-face polarity quantum barrier layer 422 is a ScGaN layer; H is Y, i.e. the N-face polarity quantum barrier layer 422 is a YGaN layer; H is a combination of In and Al, i.e. the N-face polarity quantum barrier layer 422 is an InAlGaN layer, but is not limited thereto.

[0058] The thickness of the N-face polarity quantum barrier layer 422 is 9-16 nm, and examples include 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, and 16 nm, but the present application is not limited thereto.

[0059] Further, the thickness of the Mg-doped ScGaN layer 411 is 3-5 nm, and the doping concentration of Mg in the Mg-doped ScGaN layer 411 is 1×1019-1×1020atoms / cm3. 14 ~1×10 16 atoms / cm 3 .

[0060] Preferably, the doping concentration of Mg in the Mg-doped ScGaN layer 411 is periodically increased in the direction of epitaxial growth, and the growth atmosphere is H2, N2, or NH3.

[0061] The thickness of the BGaN layer 412 is 3-5 nm, and examples include 3 nm, 3.5 nm, 4 nm, 4.5 nm, and 5 nm, but the present application is not limited thereto.

[0062] Further, the number of periods of the electron trap layer 41 is 3-6, and examples include 3, 4, 5, and 6, but the present application is not limited thereto.

[0063] The number of periods of the polarization layer 42 is 7-11, and examples include 7, 8, 9, 10, and 11, but the present application is not limited thereto.

[0064] The growth temperature of the combined layer 4 is 780-1000°C, and the growth pressure is 100-500 torr. Examples of the growth temperature of the combined layer 4 include 780°C, 800°C, 850°C, 880°C, 900°C, 920°C, 950°C, 980°C, and 1000°C, but the present application is not limited thereto. Examples of the growth pressure of the combined layer 4 include 100 torr, 120 torr, 150 torr, 180 torr, 200 torr, 220 torr, 250 torr, 280 torr, 300 torr, 320 torr, 350 torr, 380 torr, 400 torr, 420 torr, 450 torr, 480 torr, and 500 torr, but the present application is not limited thereto.

[0065] A method for preparing a nitride light emitting diode epitaxial wafer, for preparing the nitride light emitting diode epitaxial wafer described above, includes the following steps:

[0066] (1) providing a substrate 1;

[0067] (2) depositing a buffer layer 2 on the substrate 1;

[0068] (3) depositing an N-type layer 3 on the buffer layer 2;

[0069] (4) depositing a combination layer 4 on the N-type layer 3;

[0070] (5) depositing an electron blocking layer 5 on the combination layer 4;

[0071] (6) depositing a P-type layer 6 on the electron blocking layer 5.

[0072] Specifically, the substrate 1 of the technical solution can be selected from one of sapphire substrate, SiO2-sapphire composite substrate, silicon substrate, silicon carbide substrate, gallium nitride substrate and zinc oxide substrate.

[0073] Preferably, the substrate is selected from sapphire substrate. Sapphire is the most commonly used substrate material for GaN-based LED at present. The sapphire substrate has the advantages of mature preparation process, low price, easy cleaning and processing, and good stability at high temperature.

[0074] Specifically, the buffer layer 2 of the technical solution is an AlN buffer layer or a GaN buffer layer, and the thickness of the buffer layer 2 is 10-50 nm.

[0075] Preferably, the AlN buffer layer is deposited in the application material PVD, and the thickness of the AlN buffer layer is 15 nm. The AlN buffer layer provides the same nucleation center as the substrate orientation, releases the stress generated by the lattice mismatch between GaN and the substrate and the thermal stress generated by the mismatch of the thermal expansion coefficient, provides a flat nucleation surface for further growth, reduces the contact angle of nucleation and growth, and enables the island-shaped GaN grains to be connected into a plane in a smaller thickness, thereby changing to two-dimensional epitaxial growth.

[0076] Further description, before the step (3) of depositing the N-type layer 3 on the buffer layer 2, the substrate 1 with the deposited buffer layer 2 is subjected to a pretreatment step, and the pretreatment method is as follows:

[0077] The substrate 1 with the plated buffer layer 2 is transferred into the MOCVD equipment, and is pretreated in H2 atmosphere for 1-10 min at a temperature of 1000-1200℃; then the substrate 1 is subjected to nitriding treatment by introducing NH3 at a temperature of 1000-1200℃ for 1-10 min. The substrate 1 with the deposited buffer layer 2 is pretreated according to the technical solution, which can improve the crystal quality of the buffer layer 2 and effectively improve the crystal quality of the subsequently deposited GaN epitaxial layer.

[0078] Further description, the N-type layer 3 includes a non-doped GaN layer (not shown in the figure) and a Si-doped n-type GaN layer (not shown in the figure), and the step (3) of depositing the N-type layer 3 on the buffer layer 2 includes the following steps:

[0079] a. depositing the non-doped GaN layer on the buffer layer 2; wherein the growth temperature of the non-doped GaN layer is 1050-1200℃, the growth pressure is 100-600 torr, and the thickness is 1-5 μm;

[0080] b. depositing the Si-doped n-type GaN layer on the non-doped GaN layer; wherein the growth temperature of the Si-doped n-type GaN layer is 1050-1200℃, the growth pressure is 100-600 torr, the thickness is 2-3 μm, and the Si doping concentration is 1×10 19 -5×10 19 atoms / cm 3 .

[0081] Preferably, the growth temperature of the non-doped GaN layer is 1100℃, the growth pressure is 150 torr, and the growth thickness is 2-3 μm. The non-doped GaN layer has a high growth temperature and a low pressure, and the crystal quality of the prepared GaN is good. With the increase of the thickness of the non-doped GaN layer, the compressive stress is released through the stacking faults, the linear defects are reduced, the crystal quality is improved, and the reverse leakage is reduced. However, increasing the thickness of the non-doped GaN layer greatly increases the consumption of Ga source material, greatly increasing the epitaxial cost of the LED. Therefore, the growth thickness of the non-doped GaN layer is preferably 2-3 μm, which not only saves production cost, but also has high crystal quality of the GaN material.

[0082] Preferably, the growth temperature of the Si-doped n-type GaN layer is 1120℃, the growth pressure is 100 torr, the growth thickness is 2-3 μm, and the Si doping concentration is 2.5×10 19 atoms / cm 3 . First, the Si-doped n-type GaN layer provides sufficient electrons for LED light emission. Second, the resistivity of the Si-doped n-type GaN layer is higher than that of the transparent electrode on the p-GaN, so sufficient Si doping can effectively reduce the resistivity of the Si-doped n-type GaN layer. Finally, the sufficient thickness of the Si-doped n-type GaN can effectively release stress, thereby improving the light-emitting efficiency of the light-emitting diode.

[0083] Further, in step (5), the electron blocking layer 5 is an AlInGaN layer, the proportion of Al component in the electron blocking layer 5 is 0.005-0.1, and the proportion of In component is 0.01-0.2.

[0084] The thickness of the electron blocking layer 5 is 10-40 nm, the growth temperature is 900-1000℃, and the pressure is 100-300 torr.

[0085] Preferably, the electron blocking layer is AlInGaN with a thickness of 15 nm, an Al component concentration gradually changing from 0.01 to 0.05 along the epitaxial layer growth direction, an In component concentration of 0.01, a growth temperature of 965 ℃, and a growth pressure of 200 torr, which can effectively limit electron overflow, reduce the blocking of holes, improve the injection efficiency of hole vectors to quantum wells, reduce carrier Auger recombination, and improve the light emitting efficiency of the light emitting diode.

[0086] Further, in step (6), the P-type layer 6 is a P-type GaN layer.

[0087] Specifically, the P-type GaN layer has a growth temperature of 900-1050 ℃, a thickness of 10-50 nm, a growth pressure of 100-600 torr, and a Mg doping concentration of 1×10 19 -1×10 21 atoms / cm 3 .

[0088] Preferably, the P-type GaN layer has a growth temperature of 985 ℃, a thickness of 15 nm, a growth pressure of 200 torr, and a Mg doping concentration of 2×10 20 atoms / cm 3 . A too high Mg doping concentration will damage the crystal quality, and a too low doping concentration will affect the hole concentration. Meanwhile, for an LED structure with V-pits, a higher growth temperature of the P-type GaN layer is also conducive to the merging of V-pits, obtaining an LED epitaxial wafer with a smooth surface.

[0089] The technical solutions of the present application are further described below through examples and comparative examples.

[0090] In the following examples and comparative examples, a MOCVD (Metal-organic Chemical Vapor Deposition) device is used, one of high-purity H2, high-purity N2, and a mixture of high-purity H2 and high-purity N2 is used as a carrier gas, high-purity NH3 is used as an N source, TMGa and TEGa are used as gallium sources, TMIn is used as an indium source, TMAl is used as an aluminum source, SiH4 is used as an N-type dopant, Bcl3 is used as a B source, CP3Sc is used as a Sc source, and CP2Mg is used as a P-type dopant for epitaxial growth.

[0091] Example 1

[0092] The nitride light emitting diode epitaxial wafer of the present example comprises a substrate 1, and a buffer layer 2, an N-type layer 3, a combination layer 4, an electron blocking layer 5, and a P-type layer 6 sequentially stacked on the substrate 1.

[0093] The combination layer 4 comprises an electron trap layer 41 and a polarization layer 42 grown in sequence from bottom to top;

[0094] The electron trap layer 41 comprises Mg-doped ScGaN layers 411 and BGaN layers 412 alternately grown in sequence from bottom to top, and the alternately grown period is 5; the polarization layer 42 comprises N-polar quantum well layers 421, N-polar quantum barrier layers 422, Ga-polar AlGaN layers 423 and N-polar Si-doped InAlGaN layers 424 alternately grown in sequence from bottom to top, and the alternately grown period is 10.

[0095] The N-polar quantum well layer 421 is an InGaN layer with a thickness of 3 nm;

[0096] The N-polar quantum barrier layer 422 is an HGaN layer with H being Sc, i.e. the N-polar quantum barrier layer 422 is a ScGaN layer; the thickness of the N-polar quantum barrier layer 422 is 12 nm;

[0097] The proportion of Al component in the Ga-polar AlGaN layer 423 is 0-0.3, and the Al component is grown in a gradual mode of 0-0.3 in the periodic growth of the Ga-polar AlGaN layer 423, i.e. the Al component is linearly gradually changed from 0 to 0.3; the thickness of the Ga-polar AlGaN layer 423 is 10-100 nm, and the thickness of the Ga-polar AlGaN layer 423 is gradually decreased in the periodic growth, and the thickness decreasing amplitude is 10 nm, i.e. the thickness of the Ga-polar AlGaN layer 423 in each period is 100 nm, 90 nm, 80 nm, 70 nm, 60 nm, 50 nm, 40 nm, 30 nm, 20 nm and 10 nm respectively;

[0098] The thickness of the N-polar Si-doped InAlGaN layer 424 is 3 nm, and the doping concentration of Si element is 3×10 15 -8×10 15 atoms / cm 3 ; and in the periodic growth of the N-polar Si-doped InAlGaN layer 424, the doping concentration of Si element is gradually decreased from 8×10 15 atoms / cm 3 to 3×10 15 atoms / cm 3 in the epitaxial growth direction;

[0099] The thickness of the Mg-doped ScGaN layer 411 is 4 nm, and the doping concentration of Mg element is 8×10 14 -5×10 15 atoms / cm 3and in the periodically-grown Mg-doped ScGaN layer 411, the doping concentration of Mg element is periodically increased from 8x1018 atoms / cm3 to 5x1019 atoms / cm3 in the epitaxial growth direction. 14 atoms / cm3 3 ; 15 atoms / cm3 3 ;

[0100] The thickness of the BGaN layer 412 is 4 nm.

[0101] The preparation method of the nitride light-emitting diode epitaxial wafer comprises the following steps:

[0102] (1) providing a substrate 1, and the substrate is selected from sapphire substrates;

[0103] (2) depositing a buffer layer 2 (AlN buffer layer) on the substrate 1, and the thickness of the buffer layer 2 is 15 nm;

[0104] (3) comprising the following steps:

[0105] (3.1) pre-treating the substrate 1 with the deposited buffer layer 2, and the pre-treatment method is as follows: transferring the substrate 1 with the plated buffer layer 2 into a MOCVD device, pre-treating for 6 min under H2 atmosphere, and the treatment temperature is 1020℃, and then nitriding the substrate 1, and the temperature is 1100℃, and the treatment time is 5 min;

[0106] (3.2) depositing an N-type layer 3 on the buffer layer 2, wherein the N-type layer 3 comprises an undoped GaN layer and an Si-doped n-type GaN layer, and depositing the N-type layer 3 on the buffer layer 2 comprises the following steps:

[0107] a. depositing an undoped GaN layer on the buffer layer 2; wherein the growth temperature of the undoped GaN layer is 1100℃, the growth pressure is 150 torr, and the thickness is 3 μm;

[0108] b. depositing an Si-doped n-type GaN layer on the undoped GaN layer; wherein the growth temperature of the Si-doped n-type GaN layer is 1120℃, the growth pressure is 100 torr, the thickness is 3 μm, and the Si doping concentration is 2.5x1019 atoms / cm3. 19 3 ;

[0109] (4) depositing a combination layer 4 on the N-type layer 3; wherein the growth temperature of the combination layer 4 is 980℃, and the growth pressure is 200 torr;

[0110] ​(5) depositing an electron blocking layer 5 on the combination layer 4; wherein the electron blocking layer 5 is an AlInGaN layer, the proportion of Al component in the electron blocking layer 5 is 0.01-0.05, and the Al component concentration gradually changes from 0.01 to 0.05 along the epitaxial layer growth direction, the proportion of In component is 0.01; the thickness of the electron blocking layer 5 is 15 nm, the growth temperature is 965℃, and the pressure is 200 torr;

[0111] (6) depositing a P-type layer 6 on the electron blocking layer 5; wherein the P-type layer 6 is a P-type GaN layer, the growth temperature of the P-type GaN layer is 985℃, the thickness is 15 nm, the growth pressure is 200 torr, and the Mg doping concentration is 2×10 20 atoms / cm 3 .

[0112] Embodiment 2

[0113] This embodiment provides a nitride light-emitting diode epitaxial wafer, the structure and preparation method are basically the same as those of embodiment 1, and the difference lies in that:

[0114] The N-face polarity quantum well layer 421 of this embodiment is an InGaN layer, and the thickness is 2 nm;

[0115] The N-face polarity quantum barrier layer 422 is an HGaN layer, H is Al, that is, the N-face polarity quantum barrier layer 422 is an AlGaN layer; the thickness of the N-face polarity quantum barrier layer 422 is 9 nm;

[0116] The proportion of Al component in the Ga-face polarity AlGaN layer 423 is 0-0.3, and the Al component is grown in a gradual change mode of 0 to 0.3 in the periodic growth of the Ga-face polarity AlGaN layer 423, that is, the Al component linearly changes from 0 to 0.3; the thickness of the Ga-face polarity AlGaN layer 423 is 35-80 nm, and in the periodic growth, the thickness of the Ga-face polarity AlGaN layer 423 gradually decreases, and the thickness decreases by 5 nm, that is, the thickness of the Ga-face polarity AlGaN layer 423 in each period is 80 nm, 75 nm, 70 nm, 65 nm, 60 nm, 55 nm, 50 nm, 45 nm, 40 nm, and 35 nm;

[0117] The thickness of the N-face polarity Si-doped InAlGaN layer 424 is 3.5 nm, and the doping concentration of Si element is 5×10 15 ~9.3×10 15 atoms / cm 3 ; and in the periodic growth of the N-face polarity Si-doped InAlGaN layer 424, the doping concentration of Si element gradually decreases from 9.3×10 15 atoms / cm 3 to 5×1015 atoms / cm2 3 ;

[0118] The thickness of the Mg-doped ScGaN layer 411 is 3 nm, and the doping concentration of Mg element is 2x1019atoms / cm2. 15 atoms / cm2 3 ; The thickness of the BGaN layer 412 is 5 nm.

[0119] Example 3

[0120] This example provides a nitride light-emitting diode epitaxial wafer, the structure and preparation method of which are basically the same as those of Example 1, except that:

[0121] In step a, the growth temperature of the undoped GaN layer is 1050°C, the growth pressure is 100 torr, and the thickness is 2 μm;

[0122] In step b, the growth temperature of the Si-doped n-type GaN layer is 1180°C, the growth pressure is 200 torr, the thickness is 2 μm, and the Si doping concentration is 1.5x1019atoms / cm2. 19 atoms / cm2 3 .

[0123] Comparative Example 1

[0124] This comparative example is a commercially available nitride light-emitting diode epitaxial wafer. The nitride light-emitting diode epitaxial wafer of this comparative example comprises, from bottom to top, a substrate, a buffer layer, an N-type layer, a multi-quantum well layer, an electron blocking layer, and a P-type layer.

[0125] Comparative Example 2

[0126] This comparative example provides a nitride light-emitting diode epitaxial wafer, the structure and preparation method of which are basically the same as those of Example 1, except that:

[0127] The proportion of Al component in the Ga-face polar AlGaN layer 423 in each period of this comparative example is 0.1, and the thickness is 30 nm.

[0128] Performance test:

[0129] The nitride light-emitting diode epitaxial wafers obtained in Examples 1-3 and Comparative Examples 1-2 were prepared into 10 mil*24 mil LED chips using the same chip process conditions. 300 LED chips were extracted from each sample, and their luminous efficiency was tested under a working current of 120 mA. Based on Comparative Example 1, the light efficiency improvement rate of each example and comparative example was calculated:

[0130] Light efficiency improvement rate = (improved light efficiency - original light efficiency) / original light efficiency x 100%;

[0131] In the above calculation formula: the original light efficiency is the light efficiency of Comparative Example 1.

[0132] Specifically, the test results are shown in Table 1 below:

[0133] Table 1 Performance test results of Examples 1-4 and Comparative Examples 1-5

[0134] Light efficiency improvement rate Example 1 1.85％ Example 2 1.59％ Example 3 1.63％ Comparative Example 1 —— Comparative Example 2 1.42％

[0135] From the above experimental data, compared with the traditional LED epitaxial structure of Comparative Example 1 using a multi-quantum well layer between the N-type layer and the electron blocking layer, the nitride light-emitting diode epitaxial wafer of the technical solution improves and optimizes the overall structure, and sets a combination layer 4 between the N-type layer 3 and the electron blocking layer 5. The combination layer 4 includes an electron trap layer 41 and a polarization layer 42 which are sequentially stacked from bottom to top. The electron trap layer 41 is an alternating structure of a Mg-doped ScGaN layer 411 and a BGaN layer 412. The polarization layer 42 includes N-polar quantum well layers 421, N-polar quantum barrier layers 422, Ga-polar AlGaN layers 423, and N-polar Si-doped InAlGaN layers 424 which are sequentially and periodically alternately grown from bottom to top. The technical solution improves and optimizes the structure of the epitaxial wafer, which can increase the effective recombination efficiency of holes and electrons, reduce electron overflow, and reduce the Stark efficiency of the multi-quantum well, thereby improving the light-emitting efficiency. Compared with the LED chip prepared in Comparative Example 1, the photoelectric efficiency of the LED chip prepared in Examples 1-3 is improved by 1.59% to 1.85%. And other electrical properties are good.

[0136] The above disclosure is only a preferred embodiment of the present application, and of course cannot limit the scope of the rights of the present application, so the equivalent changes made according to the claims of the present application still fall within the scope covered by the present application.

Claims

1. A nitride light emitting diode epitaxial wafer comprising a substrate, characterized in that, Further comprising a buffer layer, an N-type layer, a combination layer, an electron blocking layer and a P-type layer which are sequentially stacked on the substrate; The combination layer comprises an electron trap layer and a polarization layer which are sequentially stacked from bottom to top; The electron trap layer comprises Mg-doped ScGaN layers and BGaN layers which are sequentially and periodically alternately grown from bottom to top; The polarization layer comprises N-polar quantum well layers, N-polar quantum barrier layers, Ga-polar AlGaN layers and N-polar Si-doped InAlGaN layers which are sequentially and periodically alternately grown from bottom to top; The proportion of Al component in the Ga-polar AlGaN layer is 0-0.3, and in the periodic growth, the Al component in the Ga-polar AlGaN layer presents an increasing trend in each period; The thickness of the Ga-polar AlGaN layer is 0-110 nm, and in the periodic growth, the thickness of the Ga-polar AlGaN layer gradually decreases, and the thickness decreasing amplitude is 5-10 nm; In the periodic growth of the N-polar Si-doped InAlGaN layer, the doping concentration of Si element is periodically decreased in the epitaxial growth direction.

2. The nitride light emitting diode epitaxial wafer of claim 1, wherein, The thickness of the N-polar Si-doped InAlGaN layer is 3-3.5 nm; The doping concentration of Si element in the N-face polarity Si-doped InAlGaN layer is 1 x 10 14 5 x 10 16 atoms / cm 3 .

3. The nitride light emitting diode epitaxial wafer of claim 1, wherein, The N-polar quantum well layer is an InGaN layer, and the thickness is 2-3.5 nm; The N-polar quantum barrier layer is an HGaN layer, H is a combination of one or more of In, Al, B, Sc and Y, and the thickness of the N-polar quantum barrier layer is 9-16 nm.

4. The nitride light emitting diode epitaxial wafer of claim 1, wherein, The thickness of the Mg-doped ScGaN layer is 3-5 nm, and the doping concentration of Mg element in the Mg-doped ScGaN layer is 1x10 14 atoms / cm 16 . 3 ​ The thickness of the BGaN layer is 3-5 nm.

5. The nitride light emitting diode epitaxial wafer of claim 1, wherein, The number of periods of the alternately grown electron trap layer is 3-6; The number of periods of the alternately grown polarization layer is 7-11; The growth temperature of the combination layer is 780-1000℃, and the growth pressure is 100-500 torr.

6. The nitride light emitting diode epitaxial wafer of claim 1, wherein, The electron blocking layer is an AlInGaN layer, the proportion of Al component in the electron blocking layer is 0.005-0.1, and the proportion of In component is 0.01-0.2; The thickness of the electron blocking layer is 10-40 nm, the growth temperature is 900-1000℃, and the pressure is 100-300 torr.

7. A method for producing a nitride light emitting diode epitaxial wafer, characterized by, A method for preparing the nitride light-emitting diode epitaxial wafer of any one of claims 1-6, comprising the following steps: (1) providing a substrate; (2) depositing a buffer layer on the substrate; (3) depositing an N-type layer on the buffer layer; (4) depositing a combination layer on the N-type layer; (5) depositing an electron blocking layer on the combination layer; (6) depositing a P-type layer on the electron blocking layer.

8. The method of claim 7, wherein the method further comprises: Before step (3), the method further comprises a step of pretreating the substrate with the deposited buffer layer, and the pretreatment method is as follows: The substrate with the deposited buffer layer is transferred into a MOCVD device, and pretreated in H2 atmosphere for 1-10 min at a temperature of 1000-1200℃, and then nitrided.

9. The method of claim 8, wherein the method further comprises the step of: The N-type layer comprises an undoped GaN layer and a Si-doped n-type GaN layer, and step (3) comprises the following steps: ​ a. depositing the non-doped GaN layer on the buffer layer; wherein the growth temperature of the non-doped GaN layer is 1050-1200 ℃, the growth pressure is 100-600 torr, and the thickness is 1-5 μm; b. depositing the Si-doped n-type GaN layer on the non-doped GaN layer; wherein the growth temperature of the Si-doped n-type GaN layer is 1050-1200 ℃, the growth pressure is 100-600 torr, the thickness is 2-3 μm, and the Si doping concentration is 1×10 19 ~5×10 19 atoms / cm 3 .

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