Communication device, driving device, display device, and communication method

By using a serial peripheral interface and daisy chain-coupled receiving device in the communication device, the problem of increased circuit size and manufacturing cost of communication device in the prior art is solved, and more efficient resource utilization and lower power consumption are achieved .

CN119422136APending Publication Date: 2025-02-11SONY GROUP CORP +1
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Patent Information

Application Number
CN202380052748.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-07-29
Filing Date
2023-07-12
Publication Date
2025-02-11

AI Technical Summary

Technical Problem

There is a trend of increasing circuit size and manufacturing cost in existing communication equipment, which is difficult to effectively suppress this growth.

Method used

By using multiple receiving devices coupled with serial peripheral interface (SPI) and daisy-chain in communication devices, the transmission of data signals and clock signals is realized, and daisy-chained through a single chip select signal, avoiding a large number of addresses Use of decoder and external terminals.

Benefits of technology

This solution effectively suppresses the increase in circuit size and manufacturing costs of communication equipment, reduces power consumption, and improves the freedom of design layout.

✦ Generated by Eureka AI based on patent content.

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Abstract

A communication device according to one embodiment of the present disclosure comprises: a transmission-side device having a serial peripheral interface; and a plurality of reception-side devices capable of receiving the data signal and the clock signal from the transmission-side device. The plurality of reception-side devices are daisy chains using signal lines capable of transmitting chip selection signals.
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Description

Technical Field

[0001] The present disclosure relates to a communication device, a driving device, a display device, and a communication method. Background Art

[0002] An apparatus has been proposed that includes a plurality of serial peripheral interface (SPI) devices coupled in a daisy chain via a slave data input (SDI) and a slave data output (SDO) of the SPI.

[0003] Reference List

[0004] Patent Literature

[0005] Patent Document 1: WO2018 / 0276157 Summary of the invention

[0006] Communication devices are expected to suppress an increase in their circuit size.

[0007] It is desirable to provide a communication device while suppressing an increase in the circuit size thereof.

[0008] A communication device according to an embodiment of the present disclosure includes: a transmitting device including a serial peripheral interface; and a plurality of receiving devices configured to receive a data signal and a clock signal from the transmitting device. The plurality of receiving devices are coupled in a daisy chain via a signal line configured to transmit a chip select signal.

[0009] A driving device according to an embodiment of the present disclosure includes: a plurality of driving units configured to drive light-emitting elements; and a control unit including a serial peripheral interface and configured to control the driving units. The driving units are configured to receive a data signal and a clock signal from the control unit. The plurality of driving units are coupled in a daisy chain via a signal line configured to transmit a chip select signal.

[0010] A display device according to an embodiment of the present disclosure includes: a light source including a light emitting element; and a light emitting control unit configured to control the light source. The light emitting control unit includes: a plurality of driving units configured to drive the light emitting elements; and a control unit including a serial peripheral interface and configured to control the driving unit. The driving unit is configured to receive a data signal and a clock signal from the control unit. The plurality of driving units are coupled in a daisy chain via a signal line configured to transmit a chip select signal.

[0011] The communication method according to the embodiment of the present disclosure is a communication method between a transmitting device including a serial peripheral interface and a plurality of receiving devices coupled in a daisy chain, and includes: sending a chip select signal to only one of the plurality of receiving devices; and sending a chip select signal from one of the receiving devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1is a diagram showing a schematic configuration example of a light source driving system according to an embodiment of the present disclosure.

[0013] Figure 2 is a diagram showing a configuration example of a drive device according to an embodiment of the present disclosure.

[0014] Figure 3 is a diagram for describing an example of communication performed in a driving device according to an embodiment of the present disclosure.

[0015] Figure 4 is a timing chart showing an operation example of the driving device according to an embodiment of the present disclosure.

[0016] Figure 5 is a diagram illustrating an example of arrangement of a control portion and a drive portion according to an embodiment of the present disclosure.

[0017] Figure 6 is a diagram for describing an example of communication performed in a driving device according to an embodiment of the present disclosure.

[0018] Fig. 7A is a diagram for describing an example of communication performed in a drive device according to a modification example of the present disclosure.

[0019] Figure 7B is a diagram for describing an example of communication performed in a drive device according to a modification example of the present disclosure.

[0020] Figure 8 is a diagram showing an example of the appearance of a display device.

[0021] Fig. 9 is a diagram showing a configuration example of a main body section of a display device.

[0022] Fig.10 is a diagram showing a configuration example of a panel module of a display device. DETAILED DESCRIPTION

[0023] Next, with reference to the drawings, details of the embodiments of the present disclosure will be described. Note that the description will be given in the following order.

[0024] 1. Implementation Method

[0025] 2. Modifications

[0026] 3. Application Examples

[0027] <1. Implementation Method>

[0028] Figure 11 is a diagram showing a schematic configuration example of a light source driving system as an example of a communication system according to an embodiment of the present disclosure. The light source driving system 1 as an example of a communication system includes a driving device 100 and a light source 200. The driving device 100 is an example of a communication device according to the present disclosure.

[0029] The light source driving system 1 is a system that enables driving the light source 200. The light source driving system 1 is a system (or device) that enables controlling light emission from the light source 200, and may also be referred to as a light source control system. The light source driving system 1 is a system that enables controlling a backlight.

[0030] The light source driving system 1 can be applied to various types of display devices such as a television (TV) or a monitor. Examples of the display device include a display device using a liquid crystal panel, an organic electroluminescent (EL) panel, a light emitting diode (LED) panel, or the like.

[0031] The light source 200 includes a plurality of light emitting elements 210. For example, the light emitting element 210 is a light emitting diode (LED). The light source 200 may include a plurality of light emitting elements 210 arranged two-dimensionally in a matrix form. The light emitting element 21 of the light source 200 may generate light and emit the light to the outside. Note that the light emitting element 21 may be an organic EL element.

[0032] The driving device 100 is configured to drive the light source 200. Figure 1 As shown, the driving device 100 as an example of a communication device includes a control unit 110 and a plurality of driving units 120. The control unit 110 is an example of a transmitting device. The driving unit 120 is an example of a receiving device. Note that the driving device 100 is a light emission control unit and can also be referred to as a control device configured to control the light source 200.

[0033] The control section 110 includes a processor and a memory (ROM, RAM, etc.), and is configured to perform various signal processing. The control section 110 performs signal processing (information processing) by loading and executing a program embedded inside. The control section 110 receives a clock or data indicating an operation mode given from the outside, and controls each section of the driving device 100 (light emission control section). The control section 110 may also be referred to as a signal processing section (signal processing circuit).

[0034] The control section 110 is configured to control the plurality of driving sections 120 . The control section 110 is a control circuit and is implemented by, for example, a microcontroller unit (MCU). The control section 110 may include a serial peripheral interface and control the driving section 120 .

[0035] The control section 110 supplies a signal for controlling the driving section 120 to the driving section 120 and controls the operation of the driving section 120. The control section 110 generates a signal related to the brightness (brightness) of the light of the light emitting elements 210 of the light source 200. For example, the control section 110 sends a signal related to the magnitude of the voltage and current to be supplied to each light emitting element 210 of the light source 200 to each driving section 120.

[0036] The driving section 120 is configured to drive the light emitting element 210. The driving section 120 may be a driving circuit and controls the operation of the light emitting element 210. For example, the driving section 120 is configured to control the voltage and current to be supplied to each light emitting element 210 of the light source 200. For example, the driving section 120 is implemented by a plurality of circuits including a digital circuit section, a digital-to-analog converter (DAC) section, an amplifier circuit, etc. The digital circuit section enables digital signal processing to be performed.

[0037] like Figure 1 As shown schematically, a driving section 120 is provided for each light emitting element 210. The driving section 120 can supply a voltage and a current for driving the light emitting element 210 to the light emitting element 210 coupled to the driving section 120, and can control the light emission from the light emitting element 210. The driving section 120 may also be referred to as a driving IC (driving circuit). In the light source driving system 1, the control section 110 and each driving section 120 communicate with each other using SPI according to a communication protocol, and control each light emitting element 210 of the light source 200. Note that a single driving section 120 may be provided for a plurality of light emitting elements 210.

[0038] Figure 2 1 is a diagram showing a configuration example of a drive device as an example of a communication device according to an embodiment. As described above, the drive device 100 includes a control unit 110 and a plurality of drive units 120 ( Figure 2 The driving parts 120A to 120N in FIG. Figure 2 As shown, a plurality of driving units 120 (driving units 120A to 120N) are coupled in a daisy chain. The control unit 110 is implemented by a microcontroller (MCU) including an SPI interface using serial communication. The control unit 110 is a host device, and the driving unit 120 is a client device.

[0039] like Figure 2 As shown, the control section 110 may include an SCK terminal, a DATA terminal, and a chip select (CS) terminal as a serial peripheral interface. The control section 110 also includes a return terminal. Note that the DATA terminal of the control section 110 is also known by other names (eg, including a MOSI terminal).

[0040] exist Figure 2In the example shown, the driving parts 120A to 120N each include an interface compatible with SPI and are implemented by an LED driver IC. The driving parts 120A to 120N each include an SCK terminal, a DATA terminal, a CS terminal, and a DTEN_O terminal. Note that the DATA terminal of the driving part 120 is also known by other names (for example, including an SDI terminal).

[0041] The driving device 100 is provided with a signal line 10, a signal line 20 and a signal line 30 ( Figure 2 The signal line 10 is a signal line that allows the clock signal SCK from the control section 110 to be transmitted. The signal line 20 is a signal line that allows the data signal DATA from the control section 110 to be transmitted.

[0042] The signal line 10 and the signal line 20 are commonly wired between the driving section 120A and the driving section 120N. In addition, the signal line 30 is a signal line that allows the chip select signal SCK to be transmitted. The driving device 100 includes the driving sections 120A to 120N coupled in a daisy chain via the signal line 30. It can also be said that the plurality of driving sections 120 are connected in series via the signal line 30.

[0043] The SCK terminal of the control section 110 is electrically coupled in common to the respective SCK terminals of the driving sections 120A to 120N. Figure 2 In the example shown, the SCK terminal of the control section 110 is coupled to the respective SCK terminals of the driving sections 120A to 120N via the signal line 10, which enables the transmission of the clock signal SCK. The clock signal SCK is commonly input from the control section 110 to the respective SCK terminals of the driving sections 120A to 120N via the SCK terminal of the control section 110.

[0044] The DATA terminal of the control unit 110 is electrically coupled to the DATA terminals of the driving units 120A to 120N. Figure 2 In the example shown, the DATA terminal of the control unit 110 is coupled to the respective DATA terminals of the driving units 120A to 120N via the signal line 20, which allows the data signal DATA to be transmitted. The data signal DATA is commonly input from the control unit 110 to the respective DATA terminals of the driving units 120A to 120N via the DATA terminal of the control unit 110.

[0045] Figure 3 is a diagram for describing an example of communication performed in a driving device according to an embodiment. Figure 3An example of a timing diagram of communication between the control section 110 and the driving section 120 is schematically shown. The control section 110 can communicate with the driving sections 120A to 120N using an SPI interface. The control section 110 and the driving sections 120A to 120N transmit / receive a chip select signal CS, a clock signal SCK, a data signal DATA, and the like.

[0046] The chip select signal CS is a signal for selecting a communication target. The clock signal SCK is a clock signal that alternates between a high level and a low level. The clock signal SCK is transmitted from the control section 110 to the drive sections 120A to 120N.

[0047] The data signal DATA is a data signal to be transmitted from the control unit 110 to the driving units 120A to 120N. For example, the data signal DATA has the following information: Figure 3 The data configuration shown in the example in . In synchronization with the transition timing (rising edge or falling edge) of the clock signal SCK, the control unit 110 transmits the data signal DATA serving as serial data.

[0048] Through the data signal DATA, for example, control information of the light emitting element 210 (such as information related to the driving voltage of the light emitting element 210) is transmitted from the control section 110 to the driving sections 120A to 120N. For example, in a case where the input chip select signal is in an active state (i.e., an enabled state (e.g., a low level)), the driving sections 120A to 120N sample the data signal DATA, and import and hold the data signal DATA in synchronization with the rising of the chip select signal SCK.

[0049] As described above, the driving device 100 according to the embodiment includes a plurality of driving sections 120 (driving sections 120A to 120N) coupled in a daisy chain, and is configured to sequentially forward (transmit) a chip select signal from the control section 110. The control section 110 transmits the chip select signal to only one of the plurality of driving sections 120 coupled in a daisy chain.

[0050] In the driving device 100, a plurality of driving sections 120 are coupled in a daisy chain via a signal line 30, and a chip select signal is sequentially transmitted to the plurality of driving sections 120. The chip select signal is transmitted from one of the driving sections 120 to the next driving section 120. It can also be said that the driving section 120 re-outputs the chip select signal to the driving section 120 in the next stage.

[0051] The chip select signal CS generated by the control unit 110 is input to the driving unit 120 in the first stage among the plurality of driving units 120 ( Figure 2The chip select signal is input from the driver 120 in the previous stage to the driver 120 in the second and subsequent stages. A plurality of driver 120 used as a client device group can operate like a shift register. The driver device 100 makes it possible to control a large number of driver 120 using an SPI peripheral that an MCU generally has according to a communication protocol. Next, the driver device 100 according to the present embodiment will be described in more detail.

[0052] Figure 4 is a timing chart showing an operation example of the driving device according to the embodiment. Figure 2 as well as Figure 4 An example of the operation of the drive device 100 will be described with reference to the timing diagram in FIG. Figure 2 As shown, among the driving sections 120A to 120N, the driving section 120A in the first stage has a CS terminal, which is electrically coupled to the CS terminal of the control section 110 via the signal line 30a. The chip select signal CS is input to the CS terminal of the driving section 120A from the control section 110. It can also be said that the control section 110 can send the chip select signal CS to the first driving section 120A.

[0053] exist Figure 4 In the time period between time t1 and time t2 shown, the driver section 120A in the first stage uses its digital circuit section in the driver section 120A to import data in response to the chip select signal CS. In this case, the driver section 120A starts importing the data signal DATA in response to the falling edge of the chip select signal CS. Note that the digital circuit section of the driver section 120 in the second stage and subsequent stages is in a stopped state because the signal input to their CS terminals is at a high level, that is, in an inactive state.

[0054] The driving section 120A receives data for the driving section 120A, which is data of a predetermined number of bits included in the data signal DATA input from the control section 110. Note that the number of bits, that is, the data length of the data to be introduced into each driving section 120 can be set in advance. Each driving section 120 can receive and sample data of a specified number of bits. For example, each driving section 120 introduces and holds data of several tens of bits (in Figure 3 The example shown includes 88 bits of data dt0 to dt87).

[0055] After receiving the data for the driver 120A, the driver 120A outputs the chip select signal CS to the driver 120B in the second phase. Figure 2 and Figure 4In the example shown, the driving section 120A outputs the chip select signal CS from the control section 110 to the driving section 120B as the signal DTEN_O_A via the DTEN_O terminal. The signal DTEN_O_A serves as a signal indicating completion of reception of data for the driving section 120A.

[0056] The driving section 120B in the second phase has a CS terminal electrically coupled to the DTEN_O terminal of the driving section 120A in the first phase via the signal line 30b. The signal DTEN_O_A is input from the driving section 120A to the CS terminal of the driving section 120B as a chip select signal.

[0057] exist Figure 4 In the time period between time t2 and time t3 shown, the driver section 120B in the second stage uses its digital circuit section in the driver section 120B to import data in response to the signal DTEN_O_A used as a chip select signal. In this case, the driver section 120B starts importing the data signal DATA in response to the falling edge of the signal DTEN_O_A. Note that the digital circuit section of the driver section 120 in the third stage and subsequent stages is in a stopped state because the signal input to their CS terminals is at a high level, that is, in an inactive state. The digital circuit section of the first stage is also in a stopped state.

[0058] The driving section 120B receives data for the driving section 120B, which is data of a predetermined number of bits following the data for the driving section 120A included in the data signal DATA input from the control section 110. After receiving the data for the driving section 120B, the driving section 120B outputs a signal DTEN_O_B to the driving section 120C via its DTEN_O terminal in response to the chip select signal CS. The signal DTEN_O_B serves as a signal indicating completion of reception of the data for the driving section 120B.

[0059] The driving section 120C in the third phase has a CS terminal electrically coupled to the DTEN_O terminal of the driving section 120B in the second phase via the signal line 30c. A signal DTEN_O_B is input from the driving section 120B to the CS terminal of the driving section 120C as a chip select signal.

[0060] exist Figure 4In the time period between time t3 and time t4 shown, the driver section 120C in the third stage uses its digital circuit section in the driver section 120C to import data in response to the signal DTEN_O_B used as a chip select signal. In this case, the driver section 120C starts importing the data signal DATA in response to the falling edge of the signal DTEN_O_B. Note that the digital circuit section of the driver section 120 in the fourth stage and subsequent stages is in a stopped state because the signal input to their CS terminals is at a high level, that is, in an inactive state. The digital circuit section of the second stage is also in a stopped state.

[0061] The driving section 120C receives data for the driving section 120C, which is data of a predetermined number of bits following the data for the driving section 120B included in the data signal DATA input from the control section 110. After receiving the data for the driving section 120C, the driving section 120C outputs the signal DTEN_O_C to the driving section 120D via its DTEN_O terminal in response to the chip select signal CS. The signal DTEN_O_C serves as a signal indicating completion of reception of the data for the driving section 120C. Also in the fourth stage and subsequent stages, data is imported and the chip select signal is forwarded (transmitted).

[0062] exist Figure 4 During the time period between time t5 and time t6 shown, the driving section 120N in the Nth stage uses its digital circuit section in the driving section 120N to import data in response to the signal input to its CS terminal from the driving section 120 in the previous stage. The driving section 120N receives data for the driving section 120N, which is data of a predetermined number of bits included in the data signal DATA input from the control section 110. After receiving the data for the driving section 120N, the driving section 120N outputs the signal DTEN_O_N to the control section 110 via its DTEN_O terminal in response to the chip select signal CS.

[0063] The control section 110 has a return terminal electrically coupled to the DTEN_O terminal of the driving section 120N in the Nth phase via the signal line 30n+1. The signal DTEN_O_N is input from the driving section 120N into the return terminal of the control section 110. The signal DTEN_O_N serves as a signal indicating completion of reception of data.

[0064] As described above, in the driving device 100 according to the present embodiment, the chip select signal is transmitted to / from the plurality of driving sections 120 coupled in a daisy chain. The control section 110 uses a single chip select signal to sequentially select each driving section 120, perform communication, and control each driving section 120.

[0065] Therefore, there is no need to install a digital circuit including a large number of address decoders and the like for individually addressing each drive section 120, a large number of external terminals for addressing, a chip select signal line dedicated to each drive section 120, and the like. This makes it possible to suppress an increase in the circuit size of the drive device 100 and the light source drive system 1. This makes it possible to suppress an increase in the manufacturing cost of the drive device 100 and the light source drive system 1.

[0066] According to the present embodiment, it is possible to select from each drive unit 120 by using a single chip select signal, regardless of the number of drive units 120 coupled to the control unit 110, that is, the number of chips of the driver IC. This makes it possible to reduce the size of the area occupied by the wiring pattern and improve the degree of freedom in designing the layout. In addition, the number of controllable drive units 120 is not limited, except for restrictions such as communication time or the number of buffers. The technology according to the present disclosure is advantageously applicable to solutions for display elements having drive units 120, the number of which can be increased or decreased depending on their display areas.

[0067] In addition, as described above, the chip select signal is re-output in synchronization with the clock signal SCK, that is, re-buffered in each driving section 120. This makes it possible to correctly perform data communication even when the wiring has a long length, and to provide a driving device 100 that is compatible with an increase in the size of the display area. In addition, when the chip select signal in the activated state is not supplied to the driving section 120, the digital circuit section of the driving section 120 enters a stopped state. This makes it possible to reduce power consumption. Therefore, it is possible to disperse the power consumption time and contribute to reducing the size of the power supply.

[0068] Figure 5 : is a diagram showing an example of the arrangement of a control section and a drive section according to an embodiment. Figure 5 As shown, the driving device 100 includes a first substrate 91 and a plurality of second substrates 92. Figure 5 In the example shown, the number of second substrates 92 in the driving device 100 is 12. The first substrate 91 is provided with a control unit 110. Each of the plurality of second substrates 92 is provided with a plurality of driving units 120 (in Figure 5 , the number of the driving units 120 is 40). As described above, the plurality of driving units 120 on the second substrate 92 are coupled in a daisy chain.

[0069] exist Figure 5 In the example shown, each second substrate 92 is provided with signal lines (the above-mentioned signal lines 10, 20 and 30) for transmitting a clock signal SCK, a data signal DATA and a chip select signal CS. The chip select signal CS is supplied from the control unit 110 to one of the plurality of drive units 120 on the second substrate 92 (in other words, the first drive unit 120).

[0070] By using a single chip select signal for each second substrate 92, it is possible to sequentially select the respective drive sections 120, communicate, and control the respective drive sections 120. This makes it possible to suppress an increase in the circuit size thereof. Note that it is also possible to daisy-chain all the drive sections 120 of a plurality of second substrates 92 (for example, the number of second substrates 92 is 12) and select / control the respective drive sections 120 by using a single chip select signal.

[0071] An example in which the drive section 120 re-outputs the chip select signal has been described above. However, for the drive section 120, a chip select signal subjected to pulse width modulation (PWM) may also be output. For example, the drive section 120 may add data (status data) related to the state of the drive section 120 or the light emitting element 210 to the chip select signal by modulating the pulse width of the chip select signal, and may output the chip select signal. For example, the drive section 120 may output a chip select signal including status data related to the amount of current flowing into the light emitting element 210 to the control section 110 or another drive section 120 that is in the next stage and coupled to the drive section 120.

[0072] For example, Figure 6 As shown in the example in FIG. 1 , the driving section 120A in the first stage can receive 88-bit data for the driving section 120A, and then set the signal DTEN_O_A to a low level in synchronization with the falling edge of the clock signal SCK, and output the signal DTEN_O_A having the state data of the low level and the pulse width. The signal DTEN_O_A has a pulse width corresponding to the state data ( Figure 6 2-bit pulse width in ).

[0073] In addition, for example, each of the driving sections 120 in the second and subsequent stages can modulate the pulse width of the chip select signal input from the driving section 120 in the previous stage, and can output the signal DTEN_O, that is, the chip select signal to which the state data is added. The driving section 120N in the Nth stage can output the signal DTEN_O_N to the control section 110, and the signal DTEN_O_N is added with the state data of each driving section 120 in the first stage to the Nth stage. For the control section 110, in response to the signal DTEN_O_N received via the return terminal, the state of the driving section 120 can be identified and each driving section 120 can be controlled.

[0074] Note that it is also possible to add only high priority status data to the chip select signal in the Nth phase, and send the signal DTEN_O_N from the driving section 120N to the control section 110. For example, each driving section 120 may add status data indicating a lack of driving voltage for the light emitting element 210 as high priority data to the chip select signal, and may output such a signal.

[0075] This makes it possible to increase the voltage supplied to the light emitting element 210 and improve the change in the brightness (brightness) of the light from the light emitting element 210, etc., when the amount of current of the light emitting element 210 is insufficient due to the change in the threshold voltage of the light emitting element 210 (e.g., LED). For example, the power supply voltage can be adjusted in consideration of the light emitting element 210 having the highest threshold voltage, etc. This makes it possible to appropriately control the driving of the light source 200.

[0076] [Function and Effect]

[0077] The communication device (driving device 100) according to the present embodiment includes: a transmitting device (control unit 110) including a serial peripheral interface; and a plurality of receiving devices (driving unit 120) configured to receive a data signal and a clock signal from the transmitting device. The plurality of receiving devices are coupled in a daisy chain via a signal line (signal line 30) configured to transmit a chip select signal.

[0078] In the drive device 100 according to the present embodiment, the chip select signal is transmitted to / from the plurality of drive sections 120 coupled in a daisy chain. Therefore, it is not necessary to install a large number of address decoders or the like to individually address the respective drive sections 120. This makes it possible to suppress an increase in the circuit size of the drive device 100.

[0079] Next, a modification of the present disclosure will be described. Hereinafter, structural elements similar to those of the above-described embodiment will be denoted by the same reference symbols as those of the above-described embodiment, and duplicate description will be appropriately omitted.

[0080] <2. Modifications>

[0081] The number of bits of data to be introduced in each driving section 120 (i.e., data length) may be varied depending on the communication between the control section 110 and the driving section 120. As an example, the control section 110 stores data indicating a set value of the data length in a specific bit of the data of the data signal DATA (e.g., the first bit of the data), and transmits the data signal DATA to the driving section 120. In response to the received data signal DATA, the driving section 120 recognizes the data length of each driving section 120 and controls (sets) a digital circuit section, etc. This allows the control section 110 and each driving section 120 to transmit / receive data of a changed data length.

[0082] As described above, the data length of each driving section 120 can be set by transmitting the data signal DATA indicating the set data length from the control section 110 to the driving section 120. Note that it is also possible for the control section 110 to store data indicating the set value of the data length in a different bit of the data other than the first bit and transmit such data.

[0083] Fig. 7A and Figure 7B is a diagram for describing an example of communication performed in a drive device according to a modification example of the present disclosure. Fig. 7A A case where the first (first time) communication from the control section 110 to each driving section 120 (for example, the driving section 120A to the driving section 120N) is performed is shown. Figure 7B The case where the second communication from the control unit 110 to each driving unit 120 is performed is shown.

[0084] exist Fig. 7A In the first communication shown, the control section 110 transmits a data signal having a bit length (e.g., 88 bits) of a default value (default data length). As the data signal DATA, the control section 110 transmits a data signal including 88 bits of data per driving section 120 (in other words, a single phase driver IC). In this case, the control section 110 transmits the data signal DATA including the first bit of data dt0 to each driving section 120, the first bit of data dt0 being data indicating a set value of the data length.

[0085] Each drive unit 120 receives and imports 88-bit data, and sets the data length to be imported in the next communication and subsequent communications in response to the data dt0 of the first bit. For example, in the case where the data dt0 indicates "1", the data length is set to 86 bits. In the case where the data dt0 indicates "0", the data length is set to 88 bits. In the example shown in FIG. 7, each drive unit 120 sets the data length to be imported in the next communication and subsequent communications to 86 bits in response to the value "1" in the data dt0.

[0086] like Figure 7B As shown, in the second communication after the first communication, the control unit 110 sends an 86-bit data signal, that is, data of a changed bit length. As the data signal DATA, the control unit 110 sends a data signal including 86 bits of data for each driving unit 120. For each driving unit 120, 86 bits of data can be received and imported.

[0087] <3. Application Examples>

[0088] The above-described light source driving system 1 , driving device 100 , etc. can be applied to various types of display devices. For example, the technology according to the present disclosure can be advantageously applied to a display device that enables backlight local dimming.

[0089] Figure 8 The appearance of the display device is shown. The display device 101 includes a light source device 130 and can be used as a flat-panel television device, for example. The display device 101 has a configuration in which a flat-panel-shaped main body portion 102 for image display is supported by a stand 103 .

[0090] Note that the display device 101 is placed on a horizontal surface such as a floor, a shelf, or a table, and is used as a fixed device in a state where the stand 103 is attached to the main body 102. However, the display device 101 may be used as a wall-mounted device in a state where the stand 103 is detached from the main body 102.

[0091] Fig. 9 yes Figure 8 1 is an exploded view of the main body 102 shown. For example, the main body 102 includes a front outer member (frame) 111, a panel module 112, and a rear outer member (rear cover) 113 in order from the front side (viewer side). The front outer member 111 is a frame-shaped member covering the front edge portion of the panel module 112, and a pair (or more than one pair) of speakers 114 are provided on the lower side of the front outer member. Note that a case where no speakers are provided, such as a computer monitor, can also be considered.

[0092] The panel module 112 is fixed to the front exterior member 111. A power supply board 115 and a signal board 116 are mounted on the rear surface of the panel module 112, and a mounting fixture 117 is fixed to the rear surface of the panel module 112. The mounting fixture 117 is used to mount a wall-mounted bracket, a component such as a board, and the stand 103. The rear exterior member 113 covers the rear surface and side surfaces of the panel module 112.

[0093] Fig.10 yes Fig. 9 1 is an exploded view of the panel module 112. For example, the panel module 112 includes, in order from the front side (viewer side), a front housing (top frame) 121, a liquid crystal panel 122, a frame-shaped member (middle frame) 80, a light source device 130, a rear housing (rear frame) 124, and a timing controller board 127.

[0094] The front housing 121 is a frame-shaped metal component that covers the front edge portion of the liquid crystal panel 122. For example, the liquid crystal panel 122 includes a liquid crystal cell 122A, a source plate 122B, and a flexible board 122C such as a chip-on-film (COF) coupling these components. The frame-shaped member 123 is a resin component that maintains the frame shape of the liquid crystal panel 122. The rear housing 124 is a metal component including iron (Fe) or any other raw material that accommodates the liquid crystal panel 122, the frame-shaped member 123, and the light source device 130. The timing controller board 127 is also mounted on the rear surface of the rear housing 124.

[0095] In the display device 101, an image is displayed by causing the liquid crystal panel 122 to selectively transmit light from the light source device 130. For example, by applying the technology according to the present disclosure to the display device 101, reduction in circuit size is expected.

[0096] The technology according to the present disclosure is applicable to various products. For example, the communication system, communication device, etc. according to the present disclosure are applicable to various types of electronic equipment including a serial peripheral interface.

[0097] The present technology has been described above with reference to the embodiments, variations and application examples. However, the present technology is not limited thereto, and various variations can be made to the present technology. For example, the above variations have been described as variations of the embodiments. In addition, the structural elements according to the various variations can be appropriately combined for use.

[0098] A communication device according to an embodiment of the present disclosure includes: a transmitting device including a serial peripheral interface; and a plurality of receiving devices configured to receive a data signal and a clock signal from the transmitting device. The plurality of receiving devices are coupled in a daisy chain via a signal line configured to transmit a chip select signal. Therefore, it is not necessary to install a large number of external terminals, a large number of address decoders for individually addressing receiving devices, etc. This makes it possible to suppress an increase in circuit size.

[0099] Note that the effects described herein are for illustrative purposes only and there may be other effects. In addition, the present technology may be configured as follows. (1)

[0101] A communication device, comprising:

[0102] a transmitting device, comprising a serial peripheral interface; and

[0103] A plurality of receiving devices are configured to receive data signals and clock signals from the transmitting devices,

[0104] Wherein, a plurality of receiving devices are coupled in a daisy chain via a signal line configured to transmit a chip select signal. (2)

[0106] The communication device according to (1), wherein the transmitting device is configured to transmit the chip select signal only to one of the plurality of receiving devices coupled in a daisy chain. (3)

[0108] The communication device according to (1) or (2), wherein the transmitting device is configured to transmit the data signal and the clock signal to each of a plurality of receiving devices coupled in a daisy chain. (4)

[0110] The communication device according to any one of (1) to (3), wherein the plurality of receiving devices include: a first receiving device configured to output a chip select signal input from the transmitting device, and a second receiving device configured to output the chip select signal input from the first receiving device. (5)

[0112] The communication device according to (4), wherein the first receiving device is configured to receive the first data of a predetermined number of bits included in the data signal input from the transmitting device, and then output the chip select signal to the second receiving device. (6)

[0114] The communication device according to (4) or (5), wherein

[0115] The plurality of receiving devices include a third receiving device configured to output a chip select signal input from the second receiving device, and

[0116] The second receiving device is configured to receive second data of a predetermined number of bits subsequent to the first data included in the data signal, and then output a chip select signal to the third receiving device. (7)

[0118] The communication device according to (1), wherein the receiving device is configured to synchronize with a clock signal input from the transmitting device and output a chip select signal. (8)

[0120] The communication device according to any one of (1) to (7), wherein the receiving means is configured to output a chip select signal having a modified pulse width. (9)

[0122] The communication device according to (8), wherein the transmitting device is configured to receive a chip select signal having a pulse width modified by the plurality of receiving devices. (10)

[0124] The communication device according to any one of (1) to (9), wherein the transmitting device is configured to transmit, to the receiving device, a data signal including data related to a number of bits of data to be transmitted. (11)

[0126] The communication device according to any one of (1) to (10), wherein:

[0127] The receiving device includes a driving section configured to drive the light emitting element, and

[0128] The transmitting device includes a control unit configured to control the driving unit. (12)

[0130] A driving device, comprising:

[0131] a plurality of driving units configured to drive the light emitting elements; and

[0132] a control unit including a serial peripheral interface and configured to control the driving unit,

[0133] The driving unit is configured to receive a data signal and a clock signal from the control unit, and

[0134] The plurality of driving sections are coupled in a daisy chain via a signal line configured to transmit a chip select signal. (13)

[0136] A display device, comprising:

[0137] a light source, including a light emitting element; and

[0138] The light control unit is configured to control the light source.

[0139] The light emitting control unit includes:

[0140] a plurality of driving units configured to drive the light emitting elements, and

[0141] a control unit including a serial peripheral interface and configured to control the driving unit,

[0142] The driving part is configured to receive a data signal and a clock signal from the control part, and

[0143] The plurality of driving sections are coupled in a daisy chain via a signal line configured to transmit a chip select signal. (14)

[0145] A communication method between a transmitting device including a serial peripheral interface and a plurality of receiving devices coupled in a daisy chain, the communication method comprising:

[0146] sending a chip select signal to only one of the plurality of receiving devices; and

[0147] Send a chip select signal from one of the receiving devices.

[0148] This application claims the benefit of Japanese Priority Patent Application JP2022-121130 filed with the Japan Patent Office on Jul. 29, 2022, the entire contents of which are hereby incorporated by reference.

[0149] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

Claims

1. A communication device, comprising: A transmitting device including a serial peripheral interface; as well as a plurality of receiving devices configured to receive data signals and clock signals from the transmitting devices, Wherein, a plurality of the receiving devices are coupled in a daisy chain via a signal line configured to transmit a chip select signal.

2. The communication device according to claim 1, wherein: The transmitting device is configured to transmit the chip select signal only to one of the plurality of receiving devices coupled in the daisy chain.

3. The communication device according to claim 1, wherein: The transmitting device is configured to transmit the data signal and the clock signal to each of the plurality of receiving devices coupled in the daisy chain.

4. The communication device according to claim 1, wherein: The plurality of receiving devices include: a first receiving device configured to output a chip select signal input from the transmitting device; and a second receiving device configured to output a chip select signal input from the first receiving device.

5. The communication device according to claim 4, wherein: The first receiving device is configured to receive first data of a predetermined number of bits included in the data signal input from the transmitting device, and then output the chip select signal to the second receiving device.

6. The communication device according to claim 5, wherein: The plurality of receiving devices include a third receiving device configured to output the chip select signal input from the second receiving device, and The second receiving device is configured to receive second data of a predetermined number of bits subsequent to the first data included in the data signal, and then output the chip select signal to the third receiving device.

7. The communication device according to claim 1, wherein: The receiving device is configured to synchronize with the clock signal input from the transmitting device and output the chip select signal.

8. The communication device according to claim 1, wherein: The receiving device is configured to output the chip select signal having a modified pulse width.

9. The communication device according to claim 8, wherein: The transmitting device is configured to receive the chip select signal having a pulse width modified by a plurality of the receiving devices.

10. The communication device according to claim 1, wherein: The transmitting device is configured to transmit the data signal including data related to the number of bits of data to be transmitted to the receiving device.

11. The communication device according to claim 1, wherein: The receiving device includes a driving section configured to drive a light emitting element, and The transmitting device includes a control section configured to control the driving section.

12. A driving device, comprising: A plurality of driving units configured to drive the light emitting elements; as well as a control unit including a serial peripheral interface and configured to control the driving unit, The driving unit is configured to receive a data signal and a clock signal from the control unit, and The plurality of driving sections are coupled in a daisy chain via a signal line configured to transmit a chip select signal.

13. A display device, comprising: A light source, including a light emitting element; as well as a light emitting control unit configured to control the light source, Wherein, the light emitting control unit comprises: a plurality of driving units configured to drive the light emitting elements, and a control unit including a serial peripheral interface and configured to control the driving unit, The driving section is configured to receive a data signal and a clock signal from the control section, and The plurality of driving sections are coupled in a daisy chain via a signal line configured to transmit a chip select signal.

14. A communication method between a transmitting device including a serial peripheral interface and a plurality of receiving devices coupled in a daisy chain, the communication method comprising: sending a chip select signal to only one of the plurality of receiving devices; and The chip select signal is sent from one of the receiving devices.

Citation Information

Patent Citations

  • Image formation device

    JP2022121130A