Electronic device
By dividing and operating multiple display areas on the display panel of the electronic device, and using a refresh mode when the brightness information changes, the image quality difference caused by the brightness information changes in the multi-frequency mode is solved, and more stable and high Quality display effect.
Patent Information
- Application Number
- CN202411029482.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-08-07
- Filing Date
- 2024-07-30
- Publication Date
- 2025-02-14
AI Technical Summary
In multi-frequency mode, when the brightness information is changed, the picture quality of the electronic device is prone to differences, affecting the display effect.
By dividing the first display area and the second display area on the display panel, and operating at different frequencies respectively in the multi-frequency mode. The driver controller generates a brightness value defined in the display area in the display panel, and when the brightness information changes, the display panel operates in refresh mode to maintain consistency in image quality.
It effectively prevents the image quality difference of the display panel when the brightness information is changed, and improves the display effect and quality in multi-frequency mode.
Smart Images

Figure CN119446058A_ABST
Abstract
Description
[0001] This application claims priority to and all benefits derived from Korean Patent Application No. 10-2023-0103137, filed on August 7, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field
[0002] The embodiments of the present disclosure described herein relate to an electronic device in which brightness information is changed. Background Art
[0003] Among electronic devices, an organic light emitting electronic device displays an image by an organic light emitting diode that generates light through recombination of electrons and holes. The organic light emitting electronic device provides fast response speed and low power consumption.
[0004] The organic light-emitting electronic device includes pixels connected to data lines and scan lines. Each of the pixels generally includes an organic light-emitting diode and a circuit unit for controlling the amount of current flowing to the organic light-emitting diode. In response to a data signal, the circuit unit controls the amount of current flowing from a first driving voltage through the organic light-emitting diode to a second driving voltage. In this case, light having a brightness corresponding to the amount of current flowing through the organic light-emitting diode is generated.
[0005] As electronic devices are used in various fields, nowadays, a plurality of different images can be simultaneously displayed in a single electronic device. Accordingly, a technology for reducing power consumption of an electronic device displaying a plurality of images is desired. Summary of the invention
[0006] Embodiments of the present disclosure provide an electronic device capable of preventing a difference in image quality of a screen when brightness information is changed in a multi-frequency mode.
[0007] In an embodiment of the present disclosure, an electronic device includes a display panel operating in a normal mode, a multi-frequency mode, or a refresh mode; a drive controller that controls the display panel; and a host that generates brightness information including a brightness value of a display area defined in the display panel and outputs the brightness information to the drive controller. In the multi-frequency mode, the display area is divided into a first display area and a second display area adjacent to the first display area, and the drive controller controls the first display area and the second display area to operate at different frequencies. In the normal mode, the drive controller controls the display area to operate at a normal frequency. In the refresh mode, the drive controller controls the display area to operate at a normal frequency during one frame. When the brightness information changes, the display panel operates in the refresh mode.
[0008] In an embodiment, during the multi-frequency mode, the first display area may operate at a first driving frequency, and the second display area may operate at a second driving frequency lower than the first driving frequency.
[0009] In an embodiment, the first driving frequency may be the same as the normal frequency, and the second driving frequency may be lower than the normal frequency.
[0010] In an embodiment, the host may include a transmitter that outputs brightness information and image information, and the driving controller may include a receiver that receives the image information and an image processor that receives the brightness information.
[0011] In an embodiment, when the brightness information changes, the image processor may change the brightness value of the display panel.
[0012] In an embodiment, in the normal mode and the refresh mode, image information corresponding to the display area may be provided. In the multi-frequency mode, part of the image information may be provided to the first display area, and the remaining part of the image information to be provided to the second display area may be maintained.
[0013] In an embodiment, when the brightness information changes, the image processor may drive the display panel in a refresh mode, and the image processor may receive the image information from the transmitter through the receiver.
[0014] In an embodiment, the driving controller may further include a frame memory connected between the receiver and the image processor, and the frame memory may store the image information and may provide at least a portion of the image information to the image processor per frame.
[0015] In an embodiment, when the brightness information changes, the image processor may drive the display panel in a refresh mode, and the image processor may receive image information stored in the frame memory.
[0016] In an embodiment, the transmitter may provide image information to the receiver. During the normal mode, the receiver may provide the image information to the image processor, and the image processor may drive the display panel based on the image information. In the multi-frequency mode, the receiver may send the image information to the frame memory, the frame memory may store the image information, and the image processor may drive the display panel based on the image information stored in the frame memory.
[0017] In an embodiment, when the brightness information changes, the image processor may drive the display panel by a refresh mode in a multi-frequency mode, and the image processor may receive the image information stored in the frame memory.
[0018] In an embodiment, the display panel may be operated in units of frames, and the frame may include a first frame period, a second frame period, and a third frame period provided sequentially. The brightness information may be changed from a first brightness value to a second brightness value different from the first brightness value. In the first frame period, the display panel may be operated in a multi-frequency mode, and the display area may display an image by the first brightness value. When the brightness information changes in the second frame period, the display panel may be operated in a refresh mode, and the display area may display an image by the second brightness value. In the third frame period, the display panel may be operated in a multi-frequency mode, and the display area may display an image by the second brightness value.
[0019] In an embodiment of the present disclosure, an electronic device includes a display panel operating in a normal mode, a multi-frequency mode, or a refresh mode; a drive controller that controls the display panel; and a host that generates brightness information including a brightness value of a display area defined in the display panel and outputs the brightness information to the drive controller. In the multi-frequency mode, the display area is divided into a first display area and a second display area adjacent to the first display area, and the drive controller controls the first display area and the second display area to operate at different frequencies. In the normal mode, the drive controller controls the display area to operate at a normal frequency. In the refresh mode, the drive controller controls the display area to operate at a normal frequency during one frame. The brightness information includes first brightness information having a first brightness value and second brightness information having a second brightness value different from the first brightness value, and when the brightness information changes from the first brightness value to the second brightness value, the display panel operating in the multi-frequency mode operates in the refresh mode.
[0020] In an embodiment, the host may include a transmitter that outputs brightness information and image information, and the driving controller may include a receiver that receives the image information and an image processor that receives the brightness information.
[0021] In an embodiment, when the brightness information changes, the image processor may change the brightness value of the display panel.
[0022] In an embodiment, in the normal mode and the refresh mode, image information corresponding to the display area may be provided. In the multi-frequency mode, part of the image information may be provided to the first display area, and the remaining part of the image information to be provided to the second display area may be maintained.
[0023] In an embodiment, when the brightness information changes, the image processor may drive the display panel in a refresh mode, and the image processor may receive the image information from the transmitter through the receiver.
[0024] In an embodiment, the driving controller may further include a frame memory connected between the receiver and the image processor, and the frame memory may store the image information and may provide at least a portion of the image information to the image processor per frame.
[0025] In an embodiment, when the brightness information changes, the image processor may drive the display panel in a refresh mode, and the image processor may receive image information stored in the frame memory.
[0026] In an embodiment, during the multi-frequency mode, the first display area may operate at a first driving frequency and the second display area may operate at a second driving frequency lower than the first driving frequency. The first driving frequency may be the same as the normal frequency and the second driving frequency may be lower than the normal frequency. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] The above and other embodiments, advantages and features of the present disclosure will become more apparent by describing in detail an embodiment of the present disclosure with reference to the attached drawings.
[0028] Figure 1 is a plan view of an embodiment of an electronic device according to the present disclosure.
[0029] Figure 2A and Figure 2B is a perspective view of an embodiment of an electronic device according to the present disclosure.
[0030] Figure 3A is a diagram for describing the operation of the electronic device in the normal mode.
[0031] Figure 3B is a diagram for describing the operation of the electronic device in the multi-frequency mode.
[0032] Figure 4 is a block diagram of an embodiment of a host and a drive controller according to the present disclosure.
[0033] Figure 5 is a block diagram of an embodiment of an electronic device according to the present disclosure.
[0034] Figure 6 is an equivalent circuit diagram of an embodiment of a pixel according to the present disclosure.
[0035] Figure 7 Is used to describe Figure 6 A timing diagram of the operation of a pixel is shown in FIG.
[0036] Figure 8 The scanning signal in multi-frequency mode is shown.
[0037] Fig. 9 is a diagram showing changes in brightness of the first display area and the second display area in the multi-frequency mode and the normal mode. DETAILED DESCRIPTION
[0038] In the specification, the expression that a first component (or region, layer, portion, part, etc.) is “on”, “connected to” or “coupled to” a second component means that the first component is directly on, directly connected to or directly coupled to the second component, or means that a third component is interposed therebetween.
[0039] The same reference numerals indicate the same components. In addition, in the drawings, the thickness, proportion and size of the components are exaggerated for the effectiveness of the description of the technical content. The term "and / or" includes one or more combinations of the associated elements in each of them.
[0040] Although the terms "first", "second", etc. may be used to describe various components, the components should not be interpreted as being limited by the terms. The terms are used only to distinguish one component from another component. For example, a first component may be referred to as a "second component" and similarly, a second component may be referred to as a "first component" without departing from the scope and spirit of the present invention. The articles "a", "an", and "the" are singular because they have a single referent, but the use of the singular form in the specification should not exclude the presence of more than one referent.
[0041] In addition, the terms "lower", "below", "upper", "above" and the like are used to describe the relationship between components shown in the drawings. Conceptually relative terms are described based on directions indicated in the drawings.
[0042] It should be understood that the terms “comprises,” “includes,” “has,” etc. specify the presence of features, quantities, steps, operations, elements or components, or a combination thereof described in the specification, but do not exclude the presence or possibility of adding one or more other features, quantities, steps, operations, elements or components, or a combination thereof.
[0043] Unless otherwise defined, all terms (including technical terms and scientific terms) used in the specification have the same meaning as those generally understood by ordinary technicians in the field to which the present disclosure belongs. In addition, terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the meaning in the context of the relevant technology, and unless explicitly defined herein, should not be interpreted in an ideal or overly rigid meaning.
[0044] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.
[0045] Figure 1 is a plan view of an embodiment of an electronic device DD according to the present disclosure.
[0046] Reference Figure 1, a portable terminal is shown in an embodiment of an electronic device DD according to the present disclosure. The portable terminal may include a tablet personal computer (PC), a smart phone, a personal digital assistant (PDA), a portable multimedia player (PMP), a game console, a watch-type electronic device, etc. However, the present disclosure is not limited thereto. In addition to large electronic devices such as televisions or outdoor billboards, the present disclosure may also be used for small and medium-sized electronic devices such as PCs (e.g., notebook computers), kiosks, car navigation units, and cameras. The above embodiments are merely illustrative, and it is apparent that the electronic device DD may be applied to any other electronic device without departing from the concept of the present invention.
[0047] like Figure 1 As shown in , the display surface on which the first image IM1 and the second image IM2 are displayed is parallel to the plane defined by the first direction DR1 and the second direction DR2. The electronic device DD includes a plurality of areas distinguished from each other on the display surface. The display surface includes a display area DA in which the first image IM1 and the second image IM2 are displayed and a non-display area NDA adjacent to (e.g., next to) the display area DA. The non-display area NDA may also be referred to as a "border area". In an embodiment, the display area DA may be in the shape of a quadrilateral. The non-display area NDA surrounds the display area DA. In addition, although not shown, in an embodiment, the electronic device DD may include a partially bent shape. As a result, a portion of the display area DA may have a bent shape.
[0048] The display area DA of the electronic device DD includes a first display area DA1 and a second display area DA2. In a predetermined application, a first image IM1 may be displayed in the first display area DA1, and a second image IM2 may be displayed in the second display area DA2. In an embodiment, for example, the first image IM1 may be a video, and the second image IM2 may be a still image or text information with a long change cycle.
[0049] The electronic device DD in the embodiment may drive the first display area DA1 in which a video is displayed by a first driving frequency, and may drive the second display area DA2 in which a still image is displayed by a second driving frequency.
[0050] According to the present disclosure, the first driving frequency may be the same as the normal frequency. The second driving frequency may be lower than the normal frequency. The electronic device DD may reduce power consumption by reducing the driving frequency of the second display area DA2.
[0051] The size of each of the first display area DA1 and the second display area DA2 may be predetermined and may be changed by an application. In an embodiment, when a still image is displayed in the first display area DA1 and a video is displayed in the second display area DA2, the first display area DA1 may be driven by a frequency lower than a normal frequency, and the second display area DA2 may be driven by a frequency higher than or equal to a normal frequency. In addition, the display area DA may also be divided into three or more display areas; in this case, the driving frequency of each of the three or more display areas may be determined according to the type of image displayed therein (e.g., a still image or a video).
[0052] Figure 2A and Figure 2B is a perspective view of an embodiment of an electronic device DD2 according to the present disclosure. Figure 2A The electronic device DD2 is shown in its unfolded state, and Figure 2B The folded state of the electronic device DD2 is shown.
[0053] like Figure 2A and Figure 2B As shown in , the electronic device DD2 includes a display area DA and a non-display area NDA. The electronic device DD2 can display an image through the display area DA. When the electronic device DD2 is unfolded, the display area DA may include a plane defined by a first direction DR1 and a second direction DR2. The thickness direction of the electronic device DD2 may be parallel to a third direction DR3 intersecting the first direction DR1 and the second direction DR2. Accordingly, the front surface (or upper surface) and the bottom surface (or lower surface) of the components constituting the electronic device DD2 may be defined relative to the third direction DR3. The non-display area NDA may also be referred to as a "border area". In an embodiment, the display area DA may be in the shape of a quadrilateral. The non-display area NDA surrounds the display area DA.
[0054] The display area DA may include a first non-folding area NFA1, a folding area FA, and a second non-folding area NFA2. The folding area FA may be bent about a folding axis FX extending in the first direction DR1.
[0055] When the electronic device DD2 is folded, the first non-folding area NFA1 and the second non-folding area NFA2 may face each other. Accordingly, in a state where the electronic device DD2 is fully folded, the display area DA may not be exposed to the outside, which may also be referred to as "folding inward". This is only an example, and the operation of the electronic device DD2 is not limited thereto.
[0056] In an embodiment of the present disclosure, for example, when the electronic device DD2 is folded, the first non-folding area NFA1 and the second non-folding area NFA2 may be opposite to each other. Accordingly, the first non-folding area NFA1 and the second non-folding area NFA2 may be exposed to the outside in the folded state, which may also be referred to as "outward folding".
[0057] Only one of the inward folding and the outward folding of the electronic device DD2 may be possible. In an alternative embodiment, both the inward folding and the outward folding of the electronic device DD2 may be possible. In this case, the same area of the electronic device DD2 (e.g., the folding area FA) may be folded inward and outward (or may be folded inwardly and outwardly). In an alternative embodiment, a partial area of the electronic device DD2 may be folded inwardly, and the remaining area thereof may be folded outwardly.
[0058] exist Figure 2A and Figure 2B One folding area and two non-folding areas are shown in FIG. 1 , but the number of folding areas and the number of non-folding areas are not limited thereto. In an embodiment, for example, the electronic device DD2 may include a plurality of non-folding areas and a plurality of folding areas whose number is greater than two; each of the plurality of folding areas may be between non-folding areas adjacent to each other among the plurality of non-folding areas.
[0059] exist Figure 2A and Figure 2B , an embodiment in which the folding axis FX is parallel to the short axis (or short side) of the electronic device DD2 is shown, but the present disclosure is not limited thereto. In an embodiment, for example, the folding axis FX may extend in a direction (e.g., the second direction DR2) parallel to the long axis (or long side) of the electronic device DD2.
[0060] exist Figure 2A and Figure 2B , an embodiment in which the first non-folding area NFA1, the folding area FA, and the second non-folding area NFA2 are sequentially arranged in the second direction DR2 is shown, but the present disclosure is not limited thereto. In an embodiment, for example, the first non-folding area NFA1, the folding area FA, and the second non-folding area NFA2 may be sequentially arranged in the first direction DR1.
[0061] A plurality of display areas DA1 and DA2 may be defined in the display area DA of the electronic device DD2. Figure 2A Two display areas DA1 and DA2 are shown in FIG. 1 , but the number of the display areas DA1 and DA2 is not limited thereto.
[0062] The plurality of display areas DA1 and DA2 may include a first display area DA1 and a second display area DA2. In an embodiment, for example, the first display area DA1 may be an area where a first image IM1 is displayed, and the second display area DA2 may be an area where a second image IM2 is displayed. In an embodiment, for example, the first image IM1 may be a video, and the second image IM2 may be a still image or an image with a long change cycle (e.g., text information, etc.).
[0063] The electronic device DD2 in the embodiment can be operated according to the operation mode MD (refer to Fig. 9 ) and operate differently. Operation mode MD (refer to Fig. 9 ) may include normal mode NFM (refer to Figure 3A )、Refresh Mode RFM (refer to Figure 3B ) and Multi-frequency Mode MFM (refer to Figure 3B ).
[0064] In normal mode NFM (refer to Figure 3A ) and refresh mode RFM (refer to Figure 3B ), the electronic device DD2 can drive both the first display area DA1 and the second display area DA2 at a normal frequency. Figure 3B ), the electronic device DD2 may drive the first display area DA1 in which the first image IM1 is displayed by a first driving frequency, and may drive the second display area DA2 in which the second image IM2 is displayed by a second driving frequency lower than the first driving frequency. In an embodiment, the first driving frequency may be higher than or equal to the normal frequency.
[0065] The size of each of the first display area DA1 and the second display area DA2 may be predetermined and may be changed by an application. In an embodiment, the first display area DA1 may correspond to the first non-folding area NFA1, and the second display area DA2 may correspond to the second non-folding area NFA2. In addition, a first portion of the folding area FA may correspond to the first display area DA1, and a second portion of the folding area FA may correspond to the second display area DA2.
[0066] In an embodiment, the entire folding area FA may correspond to only one of the first display area DA1 and the second display area DA2.
[0067] In an embodiment, the first display area DA1 may correspond to a first portion of the first non-folding area NFA1, and the second display area DA2 may correspond to a second portion of the first non-folding area NFA1, the folding area FA, and the second non-folding area NFA2. That is, the size of the second display area DA2 may be larger than that of the first display area DA1.
[0068] In an embodiment, the first display area DA1 may correspond to the first non-folding area NFA1, the folding area FA, and the first part of the second non-folding area NFA2, and the second display area DA2 may correspond to the second part of the second non-folding area NFA2. That is, the size of the first display area DA1 may be larger than the size of the second display area DA2.
[0069] like Figure 2B As shown in FIG. 1 , in a state where the folding area FA is folded, the first display area DA1 may correspond to the first non-folding area NFA1 , and the second display area DA2 may correspond to the folding area FA and the second non-folding area NFA2 .
[0070] exist Figure 2A and Figure 2B , an embodiment of a display device in which the electronic device DD2 has one folding area is shown, but the present disclosure is not limited thereto. In an embodiment, for example, the present disclosure may be applied to an electronic device having two or more folding areas, a rollable electronic device, or a slidable electronic device.
[0071] under, Figure 1 The electronic device DD shown in will be described as an illustrative embodiment, but can be equally applied to Figure 2A and Figure 2B The electronic device DD2 shown in .
[0072] Figure 3A is a diagram for describing the operation of the electronic device DD in the normal mode NFM. Figure 3B is a diagram for describing the operation of the electronic device DD in the multi-frequency mode MFM.
[0073] Reference Figure 3A The electronic device DD may include a display panel DP (refer to Figure 4 ). Display panel DP (refer to Figure 4 ) may include a first display area DA1 and a second display area DA2. A first image IM1 displayed in the first display area DA1 may be a video, and a second image IM2 displayed in the second display area DA2 may be a still image or an image with a long change cycle (e.g., a game control keyboard). Figure 1 The embodiment of FIG. 4 shows a first image IM1 displayed in the first display area DA1 and a second image IM2 displayed in the second display area DA2 , and various images may be displayed in the electronic device DD.
[0074] In the normal mode NFM, the display area DA (refer to Figure 1) operates at a normal frequency. In the normal mode NFM, the driving frequency of the first display area DA1 of the electronic device DD and the driving frequency of the second display area DA2 of the electronic device DD correspond to the normal frequency. In an embodiment, for example, the normal frequency may be 120 Hz. In the normal mode NFM, images of the first frame F1 to the 120th frame F120 may be displayed in the first display area DA1 and the second display area DA2 of the electronic device DD within 1 second.
[0075] Reference Figure 3B , in the multi-frequency mode MFM, the electronic device DD may set the driving frequency of the first display area DA1 in which the first image IM1 (i.e., video) is displayed to the first driving frequency, and may set the driving frequency of the second display area DA2 in which the second image IM2 (i.e., still image) is displayed to the second driving frequency lower than the first driving frequency. When the normal frequency is 120 Hz, the first driving frequency may be 120 Hz, and the second driving frequency may be 1 Hz. The first driving frequency and the second driving frequency may be variously changed. In an embodiment, for example, the first driving frequency may be 120 Hz, which is the same frequency as the normal frequency, and the second driving frequency may be one of 30 Hz, 15 Hz, and 10 Hz, which are lower than the normal frequency.
[0076] In the multi-frequency mode MFM, when the first driving frequency is 120 Hz and the second driving frequency is 1 Hz, a first image IM1 corresponding to each of the first frame F1 to the 120th frame F120 may be displayed in the first display area DA1 of the electronic device DD within 1 second. A second image IM2 corresponding to only the first frame F1 may be displayed in the second display area DA2, and an image corresponding to each of the remaining frames F2, F3, ..., and F118 to F120 may not be displayed in the second display area DA2.
[0077] That is to say, in the multi-frequency mode MFM, the image information RGB (refer to Figure 4 ) is provided to the first display area DA1, and can maintain image information RGB (refer to Figure 4 ) to be provided to the second display area DA2 (or corresponding to the second display area DA2). In this case, the image information RGB (refer to Figure 4 ) may mean that no image information RGB is provided (refer to Figure 4 ). Image information RGB (refer to Figure 4 ) is information about an image to be displayed in the first display area DA1. How the electronic device DD operates in the multi-frequency mode MFM will be described in detail later.
[0078] When the brightness information of the display areas DA1 and DA2 changes, the display panel DP (refer to Figure 4 ) can operate in refresh mode RFM.
[0079] In the refresh mode RFM, under the control of the electronic device DD, the first display area DA1 and the second display area DA2 may operate at a normal frequency during one frame.
[0080] In an embodiment, for example, when the brightness information changes in the multi-frequency mode MFM, the display panel DP (refer to Figure 4 ) can be operated in the refresh mode RFM during one frame (eg, the fourth frame F4). The display panel DP (refer to Figure 4 ) from which the display panel DP (refer to Figure 4 ) Starting from the frame after the fourth frame F4 in which the refresh mode RFM is operated, the device operates in the multi-frequency mode MFM again.
[0081] Figure 4 1 is a block diagram of an embodiment of a host AP and a driving controller 100 according to the present disclosure.
[0082] Reference FIG. 3A to FIG. 4 , the electronic device DD may refer to a device activated according to an electrical signal. The electronic device DD may process image data and may display the processed image data through the display panel DP.
[0083] The electronic device DD may include a host AP, a driving controller 100 , and a display panel DP.
[0084] The host AP may be implemented with an integrated circuit, a system on chip, an application processor, or a mobile application processor, but the present disclosure is not limited thereto. The host AP may control various components included in the electronic device DD, for example, the driving controller 100 .
[0085] The host AP can generate a display area DA (refer to Figure 5 ). The host AP may output the brightness information DBV to the driving controller 100.
[0086] The host AP and the driving controller 100 may be connected to each other through a given interface. In an embodiment, for example, the given interface may include a mobile industry processor interface ("MIPI").
[0087] The host AP may include an image processor AP_IP, a transmitter TX, a central processing unit CPU, and a bus BUS.
[0088] The image processor AP_IP may convert the image data to be suitable for a format that the transmitter TX can process. The image data having the converted format may also be referred to as “image information RGB”.
[0089] The transmitter TX may output the brightness information DBV and the image information RGB. That is, the transmitter TX may transmit the brightness information DBV and the image information RGB to the driving controller 100. In an embodiment, for example, the transmitter TX may transmit the image information RGB to the receiver RX, and the transmitter TX may transmit the brightness information DBV to the image processor IP.
[0090] The brightness information DBV may include a brightness value. In an embodiment, for example, the brightness information DBV may include one of a first brightness value to a tenth brightness value. The first brightness value may be 2 nits. The second brightness value may be 4 nits. The tenth brightness value may be 500 nits. The display panel DP may control the display area DA (refer to Figure 5 ) brightness.
[0091] The central processing unit CPU may allow the host AP to compress the image data and provide the compressed image data to the driving controller 100 through the transmitter TX.
[0092] The central processing unit CPU can control the components of the host AP via the bus BUS.
[0093] The driving controller 100 may receive data (eg, image information RGB) from the host AP, and may generate image data DATA by converting the format of the image information RGB to be suitable for the interface specification of the display panel DP (refer to FIG. 1 ). Figure 5 ).
[0094] The display panel DP may operate in a normal mode NFM, a multi-frequency mode MFM, or a refresh mode RFM.
[0095] The driving controller 100 may control the display panel DP. The driving controller 100 may be connected to the host AP through a given interface.
[0096] The given interface may include a mobile industry processor interface ("MIPI"). MIPI may support two display standard modes, namely, a video mode and a command mode. The driving controller 100 may operate differently depending on the mode.
[0097] In the video mode, the driving controller 100 may operate through the receiver RX and the image processor IP.
[0098] The transmitter TX may send the first frame data in the form of a data packet. The first frame data may include a vertical active area and a vertical blanking area. The vertical active area may include image information RGB.
[0099] The receiver RX may receive the image information RGB from the transmitter TX and may transmit the received image information RGB to the image processor IP. The image processor IP may receive the image information RGB and may generate image data DATA (refer to FIG. 1 ) based on the image data DATA obtained by converting the format of the image information RGB to be suitable for the interface specification of the display panel DP. Figure 5 ) to drive the display panel DP.
[0100] That is, when the driving controller 100 intends to display a video on the display panel DP, the driving controller 100 may convert the image data DATA (refer to Figure 5 ) is output to the display panel DP.
[0101] The image processor IP may receive brightness information DBV from the transmitter TX. When the brightness information DBV changes, the image processor IP may change the brightness value of the display panel DP.
[0102] When the brightness information DBV changes, the image processor IP may drive the display panel DP in the refresh mode RFM.
[0103] The image processor IP may receive image information RGB from the transmitter TX through the receiver RX. This will be described later.
[0104] In the command mode, the driving controller 100 may operate through the receiver RX, the frame memory FRM, and the image processor IP. The frame memory FRM may be connected between the receiver RX and the image processor IP.
[0105] The transmitter TX may transmit the second frame data. The second frame data may include only the image information RGB.
[0106] The receiver RX may receive the image information RGB from the transmitter TX and may transmit the received image information RGB to the frame memory FRM. The frame memory FRM may store the image information RGB. The frame memory FRM may provide at least a portion of the image information RGB to the image processor IP per frame.
[0107] The image processor IP may receive at least a portion of the image information RGB, and may provide the display panel DP with image data DATA obtained by converting the format of the image information RGB to be suitable for an interface specification of the display panel DP (refer to Figure 5 ).
[0108] That is, when the driving controller 100 intends to display a still image in the display panel DP, the driving controller 100 may periodically read the image information RGB stored in the frame memory FRM and may output the read image information RGB to the display panel DP according to a timing determined by the driving controller 100 .
[0109] The image processor IP may receive brightness information DBV from the transmitter TX. When the brightness information DBV changes, the image processor IP may change the brightness value of the display panel DP.
[0110] When the brightness information DBV changes, the image processor IP may drive the display panel DP in the refresh mode RFM.
[0111] The image processor IP may receive the image information RGB stored in the frame memory FRM, which will be described later.
[0112] In addition, the host AP and the driving controller 100 may be connected to each other through a video panel self refresh ("PSR") mode (hereinafter referred to as a "PSR mode").
[0113] In the PSR mode, the driving controller 100 may operate through the receiver RX, the frame memory FRM, and the image processor IP. The frame memory FRM may be connected between the receiver RX and the image processor IP.
[0114] In the case of driving the display panel DP in the normal mode NFM, the receiver RX may receive the image information RGB from the transmitter TX and may transmit the received image information RGB to the image processor IP. The image processor IP may receive the image information RGB and may provide the display panel DP with image data DATA obtained by converting the format of the image information RGB to be suitable for the interface specification of the display panel DP (refer to Figure 5 ).
[0115] In the case of driving the display panel DP in the multi-frequency mode MFM, the receiver RX may receive the image information RGB from the transmitter TX, and may send the received image information RGB to the frame memory FRM. The frame memory FRM may store the image information RGB. The frame memory FRM may provide at least a portion of the image information RGB to the image processor IP per frame.
[0116] The image processor IP may receive at least a portion of the image information RGB, and may provide the display panel DP with image data DATA obtained by converting the format of the image information RGB to be suitable for an interface specification of the display panel DP (refer to Figure 5 ).
[0117] The image processor IP may receive the brightness information DBV. When the brightness information DBV changes, the image processor IP may change the brightness value of the display panel DP.
[0118] When the brightness information DBV changes, the image processor IP may drive the display panel DP through the refresh mode RFM in the multi-frequency mode MFM.
[0119] The image processor IP may receive image information RGB stored in the frame memory FRM.
[0120] Figure 5 is a block diagram of an embodiment of an electronic device DD according to the present disclosure.
[0121] Reference Figure 5 , the electronic device DD includes a display panel DP, a driving controller 100 and a voltage generator 200 .
[0122] The driving controller 100 may include a driving control circuit 110 and a data driving circuit 120 .
[0123] The driving control circuit 110 receives image information RGB, a control signal CTRL, and brightness information DBV. The driving control circuit 110 generates image data DATA by converting the data format of the image information RGB according to the specification of the interface with the data driving circuit 120. The driving control circuit 110 outputs a scanning control signal SCS, a data control signal DCS, and an emission control signal ECS.
[0124] The data driving circuit 120 receives the data control signal DCS and the image data DATA from the driving control circuit 110. The data driving circuit 120 converts the image data DATA into a data signal, and then outputs the data signal to a plurality of data lines DL1 to DLm to be described later. Here, m is a natural number greater than 0. The data signal indicates an analog voltage corresponding to the grayscale value of the image data DATA.
[0125] The voltage generator 200 generates voltages required for the operation of the display panel DP. In an embodiment, the voltage generator 200 generates a first driving voltage ELVDD, a second driving voltage ELVSS, and an initialization voltage VINT. The initialization voltage VINT may include a first initialization voltage VINT1 (refer to Figure 6 ) and the second initialization voltage VINT2 (refer to Figure 6 ).
[0126] The display panel DP includes scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1, emission control lines EML1 to EMLn, data lines DL1 to DLm and pixels PX. Here, n is a natural number greater than 0. The display panel DP may further include a scan drive circuit SD and an emission drive circuit EDC. In an embodiment, the scan drive circuit SD is arranged on a first side of the display panel DP. The scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1 extend from the scan drive circuit SD in a first direction DR1.
[0127] The emission driving circuit EDC is disposed on the second side of the display panel DP. The emission control lines EML1 to EMLn extend from the emission driving circuit EDC in a direction opposite to the first direction DR1.
[0128] The scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1 and the emission control lines EML1 to EMLn are spaced apart from each other in the second direction DR2. The data lines DL1 to DLm extend from the data driving circuit 120 in a direction opposite to the second direction DR2 and are spaced apart from each other in the first direction DR1.
[0129] exist Figure 5 In the example shown in , the scan drive circuit SD and the emission drive circuit EDC are arranged to face each other across the pixel PX, but the present disclosure is not limited thereto. In an embodiment, for example, the scan drive circuit SD and the emission drive circuit EDC may be arranged adjacent to each other on one side of the first side and the second side of the display panel DP. In an embodiment, the scan drive circuit SD and the emission drive circuit EDC may be implemented with one circuit.
[0130] The plurality of pixels PX are electrically connected to the scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1, the emission control lines EML1 to EMLn and the data lines DL1 to DLm. Each of the plurality of pixels PX may be electrically connected to four scan lines and one emission control line. In an embodiment, for example, Figure 5 As shown in FIG, pixels PX belonging to the first row may be connected to scan lines GIL1, GCL1, GWL1, and GWL2 and an emission control line EML1. Also, pixels PX belonging to the jth row may be connected to scan lines GILj, GCLj, GWLj, and GWLj+1 and an emission control line EMLj.
[0131] Each of the plurality of pixels PX includes a light emitting element ED (refer to Figure 6 ) (eg, a light emitting diode) and a pixel circuit PXC (refer to Figure 6 ). The pixel circuit PXC may include one or more transistors and one or more capacitors. The scan driving circuit SD and the emission driving circuit EDC may include transistors formed by the same process as that of the transistors of the pixel circuit PXC.
[0132] Each of the plurality of pixels PX receives a first driving voltage ELVDD, a second driving voltage ELVSS, a first initialization voltage VINT1 (refer to FIG. 1 ), and a first initialization voltage VINT2 (refer to FIG. 1 ). Figure 6 ) and the second initialization voltage VINT2 (refer to Figure 6 ).
[0133] The scan driving circuit SD receives a scan control signal SCS from the driving controller 100. The scan driving circuit SD may output scan signals to the scan lines GIL1 to GILn, GCL1 to GCLn, and GWL1 to GWLn+1 in response to the scan control signal SCS. The circuit configuration and operation of the scan driving circuit SD will be described in detail later.
[0134] The driving controller 100 in the embodiment can divide the display panel DP into a first display area DA1 (refer to Figure 1 ) and the second display area DA2 (refer to Figure 1 ), and the driving frequency of each of the first display area DA1 and the second display area DA2 may be set. In an embodiment, for example, in the normal mode, the driving controller 100 drives the first display area DA1 and the second display area DA2 by a normal frequency (e.g., 120 Hz). In the multi-frequency mode, the driving controller 100 may drive the first display area DA1 by a first operating frequency (e.g., 120 Hz), and may drive the second display area DA2 by a second operating frequency (e.g., 10 Hz).
[0135] Figure 6 is an equivalent circuit diagram of an embodiment of a pixel PXij according to the present disclosure.
[0136] exist Figure 6 The figure shows the connection to the data lines DL1 to DLm (refer to Figure 5 ) among the i-th data line DLi (hereinafter, also referred to as the data line DLi), the scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1 (refer to Figure 5 ) among the j-th scan lines GILj, GCLj, and GWLj and the (j+1)-th scan line GWLj+1 (hereinafter, also referred to as the scan lines GILj, GCLj, GWLj, and GWLj+1) and the emission control lines EML1 to EMLn (refer to Figure 5 ) is an equivalent circuit diagram of a pixel PXij of a j-th emission control line EMLj (hereinafter, also referred to as an emission control line EMLj). Here, i and j may be natural numbers greater than 0 and equal to or less than m and n, respectively.
[0137] Figure 5 Each of the pixels PX shown in FIG. 1 may have Figure 6. In an embodiment, in the pixel circuit PXC of the pixel PXij, each of the third transistor T3 and the fourth transistor T4 among the first transistor T1 to the seventh transistor T7 is an N-type transistor using an oxide semiconductor as a semiconductor layer, and each of the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6 and the seventh transistor T7 is a P-type transistor having a low-temperature polycrystalline silicon ("LTPS") semiconductor layer. However, the present disclosure is not limited thereto. In an embodiment, all of the first transistor T1 to the seventh transistor T7 may be P-type transistors or N-type transistors. In an embodiment, for example, at least one of the first transistor T1 to the seventh transistor T7 may be an N-type transistor, and the remaining transistors may be P-type transistors. In addition, the circuit configuration of the pixel in the embodiment of the present disclosure is not limited to Figure 6 . Figure 6 The pixel circuit PXC shown in FIG. 1 is merely an example, and the configuration of the pixel circuit PXC may be modified and implemented.
[0138] Reference Figure 6 , the electronic device DD / DD2 in the embodiment (refer to Figures 1 to 2B ) may include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a seventh transistor T7, a capacitor Cst, and at least one light emitting element ED. In the embodiment, an embodiment in which one pixel PXij includes one light emitting element ED will be described.
[0139] The scan lines GILj, GCLj, GWLj, and GWLj+1 may transmit scan signals GIj, GCj, GWj, and GWj+1, respectively, and the emission control line EMLj may transmit an emission signal EMj. The data line DLi transmits a data signal Di. The data signal Di may have a signal similar to that input to the electronic device DD (refer to Figure 5 ) image information RGB (refer to Figure 5 ) corresponding to the voltage level. The first driving voltage line VL1, the second driving voltage line VL2, the third driving voltage line VL3 and the fourth driving voltage line VL4 can transmit the first driving voltage ELVDD, the second driving voltage ELVSS, the first initialization voltage VINT1 and the second initialization voltage VINT2 respectively.
[0140] The first transistor T1 includes a first electrode connected to the first driving voltage line VL1 through the fifth transistor T5, a second electrode electrically connected to the anode of the light emitting element ED through the sixth transistor T6, and a gate electrode connected to the first end of the capacitor Cst. The first transistor T1 can receive the data signal Di transmitted through the data line DLi according to the switching operation of the second transistor T2, and can supply the driving current Id to the light emitting element ED.
[0141] The second transistor T2 includes a first electrode connected to the data line DLi, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the scan line GWLj. The second transistor T2 can be turned on according to the scan signal GWj transmitted through the scan line GWLj, and can transmit the data signal Di from the data line DLi to the first electrode of the first transistor T1.
[0142] The third transistor T3 includes a first electrode connected to the gate electrode of the first transistor T1, a second electrode connected to the second electrode of the first transistor T1, and a gate electrode connected to the scan line GCLj. The third transistor T3 may be turned on according to the scan signal GCj transmitted through the scan line GCLj, and therefore, the gate electrode and the second electrode of the first transistor T1 may be connected, that is, the first transistor T1 may be connected in a diode manner.
[0143] The fourth transistor T4 includes a first electrode connected to the gate electrode of the first transistor T1, a second electrode connected to the third driving voltage line VL3 through which the first initialization voltage VINT1 is transmitted, and a gate electrode connected to the scan line GILj. The fourth transistor T4 may be turned on according to the scan signal GIj transmitted through the scan line GILj, and therefore, the first initialization voltage VINT1 may be transmitted to the gate electrode of the first transistor T1. Thus, the voltage of the gate electrode of the first transistor T1 may be initialized. This operation may also be referred to as an "initialization operation".
[0144] The fifth transistor T5 includes a first electrode connected to the first driving voltage line VL1, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the emission control line EMLj.
[0145] The sixth transistor T6 includes a first electrode connected to the second electrode of the first transistor T1, a second electrode connected to the anode of the light emitting element ED, and a gate electrode connected to the emission control line EMLj.
[0146] The fifth transistor T5 and the sixth transistor T6 may be turned on at the same time according to the emission signal EMj transmitted through the emission control line EMLj. Thus, the first driving voltage ELVDD may be compensated by the first transistor T1 connected in a diode manner to be supplied to the light emitting element ED.
[0147] The seventh transistor T7 includes a first electrode connected to the second electrode of the sixth transistor T6, a second electrode connected to the fourth driving voltage line VL4, and a gate electrode connected to the scanning line GWLj+1. The seventh transistor T7 is turned on according to the scanning signal GWj+1 received through the scanning line GWLj+1, and bypasses the current of the anode of the light emitting element ED to the fourth driving voltage line VL4.
[0148] As described above, the first end of the capacitor Cst is connected to the gate electrode of the first transistor T1, and the second end of the capacitor Cst is connected to the first driving voltage line VL1. The cathode of the light emitting element ED may be connected to the second driving voltage line VL2 transmitting the second driving voltage ELVSS. The structure of the pixel PXij in the embodiment is not limited to Figure 6 In the embodiment, for example, the number of transistors included in one pixel PXij, the number of capacitors included in one pixel PXij, and the connection relationship between the transistors and the capacitors may be variously modified.
[0149] Figure 7 Is used to describe Figure 6 The timing diagram of the operation of the pixel PXij shown in FIG. Figure 6 and Figure 7 The operation of the electronic device DD in the embodiment is described.
[0150] Reference Figure 6 and Figure 7 , a relatively high level scan signal GIj is provided through the scan line GILj during the initialization period within one frame Fs. When the fourth transistor T4 is turned on in response to the relatively high level scan signal GIj, the first initialization voltage VINT1 is supplied to the gate electrode of the first transistor T1 through the fourth transistor T4 so that the first transistor T1 is initialized.
[0151] Next, when a relatively high-level scan signal GCj is supplied through the scan line GCLj during the data programming and compensation period, the third transistor T3 is turned on. In this case, the first transistor T1 is connected in a diode manner through the third transistor T3 thus turned on, and is forward biased. In addition, the second transistor T2 is turned on by the relatively low-level scan signal GWj. In this case, a compensation voltage "Di-Vth" obtained by subtracting the threshold voltage (Vth) of the first transistor T1 from the voltage of the data signal Di supplied from the data line DLi is applied to the gate electrode of the first transistor T1. That is, the gate voltage applied to the gate electrode of the first transistor T1 may be the compensation voltage "Di-Vth".
[0152] The first driving voltage ELVDD and the compensation voltage “Di-Vth” may be applied to opposite ends of the capacitor Cst, respectively, and charges corresponding to a voltage difference of the opposite ends of the capacitor Cst may be stored in the capacitor Cst.
[0153] The seventh transistor T7 is turned on in response to the scan signal GWj+1 of a relatively low level transmitted through the scan line GWLj+1. A portion of the drive current Id may flow out through the seventh transistor T7 as a bypass current Ibp.
[0154] When the light-emitting element ED emits light under the condition that the minimum current of the first transistor T1 flows as a driving current for the purpose of displaying a black image, a black image may not be displayed normally. Accordingly, the seventh transistor T7 in the pixel PXij in the embodiment of the present disclosure can flow (or disperse) a part of the minimum current of the first transistor T1 to a current path different from the current path to the light-emitting element ED as a bypass current Ibp. In this article, the minimum current of the first transistor T1 means the current flowing under the condition that the gate-source voltage of the first transistor T1 is less than the threshold voltage (Vth), that is, the current flowing under the condition that the first transistor T1 is turned off. In the case where the first transistor T1 is turned off, as the minimum driving current (for example, 10 picoamperes (pA) or less) is supplied to the light-emitting element ED, an image of black brightness is exhibited. When the minimum driving current for displaying a black image flows, the influence of the bypass transmission of the bypass current Ibp can be relatively large. On the contrary, when a relatively large driving current for displaying an image such as a normal image or a white image flows, the influence of the bypass current Ibp may be substantially absent. Accordingly, when the driving current for displaying a black image flows, the emission current Ied of the light emitting element ED corresponding to the result of subtracting the bypass current Ibp flowing out through the seventh transistor T7 from the driving current Id may have a minimum current amount to such an extent that a black image is accurately represented. Accordingly, the contrast ratio can be improved by accurately realizing an image of black brightness by the seventh transistor T7. In an embodiment, the bypass signal is a relatively low-level scanning signal GWj+1, but it is not necessarily limited to this.
[0155] Then, during the emission period, the emission signal EMj supplied from the emission control line EMLj changes from a relatively high level to a relatively low level. During the emission period, the fifth transistor T5 and the sixth transistor T6 are turned on by the emission signal EMj of a relatively low level. In this case, the drive current Id is generated according to the difference between the gate voltage of the gate electrode of the first transistor T1 and the first drive voltage ELVDD, and is supplied to the light emitting element ED through the sixth transistor T6. That is, the emission current Ied flows through the light emitting element ED.
[0156] Figure 8Scanning signals GI1 to GI3840 in the multi-frequency mode are shown.
[0157] Reference Figure 8 , in multi-frequency mode MFM (refer to Figure 3B ), the frequency of each of the scanning signals GI1 to GI1920 is 120 Hz, and the frequency of each of the scanning signals GI1921 to GI3840 is 10 Hz.
[0158] In an embodiment, for example, the scan signals GI1 to GI1920 correspond to the first display area DA1 (refer to Figure 1 ), and the scan signals GI1921 to GI3840 correspond to the scan signals provided to the second display area DA2 (refer to Figure 1 ) scanning signal.
[0159] The scan signals GI1 to GI1920 may transition to a relatively high level (or an active level) in each of the first to 120th frames F120, and the scan signals GI1921 to GI3840 may transition to a relatively high level every ten frames (eg, in the first and 11th frames F11).
[0160] Accordingly, the first display area DA1 in which a video is displayed may be driven in response to the scanning signals GI1 to GI1920 having a normal frequency (e.g., 120 Hz), and the second display area DA2 in which a still image is displayed may be driven in response to the scanning signals GI1921 to GI3840 having a relatively low frequency (e.g., 10 Hz). Since only the second display area DA2 in which a still image is displayed is driven by the relatively low frequency, power consumption may be reduced without reducing the performance of the electronic device DD (refer to FIG. 1 ). Figure 1 ) display quality.
[0161] In an embodiment, Figure 8 Only the scanning signals GI1 to GI3840 are shown in FIG. 1 , but as in the scanning signals GI1 to GI3840, the scanning drive circuit SD (refer to FIG. 1 ) Figure 5 ) can generate scanning signals GCj whose number is equal to the number of scanning signals GI1 to GI3840 (refer to Figure 7 ) and the number of scanning signals GWj (refer to Figure 7 ), and the emission drive circuit EDC (refer to Figure 5 ) can generate emission signals EMj (refer to Figure 7 ).
[0162] Fig. 9is a graph showing brightness changes of the first display area DA1 and the second display area DA2 in the multi-frequency mode MFM, the normal mode NFM, and the refresh mode RFM.
[0163] Reference Figure 3A , Figure 3B , Figure 4 and Fig. 9 , the first to seventh frame periods FR1 to FR7 may be sequentially provided to display the images IM1 and IM2 in the display panel DP.
[0164] In the first frame period FR1, the display panel DP may operate in a normal mode NFM. In the normal mode NFM, the driving frequencies of the first display area DA1 and the second display area DA2 of the display panel DP may be the same. In this case, the driving frequency may correspond to a normal frequency. The normal frequency may be 120 Hz, but the present disclosure is not limited thereto.
[0165] In the normal mode NFM, image data based on image information RGB corresponding to the first display area DA1 may be provided to the first display area DA1, and image data based on image information RGB corresponding to the second display area DA2 may be provided to the second display area DA2. In an embodiment, for example, a first image IM1 may be displayed in the first display area DA1, and a second image IM2 may be displayed in the second display area DA2.
[0166] In the first frame period FR1, the brightness information DBV of the display area DA may include a tenth brightness value DBV10. The brightness of the display panel DP corresponding to the tenth brightness value DBV10 may be 500 nits.
[0167] In the second to fourth frame periods FR2 to FR4, the display panel DP may operate in the multi-frequency mode MFM.
[0168] In the second frame period FR2 corresponding to the first frame of the multi-frequency mode MFM, the driving frequency of the first display area DA1 may be the first driving frequency. For example, the first driving frequency may be the same as the normal frequency and may be 120 Hz. The driving frequency of the second display area DA2 may be the second driving frequency. The second driving frequency may be lower than the first driving frequency. In an embodiment, the second driving frequency may be 10 Hz. In this case, for example, image data based on image information RGB corresponding to the first display area DA1 may be provided to the first display area DA1, and image data based on image information RGB corresponding to the second display area DA2 may be provided to the second display area DA2.
[0169] In the second frame period FR2 , the brightness information DBV of the display area DA may include a tenth brightness value DBV10 .
[0170] In the third frame period FR3, image data based on image information RGB corresponding to the first display area DA1 may be provided to the first display area DA1. In the third frame period FR3, image data may not be provided to the second display area DA2. In an embodiment, not providing image data may mean maintaining the image data.
[0171] According to the present disclosure, since the image data to be provided to the display panel DP operating in the multi-frequency mode MFM is maintained during a given frame period, the driving controller 100 can operate in a low-power driving state or a power-off state. Accordingly, an electronic device DD (refer to Figure 1 ).
[0172] In the third frame period FR3 , the brightness information DBV of the display area DA may include a tenth brightness value DBV10 .
[0173] In the fourth frame period FR4, image data based on the image information RGB corresponding to the first display area DA1 may be provided to the first display area DA1. In the fourth frame period FR4, image data may not be provided to the second display area DA2.
[0174] In the fourth frame period FR4 , the brightness information DBV of the display area DA may include a tenth brightness value DBV10 .
[0175] In the fifth frame period FR5, the brightness information DBV of the display area DA may be changed from the tenth brightness value DBV10 to the first brightness value DBV1. The host AP may generate the brightness information DBV including the first brightness value DBV1. The host AP may provide the brightness information DBV to the driving controller 100. The brightness of the display panel DP corresponding to the first brightness value DBV1 may be 2 nits. That is, the brightness value of the display panel DP is changed from the tenth brightness value DBV10 to the first brightness value DBV1, which may mean that the brightness of the display panel DP is reduced.
[0176] In this case, in the fifth frame period FR5, the display panel DP may operate in the refresh mode RFM. The refresh mode RFM may be used to allow the display area DA to operate at a normal frequency during one frame (e.g., the fifth frame period FR5). In the refresh mode RFM, image data based on image information RGB corresponding to the first display area DA1 may be provided to the first display area DA1, and image data based on image information RGB corresponding to the second display area DA2 may be provided to the second display area DA2.
[0177] During the operation of the host AP and the driving controller 100 in the video mode, when the brightness information DBV changes, the image processor IP may drive the display panel DP in the refresh mode RFM. The image processor IP may receive the image information RGB from the transmitter TX through the receiver RX.
[0178] During the operation of the host AP and the driving controller 100 in the command mode, when the brightness information DBV changes, the image processor IP may drive the display panel DP in the refresh mode RFM. The image processor IP may receive the image information RGB stored in the frame memory FRM.
[0179] During the operation of the host AP and the driving controller 100 in the PSR mode, when the brightness information DBV changes, the image processor IP may drive the display panel DP through the refresh mode RFM in the multi-frequency mode MFM. The image processor IP may receive the image information RGB stored in the frame memory FRM.
[0180] In the sixth and seventh frame periods FR6 and FR7 starting after the fifth frame period FR5 in which the display panel DP operates in the refresh mode RFM is completed, the display panel DP may operate in the multi-frequency mode MFM again.
[0181] In the sixth frame period FR6, image data based on the image information RGB corresponding to the first display area DA1 may be provided to the first display area DA1. In the sixth frame period FR6, image data may not be provided to the second display area DA2.
[0182] In the sixth frame period FR6 , the brightness information DBV of the display area DA may be updated by the refresh mode RFM to change from the tenth brightness value DBV10 to the first brightness value DBV1 . The brightness information DBV of the display area DA may include the first brightness value DBV1 .
[0183] In the seventh frame period FR7, image data based on the image information RGB corresponding to the first display area DA1 may be provided to the first display area DA1. In the seventh frame period FR7, image data may not be provided to the second display area DA2.
[0184] According to the present disclosure, since the image data to be provided to the display panel DP operating in the multi-frequency mode MFM is maintained during a given frame period, the driving controller 100 can operate in a low-power driving state or a power-off state. Accordingly, an electronic device DD (refer to Figure 1 ).
[0185] In the seventh frame period FR7 , the brightness information DBV of the display area DA may include a first brightness value DBV1 .
[0186] Unlike the above embodiments of the present disclosure, when the brightness is changed during the operation of the display panel DP in the multi-frequency mode MFM, image data may not be provided in the period in which the display panel DP operates at a relatively low frequency, that is, the brightness information may not be updated. In this case, a brightness difference may exist between the first display area operating at a relatively high frequency and the second display area operating at a relatively low frequency, and may be visually perceived by the user. However, when the brightness of the display panel DP changes during the driving of the display panel DP in the multi-frequency mode MFM, the display panel DP may be operated in a refresh mode RFM during one frame. During the refresh mode RFM, image information RGB and brightness information DBV may be provided to the second display area DA2 operating at a relatively low frequency. This may mean that the brightness value of the display panel DP is updated according to the brightness information DBV during the refresh mode RFM. Each of the first display area DA1 and the second display area DA2 may emit light of the same brightness. That is, the brightness of the display area DA may be consistent. Brightness differences and image quality differences may be prevented within one frame. Accordingly, an electronic device DD (refer to Figure 1 ).
[0187] According to the above description, when the brightness information changes in the multi-frequency mode, the electronic device can drive the display panel in the refresh mode, and thus, the brightness difference of the display area of the display panel can be prevented. Accordingly, an electronic device with improved display quality can be provided.
[0188] While the present disclosure has been described with reference to the embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications can be made thereto without departing from the spirit and scope of the present disclosure as described in the appended claims.
Claims
1. An electronic device, comprising: a display panel, the display panel operating in a normal mode, a multi-frequency mode, or a refresh mode, and having a display area defined in the display panel; A driving controller, wherein the driving controller controls the display panel; as well as a host, the host generating brightness information including a brightness value of the display area and outputting the brightness information to the drive controller, Wherein, in the multi-frequency mode, the display area is divided into a first display area and a second display area adjacent to the first display area, and the first display area and the second display area are operated by the driving controller at different frequencies, Wherein, in the normal mode, the display area is operated by the driving controller at a normal frequency, wherein, in the refresh mode, the display area is operated by the drive controller at the normal frequency during a frame, and Wherein, when the brightness information changes, the display panel operates in the refresh mode.
2. The electronic device according to claim 1, wherein: During the multi-frequency mode, the first display area operates at a first driving frequency, and the second display area operates at a second driving frequency lower than the first driving frequency.
3. The electronic device as claimed in claim 2, wherein: The first driving frequency is the same as the normal frequency, and the second driving frequency is lower than the normal frequency.
4. The electronic device according to claim 1, wherein: The host comprises: a transmitter, the transmitter outputting the brightness information and the image information, and Wherein, the drive controller comprises: a receiver that receives the image information; and An image processor receives the brightness information.
5. The electronic device as claimed in claim 4, wherein: When the brightness information changes, the image processor changes the brightness value of the display panel.
6. The electronic device as claimed in claim 4, wherein: In the normal mode and the refresh mode, the image information corresponding to the display area is provided, and Wherein, in the multi-frequency mode, part of the image information is provided to the first display area, and the remaining part of the image information to be provided to the second display area is maintained.
7. The electronic device as claimed in claim 6, wherein: When the brightness information changes, the image processor drives the display panel in the refresh mode, and The image processor receives the image information from the transmitter through the receiver.
8. The electronic device as claimed in claim 6, wherein: The drive controller also includes: a frame memory connected between the receiver and the image processor, The frame memory stores the image information, and each frame provides at least a portion of the image information to the image processor.
9. The electronic device as claimed in claim 8, wherein: When the brightness information changes, the image processor drives the display panel in the refresh mode, and The image processor receives the image information stored in the frame memory.
10. The electronic device according to claim 8, wherein: The transmitter provides the image information to the receiver, Wherein, during the normal mode, The receiver provides the image information to the image processor, and The image processor drives the display panel based on the image information, and Wherein, in the multi-frequency mode, The receiver sends the image information to the frame memory, The frame memory stores the image information, and The image processor drives the display panel based on the image information stored in the frame memory.
11. The electronic device according to claim 10, wherein: When the brightness information changes, the image processor drives the display panel through the refresh mode in the multi-frequency mode, and The image processor receives the image information stored in the frame memory.
12. The electronic device according to claim 1, wherein: The display panel is operated in frames. wherein the frame includes a first frame period, a second frame period, and a third frame period provided sequentially, wherein the brightness information is changed from a first brightness value to a second brightness value different from the first brightness value, wherein, in the first frame period, the display panel operates in the multi-frequency mode, and the display area displays an image by the first brightness value, wherein when the brightness information changes in the second frame period, the display panel operates in the refresh mode, and the display area displays the image by the second brightness value, and Wherein, in the third frame period, the display panel operates in the multi-frequency mode, and the display area displays the image by the second brightness value.
13. An electronic device comprising: a display panel, the display panel operating in a normal mode, a multi-frequency mode, or a refresh mode, and having a display area defined in the display panel; A driving controller, wherein the driving controller controls the display panel; as well as a host, the host generating brightness information including a brightness value of the display area and outputting the brightness information to the drive controller, Wherein, in the multi-frequency mode, the display area is divided into a first display area and a second display area adjacent to the first display area, and the first display area and the second display area are operated by the driving controller at different frequencies, Wherein, in the normal mode, the display area is operated by the driving controller at a normal frequency, wherein, in the refresh mode, the display area is operated by the drive controller at the normal frequency during one frame, The brightness information includes first brightness information having a first brightness value and second brightness information having a second brightness value different from the first brightness value, and When the brightness information changes from the first brightness value to the second brightness value, the display panel operating in the multi-frequency mode operates in the refresh mode.
14. The electronic device as claimed in claim 13, wherein: The host comprises: a transmitter, the transmitter outputting the brightness information and the image information, and Wherein, the drive controller comprises: a receiver that receives the image information; and An image processor receives the brightness information.
15. The electronic device as claimed in claim 14, wherein: When the brightness information changes, the image processor changes the brightness value of the display panel.
16. The electronic device according to claim 14, wherein: In the normal mode and the refresh mode, the image information corresponding to the display area is provided, and Wherein, in the multi-frequency mode, part of the image information is provided to the first display area, and the remaining part of the image information to be provided to the second display area is maintained.
17. The electronic device as claimed in claim 16, wherein: When the brightness information changes, the image processor drives the display panel in the refresh mode, and The image processor receives the image information from the transmitter through the receiver.
18. The electronic device according to claim 16, wherein: The drive controller also includes: a frame memory connected between the receiver and the image processor, The frame memory stores the image information, and each frame provides at least a portion of the image information to the image processor.
19. The electronic device as claimed in claim 18, wherein: When the brightness information changes, the image processor drives the display panel in the refresh mode, and The image processor receives the image information stored in the frame memory.
20. The electronic device as claimed in claim 13, wherein: During the multi-frequency mode, the first display area operates at a first driving frequency, and the second display area operates at a second driving frequency lower than the first driving frequency, and The first driving frequency is the same as the normal frequency, and the second driving frequency is lower than the normal frequency.
Citation Information
Patent Citations
Substrate processing apparatus and method
KR1020230103137A