Signal merging method and device, combiner, merging decoder and receiving end equipment

Abstract

The invention provides a signal merging method and device, a combiner, a merging decoder and receiving end equipment, which can be used in the technical field of communication. The method comprises the following steps: acquiring demodulated signals of a plurality of channels; the signal comprises signal values of a plurality of data bits; for each data bit, combining the signal values of the plurality of channels on the data bit to obtain a first combined signal value of the data bit; determining a symbol of each data bit based on each signal value in the plurality of channels; the symbols are used for representing positive and negative; for each data bit, adding a symbol of the data bit to the first combined signal value of the data bit to obtain a second combined signal value of the data bit; generating a combined signal; the merged signal includes a second merged signal value of the plurality of data bits. According to the signal merging method, a more efficient and practical signal merging scheme is provided for a communication system through the beneficial effects of simplifying the merging process, reducing the complexity, improving the efficiency, enhancing the robustness and the like.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a signal merging method, device, combiner, merging decoder and receiving end equipment. Background Art

[0002] Diversity refers to transmitting the same signal over multiple independent channels to reduce the possibility of a signal being unrecognizable due to deep channel fading. Combining refers to combining multiple signals on multiple channels at the receiving end to obtain diversity gain.

[0003] There are many merging methods in the related art: selective merging, equal gain merging and maximum ratio merging. These merging methods all rely on additional parameter estimation (such as signal-to-noise ratio estimation, weight estimation, etc.). As the number of channels increases, there are problems of high complexity and low efficiency. Summary of the invention

[0004] The present application provides a signal merging method, device, combiner, merging decoder and receiving end equipment to solve the problems of high complexity and low efficiency.

[0005] In a first aspect, the present application provides a signal merging method, comprising:

[0006] Acquire demodulated signals of multiple channels; the signals include signal values ​​of multiple data bits;

[0007] For each of the data bits, combining the signal values ​​of the multiple channels on the data bit to obtain a first combined signal value of the data bit;

[0008] Determining the sign of each of the data bits based on the signal values ​​in the plurality of channels; the sign is used to indicate positive or negative;

[0009] For each of the data bits, adding a sign of the data bit to the first combined signal value of the data bit to obtain a second combined signal value of the data bit;

[0010] A combined signal is generated; the combined signal includes a second combined signal value of a plurality of the data bits.

[0011] In some embodiments, for each of the data bits, combining the signal values ​​of the multiple channels on the data bit to obtain a first combined signal value of the data bit includes:

[0012] For each of the data bits, the following operations are performed respectively, and the following operations include:

[0013] Adding the signal values ​​of the multiple channels at the data bit respectively and taking the absolute value of the addition result to obtain a first combined signal value of the data bit; or,

[0014] Determine the maximum absolute value of the signal values ​​of the multiple channels at the data bit as the first combined signal value of the data bit; or,

[0015] According to the preset weights corresponding to the channels, signal values ​​of the multiple channels on the data bits are weighted and summed, and an absolute value of the weighted sum result is taken to obtain a first combined signal value of the data bit.

[0016] In some embodiments, determining the sign of each of the data bits based on the signal values ​​in the plurality of channels comprises:

[0017] Determining, from the signals of the plurality of channels, a target signal value whose deviation degree information meets a preset deviation condition;

[0018] A sign of each of the data bits is determined based on the target signal value.

[0019] In some embodiments, determining, from the signals of the multiple channels, a target signal value whose deviation degree information meets a preset deviation condition comprises:

[0020] Determine the absolute value of each signal value in the signals of the multiple channels respectively; the absolute value represents the deviation degree information;

[0021] A signal value having the largest absolute value among the signals of the multiple channels is determined as the target signal value.

[0022] In some embodiments, determining the sign of each of the data bits based on the target signal value comprises any one of the following:

[0023] Obtaining a symbol corresponding to the target signal value, and determining the symbol as a symbol of each of the data bits; or,

[0024] For each of the data bits, a signal value of the signal to which the target signal value belongs at the data bit is determined, and a sign of the signal value is determined as the sign of the data bit.

[0025] In some embodiments, the signals of the multiple channels exist in the form of a matrix, each row of the matrix represents a signal of a channel, each column represents a data bit, and the elements in the matrix represent signal values;

[0026] The step of determining, for each of the data bits, a signal value of a signal to which the target signal value belongs at the data bit, and determining the sign of the signal value as the sign of the data bit includes:

[0027] Determine the index of the target signal value in the matrix; the index includes a row number and a column number;

[0028] For each column in the matrix, the sign of the element at the reference index is determined as the sign of the column; the row number in the reference index is the row number of the target signal value, and the column number in the reference index refers to the current column.

[0029] In some embodiments, the signals of the multiple channels include signals respectively received through multiple channels.

[0030] In some embodiments, the signals of the multiple channels include at least two signals received through the same channel; the at least two signals include an error packet signal and at least one retransmission packet signal, or the at least two signals include a primary transmission signal and at least one redundant copy signal.

[0031] In some embodiments, when the at least two signals include an error packet signal and at least one retransmission packet signal, before combining the signal values ​​of the data bits of the multiple channels respectively on the data bits to obtain the first combined signal value of the data bits, the method further includes:

[0032] The signals of each channel are decoded respectively to obtain decoded signals of each channel.

[0033] In some embodiments, the method is applied to a merge decoder, the merge decoder comprises a merging unit and a decoding unit, and the merging unit is connected to the decoding unit;

[0034] Before combining the signal values ​​of the plurality of channels on the data bits for each of the data bits to obtain a first combined signal value of the data bits, the method further includes:

[0035] Using a preset rate matching rule to determine the data bits to be processed;

[0036] For a data bit to be processed among the plurality of data bits, determining a preset value as a first combined signal value of the data bit;

[0037] Accordingly, for each of the data bits, combining the signal values ​​of the multiple channels on the data bit to obtain a first combined signal value of the data bit includes:

[0038] For data bits other than the data bits to be processed among the plurality of data bits, signal values ​​of the plurality of channels on the data bits are combined to obtain a first combined signal value of the data bits.

[0039] In a second aspect, the present application provides a signal merging device, comprising:

[0040] An acquisition module, used to acquire demodulated signals of multiple channels; the signals include signal values ​​of multiple data bits;

[0041] A merging module, configured to merge, for each of the data bits, the signal values ​​of the multiple channels on the data bits respectively, to obtain a first merged signal value of the data bit;

[0042] A determination module, configured to determine a sign of each of the data bits based on the signal values ​​in the plurality of channels; the sign is used to indicate positive or negative;

[0043] an adding module, configured to add, for each of the data bits, a sign of the data bit to the first combined signal value of the data bit, so as to obtain a second combined signal value of the data bit;

[0044] A generating module is used to generate a combined signal; the combined signal includes a second combined signal value of a plurality of the data bits.

[0045] In a third aspect, the present application provides a merger, comprising: a processor and a memory communicatively connected to the processor;

[0046] The memory stores computer-executable instructions;

[0047] The processor executes the computer-executable instructions stored in the memory to implement the signal merging method as described in any one of the first aspects.

[0048] In a fourth aspect, the present application provides a merged decoder, the merged decoder comprising a merging unit and a decoding unit, and the merging unit is connected to the decoding unit;

[0049] The merging unit is used to implement the signal merging method as described in any one of the first aspects;

[0050] The decoding unit is used for decoding the combined signal.

[0051] In a fifth aspect, the present application provides a receiving end device, comprising: a combiner, a decoder, and receivers and demodulators corresponding to multiple channels respectively as described in the third aspect; wherein the receiver corresponding to one channel is connected to the demodulator, and the demodulator, the combiner, and the decoder corresponding to each of the channels are connected in sequence.

[0052] In a sixth aspect, the present application provides a receiving end device, comprising: a combined decoder as described in the fourth aspect and receivers and demodulators corresponding to multiple channels respectively; wherein the receiver corresponding to one channel is connected to the demodulator, and the demodulators corresponding to each of the channels and the combined decoder are connected in sequence.

[0053] In a seventh aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer execution instructions, and when the computer execution instructions are executed by a processor, they are used to implement the signal merging method described in any one of the first aspects.

[0054] In an eighth aspect, the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the signal merging method described in any one of the first aspects.

[0055] The signal merging method, device, merger, merging decoder and receiving device provided by the present application reduce the need for parameter estimation by directly merging signal values ​​and adding symbol information, thereby simplifying the merging process. Since the parameter estimation steps are reduced, the computational complexity required for the implementation of the present method is significantly reduced, which is very beneficial for hardware implementation and software operation in practical applications, and can reduce resource consumption and improve efficiency. By merging the signal values ​​of multiple channels for each data bit and considering the symbol information, it can resist channel fading and interference to a certain extent and improve the robustness of the signal. In summary, the signal merging method provides a more efficient and practical signal merging solution for the communication system by simplifying the merging process, reducing complexity, improving efficiency, and enhancing robustness. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0057] Figure 1 It is a schematic diagram of an application scenario provided by this application;

[0058] Figure 2 It is a structural schematic diagram of a receiving end device provided by the present application;

[0059] Figure 3 It is a structural schematic diagram of another receiving end device provided by the present application;

[0060] Figure 4 It is a structural diagram of a combined decoder provided by the present application;

[0061] Figure 5 It is a flowchart of a signal merging method provided by the present application;

[0062] Figure 6 It is a flowchart of another signal merging method provided by the present application;

[0063] Figure 7 It is a schematic diagram of a multi-group joint decoding scenario provided by the present application;

[0064] Figure 8 It is a flowchart of another signal merging method provided by the present application;

[0065] Fig. 9 It is a schematic diagram of a signal merging process provided by the present application;

[0066] Fig.10 It is a schematic diagram of a simulation verification result provided by the present application;

[0067] Fig.11 is a schematic diagram of another signal merging process provided by the present application;

[0068] Fig.12 is a schematic diagram of another simulation verification result provided by the present application;

[0069] Fig.13 It is a structural schematic diagram of a signal merging device provided by the present application;

[0070] Fig.14 It is a structural schematic diagram of a combiner provided in this application.

[0071] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0072] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0073] The terms "first", "second", etc. used in this application may be used to describe various concepts herein, but unless otherwise specified, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another.

[0074] The terms "at least one", "multiple", "each", and "any" used in this application, at least one includes one, two or more, multiple includes two or more, and each refers to each of the corresponding multiple, and any refers to any one of the multiple.

[0075] Diversity refers to the transmission of the same data over multiple independent paths to reduce the possibility of signals being unrecognizable due to deep channel fading. Combining refers to the need to combine multiple signals received through diversity at the receiving end to obtain diversity gain. In wireless communications, diversity combining technology is one of the effective ways to combat multipath fading and achieve multi-node data signal-level fusion. It is used to solve problems such as signal fading during wireless transmission, adjacent channel interference, and co-channel interference during wireless reception. It can effectively improve the quality of received signals and enhance anti-interference capabilities.

[0076] There are various combining methods in the related art: selective combining, equal gain combining and maximum ratio combining.

[0077] Maximum ratio combining is to adjust the amplitude and phase of the signals of multiple channels, determine the weight of each channel, and perform weighted summation of the signals of multiple channels. This method requires channel state information (CSI) estimation for the signals of each channel, which is highly complex, and the accuracy of CSI estimation affects the performance after merging.

[0078] Equal-gain combining sets the weight of each channel to a constant, and adds the signals of multiple channels with equal gains (keeping the same phase), which can be regarded as a special case of maximum ratio combining.

[0079] Selective merging is to calculate the instantaneous signal-to-noise ratio of the signal of each channel separately, and select the signal with the largest instantaneous signal-to-noise ratio (SNR) as the output. This method is simple to implement, but it depends on the instantaneous signal-to-noise ratio of the signal of each channel, and does not fully utilize the signal energy of the unselected channels.

[0080] The above three merging methods have the following technical problems:

[0081] 1. The existing solutions have a large forward dependency and need to rely on other parameter estimation or data adjustment and processing before merging. For example, it is necessary to estimate the signal fading amplitude or signal-to-noise ratio, or pre-adjust and process the data before merging. As the number of channels increases, there are problems such as high complexity, large resource usage, and low efficiency.

[0082] 2. In the existing scheme, parameter estimation and data adjustment and processing directly affect the selection of the final signal. The performance after merging is highly dependent on parameter estimation and data form. It is not applicable to time-varying wireless communication systems and has poor flexibility and applicability.

[0083] 3. The existing solutions focus on capturing the synchronization part at the receiving end, and involve fewer merging solutions for the demodulation and decoding part, ignoring the encoding and decoding characteristics of channel coding, reducing the acquisition of diversity coding gain.

[0084] The present application proposes a signal merging method, device, combiner, combined decoder and receiving device, aiming to solve the above-mentioned technical problems.

[0085] The technical solution of the embodiment of the present application can be applied to various communication systems, such as: Long Term Evolution (LTE) system, LTE Frequency Division Duplex (FDD) system, LTE Time Division Duplex (TDD), Universal Mobile Telecommunication System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX) communication system, future fifth generation (5G) communication system or new radio access technology (NR), vehicle-to-XV2X, where V2X can include vehicle-to-network (V2N), vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-pedestrian (V2P), etc., Long Term Evolution-Vehicle (LTE-V), Internet of Vehicles, machine type communication (machine type communication) communication (MTC), Internet of Things (IoT), Long Term Evolution-Machine (LTE-M), Machine to Machine (M2M), etc.

[0086] Figure 1 is a schematic diagram of an application scenario provided by this application. Figure 1 As shown, the application scenario is a communication system, which may include at least two network devices, which is not limited in this application. Figure 1 The communication system 10 shown includes two network devices: a network device 101 and a network device 102 .

[0087] Each of the above network devices may be configured with multiple antennas. The multiple antennas may include at least one transmitting antenna for sending signals and at least one receiving antenna for receiving signals. In addition, each network device also additionally includes a transmitter chain and a receiver chain. It can be understood by those skilled in the art that they may include multiple components related to signal transmission and reception (such as processors, modulators, multiplexers, demodulators, demultiplexers or antennas, etc.). Therefore, network devices can communicate with each other through multi-antenna technology.

[0088] Optionally, the communication system may also include other network entities such as a network controller and a mobility management entity, but the embodiments of the present application are not limited thereto.

[0089] In the embodiment of the present application, the network device may be any device with wireless transceiver function. The device includes but is not limited to: evolved Node B (eNB), Radio Network Controller (RNC), Node B (NB), Base Station Controller (BSC), Base Transceiver Station (BTS), Home Base Station (e.g., Home evolved NodeB, or HomeNode B, HNB), Base Band Unit (BBU), Access Point (AP) in Wireless Fidelity (WIFI) system, wireless relay node, wireless backhaul node, transmission point (TP) or transmission and reception point (TRP), etc., and can also be a gNB in ​​a 5G, such as NR, system, or a transmission point (TRP or TP), one or a group of (including multiple antenna panels) antenna panels of a base station in a 5G system, or a network node constituting a gNB or a transmission point, such as a baseband unit (BBU), or a distributed unit (DU), etc.

[0090] In some deployments, the gNB may include a centralized unit (CU) and a DU. The gNB may also include an active antenna unit (AAU). The CU implements some functions of the gNB, and the DU implements some functions of the gNB, for example, the CU is responsible for processing non-real-time protocols and services, and implementing the functions of the radio resource control (RRC) and packet data convergence protocol (PDCP) layers. The DU is responsible for processing physical layer protocols and real-time services, and implementing the functions of the radio link control (RLC) layer, the media access control (MAC) layer, and the physical (PHY) layer. The AAU implements some physical layer processing functions, radio frequency processing, and related functions of active antennas. Since the information of the RRC layer will eventually become the information of the PHY layer, or be converted from the information of the PHY layer, therefore, under this architecture, high-level signaling, such as RRC layer signaling, can also be considered to be sent by the DU, or, sent by the DU+AAU. It can be understood that the network device can be a device including one or more of a CU node, a DU node, and an AAU node. In addition, the CU may be classified as a network device in an access network (radio access network, RAN), or the CU may be classified as a network device in a core network (core network, CN), which is not limited in the present application.

[0091] In one application scenario, the communication system is a base station communication system. The network equipment in the base station communication system includes base stations and mobile stations. Spatial diversity is achieved by several spatially separated base stations that fully or partially cover the same area. Each base station can independently send a signal to the mobile station. The mobile station uses multiple antennas to receive signals from each base station and merges signals from multiple channels to improve the strength and reliability of the received signal.

[0092] In another application scenario, the communication system is a satellite communication system, and the network equipment in the satellite communication system includes satellite equipment and ground equipment. Each satellite equipment can send a signal to the ground equipment respectively, and the ground equipment receives the signal of each satellite equipment and merges the signals of multiple channels to improve the strength and reliability of the received signal. For example, the satellite communication system can be a low-orbit satellite narrowband communication system.

[0093] In another application scenario, the communication system may also be a multiple-input multiple-output (MIMO) system or a short-range wireless communication system such as a wireless local area network (WLAN) or Bluetooth, which is not limited in the present application.

[0094] For ease of description, the present application refers to a network device that sends a signal as a sending end device, and a network device that receives a signal as a receiving end device. The signal combining method provided in the present application is applied to a receiving end device.

[0095] The present application provides a receiving end device, which includes a combiner, a decoder, and receivers and demodulators corresponding to multiple channels, wherein the receiver corresponding to the same channel is connected to the demodulator, and the demodulator, combiner, and decoder corresponding to each channel are connected in sequence.

[0096] Optionally, the number of the multiple channels can be set according to actual needs, which is not limited in this application, for example, the number is 2, 3 or 4. For example, the multiple channels are 3 channels. Figure 2 This is a schematic diagram of the structure of a receiving device provided by this application. Figure 2 As shown, the receiving end device 20 includes a combiner 201, a decoder 202, and also includes three receivers and three demodulators. The three receivers include a first receiver 2031, a second receiver 2032, and a third receiver 2033. The three demodulators include a first demodulator 2041, a second demodulator 2042, and a third demodulator 2043. Among them, the receivers corresponding to the same channel are connected to the demodulators, and each demodulator is respectively connected to the combiner 201, and the combiner 201 is also connected to the decoder 202.

[0097] The receiver is used to receive the signal sent by the transmitting device to achieve diversity reception. The demodulator is used to demodulate the analog signal received by the receiver into a digital signal. The combiner 201 is used to execute the signal merging method provided by the present application to merge the signals of multiple channels to obtain a merged signal. The decoder 202 is used to decode the merged signal to restore the original data.

[0098] Optionally, the function of the combiner 201 can be implemented by a hardware logic circuit or by a software program code. If implemented by a hardware logic circuit, the combiner 201 only needs a comparator and an adder. If implemented by a software program code, the structure of the combiner 201 is shown below. Fig.14 , I will not go into details here.

[0099] Optionally, the decoder 202 is not limited to a single function of decoding. For example, the decoder 202 overview represents a decoder related to the error correction code, including a deinterleaving module, a rate matching module, etc. The error correction code type and the corresponding decoding method of the decoder 202 are not limited in this application. For example, the decoding method can be a Turbo code (a cascade code), a low-density parity-check code (LDPC) code, a polarization code, and other decoding methods. Correspondingly, the encoder in the transmitting end device is an encoder related to the error correction code, and includes a rate matching module, an interleaving submodule, etc. In actual applications, the signals of multiple channels are merged to obtain a merged signal, and the merged signal is used as the input of the decoder, and the decoder performs relevant operations according to the decoding scheme in the communication protocol system to complete the decoding output.

[0100] In some embodiments, the combiner and decoder in the receiving device are independently configured, such as Figure 2 The receiving device 20 shown. In some other embodiments, the combiner and decoder in the receiving device can be integrated into one module, and accordingly, the receiving device includes a combined decoder and receivers and demodulators corresponding to multiple channels respectively; wherein the receiver corresponding to the same channel is connected to the demodulator, and the demodulators corresponding to each channel are connected to the combined decoder.

[0101] Optionally, the number of the multiple channels can be set according to actual needs, which is not limited in this application, for example, the number is 2, 3 or 4. For example, the multiple channels are 3 channels. Figure 3 This is a schematic diagram of the structure of another receiving device provided by this application. Figure 3 As shown, the receiving end device 30 includes a combined decoder 301 and multiple receivers and multiple demodulators, the multiple receivers include a fourth receiver 3021, a fifth receiver 3022 and a sixth receiver 3023, and the multiple demodulators include a fourth demodulator 3031, a fifth demodulator 3032 and a sixth demodulator 3033; wherein the receivers corresponding to the same channel are connected to the demodulator, and the demodulators corresponding to each channel are connected to the combined decoder 301.

[0102] The receiver is used to receive the signal sent by the transmitting device to achieve diversity reception. The demodulator is used to demodulate the analog signal received by the receiver into a digital signal. The merging decoder 301 is used to execute the signal merging method provided by the present application, merge the signals of multiple channels to obtain the merged signal, and decode the merged signal to restore the original data.

[0103] Optionally, Figure 4 Schematic diagram of the structure of a combined decoder provided by this application. Figure 4As shown, the merging decoder 301 includes a merging unit 3011 and a decoding unit 3012, and the merging unit 3011 is connected to the decoding unit 3012; the merging unit 3011 is used to execute the signal merging method provided in the present application; the decoding unit 3012 is used to decode the merged signal.

[0104] Optionally, the merging decoder 301 further includes a switch, which is used to switch between single channel and multi-channel, so as to control whether to enable the merging unit 3011. For example, when the number of channels is 1, signal merging is not required, and the function of the merging unit 3011 is not required, then the switch is set to single channel, so that the demodulator is connected to the decoding unit; for another example, when the number of channels is greater than 1, signal merging is required, then the switch is set to multi-channel, so that the demodulator is connected to the merging unit.

[0105] Optionally, the number of multiple channels can be set according to actual needs, which is not limited in this application.

[0106] Optionally, the function of the merging unit 3011 is the same as or similar to that of the above-mentioned merger 201, which is not described in detail here. Optionally, the function of the decoding unit 3012 is the same as or similar to that of the above-mentioned decoder 202, which is not described in detail here.

[0107] The execution subject of the signal merging method provided in the present application is a signal merging device, which is integrated in the merger 201 or the merger decoder 301.

[0108] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0109] Figure 5 FIG. 1 is a flow chart of a signal merging method provided by the present application. Figure 5 As shown, the signal merging method provided in this embodiment includes the following steps:

[0110] Step S401, acquiring demodulated signals of multiple channels; the signals include signal values ​​of multiple data bits.

[0111] The demodulation operation is implemented according to a predetermined communication protocol system. In some embodiments, the demodulation operation may be soft demodulation or hard demodulation. For ease of description, the present application takes soft demodulation as an example for explanation.

[0112] The received signal includes multiple data, each of which corresponds to a data bit, which can be regarded as real data, and the demodulated signal includes multiple signal values, each of which corresponds to a data bit. The signal value is essentially a measurement value used to indicate the relative possibility (confidence) that the data on the corresponding data bit corresponds to bit 0 or bit 1. Optionally, the signal value range is [-1,1]. If the signal value is greater than 0, it means that the data is more likely to correspond to bit 1; if it is less than 0, it means that the data is more likely to correspond to bit 0, and the larger the absolute value of the signal value, the greater the confidence and the more credible it is.

[0113] Step S402 : for each data bit, combining the signal values ​​of multiple channels on the data bit to obtain a first combined signal value of the data bit.

[0114] In this step, by combining the signal values ​​of multiple channels on the same data bit, a first combined signal value of the data bit is obtained, which can resist channel fading and interference to a certain extent and improve the robustness of the signal.

[0115] Step S403, based on the signal values ​​in the multiple channels, determine the sign of each data bit; the sign is used to indicate positive or negative.

[0116] The sign of the data bit can reflect whether the data on the data bit is more likely to correspond to bit 1 or bit 0. This step can provide a basis for signal merging by determining the sign of each data bit.

[0117] It should be noted that the present application does not limit the execution order of step S402 and step S403. For example, step S402 may be executed first and then step S403, or step S403 may be executed first and then step S402, or step S402 and step S403 may be executed simultaneously. For ease of description, the present application takes the example of executing step S402 first and then executing step S403 as an example. The implementation methods of other situations are similar and will not be repeated here.

[0118] Step S404: for each data bit, add the sign of the data bit to the first combined signal value of the data bit to obtain a second combined signal value of the data bit.

[0119] For example, if the first combined signal value of a data bit is 0.6, and the sign of the data bit is a negative sign, "-" represents the negative sign, then the second combined signal value of the data bit is "-0.6". For another example, if the first combined value of a data bit is 0.8, and the sign of the data bit is a positive sign, "+" represents the positive sign, then the second combined signal value of the data bit is "+0.8".

[0120] In this step, a second combined signal value is obtained by adding a sign on the basis of the first combined signal value, so that the second combined signal value not only contains the signal values ​​on each channel but also carries the corresponding signs, thereby having richer information.

[0121] Step S405, generating a combined signal; the combined signal includes a second combined signal value of a plurality of data bits.

[0122] Optionally, the second combined signal values ​​of the plurality of data bits are arranged in sequence according to an arrangement order to form a combined signal. The arrangement order is an arrangement order of the plurality of data bits in the demodulated signal.

[0123] This embodiment reduces the need for parameter estimation by directly merging signal values ​​and adding symbol information, thereby simplifying the merging process. Since the parameter estimation steps are reduced, the computational complexity required for the implementation of this method is significantly reduced, which is very beneficial for hardware implementation and software operation in practical applications. It can reduce resource consumption and improve efficiency. By merging the signal values ​​of multiple channels for each data bit and considering the symbol information, it can resist channel fading and interference to a certain extent and improve the robustness of the signal. In summary, the signal merging method provides a more efficient and practical signal merging solution for the communication system by simplifying the merging process, reducing complexity, improving efficiency, and enhancing robustness.

[0124] Figure 6 is a flow chart of another signal merging method provided by the present application, such as Figure 6 As shown, the signal merging method provided in this embodiment is applied to a combiner or a merging decoder. The signal merging method provided in this embodiment includes the following steps:

[0125] Step S501, acquiring demodulated signals of multiple channels.

[0126] In this embodiment, the implementation of step S201 is the same as the implementation of step S401 in the previous embodiment, and will not be described in detail here.

[0127] Exemplarily, the demodulated signal of the i-th channel is defined as Si, i∈[1,c], i represents the channel number, c represents the total number of multiple channels, and the q-th signal value in Si is Si(q), q∈[1,Q], Q represents the total number of multiple data bits, that is, the length of the signal actually transmitted in the channel. For example, S1(0) represents the 1st signal value in the 1st channel, and Sc(q) represents the q-th signal value in the c-th channel. Accordingly, Si={Si(1), Si(2), ..., Si(q), ..., Si(Q)}.

[0128] In this embodiment, step S402 is performed after step S501. In some embodiments, step S402 is specifically implemented as the following steps S502.

[0129] Step S502 : for each data bit, respectively add the signal values ​​of multiple channels on the data bit and take the absolute value of the addition result to obtain a first combined signal value of the data bit.

[0130] Exemplarily, the signals of multiple channels exist in the form of a matrix with c rows and Q columns, each row of the matrix represents a signal of a channel, each column represents a data bit, and the elements in the matrix represent signal values.

[0131] For example, the matrix S is:

[0132] Among them, S i (q) represents the qth signal value in the i-th channel, i∈[1,c], i represents the channel number, c represents the total number of multiple channels, q∈[1,Q], Q represents the total number of multiple data bits.

[0133] Accordingly, the code corresponding to step S502 is:

[0134]

[0135] Wherein, j∈[1,Q], j represents the jth data bit, S represents the above matrix, Value(j) represents the first combined signal value of the jth data bit, for represents a loop, sum represents a sum function, abs represents an absolute value function, and end represents the end of the loop.

[0136] Optionally, step S502 can be replaced by: for each data bit, determining the maximum absolute value of the signal values ​​of multiple channels on the data bit as the first combined signal value of the data bit; or, for each data bit, performing weighted summation on the signal values ​​of multiple channels on the data bit according to the preset weights corresponding to each channel, and taking the absolute value of the weighted summation result to obtain the first combined signal value of the data bit.

[0137] Among them, the preset weights corresponding to each channel can be set according to actual needs, and this embodiment does not limit this.

[0138] Whether it is through simple addition to obtain the absolute value, selecting the maximum absolute value, or taking the absolute value by weighted summation according to preset weights, these methods can enhance the signal strength of the data bit to a certain extent. In a multi-channel system, due to factors such as environmental noise and signal attenuation, the signal of a single channel may not be stable or strong enough. By merging the signals of multiple channels, the impact of these adverse factors can be effectively reduced, and the stability and reliability of the overall signal can be improved. This embodiment provides a variety of signal value merging strategies, which can be flexibly selected according to actual application scenarios and requirements. For example, in a scenario where the signal strength is generally low, a weighted summation method can be selected to maximize the signal strength by reasonably setting the weights; in a scenario where there is obvious interference or outliers, it may be more appropriate to select the absolute maximum value method because it can automatically ignore smaller or abnormal signal values.

[0139] In this embodiment, after step S502, step S403 is performed, that is, based on the signal values ​​in the multiple channels, the sign of each data bit is determined. In some embodiments, step S403 is specifically implemented as the following steps S503-S504.

[0140] Step S503: determining, from the signals of the multiple channels, a target signal value whose deviation degree information meets a preset deviation condition.

[0141] Among them, the target signal value is used for symbol determination. The deviation degree information of the signal value is used to indicate the deviation degree of the signal value, and the deviation degree can be understood as whether the real data on the corresponding data bit is more inclined to bit 0 or bit 1. If the deviation degree information of a certain signal value meets the preset deviation condition, it means that the quality of the signal value is good. Conversely, if the deviation degree information of a certain signal value does not meet the preset deviation condition, it means that the quality of the signal value is poor. In a multi-channel transmission system, the signal quality of different channels may be different. By selecting only high-quality signals for symbol determination, the dependence on and processing of low-quality signals can be reduced.

[0142] In some embodiments, step S503 is specifically implemented as the following steps S5031-S5032:

[0143] Step S5031, respectively determine the absolute value of each signal value in the signals of multiple channels; the absolute value represents the deviation degree information.

[0144] The signal value is essentially a measurement value used to indicate the relative possibility that the data on the corresponding data bit corresponds to the transmitted bit 0 or bit 1. Therefore, the absolute value of the signal value can be regarded as information on the degree of deviation of the signal value.

[0145] Step S5032: determine the signal value with the largest absolute value among the signals of the multiple channels as the target signal value.

[0146] Among them, the larger the absolute value of the signal value, the greater the confidence and the more reliable it is. Therefore, the preset deviation condition can be set to the maximum deviation degree information. Therefore, the deviation degree information meeting the preset deviation condition means the maximum deviation degree information, and the corresponding signal value can be determined as the target signal value.

[0147] By screening the target signal values ​​whose deviation degree information meets the preset deviation conditions, abnormal signals caused by noise, interference or transmission errors can be effectively excluded. This method helps to reduce the generation of misjudgments and erroneous symbols, especially in low signal-to-noise ratios or complex environments. Since this method takes into account the degree of signal deviation and selects the target signal value for symbol determination accordingly, even when the signal quality of some channels temporarily decreases, correct symbol determination can be made through the effective signal values ​​of other channels, resulting in strong stability.

[0148] Step S504: determine the sign of each data bit based on the target signal value.

[0149] Among them, each signal value in the signals of multiple channels carries a sign, and the sign is used to indicate positive or negative, which can reflect whether the data on the corresponding data bit is more likely to correspond to bit 1 or bit 0.

[0150] In some embodiments, step S504 includes the following two implementations:

[0151] The first implementation method is: obtaining a symbol corresponding to a target signal value, and determining the symbol as a symbol of each data bit.

[0152] The sign corresponding to the target signal value is the sign carried by the target signal value. For example, if the target signal value is -0.32, the sign is "-", indicating a negative sign. This implementation method (directly obtaining the sign corresponding to the target signal value) simplifies the processing flow because it directly uses the sign information of the target signal value that has been determined, reduces additional calculation steps and possible error sources, and improves processing efficiency.

[0153] The second implementation method: for each data bit, determine the signal value of the signal to which the target signal value belongs at the data bit, and determine the sign of the signal value as the sign of the data bit.

[0154] Although this implementation (determining the signal value and determining its sign for each data bit) involves more steps, it allows for more precise control and verification of each data bit, ensuring the accuracy of the sign determination.

[0155] Both implementations reduce the impact of noise and interference by selecting target signal values ​​with qualified deviation information, thereby improving the accuracy of symbol determination. In particular, the second implementation can further reduce misjudgments caused by signal fluctuations or noise by determining the signal value and its sign for each data bit individually. The two implementations provide different processing strategies, which can be selected according to specific application scenarios and needs. For example, in scenarios with high real-time requirements and relatively stable signal quality, the first implementation can be selected to simplify the processing flow; in scenarios with large fluctuations in signal quality or requiring higher accuracy, the second implementation can be selected to ensure that the symbol of each data bit can be correctly determined.

[0156] For the second implementation, in some embodiments, the signals of multiple channels exist in the form of a matrix, each row of the matrix represents the signal of a channel, each column represents a data bit, and the elements in the matrix represent signal values; accordingly, the second implementation is specifically implemented as follows: determining the index of the target signal value in the matrix; the index includes a row number and a column number; for each column in the matrix, determining the sign of the element at the reference index as the sign of the column; the row number in the reference index is the row number of the target signal value, and the column number in the reference index refers to the current column.

[0157] Accordingly, the codes corresponding to step S503-step S504 are:

[0158] [~,index]=max(abs(SoftInfo);

[0159] for j=1:Q

[0160] P(j)=sign(SoftInfo(index(j),j));

[0161] end

[0162] Among them, j∈[1,Q], j represents the jth data bit, SoftInfo represents the above matrix, abs represents the absolute value function, abs(SoftInfo) is also a matrix, each element of which is the absolute value of the corresponding element of the original matrix SoftInfo, max represents the maximum value function, the max function has two outputs, the first output is the maximum value in the matrix, and the second output is the linear index of the maximum value in the matrix. The ~ in [~,index] is used to ignore the first output and only receive the second output and store it in the variable index. for represents a loop, P(j) represents the sign of the jth data bit, the sign function is used to return the sign of a given value, and end represents the end of the loop.

[0163] By organizing the signals of multiple channels in a matrix form, the signal processing becomes more intuitive and unified. This structured data representation method helps to simplify the complexity of the signal processing algorithm. Using the matrix index (row number and column number) to locate and process specific signal values ​​makes data access very flexible. Whether reading, modifying or analyzing signals, the corresponding data location can be quickly located directly through the index, which improves the efficiency of data processing. In this implementation, the index (row number and column number) of the target signal value in the matrix is ​​determined, and the row number of the index is used as the row number of the reference index, combined with the column number currently being processed, to determine the symbol of the entire column of signals. This method avoids the tedious process of judging symbols point by point and improves the efficiency of symbol determination.

[0164] The above implementation method is explained by taking each row of the matrix representing a signal of a channel and each column representing a data bit as an example. In other implementation methods, each column of the matrix represents a signal of a channel and each row represents a data bit. The implementation principle is the same as the above implementation method and will not be repeated here.

[0165] Step S505 : for each data bit, add the sign of the data bit to the first combined signal value of the data bit to obtain a second combined signal value of the data bit.

[0166] Step S506: generating a merged signal.

[0167] In this embodiment, the implementation of step S505-step S506 is the same as the implementation of step S404-step S405 in the previous embodiment, and will not be repeated here.

[0168] Accordingly, the codes corresponding to step S503-step S504 are:

[0169] for j=1:Q

[0170] Sout(j)=P(j)×Value(j);

[0171] end

[0172] Wherein, Value(j) represents the first combined signal value of the j-th data bit, P(j) represents the sign of the j-th data bit, and Sout(j) represents the second combined signal value of the j-th data bit.

[0173] In some embodiments, for each data bit, the maximum absolute value of the signal values ​​of multiple channels at the data bit is determined as the first combined signal value of the data bit. The combined signal is Sout, Sout = {Stemp(1), Stemp(2), ..., Stemp(q), ..., Stemp(Q)}, where:

[0174] Stemp(1)=Si(1)|max(|S1(1)|,|S2(1)|,…|Sc(1)|);

[0175] Stemp(2)=Si(2)|max(|S1(2)|,|S2(2)|,…|Sc(2)|);

[0176] …

[0177] Stemp(q)=Si(q)|max(|S1(q)|,|S2(q),|...|Sc(q)|);

[0178] …

[0179] Stemp(Q)=Si(Q)|max(|S1(Q)|,|S2(Q),|...|Sc(Q)|).

[0180] Here, |Si(q)| represents the absolute value of the qth signal value in the i-th channel.

[0181] In this embodiment, for the merging of the demodulated signals on each path, the symbol with the largest absolute value in all channels and the value of the cumulative sum (or the maximum value or the weighted value) are selected as the output according to the data bit (bit position), and each symbol of each bit in the final merged data sequence has the polarization characteristics of the decoding decision, and the absolute value is greater than or equal to the signal value at the corresponding position of the demodulated signal on all channels.

[0182] The present application is aimed at merging signals after multi-channel reception, that is, for multiple independent channels transmitting the same signal, the signals on multiple channels are merged and processed through diversity combining technology to improve the reliability of channel transmission.

[0183] In some embodiments, the signal merging method provided by the present application is applied to a multi-channel reception scenario, for example, the multi-channel reception scenario is a multi-transmission and multi-reception scenario or a single transmission and multi-reception scenario. Accordingly, the signals of multiple channels include signals received respectively through multiple channels. The same signal sent is transmitted through multiple independent channels, which can be transmissions of different times, spaces, frequencies, angles, and even different polarization directions, for example, it can be parallel and simultaneous transmission, or it can be delayed parallel transmission.

[0184] In some embodiments, the signal merging method provided by the present application is also applied to a multi-group joint decoding scenario. Optionally, the signals of the multiple channels include at least two signals received through the same channel.

[0185] The at least two signals include a main transmission signal and at least one redundant copy signal. For example, the transmitting end device transmits redundant copies of the same packet signal at different times. The total number of the main transmission signal and the at least one redundant copy signal corresponds to the number of channels to be merged. The main transmission signal and the at least one redundant copy signal can be regarded as signals of different channels and merged according to the signal merging method provided in the present application. In the specific implementation, only some redundant copy signals can be selected for merging to reduce the merging overhead.

[0186] Among them, the at least two signals include an error packet signal and at least one retransmission packet signal. For example, the transmission of a retransmission packet signal after decoding failure in the Hybrid Automatic Repeat reQuest (HARQ) technology. Among them, the error packet signal and the retransmission packet signal that failed to be decoded can be regarded as diversity reception of the same signal sent at different times. The total number of error packet signals and at least one retransmission packet signal corresponds to the number of channels to be merged. The error packet signal and at least one retransmission packet signal can be regarded as signals of different channels and merged according to the signal merging method provided in the present application. In the specific implementation, only part of the retransmission packet signals can be selected for merging to reduce the merging overhead.

[0187] Optionally, in the case where at least two signals include an erroneous packet signal and at least one retransmitted packet signal, signal merging may be performed before decoding, for example, executing step S402 after step S501; or, signal merging may be performed after decoding, for example, after step S501, first executing the following steps and then executing step S402, the following steps including: respectively decoding the signal of each channel to obtain a decoded signal of each channel.

[0188] By combining signals after decoding, the decoded error packet signal can be regarded as a signal that has undergone better channel conditions, thereby making the combining gain better.

[0189] For example, Figure 7This is a schematic diagram of a multi-packet joint decoding scenario provided by the present application. At the transmitting end, the data block to be encoded is forward error correction encoded (Forward Error Correction, FEC), modulated and transmitted to the noisy channel by the transmitter. At the receiving end, the receiver receives the signal through the noisy channel, and outputs it after demodulation, FEC decoding, and cyclic redundancy check (CyclicRedundancy Check, CRC). Among them, the replica signal and the retransmitted packet signal after decoding failure are also transmitted through the noisy channel. Accordingly, after demodulation, the main transmission signal and the replica signal can be merged, and after merging, FEC decoding, CRC check and output; the error packet signal that failed to decode is merged with the retransmitted packet signal, and repeated decoding is performed after merging.

[0190] Figure 8 is a flow chart of another signal merging method provided by the present application, such as Figure 8 As shown, the signal merging method provided in this embodiment is applied to a merging decoder. The signal merging method provided in this embodiment includes the following steps:

[0191] Step S601, acquiring demodulated signals of multiple channels.

[0192] In this embodiment, the implementation of step S601 is the same as the implementation of step S501 in the previous embodiment, and will not be repeated here.

[0193] In this embodiment, after step S601, the first combined signal value of each data bit is determined respectively, and steps S602 to S604 are executed accordingly.

[0194] Step S602: using a preset rate matching rule to determine the data bits to be processed.

[0195] The preset rate matching rule is a rule preset in the decoding unit in the combined decoder, which is used to pre-process the signal before decoding to adjust the bit rate, thereby ensuring that the signal can be decoded according to the preset bit rate. For example, puncturing some data bits. The data bits to be processed refer to the data bits to be pre-processed according to the preset rate matching rule.

[0196] Step S603: for a data bit to be processed among the plurality of data bits, determine a preset value as a first combined signal value of the data bit.

[0197] Among them, the preset value can be set according to actual needs, and is not limited in this embodiment.

[0198] Step S604 , for the data bits other than the data bits to be processed among the multiple data bits, the signal values ​​of the multiple channels on the data bits are combined to obtain a first combined signal value of the data bits.

[0199] In this embodiment, the implementation of step S604 is the same as the implementation of step S502 in the previous embodiment, and will not be repeated here.

[0200] In the specific implementation process, when merging, the corresponding positions of the final merged sequence can be directly assigned according to the preset rate matching rules to reduce the processing of the corresponding positions and reduce the number of comparisons. When the number of channels to be merged is large and the rate matching adaptation is complex, the overhead can be further reduced.

[0201] Step S605, determining the sign of each data bit based on the signal values ​​in the multiple channels.

[0202] Step S606: for each data bit, add the sign of the data bit to the first combined signal value of the data bit to obtain a second combined signal value of the data bit.

[0203] Step S607, generating a merged signal.

[0204] In this embodiment, the implementation of steps S605-S607 is the same as the implementation of steps S503-S506 in the previous embodiment, and will not be repeated here.

[0205] Fig. 9 is a schematic diagram of a signal merging process provided by this application, such as Fig. 9 As shown, the process includes: for the information block to be transmitted, first encode it, then transmit it to the receiving end via transmission path 1 and transmission path 2 respectively, and then output it after demodulation, merging, decoding in sequence. For example, the combiner in the receiving end device is a dual-path merging module, and the signals output after the above two-path demodulation are defined as S1 = {S1(1), S1(2), ..., S1(q), ..., S1(Q)}, S2 = {S2(1), S2(2), ..., S2(q), ..., S2(Q)}, q∈[1, Q], Q represents the total number of multiple data bits. Taking the absolute maximum value as the first merged signal value, the first merged signal value of the qth data bit is:

[0206]

[0207] To demonstrate the technical effect of this solution, the inventor of this application conducted simulation verification. Specifically, based on low-orbit satellite narrowband communication application services, dual-channel receiving configuration, Turbo encoding and decoding, a large number of simulation verifications with random noise were performed to compare performance. Fig.10 is a schematic diagram of a simulation verification result provided by this application, such as Fig.10 As shown, the error performance gain corresponding to two different test cases (Turbo code types) when the dual-channel noise difference is 0dB and 5dB is given. Fig.10In the figure, the solid line is the performance of single signal decoding, and the dotted line is the performance of the dual signal implementation scheme under different noise differences. Fig.10 It can be seen that the technical solution brings obvious technical effects. Even when there is no obvious difference between the two signals, the directional combined decoding gain corresponding to the error correction code can be obtained. When the channel difference is obvious, the combined decoding gain of the diversity information can be obtained.

[0208] Fig.11 is a schematic diagram of another signal merging process provided by the present application, such as Fig.11 As shown, the process includes: for the information block to be transmitted, first encode it, then transmit it to the receiving end via transmission path 1, transmission path 2, and transmission path 3 respectively, and then output it after demodulation, merging, and decoding in sequence. For example, the merger in the receiving end device is a three-way merger module, and the information output after the above three-way demodulation is defined as S1 = {S1(1), S1(2), ..., S1(q), ..., S1(Q)}, S2 = {S2(1), S2(2), ..., S2(q), ..., S2(Q)}, S3 = {S3(1), S3(2), ..., S3(q), ..., S3(Q)}, q∈[1, Q], Q represents the total number of multiple data bits. Taking the cumulative sum absolute value as the first merged signal value, and taking the sign of the maximum absolute value as the sign of each data bit, the second merged signal value of the qth data bit is:

[0209]

[0210] To demonstrate the technical effect of this solution, the inventor of this application conducted simulation verification. Specifically, based on the low-orbit satellite narrowband communication application business, three-channel receiving configuration, Turbo encoding and decoding, a large number of simulation verifications with random noise were performed to compare performance. Fig.12 is a schematic diagram of another simulation verification result provided by this application, such as Fig.12 As shown, the error performance gains of dual-channel and triple-channel processing relative to single-channel processing are given respectively.

[0211] The present application is based on merging multiple signals after demodulation and before decoding, and adds an independent multiple signal merging module in the receiving end device. The module can be used as a part of the decoder and integrated with the decoder as a merging decoder, or it can be an independent merger before the decoder. The signal merging strategy provided by the present application is designed based on the reliability information (such as the absolute value of the signal value) and the symbol characteristics of the decision (such as the sign of the target signal value) in the decoding iteration, and makes full use of the characteristics of channel decoding to merge and select the data to be decoded. There is no restriction on the soft decision and hard decision of the decoding, and the merging strategy can be applied.

[0212] The signal merging strategy is based on the maximum deviation of the demodulated information for merging, and effectively utilizes the coding and decoding characteristics of the channel coding to change the error detection and correction capabilities of the decoder input signal during the iterative decoding process, and has good merging and decoding performance; the scheme is widely used, including but not limited to communication scenarios of multi-group merging and decoding such as multi-channel reception, repeated decoding, and multi-copy transmission. The signal merging strategy effectively improves the quality of the received signal with low complexity and enhances the anti-interference ability of the wireless communication system. The signal merging strategy does not rely on the estimation or calculation of parameters such as noise, signal-to-noise ratio, weight, etc. in the entire communication link, and can be independent of other data processing modules in the entire communication processing flow, without forward and backward dependencies, and has no effect on the processing of other modules, and can be directly reused. The signal merging strategy is simple and efficient, and only simple comparator and adder circuits are needed to realize the merging of multiple signals. Without adding additional storage overhead and complexity, and without changing the data format and length of the decoder, the transmission reliability is effectively improved. With the increase of the number of channels or the merged information source, there will be no problems such as high complexity, large resource occupation, and low efficiency. Only the comparator circuit needs to be appropriately increased. This signal merging strategy has strong flexibility and applicability, stable performance and high module reusability.

[0213] This signal merging strategy has no strict requirements on the number of channels. When there is no obvious difference in the noise of each signal, coding gain can be obtained. As the noise difference between the signals increases, the gain of the combined decoding also increases (as the number of channels increases, the gain tends to be stable). In practical applications, the gain is evaluated based on the actual receiving channel, and the number of channels can also be determined based on the possible gain to achieve the best performance that meets the requirements at a lower cost. This signal merging strategy is suitable for improving the performance of industry terminal products with high time-varying and resource-constrained applications, such as ground satellite terminals or satellite communication receiving systems, to improve anti-interference capabilities and reduce terminal costs.

[0214] Fig.13 is a structural diagram of a signal merging device provided by the present application, such as Figure 5 As shown, in this embodiment, the signal merging device 70 can be arranged in a combiner or a merging decoder, and the signal merging device 70 includes:

[0215] The acquisition module 701 is used to acquire the demodulated signals of multiple channels; the signals include signal values ​​of multiple data bits;

[0216] A merging module 702 is used to merge the signal values ​​of multiple channels on each data bit to obtain a first merged signal value of the data bit;

[0217] A determination module 703, for determining the sign of each data bit based on the signal values ​​in the plurality of channels; the sign is used to indicate positive or negative;

[0218] An adding module 704, configured to add, for each data bit, a sign of the data bit to the first combined signal value of the data bit to obtain a second combined signal value of the data bit;

[0219] The generating module 705 is used to generate a combined signal; the combined signal includes a second combined signal value of multiple data bits.

[0220] In some embodiments, the merging module 702 is used to:

[0221] For each data bit, the following operations are performed respectively, including:

[0222] Add the signal values ​​of the multiple channels at the data bits respectively and take the absolute value of the addition result to obtain the first combined signal value of the data bit; or,

[0223] Determine the maximum absolute value of the signal values ​​of the multiple channels at the data bit as the first combined signal value of the data bit; or,

[0224] According to the preset weights corresponding to the channels, the signal values ​​of the multiple channels on the data bits are weighted and summed, and the absolute value of the weighted summation result is taken to obtain the first combined signal value of the data bit.

[0225] In some embodiments, the determination module 703 is used to:

[0226] Determine, from the signals of the multiple channels, a target signal value whose deviation degree information meets a preset deviation condition;

[0227] The sign of each data bit is determined based on the target signal value.

[0228] In some embodiments, the determination module 703 is used to:

[0229] Determine the absolute value of each signal value in the signals of the multiple channels respectively; the absolute value represents the deviation degree information;

[0230] A signal value having the largest absolute value among signals of a plurality of channels is determined as a target signal value.

[0231] In some embodiments, the determination module 703 is configured to:

[0232] Obtaining a symbol corresponding to the target signal value, and determining the symbol as the symbol of each data bit; or,

[0233] For each data bit, the signal value of the signal to which the target signal value belongs at the data bit is determined, and the sign of the signal value is determined as the sign of the data bit.

[0234] In some embodiments, the signals of the multiple channels exist in the form of a matrix, each row of the matrix represents a signal of a channel, each column represents a data bit, and the elements in the matrix represent signal values;

[0235] The determination module 703 is used to:

[0236] Determine the index of the target signal value in the matrix; the index includes a row number and a column number;

[0237] For each column in the matrix, the sign of the element at the reference index is determined as the sign of the column; the row number in the reference index is the row number of the target signal value, and the column number in the reference index refers to the current column.

[0238] In some embodiments, the signals of the multiple channels include signals respectively received through the multiple channels.

[0239] In some embodiments, the signals of the multiple channels include at least two signals received through the same channel; the at least two signals include an error packet signal and at least one retransmission packet signal, or the at least two signals include a primary transmission signal and at least one redundant copy signal.

[0240] In some embodiments, when the at least two signals include an error packet signal and at least one retransmission packet signal, the method further includes:

[0241] The decoding module is used to decode the signal of each channel respectively to obtain the decoded signal of each channel.

[0242] In some embodiments, the method is applied to a merge decoder, the merge decoder includes a merging unit and a decoding unit, and the merging unit and the decoding unit are connected;

[0243] The merging module 702 is further used for:

[0244] Using a preset rate matching rule to determine the data bits to be processed;

[0245] For a data bit to be processed among the multiple data bits, determining a preset value as a first combined signal value of the data bit;

[0246] For data bits other than the data bits to be processed among the multiple data bits, signal values ​​of the multiple channels on the data bits are combined to obtain a first combined signal value of the data bits.

[0247] The signal merging device 70 provided in this embodiment can execute the technical solution of the corresponding method embodiment. Its implementation principle and technical effect are similar to those of the corresponding method embodiment, and will not be repeated here.

[0248] The embodiment of the present application also provides a merger. Fig.14Schematic diagram of a structure of a combiner provided by this application. Fig.14 As shown, the merger 80 includes: a processor 801 and a memory 802 communicatively connected to the processor 801 .

[0249] The memory 802 stores computer-executable instructions; the processor 801 executes the computer-executable instructions stored in the memory 802 to implement the signal merging method provided in the present application.

[0250] In the embodiment of the present application, the memory 802 and the processor 801 are connected via a bus. The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc.

[0251] The components, their connections and relationships, and their functions shown herein are only examples and are not intended to limit the implementation of the present application described and / or required herein. The various components are interconnected using different buses and can be installed on a common motherboard or in other ways as needed.

[0252] In an exemplary embodiment, a computer-readable storage medium is further provided, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, they are used to implement the signal merging method provided in the present application.

[0253] In an exemplary embodiment, a computer program product is also provided, including a computer program. When the computer program in the computer program product is executed by a processor, it is used to implement the signal merging method provided in the present application.

[0254] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily required by the present application.

[0255] It should be further noted that, although the various steps in the flowchart are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the flowchart may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0256] It should be understood that the above-mentioned device embodiments are only illustrative, and the device of the present application can also be implemented in other ways. For example, the division of units / modules in the above-mentioned embodiments is only a logical function division, and there may be other division methods in actual implementation. For example, multiple units, modules or components can be combined, or can be integrated into another system, or some features can be ignored or not executed.

[0257] In addition, unless otherwise specified, each functional unit / module in each embodiment of the present application may be integrated into one unit / module, each unit / module may exist physically separately, or two or more units / modules may be integrated together. The above-mentioned integrated unit / module may be implemented in the form of hardware or in the form of a software program module.

[0258] If the integrated unit / module is implemented in the form of hardware, the hardware may be a digital circuit, an analog circuit, etc. The physical implementation of the hardware structure includes but is not limited to transistors, memristors, etc. Unless otherwise specified, the processor may be any appropriate hardware processor, such as a central processing unit (CPU), a graphics processing unit (GPU), an application specific integrated circuit (ASIC), a digital signal processor (DSP), a programmable logic device (PLD), a field programmable gate array (FPGA), a controller, a microcontroller, a microprocessor or other electronic components. Unless otherwise specified, the memory may be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as a USB flash drive, random-access memory (RAM), static random-access memory (SRAM), dynamic random-access memory (DRAM), enhanced dynamic random-access memory (EDRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), high-bandwidth memory (HBM) or hybrid memory cube (HMC) and other media that can store program code.

[0259] In the above embodiments, the description of each embodiment has its own emphasis. For the part not described in detail in a certain embodiment, please refer to the relevant description of other embodiments. The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0260] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the claims.

[0261] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A signal merging method, characterized in that: include: Acquire demodulated signals of multiple channels; the signals include signal values ​​of multiple data bits; For each of the data bits, combining the signal values ​​of the multiple channels on the data bit to obtain a first combined signal value of the data bit; Determining a sign of each of the data bits based on each of the signal values ​​in the plurality of channels; The symbols are used to indicate positive and negative; For each of the data bits, adding a sign of the data bit to the first combined signal value of the data bit to obtain a second combined signal value of the data bit; generating a merged signal; The combined signal includes a second combined signal value of a plurality of the data bits.

2. The method according to claim 1, characterized in that The step of combining, for each of the data bits, signal values ​​of the multiple channels on the data bits to obtain a first combined signal value of the data bits includes: For each of the data bits, the following operations are performed respectively, and the following operations include: Adding the signal values ​​of the multiple channels at the data bit respectively and taking the absolute value of the addition result to obtain a first combined signal value of the data bit; or, Determine the maximum absolute value of the signal values ​​of the multiple channels at the data bit as the first combined signal value of the data bit; or, According to the preset weights corresponding to the channels, signal values ​​of the multiple channels on the data bits are weighted and summed, and an absolute value of the weighted sum result is taken to obtain a first combined signal value of the data bit.

3. The method according to claim 1, characterized in that The step of determining the sign of each of the data bits based on the signal values ​​in the plurality of channels comprises: Determining, from the signals of the plurality of channels, a target signal value whose deviation degree information meets a preset deviation condition; A sign of each of the data bits is determined based on the target signal value.

4. The method according to claim 3, characterized in that: The step of determining, from the signals of the multiple channels, a target signal value whose deviation degree information meets a preset deviation condition comprises: Determine the absolute value of each signal value in the signals of the multiple channels respectively; the absolute value represents the deviation degree information; A signal value having the largest absolute value among the signals of the multiple channels is determined as the target signal value.

5. The method according to claim 3, characterized in that: Determining the sign of each of the data bits based on the target signal value includes any one of the following: Acquire a symbol corresponding to the target signal value, and determine the symbol as a symbol of each of the data bits; or, For each of the data bits, a signal value of the signal to which the target signal value belongs at the data bit is determined, and a sign of the signal value is determined as the sign of the data bit.

6. The method according to claim 5, characterized in that The signals of the multiple channels exist in the form of a matrix, each row of the matrix represents a signal of a channel, each column represents a data bit, and the elements in the matrix represent signal values; The step of determining, for each of the data bits, a signal value of a signal to which the target signal value belongs at the data bit, and determining the sign of the signal value as the sign of the data bit includes: Determine the index of the target signal value in the matrix; the index includes a row number and a column number; For each column in the matrix, the sign of the element at the reference index is determined as the sign of the column; the row number in the reference index is the row number of the target signal value, and the column number in the reference index refers to the current column.

7. The method according to any one of claims 1 to 6, characterized in that: The signals of the plurality of channels include signals respectively received through the plurality of channels.

8. The method according to any one of claims 1 to 6, characterized in that: The signals of the multiple channels include at least two signals received through the same channel; the at least two signals include an error packet signal and at least one retransmission packet signal, or the at least two signals include a primary transmission signal and at least one redundant copy signal.

9. The method according to claim 8, characterized in that In a case where the at least two signals include an error packet signal and at least one retransmission packet signal, before combining the signal values ​​of the multiple channels on the data bits for each of the data bits to obtain a first combined signal value of the data bit, the method further includes: The signals of each channel are decoded respectively to obtain decoded signals of each channel.

10. The method according to claim 1, characterized in that The method is applied to a merging decoder, wherein the merging decoder comprises a merging unit and a decoding unit, and the merging unit is connected to the decoding unit; Before combining the signal values ​​of the plurality of channels on the data bits for each of the data bits to obtain a first combined signal value of the data bits, the method further includes: Using a preset rate matching rule to determine the data bits to be processed; For a data bit to be processed among the plurality of data bits, determining a preset value as a first combined signal value of the data bit; Accordingly, for each of the data bits, combining the signal values ​​of the multiple channels on the data bit to obtain a first combined signal value of the data bit includes: For data bits other than the data bits to be processed among the plurality of data bits, signal values ​​of the plurality of channels on the data bits are combined to obtain a first combined signal value of the data bits.

11. A signal merging device, characterized in that: include: An acquisition module, used to acquire demodulated signals of multiple channels; the signals include signal values ​​of multiple data bits; A merging module, configured to merge, for each of the data bits, the signal values ​​of the multiple channels on the data bits respectively, to obtain a first merged signal value of the data bit; A determination module, configured to determine a sign of each of the data bits based on each of the signal values ​​in the plurality of channels; The symbols are used to indicate positive and negative; an adding module, configured to add, for each of the data bits, a sign of the data bit to the first combined signal value of the data bit, so as to obtain a second combined signal value of the data bit; A generating module, used for generating a merged signal; The combined signal includes a second combined signal value of a plurality of the data bits.

12. A merger, characterized in that: include: A processor and a memory communicatively connected to the processor; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory to implement the signal merging method according to any one of claims 1 to 9.

13. A combined decoder, characterized in that: The merging decoder comprises a merging unit and a decoding unit, and the merging unit is connected to the decoding unit; The merging unit is used to implement the signal merging method according to any one of claims 1 to 10; The decoding unit is used for decoding the combined signal.

14. A receiving device, characterized in that: include: The combiner, decoder, and receivers and demodulators corresponding to multiple channels as described in claim 12; wherein the receiver corresponding to one channel is connected to the demodulator, and the demodulators corresponding to each of the channels, the combiner, and the decoder are connected in sequence.

15. A receiving device, characterized in that: include: The combined decoder as claimed in claim 13 and the receivers and demodulators corresponding to the multiple channels respectively; wherein the receiver corresponding to one channel is connected to the demodulator, and the demodulators corresponding to the channels respectively and the combined decoder are connected in sequence.

16. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, they are used to implement the signal merging method according to any one of claims 1 to 10.

17. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the signal merging method according to any one of claims 1 to 10 is implemented.

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