Reading circuit of total dose irradiation dosimeter

Abstract

The invention discloses a total dose irradiation dosimeter reading circuit, relates to the technical field of power electronics, and is used for solving the problems that the detection range of a dosimeter in the prior art is small, and the output irradiation dose cannot be directly read. Comprising a dosimeter device, a dosimeter reading circuit, an analog-to-digital conversion circuit, a bias cycle control circuit and a dose output circuit, a drain electrode of the dosimeter device is connected to the dosimeter reading circuit, the dosimeter reading circuit is connected with the analog-to-digital conversion circuit and the bias cycle control circuit, and the analog-to-digital conversion circuit is connected with the dose output circuit; the dosimeter reading circuit provides bias voltage for the dosimeter device and a power supply connected to a grid electrode of the dosimeter device during reading operation; the dosimeter reading circuit inputs the read signal to the analog-to-digital conversion circuit for processing; and the analog-to-digital conversion circuit transmits the processed signal to the dose output circuit for output operation. According to the invention, the detection dose range can be greatly widened, and the irradiation dose which can be directly read can be output.

Description

Technical Field

[0001] The invention relates to the technical field of power electronics, and in particular to a total dose radiation dose meter readout circuit. Background Art

[0002] A dosimeter is a device used to detect and calibrate the radiation dose during irradiation processing. It is usually attached to the object to be irradiated to absorb the radiation energy. After the irradiation is completed, it is tested to determine whether the object has reached the radiation dose.

[0003] The bias voltage selection of the dosimeter device in the prior art needs to be manually switched during irradiation, and the bias switching needs to be manually adjusted according to the dose of the radiation source. The output of the readout circuit is an analog quantity, and an additional circuit is required for analog-to-digital conversion when processing the output. Some dosimeter devices also use a single-tube structure, which is easily affected by the ambient temperature, causing thermal drift and introducing dose measurement uncertainty greater than the allowable value; the dosimeter has a small linear detection range, and the threshold voltage drift will saturate under high-dose irradiation; the output is the relationship between the irradiation dose and the ADC code, and a comparison table is required to know the dose.

[0004] Therefore, there is an urgent need to provide a more reliable total dose radiation dosimeter readout circuit. Summary of the invention

[0005] The object of the present invention is to provide a total dose radiation dosimeter readout circuit, which is used to solve the problem that the dosimeter in the prior art has a small detection range and outputs a radiation dose that cannot be directly read.

[0006] In order to achieve the above object, the present invention provides the following technical solutions:

[0007] In a first aspect, the present invention provides a total dose radiation dosimeter readout circuit, the circuit comprising:

[0008] Dosimeter devices, dosimeter readout circuits, analog-to-digital conversion circuits, bias cycle control circuits, and dose output circuits;

[0009] The drain of the dosimeter device is connected to the dosimeter readout circuit, the dosimeter readout circuit is connected to the analog-to-digital conversion circuit and the bias cycle control circuit, and the analog-to-digital conversion circuit is connected to the dose output circuit;

[0010] The dosimeter readout circuit provides a bias voltage for the dosimeter device and a power supply connected to the gate of the dosimeter device during the readout operation;

[0011] The dosimeter readout circuit inputs the readout signal to the analog-to-digital conversion circuit for processing; the analog-to-digital conversion circuit transmits the processed signal to the dose output circuit for output operation;

[0012] The bias cycle control circuit generates a switch control signal; the switch control signal is used to control the switch in the dosimeter readout circuit to switch the working state of the dosimeter device.

[0013] Optionally, the dosimeter device is a bulk silicon structure, a SOI structure or a floating gate structure;

[0014] The dosimeter device is connected to the total dose irradiation dosimeter readout circuit in a differential structure, the source and body terminals of the dosimeter device are grounded, and the drain load of the dosimeter device is a resistor;

[0015] The two drains of the dosimeter device are respectively connected to the positive and negative input ports of the amplifier; an inverting amplification structure is formed through the amplifier and the resistor;

[0016] The dosage output circuit outputs the result of the analog-to-digital conversion circuit to the outside; the dosage output circuit uses a shift register to perform parallel-in serial-out operations.

[0017] Optionally, the bias cycle control measurement of the dosimeter device is implemented by the switch control; the switch includes a first switch, a second switch, a third switch and a fourth switch;

[0018] The first switch is used to control the grounding of the drain of the dosimeter device, and the second switch is used to control the control of the dosimeter device access circuit;

[0019] During irradiation, the first switch and the second switch are closed, and the drain is grounded;

[0020] During readout, the first switch and the second switch are turned on, and the dosimeter device is connected to the circuit.

[0021] Optionally, the third switch and the fourth switch are three-state switches, providing different biases for the gate of the dosimeter device, and the three-state switch has a positive bias and a negative bias during irradiation, the positive bias acts on positive charge accumulation, and the negative bias acts on radiation-induced charge neutralization;

[0022] During irradiation, the dosimeter device is in a relative bias state; after irradiation for a period of time, the bias state is reversed, and the state of the dosimeter device is reversed;

[0023] During readout, the three-state switch is biased to a reference voltage to provide a gate voltage for the dosimeter device connected to the circuit, and the isolation switch is closed at the same time; the isolation switch is opened during irradiation to prevent the output from being affected by the dosimeter readout circuit that is not connected to the dosimeter device; all switches are controlled by the bias cycle control circuit to generate a switch control signal.

[0024] Optionally, the circuit further includes: a signal conversion circuit;

[0025] The signal conversion circuit converts the output signal of the dosimeter readout circuit into a digital signal; and transmits the digital signal to the clock port of the first stage of the counter array; the counter array is composed of a plurality of counters cascaded;

[0026] The output signal of the counter array is transmitted to the dosage output circuit; the counters are cascaded by a carry signal, and the carry signal is input to the clock port of the next stage; the counter array is initialized and cleared before working, which is completed by an external input clear signal.

[0027] Optionally, the signal conversion circuit includes at least a comparison unit, a clock control circuit and a trigger;

[0028] The comparison unit includes a high reference level comparator and a low reference level comparator. The input signal of the comparison unit is the output signal of the dosimeter readout circuit, and the reference level is input from the outside. The high reference level comparator outputs a high level when the input signal is greater than the high reference level, and outputs a low level at other times. The low reference level comparator outputs a low level when the input signal is less than the low reference level, and outputs a high level at other times.

[0029] The clock control circuit includes two two-input OR gates for controlling the output of the comparison unit to the second half cycle of the clock signal;

[0030] The trigger converts the signal of the comparison unit into a square wave signal with the same period as the input signal.

[0031] Optionally, when the clock signal of the signal conversion circuit is at the first moment, the dosimeter device switches to a readout state, and the output signal of the dosimeter readout circuit is input to the signal conversion circuit. At this time, the readout signal output is less than a high reference level and the bias switching condition is not reached, and the output signal of the signal conversion circuit remains at a high level;

[0032] When the clock signal of the signal conversion circuit is at the second moment, the dosimeter device switches to the readout state, and at the third moment of the falling edge of the clock after the readout signal output is stable, the output of the comparison unit is processed, the readout signal output is higher than the high reference level, and the bias switching condition is met, and the output signal of the signal conversion circuit switches from a high level to a low level; after the sampling is completed at the fourth moment, the corresponding switch control signal is converted from a low level to a high level during irradiation;

[0033] When the clock signal is at the fifth moment, the signal conversion circuit switches to the readout state, and it is detected that the bias switching condition is not met, and the output signal of the signal conversion circuit remains at a low level; when the readout signal output at the sixth moment meets the switching bias condition, the output signal of the signal conversion circuit switches from a low level to a high level;

[0034] The signal conversion circuit converts the rising phase of the readout signal output into a high level, and converts the falling phase into a low level.

[0035] Optionally, the bias cycle control circuit includes a sampling period counter, a D flip-flop and a logic gate;

[0036] The output signal of the bias cycle control circuit controls the switches in the dosimeter readout circuit to realize readout, irradiation switching and bias switching functions; the switches in the dosimeter readout circuit include a first switch, a second switch, a third switch, a fourth switch and a fifth switch;

[0037] The first switch and the second switch are controlled by a first switch control signal. When the first switch control signal outputs a high level, the first switch and the second switch are closed; when the first switch control signal outputs a low level, the first switch and the second switch are opened;

[0038] The third switch and the fourth switch are controlled by the second switch control signal and the third switch control signal; when the second switch control signal and the third switch control signal are both at a low level, the dosimeter device is connected to the dosimeter readout circuit, and the two gates are connected to the readout bias voltage; when the second switch control signal is at a low level and the third switch control signal is at a high level, one gate is connected to a high bias voltage and the other gate is connected to a low bias voltage;

[0039] When the second switch control signal is at a high level and the third switch control signal is at a low level, one gate is connected to a low bias voltage and the other gate is connected to a high bias voltage, so that the dosimeter device is in two opposite states during irradiation;

[0040] The fourth switch control signal controls the fifth switch to connect the output of the amplifier to the output terminal in the read state.

[0041] Optionally, the sampling period counter of the bias cycle control circuit controls the time interval of the dosimeter device accessing the dosimeter readout circuit, and controls the number of sampling times within a bias cycle control period by controlling the clearing of the sampling period counter;

[0042] The clock signal is input to the clock ports of the sampling cycle counter and the D flip-flop, and the reset signal of the sampling cycle counter is input to the reset end of the D flip-flop to realize the bias state control of the switch during sampling.

[0043] Optionally, when the dosimeter device is operating in an irradiated state, different voltages are applied to the gate of the dosimeter device to control the degree of threshold voltage drift caused by irradiation; the bias cycle control measurement includes a positive charge accumulation stage and a radiation-induced charge neutralization stage;

[0044] In the positive charge accumulation stage, the gate of the dosimeter device is connected to a positive voltage, and the other terminals are grounded.

[0045] Compared with the prior art, the present invention provides a total dose irradiation dosimeter readout circuit. It includes a dosimeter device, a dosimeter readout circuit, an analog-to-digital conversion circuit, a bias cycle control circuit and a dose output circuit; the drain of the dosimeter device is connected to the dosimeter readout circuit, the dosimeter readout circuit is connected to the analog-to-digital conversion circuit and the bias cycle control circuit, and the analog-to-digital conversion circuit is connected to the dose output circuit; the dosimeter readout circuit provides a bias voltage and a power supply connected to the gate of the dosimeter device for the dosimeter device during the readout operation; the dosimeter readout circuit inputs the readout signal to the analog-to-digital conversion circuit for processing; the analog-to-digital conversion circuit transmits the processed signal to the dose output circuit for output operation; the bias cycle control circuit generates a switch control signal; the switch control signal is used to control the switch in the dosimeter readout circuit to switch the working state of the dosimeter device. The present invention uses a bias cycle control measurement technology to keep the threshold voltage offset of the dosimeter device in the linear change region, and does not allow the threshold voltage change to saturate, which can greatly broaden the detection dose range and output a radiation dose that can be directly read. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0047] FIG1( a ) is a circuit diagram of a dosimeter circuit in a bias mode according to a first prior art;

[0048] FIG. 1( b ) is a circuit diagram of a dosimeter circuit in a reading mode according to a first prior art;

[0049] Figure 2 It is a schematic diagram of a SOI dosimeter device used in the second prior art;

[0050] FIG3( a ) is a block diagram of a dosimeter readout circuit of the second prior art;

[0051] FIG3( b ) is a block diagram of a current controlled oscillator of the second prior art;

[0052] Figure 4 A circuit block diagram of a total dose radiation dosimeter readout circuit provided by the present invention;

[0053] Figure 5 A schematic diagram of a dosimeter and a dosimeter readout circuit provided by the present invention;

[0054] Figure 6 A schematic diagram of an analog-to-digital conversion circuit provided by the present invention;

[0055] Figure 7 A schematic diagram of a dosimeter readout signal modulation circuit and a bias cycle control circuit provided by the present invention;

[0056] Figure 8 for Figure 7 The timing diagram corresponding to the circuit;

[0057] Fig. 9 An output signal timing diagram of the circuit provided by the present invention compared with the prior art;

[0058] Fig.10 A schematic diagram of a replacement circuit for the dosimeter readout circuit provided by the present invention.

[0059] Reference numerals:

[0060] 101-dose meter device, 101A-first drain, 101B-second drain, 102-dose meter readout circuit, 102A-first bias voltage, 102B-second bias voltage, 102C-first gate, 102D-second gate, 102E-first signal, 103-analog-to-digital conversion circuit, 103A-second signal, 103B-third signal, 104-bias cycle control circuit, 104A-switch control signal, 105-dose output circuit, 106-high reference level, 107-low reference level, 108-clear signal, 109-clock signal, 201-amplifier, 201A-first output of amplifier, 202-resistance, 202A-first resistor, 202B-second resistor, 203-third resistor, 204A-first switch, 204B-second switch, 204C- The third switch, 204D-the fourth switch, 204E-the fifth switch, 207A-positive bias, 207B-negative bias, 208-power supply, 210-ground, 301-signal conversion circuit, 302-counter array, 303-counter, 303A-first output signal, 303B-second output signal, 303C-third output signal, 304A-first carry signal, 304B-second carry signal, 304C-third carry signal, 401-comparison unit, 401A-first comparator, 401B-second comparator, 402-clock control circuit, 403-trigger, 404-sampling cycle counter, 405-D trigger, 406A-first switch control signal, 406B-second switch control signal, 406C-third switch control signal, 406D-fourth switch control signal. DETAILED DESCRIPTION

[0061] In order to clearly describe the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, words such as "first" and "second" are used to distinguish the same items or similar items with basically the same functions and effects. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and their order is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0062] It should be noted that, in the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0063] In the present invention, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b, c can be single or multiple.

[0064] First, the English abbreviations used in the embodiments of this specification are explained:

[0065] BCCM: Bias Controlled CycledMeasurement, bias cycle controlled measurement.

[0066] PCB: Positive Charge Buildups, positive charge accumulation.

[0067] RICN: Radiation Induced Charge Neutralization, radiation induced charge neutralization.

[0068] At present, the solutions in the prior art are as follows:

[0069] Prior Art 1. A differential circuit with amplification is provided in the prior art to amplify the mismatch between a pair of MOSFET dosimeters. The circuit structure is shown in FIG. 1(a) and FIG. 1(b). The feedback loop allows the sensitivity gain to be fixed to a known value to provide a stable response with a large linear output. The MOSFET used is pre-irradiated to reduce its threshold voltage (V T ). Figure 1(a) shows the bias mode with independent gate voltages applied to each device; solid-state switches allow the dosimeter to be periodically switched to the reading mode of Figure 1(b). GS1 By voltage source V REF OK, V REF Defines the drain current I of M1 D1 . Resistance R D1 Determines the drain voltage of M1. Set the output of the operational amplifier (OA) so that the drain of M2 has the same voltage as M1. Select R D2 =R D1, the currents of the two MOSFETs are the same, so the voltage difference between their gates can be used as the offset of the pair: V OFF =V G2 -V G The output is Feedback resistor R f1 and R f2 Define the feedback loop and fix the amplifier gain.

[0070] Using the bias cycling controlled measurement technique (BCCM) during irradiation, the threshold voltage of the dosimeter can be kept within a measurable range by switching the gate bias voltage between positive and negative values ​​for positive charge accumulation (PCB) and radiation induced charge neutralization (RICN), respectively.

[0071] However, the bias voltage selection of the dosimeter of the prior art needs to be manually switched during irradiation, and the bias switching needs to be manually adjusted according to the dose of the radiation source; and the output of the readout circuit is an analog quantity, and an additional circuit is required for analog-to-digital conversion when processing the output.

[0072] Prior Art II. In the prior art, a silicon-on-insulator (SOI) device is used as a dosimeter, a buried oxide layer (BOX) is used as the radiation detection area, and a back silicon substrate (Sub) is used as the gate electrode of the device. The structure is as follows: Figure 2 When irradiated, electron-hole pairs are generated in the buried oxide layer, resulting in an increase in radiation-induced trapped charges in the buried oxide layer and a change in the back gate threshold voltage of the device.

[0073] The functional block diagram of the readout circuit is shown in Figure 3(a), which is used to monitor the change of the "OFF" state leakage current caused by the accumulation of buried oxide layer charge caused by radiation. The circuit uses the dosimeter as a current source and converts the magnitude of the analog current into a digital readout (i.e., an N-bit analog-to-digital converter (ADC)). The design contains four main circuit modules that work in coordination to perform the readout function. The modules include a current controlled oscillator (CCO), an N-bit counter, a finite state machine (FSM), and an N-bit serial shift register. The detailed block diagram of the CCO is shown in Figure 3(b), which consists of a dosimeter input current, two current-controlled current sources, an integrating capacitor, a voltage comparator, and two switches. The dose detected by the dosimeter is converted into a current to control the oscillator output, which is reflected as the frequency of the oscillator output. The switches S1 and S2 are controlled to charge and discharge the capacitor, and a square wave signal is output through the comparator. The square wave signal is fed into an N-bit counter, whose function is to count the number of rising edges that occur within a limited time, i.e., within the CLK cycle. The interaction between CLK and the signal from FSM and the final ADC output (SROUT) and output clock (OCLK): The synchronization of CCO, N-Bit counter and N-Bit shift register is controlled by FSM. The relationship between the output ADC code and current is:

[0074]

[0075] The JAM signal controls the parallel input operation of the shift register, and the RO signal controls the serial output of the shift register. When RO is high, the shift register starts to work, and RO becomes low after completing a cycle of output. Any changes in the ADC output response are only related to changes caused by radiation with a total dose of at least 2Mrad (SiO2). The accumulation of radiation charge in the oxide of the readout circuit has no obvious harmful effect on the output characteristics of the dosimeter.

[0076] The dosimeter device of the second prior art adopts a single tube structure, which is easily affected by the ambient temperature and causes thermal drift, introducing a dose measurement uncertainty greater than the allowable value. The dosimeter has a small detection linear range, and the threshold voltage drift will saturate under high-dose irradiation. The output is the relationship between the irradiation dose and the ADC code, and a comparison table is required to know the dose.

[0077] In order to solve the problems in the prior art, the present invention provides a total dose irradiation dosimeter readout circuit to improve the detection range of the dosimeter; output the irradiation dose that can be directly read; and output the detected dose during irradiation. A signal that oscillates within a limited range is converted into a digital signal, and a control signal that controls the oscillation of the signal is output. Next, the scheme provided by the embodiment of this specification is described in conjunction with the accompanying drawings:

[0078] like Figure 4 As shown, the circuit provided by the present invention may include:

[0079] It includes a dosimeter device 101, a dosimeter readout circuit 102, an analog-to-digital conversion circuit 103, a bias cycle control circuit 104 and a dose output circuit 105. The bias cycle control circuit is referred to as a BCCM circuit.

[0080] The drain of the dosimeter device 101 is connected to the dosimeter readout circuit 102, the dosimeter readout circuit 102 is connected to the analog-to-digital conversion circuit 103 and the bias cycle control circuit 104, and the analog-to-digital conversion circuit 103 is connected to the dose output circuit 105;

[0081] The dosimeter readout circuit 102 provides a bias voltage and a power supply connected to the gate of the dosimeter device 101 during the readout operation;

[0082] The dose meter readout circuit 102 inputs the readout signal to the analog-to-digital conversion circuit 103 for processing; the analog-to-digital conversion circuit 103 transmits the processed signal to the dose output circuit 105 for output operation;

[0083] The bias cycle control circuit 104 generates a switch control signal; the switch control signal is used to control the switch in the dosimeter readout circuit 102 to switch the working state of the dosimeter device 101.

[0084] More specifically, the dosimeter device 101 connects two drains (first drain 101A, second drain 101B) to the dosimeter readout circuit 102, and the dosimeter readout circuit 102 provides the dosimeter device 101 with a bias voltage (first bias voltage 102A, second bias voltage 102B) and a power supply connected to the gate of the dosimeter device (first gate 102C, second gate 102D) during the readout operation. The dosimeter readout circuit 102 inputs the readout first signal 102E to the analog-to-digital conversion circuit 103 for processing. The analog-to-digital conversion circuit 103 transmits the processed second signal 103A to the dose output circuit 105 for output operation, and the intermediate signal (third signal 103B) is input to the bias cycle control circuit 104, and the bias cycle control circuit 104 generates a switch control signal 104A to control the switch in the dosimeter readout circuit 102 to switch the working state of the dosimeter device 101. The analog-to-digital conversion circuit 103 inputs a high reference level 106 , a low reference level 107 , a clear signal 108 , and a clock signal 109 from the outside.

[0085] Figure 4 The structure includes a dosimeter device, a dosimeter readout circuit, an analog-to-digital conversion circuit, a bias cycle control circuit and a dose output circuit; the drain of the dosimeter device is connected to the dosimeter readout circuit, the dosimeter readout circuit is connected to the analog-to-digital conversion circuit and the bias cycle control circuit, and the analog-to-digital conversion circuit is connected to the dose output circuit; the dosimeter readout circuit provides a bias voltage and a power supply connected to the gate of the dosimeter device for the dosimeter device during the readout operation; the dosimeter readout circuit inputs the readout signal to the analog-to-digital conversion circuit for processing; the analog-to-digital conversion circuit transmits the processed signal to the dose output circuit for output operation; the bias cycle control circuit generates a switch control signal; the switch control signal is used to control the switch in the dosimeter readout circuit to switch the working state of the dosimeter device. The present invention uses a bias cycle control measurement technology to keep the threshold voltage offset of the dosimeter device in the linear change region, and does not allow the threshold voltage change to saturate, which can greatly broaden the detection dose range and output a radiation dose that can be directly read.

[0086] based on Figure 4 The embodiment of this specification also provides some specific structures of the circuit, which will be described below.

[0087] As an optional implementation structure, the dosimeter device and the dosimeter readout circuit structure are as follows: Figure 5The dosimeter device 101 is connected to the circuit in a differential structure, with the source and body terminals grounded 210, the drain load being a resistor 202, the two load resistors (the first resistor 202A and the second resistor 202B) being of the same size, and the other end of the resistor 202 being connected to a negative power supply 208; the two drains of the differential structure (the first drain 101A and the second drain 101B) are connected to the positive and negative input ports of the amplifier 201, respectively.

[0088] At the same time, the amplifier 201 and the third resistor 203 (including resistors 203A and 203B) form an inverting amplification structure to amplify the difference in the threshold voltages of the two dosimeters and output the amplification factor of the output. The amplification factor of the output is related to the multiple of the two resistors.

[0089] The gates of the dosimeter device 101 are connected to different voltages (a first bias voltage 102A and a second bias voltage 102B) in the readout state.

[0090] When the dosimeter device 101 is working in an irradiated state, in order to increase the detection range and linear region, a bias cycle control measurement technology is used to apply different voltages to the gate of the dosimeter device to control the threshold voltage drift caused by irradiation.

[0091] The bias cycle control measurement is divided into two states, the positive charge accumulation stage (PCB) and the radiation induced charge neutralization stage (RICN). In the positive charge accumulation stage, the gate of the dosimeter device is connected to a positive voltage, and the other terminals are grounded. When irradiated, the radiation excites electron-hole pairs. Under positive gate voltage, 70% to 90% of the electron-hole pairs do not recombine. The electrons are quickly swept out of the gate, and the holes move slowly. In the oxide layer, a large number of holes are trapped within 10nm of the Si / SiO2 interface. Under constant positive bias, these holes are annealed or tunneled from the channel region to the oxide layer and captured by nearby electrons. When the bias changes from positive to negative (RICN), the direction of electron and hole movement is reversed, and the tunneling compensation at the Si / SiO2 interface stops. The holes move toward the gate or are captured by the gate. At this time, the threshold shift caused by the holes can even be ignored. The electrons move toward the Si / SiO2 interface. If the electrons encounter holes near the Si / SiO2 interface, they are captured or directly recombined, reducing the drift caused by oxide trap charges. Charge accumulates under positive bias, and the threshold voltage is negatively shifted to quantify the absorbed dose; when the negative bias is switched, radiation-induced charge neutralization begins, the threshold voltage increases, and the threshold voltage is positively shifted to quantify the absorbed dose. By switching different bias states, the threshold voltage of the dosimeter device can be maintained within a specified window to ensure stable sensitivity throughout the measurement process. While maintaining the same sensitivity, the measurement range can be expanded by more than a thousand times.

[0092] The bias cycle control measurement of the dosimeter device 101 is realized by switch control. The first switch 204A and the second switch 204B respectively control the grounding of the drain of the dosimeter device 101 and the control of access to the circuit. During irradiation, the first switch 204A and the second switch 204B are closed and the drain is grounded; during reading, the first switch 204A and the second switch 204B are opened and the dosimeter device is connected to the circuit.

[0093] The third switch 204C and the fourth switch 204D are three-state switches, which provide different biases for the gate of the dosimeter device 101 respectively. The three-state switch is the key part for controlling the dosimeter device to perform bias cycle measurement. The three-state switch has two types of positive bias 207A and negative bias 207B during irradiation. The positive bias 207A acts on positive charge accumulation, and the negative bias 207B acts on radiation-induced charge neutralization. During irradiation, the dosimeter device 101 is in a relative bias state, that is, when the first gate 102C is biased to the positive bias 207A, the device is in positive charge accumulation; the second gate 102D is biased to the negative bias 207B, and the device is in radiation-induced charge neutralization. After a period of irradiation, the bias state is reversed, and the state of the dosimeter device is reversed. Since the bias voltage applied to the dosimeter device 101 is continuously switched, the output (first signal 102E) will change within a certain range to obtain a periodic output. By using this characteristic, this variation range can be adjusted, and the cycle can be set as a unit dose, such as outputting one cycle per 100 rad (SiO2). During readout, the three-state switch is biased to the reference voltage (first bias voltage 102A, second bias voltage 102B), providing a gate voltage for the dosimeter device 101 connected to the circuit, and at the same time, the isolation switch (fifth switch 204E) is closed to connect the first output 201A of the amplifier to the output (first signal 102E). The isolation switch (fifth switch 204E) is opened during irradiation to prevent the output from being affected by the dosimeter readout circuit 102 that is not connected to the dosimeter device 101. The control of all switches is controlled by the bias cycle control circuit 104 generating a switch control signal 104A.

[0094] Optionally, the output signal of the dosimeter readout circuit 102 is transmitted to the analog-to-digital conversion circuit 103. Figure 6As shown. After the signal conversion circuit 301 converts the output first signal 102E of the dose meter readout circuit 102 into a digital signal (third signal 103B), it is transmitted to the clock port of the first stage of the counter array 302. The counter array is composed of a plurality of counters 303 of M=10 cascaded. The output second signal 103A of the counter array 302 is composed of the outputs of each counter 303 (first output signal 303A, second output signal 303B, third output signal 303C), and is transmitted to the dose output circuit 105. The counters 303 are cascaded by carry signals (first carry signal 304A, second carry signal 304B, third carry signal 304C), and the carry signals (first carry signal 304A, second carry signal 304B, third carry signal 304C) are input to the clock port of the next stage. The counter array 302 performs an initialization reset operation before operation, which is completed by the reset signal 108 input from the outside.

[0095] As an optional implementation structure, the signal conversion circuit 301 and the bias cycle control circuit 104 are as follows: Figure 7 As shown. The signal conversion circuit 301 is composed of a comparison unit 401, a clock control circuit 402 and a trigger 403. The comparison unit 401 is composed of two comparators (a first comparator 401A and a second comparator 401B), and the input signal is the output first signal 102E of the dosimeter readout circuit 102, and the reference level (high reference level 106, low reference level 107) is input from the outside. The high reference level comparator (first comparator 401A) outputs a high level when the input first signal 102E is greater than the high reference level 106, and outputs a low level at other times; the low reference level comparator (second comparator 401B) outputs a low level when the input first signal 102E is less than the low reference level 107, and outputs a high level at other times. The clock control circuit 402 is composed of two two-input OR gates, and its purpose is to control the output of the comparison unit 401 in the second half cycle of the clock signal 109 to prevent the signal spike caused by the action of the isolation switch (fifth switch 204E) from affecting the output result. The trigger 403 converts the signal of the comparison unit 401 into a square wave signal with the same period as the input first signal 102E. For example, if the output period of the input first signal 102E is 100 rad (SiO2), the output signal of the trigger (the third signal 103B) is also 100 rad (SiO2).

[0096] Figure 7 The timing of the signal conversion circuit in Figure 8 As shown. Figure 8 It can be seen that:

[0097] Clock signals include 109, 106, 102E, 107, 103B, 406A, 406B, 406C;

[0098] The level of clock signal 109 corresponding to time A is 500A, the level of clock signal 102E is 501A, the level of clock signal 103B is 502A, the level of clock signal 406A is 503A, the level of clock signal 406B is 504A, and the level of clock signal 406C is 505A. The level of clock signal 109 corresponding to time B is 500B, the level of clock signal 102E is 501B, and the level of clock signal 406A is 503B. The level of clock signal 109 corresponding to time C is 500C, and the level of clock signal 103B is 502B. The level of clock signal 109 corresponding to time D is 500D, the level of clock signal 406B is 504B, and the level of clock signal 406C is 505B. The level of clock signal 109 corresponding to time E is 500E, and the level of clock signal 102E is 501C. The level of the clock signal 109 corresponding to the time F is 500F, and the level of the clock signal 102E is 501D. The level of the clock signal 109 corresponding to the time G is 500G, and the level of the clock signal 103B is 502C. The level of the clock signal 109 corresponding to the time H is 500H, the level of the clock signal 406B is 504C, and the level of the clock signal 406C is 505C;

[0099] More specifically, when the clock signal 109 is at time A (500A), the dosimeter device 101 switches to the readout state, and the output first signal 102E of the dosimeter readout circuit 102 is input to the signal conversion circuit 301. At this time (500A), the readout signal output (first signal 102E) is less than the high reference level 106, and the bias switching condition is not reached. The output signal (third signal 103B) of the signal conversion circuit 301 maintains the previous state (high level);

[0100] At time B (500B), the read state is switched. Due to the action of the clock control circuit 402, at time C (500C) of the falling edge of the clock after the read signal output (first signal 102E) is stable, the output of the comparison unit 401 is processed. The read signal output (first signal 102E) is higher than the high reference level 106, and the bias switching condition is met. The output signal (third signal 103B) of the signal conversion circuit 301 is switched from a high level to a low level.

[0101] After switching to the readout state at time E (500E), it is detected that the bias switching condition is not met, and the output signal (third signal 103B) of the signal conversion circuit 301 remains in the previous state (low level);

[0102] After switching to the read state at time E (500E), the read signal output (first signal 102E) at time F (500F) reaches the switching bias condition, and the output signal (third signal 103B) of the signal conversion circuit 301 switches from a low level to a high level. The signal conversion circuit 301 converts the read signal output (first signal 102E) to a high level in the rising phase and to a low level in the falling phase.

[0103] Furthermore, the bias cycle control circuit 104 is composed of a sampling cycle counter 404, a D flip-flop 405 and a logic gate, and its output signal (switch control signal 104A) controls each switch in the dosimeter readout circuit 102 to realize the readout, irradiation switching and bias switching functions. The first switch 204A and the second switch 204B are controlled by the first switch control signal 406A. When the first switch control signal 406A outputs high, the first switch 204A and the second switch 204B are closed; when the first switch control signal 406A outputs low, the first switch 204A and the second switch 204B are opened. The third switch 204C and the fourth switch 204D are realized by the second switch control signal 406B and the third switch control signal 406C. When the second switch control signal 406B and the third switch control signal 406C are both low, the dosimeter device 101 is connected to the dosimeter readout circuit 102, and the gate is connected to the readout bias voltage (first bias voltage 102A, second bias voltage 102B); when the second switch control signal 406B is low and the third switch control signal 406C is high, the first gate 102C is connected to the high bias voltage (positive bias 207A), and the second gate 102D is connected to the low bias voltage (negative bias 207B); when the second switch control signal 406B is high and the third switch control signal 406C is low, the first gate 102C is connected to the low bias voltage (negative bias 207B), and the second gate 102D is connected to the high bias voltage (positive bias 207A). The dosimeter device is in two opposite states during irradiation. The fourth switch control signal 406D controls the fifth switch 204E to connect the first output 201A of the amplifier to the output terminal in the read state.

[0104] Figure 8 In the embodiment, after the dosimeter readout circuit 102 is connected at time A (500A), the first switch control signal 406A is converted from a high level to a low level (503A), the second switch control signal 406B remains at a low level (504A), and the third switch control signal 406C is converted from a high level to a low level (505A), and is restored after one clock cycle;

[0105] After the dosimeter readout circuit 102 is connected at time B (500B), the readout signal output (first signal 102E) reaches the bias switching condition, and the signal conversion circuit 301 outputs a signal (third signal 103B).

[0106] At time C (500C), the gate bias voltage of the dosimeter device 101 during irradiation needs to be switched from a high level to a low level.

[0107] Therefore, after sampling ends at time D (500D), during irradiation, the second switch control signal 406B is converted from a low level to a high level (504B), and the third switch control signal 406C is converted from a high level to a low level (505B);

[0108] At time G (500G), the read signal output (first signal 102E) reaches the bias switching condition and performs a level conversion from low to high (502C). After the sampling is completed (500H), the second switch control signal 406B is converted from a high level to a low level (504C), and the third switch control signal 406C is converted from a low level to a high level (505C), switching the gate bias voltage.

[0109] More specifically, the sampling period counter 404 of the bias cycle control circuit 104 controls the time interval of the dosimeter device 101 accessing the dosimeter readout circuit 102, and controls the number of sampling times in one bias cycle control period by controlling the clearing of the sampling period counter 404. The clock signal 109 is input to the sampling period counter 404 and the clock port of the D flip-flop 405, and the clearing signal 404A of the sampling period counter 404 is input to the clearing terminal of the D flip-flop 405 to realize the bias state control of the switch during sampling.

[0110] In order to illustrate the output effect of the present invention, it is provided Fig. 9 , Fig. 9 The output timing diagram of the prior art and the technology described in the invention under the same irradiation conditions is shown in FIG.

[0111] like Fig. 9 As shown, the output signal (600A) of the prior art 1 sets the oscillation period to be the same as the output signal (third signal 103B) of the signal conversion circuit 301 in the invention; the output signal (600B) of the prior art 1 is obtained by sampling the output voltage after the dosimeter device is connected to the circuit after the irradiation is completed, repeating the measurement process at each dose, and finally fitting the discrete values ​​into a curve. Although the prior art 1 expands the detection range of the dosimeter, the output of the circuit is an analog signal, which is a voltage signal related to the dose, which is not conducive to the signal processing of the subsequent processing circuit.

[0112] The core circuit structure of the second prior art is a current controlled oscillator that converts current changes into square wave frequency changes, quantizes the irradiation dose into the frequency of the square wave signal, and outputs the frequency as a binary signal through an N-bit counter. The output of the present invention is the output second signal 103A of each level of counter, which is output to the outside through a dose output circuit 105. The counting interval of the output (303A) of the first-level counter is set to 100rad (Si), then the second-level output (303B) is 1K output, the third-level output (303C) is 10K output, the fourth-level output (303D) is 100K output, and the fifth-level output (303E) is 1M output. When the dose reaches 1Krad(Si) (601A), the first-stage output is cleared (603A) and the second-stage output is binary 1 (604A); when the dose reaches 10Krad(Si) (601B), the third-stage output is binary 1 (605A); when the dose accumulates to 100Krad(Si) (601C) and 1Mrad(Si) (601D) or even 601E, the fourth-stage output (606A) and the fifth-stage output (607A) start counting. Since the prior art 2 adopts a single-tube structure, when the dose accumulates to more than 2Mrad(Si) (602A), the dose meter is saturated, the current no longer changes, the output frequency of the current-controlled oscillator no longer changes (602B), and the dose change is no longer detected. The present invention adopts the bias cycle measurement technology to always control the threshold voltage change of the dose meter device outside the saturation region and within the linear change range, so that the dose detection range is expanded.

[0113] In addition, it should be noted that in practical applications, the dose meter readout circuit 102 can also be replaced by other circuit structures, such as Fig.10 , the dosimeter devices are M3 and M4. In this circuit, the NMOS device is used as the dosimeter, Vb1 and Vb2 are bias voltages, Vo+ and Vo- are input to both ends of the amplifier, and then input to the analog-to-digital conversion circuit 103. The control of the switch in the circuit can be achieved by the bias cycle control circuit 104.

[0114] The circuit structure provided by the present invention uses a bias cycle control measurement technology to keep the threshold voltage offset of the dosimeter device in a linear change region, and does not allow the threshold voltage change to saturate, which can greatly broaden the detected dose range. In addition, the present invention can change the period of the bias cycle by changing the high and low reference levels of the comparator, thereby changing the detection accuracy of the dosimeter. In addition, the detected dose output is a digital signal. If the designed high and low reference levels are controlled at a unit dose, such as 100 rad, the output is a binary signal with a minimum unit of 100 rad dose, which can be directly connected without additional processing when the detected dose is used for subsequent processing.

[0115] More specifically, the architecture of the circuit of the present invention is mainly divided into five parts: a dosimeter device as a detection unit, which can be a bulk silicon structure, an SOI structure or a floating gate structure, etc.; a dosimeter readout circuit, which quantifies and outputs the threshold voltage change of the dosimeter device caused by the total irradiation dose, and is generally a differential structure; an analog-to-digital conversion circuit, which converts the analog signal of the dosimeter readout circuit into a digital signal; a bias cycle control circuit, which generates a signal to control the dosimeter device to be in a readout or irradiation state. During irradiation, the dosimeter device with a differential structure is in opposite states - a positive charge accumulation stage (PCB) and a radiation induced charge neutralization stage (RICN), which are switched by a control signal; a dose output circuit, which outputs the result of the analog-to-digital conversion circuit to the outside, and generally uses a shift register for parallel-in and serial-out operations.

[0116] In the dosimeter readout circuit, the dosimeter device is connected to the circuit in a differential structure. During irradiation, its gate is at different bias voltages, and the output signal increases or decreases with the increase of dose through the switch controlled by the bias cycle control signal.

[0117] The key point of the analog-to-digital conversion circuit is to realize a clock control circuit with adjustable output signal cycle through comparators and logic gates, and the signal that controls the state switching of the dosimeter readout circuit is also automatically adjusted accordingly. In this circuit, the clock control circuit composed of two OR gates controls the comparator output in the second half of the clock cycle to eliminate the signal spike caused by the switching action, thereby eliminating the erroneous comparison output.

[0118] The circuit architecture proposed by the present invention comprises a dosimeter readout circuit that controls the output of a signal that rises or falls as the dose increases; a clocked analog-to-digital conversion circuit with an adjustable output signal period; and a bias cycle control signal that changes dynamically with changes in the comparator reference level.

[0119] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple situations. A single processor or other unit may implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0120] Although the present invention has been described in conjunction with specific features and embodiments thereof, it is apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the present invention. Accordingly, this specification and the accompanying drawings are merely exemplary illustrations of the present invention as defined by the appended claims and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present invention. Obviously, those skilled in the art may make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, the present invention is intended to include such modifications and variations if they fall within the scope of the claims of the present invention and their equivalents.

Claims

1. A total dose radiation dosimeter readout circuit, characterized in that: The circuit includes: Dosimeter devices, dosimeter readout circuits, analog-to-digital conversion circuits, bias cycle control circuits, and dose output circuits; The drain of the dosimeter device is connected to the dosimeter readout circuit, the dosimeter readout circuit is connected to the analog-to-digital conversion circuit and the bias cycle control circuit, and the analog-to-digital conversion circuit is connected to the dose output circuit; The dosimeter readout circuit provides a bias voltage for the dosimeter device and a power supply connected to the gate of the dosimeter device during the readout operation; The dosimeter readout circuit inputs the readout signal to the analog-to-digital conversion circuit for processing; the analog-to-digital conversion circuit transmits the processed signal to the dose output circuit for output operation; The bias cycle control circuit generates a switch control signal; the switch control signal is used to control the switch in the dosimeter readout circuit to switch the working state of the dosimeter device.

2. A total dose radiation dosimeter readout circuit according to claim 1, characterized in that: The dosimeter device is a bulk silicon structure, a SOI structure or a floating gate structure; The dosimeter device is connected to the total dose irradiation dosimeter readout circuit in a differential structure, the source and body terminals of the dosimeter device are grounded, and the drain load of the dosimeter device is a resistor; The two drains of the dosimeter device are respectively connected to the positive and negative input ports of the amplifier; an inverting amplification structure is formed through the amplifier and the resistor; The dosage output circuit outputs the result of the analog-to-digital conversion circuit to the outside; the dosage output circuit uses a shift register to perform parallel-in serial-out operations.

3. A total dose radiation dosimeter readout circuit according to claim 1, characterized in that: The bias cycle control measurement of the dosimeter device is realized by the switch control; the switch includes a first switch, a second switch, a third switch and a fourth switch; The first switch is used to control the grounding of the drain of the dosimeter device, and the second switch is used to control the control of the dosimeter device access circuit; During irradiation, the first switch and the second switch are closed, and the drain is grounded; During readout, the first switch and the second switch are turned on, and the dosimeter device is connected to the circuit.

4. A total dose radiation dosimeter readout circuit according to claim 3, characterized in that: The third switch and the fourth switch are three-state switches, providing different biases for the gate of the dosimeter device, the three-state switch has a positive bias and a negative bias during irradiation, the positive bias acts on positive charge accumulation, and the negative bias acts on radiation-induced charge neutralization; During irradiation, the dosimeter device is in a relative bias state; After irradiation has been going on for a period of time, the bias state is reversed, and the state of the dosimeter device is reversed; During readout, the tri-state switch is biased to a reference voltage to provide a gate voltage for the dosimeter device connected to the circuit, and the isolation switch is closed; The isolation switch is opened during irradiation to prevent the output from being affected by the dosimeter readout circuit that is not connected to the dosimeter device; all switches are controlled by the bias cycle control circuit to generate a switch control signal.

5. A total dose radiation dosimeter readout circuit according to claim 1, characterized in that: The circuit further comprises: a signal conversion circuit; The signal conversion circuit converts the output signal of the dosimeter readout circuit into a digital signal; and transmits the digital signal to the clock port of the first stage of the counter array; the counter array is composed of a plurality of counters cascaded; The output signal of the counter array is transmitted to the dosage output circuit; the counters are cascaded by a carry signal, and the carry signal is input to the clock port of the next stage; the counter array is initialized and cleared before working, which is completed by an external input clear signal.

6. A total dose radiation dosimeter readout circuit according to claim 5, characterized in that: The signal conversion circuit at least includes a comparison unit, a clock control circuit and a trigger; The comparison unit includes a high reference level comparator and a low reference level comparator. The input signal of the comparison unit is the output signal of the dosimeter readout circuit, and the reference level is input from the outside. The high reference level comparator outputs a high level when the input signal is greater than the high reference level, and outputs a low level at other times. The low reference level comparator outputs a low level when the input signal is less than the low reference level, and outputs a high level at other times. The clock control circuit includes two two-input OR gates for controlling the output of the comparison unit to the second half cycle of the clock signal; The trigger converts the signal of the comparison unit into a square wave signal with the same period as the input signal.

7. A total dose radiation dosimeter readout circuit according to claim 5, characterized in that: When the clock signal of the signal conversion circuit is at the first moment, the dosimeter device switches to the readout state, and the output signal of the dosimeter readout circuit is input to the signal conversion circuit. At this time, the readout signal output is less than the high reference level and the bias switching condition is not reached, and the output signal of the signal conversion circuit remains at a high level; When the clock signal of the signal conversion circuit is at the second moment, the dosimeter device switches to the readout state, and at the third moment of the falling edge of the clock after the readout signal output is stable, the output of the comparison unit is processed, the readout signal output is higher than the high reference level, and the bias switching condition is met, and the output signal of the signal conversion circuit switches from a high level to a low level; after the sampling is completed at the fourth moment, the corresponding switch control signal is converted from a low level to a high level during irradiation; When the clock signal is at the fifth moment, the signal conversion circuit switches to the readout state, and it is detected that the bias switching condition is not met, and the output signal of the signal conversion circuit remains at a low level; when the readout signal output at the sixth moment meets the switching bias condition, the output signal of the signal conversion circuit switches from a low level to a high level; The signal conversion circuit converts the rising phase of the readout signal output into a high level, and converts the falling phase into a low level.

8. A total dose radiation dosimeter readout circuit according to claim 1, characterized in that: The bias cycle control circuit includes a sampling period counter, a D flip-flop and a logic gate; The output signal of the bias cycle control circuit controls the switches in the dosimeter readout circuit to realize readout, irradiation switching and bias switching functions; the switches in the dosimeter readout circuit include a first switch, a second switch, a third switch, a fourth switch and a fifth switch; The first switch and the second switch are controlled by a first switch control signal, and when the first switch control signal outputs a high level, the first switch and the second switch are closed; When the first switch control signal outputs a low level, the first switch and the second switch are disconnected; The third switch and the fourth switch are controlled by the second switch control signal and the third switch control signal; when the second switch control signal and the third switch control signal are both at a low level, the dosimeter device is connected to the dosimeter readout circuit, and the two gates are connected to the readout bias voltage; when the second switch control signal is at a low level and the third switch control signal is at a high level, one gate is connected to a high bias voltage and the other gate is connected to a low bias voltage; When the second switch control signal is at a high level and the third switch control signal is at a low level, one gate is connected to a low bias voltage and the other gate is connected to a high bias voltage, so that the dosimeter device is in two opposite states during irradiation; The fourth switch control signal controls the fifth switch to connect the output of the amplifier to the output terminal in the read state.

9. A total dose radiation dosimeter readout circuit according to claim 8, characterized in that: The sampling period counter of the bias cycle control circuit controls the time interval of the dosimeter device connected to the dosimeter readout circuit, and controls the number of sampling times in one bias cycle control period by controlling the clearing of the sampling period counter; The clock signal is input to the clock ports of the sampling cycle counter and the D flip-flop, and the reset signal of the sampling cycle counter is input to the reset end of the D flip-flop to realize the bias state control of the switch during sampling.

10. A total dose radiation dosimeter readout circuit according to claim 1, characterized in that: When the dosimeter device is operating in an irradiation state, different voltages are applied to the gate of the dosimeter device to control the degree of threshold voltage drift caused by irradiation; The bias cycle controlled measurement includes a positive charge accumulation phase and a radiation-induced charge neutralization phase; During the positive charge accumulation phase, the gate of the dosimeter device is connected to a positive voltage, and the other terminals are grounded.

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