Electronic device

Abstract

An electronic device is provided. The electronic device includes: a host processor for outputting a first signal having a first frequency and a second signal having a second frequency higher than the first frequency and containing frame data; a driving controller configured to receive the frame data from the host processor and generate image data; a display layer for displaying an image based on the image data; a sensor layer disposed on the display layer and including a plurality of sensing electrodes; and a sensor driver for providing a transmission signal having a third frequency to the plurality of sensing electrodes. The host processor determines the first frequency based on the third frequency.

Description

[0001] This application claims the priority of Korean Patent Application No. 10-2023-0103477 filed in the Korean Intellectual Property Office on August 8, 2023, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] Embodiments of the present disclosure described herein relate to an electronic device having improved sensing reliability. Background Art

[0003] A multimedia electronic device such as a television, a cellular phone, a tablet computer, a navigation device, or a game console includes a display device for displaying an image. The electronic device may include a sensor layer to provide a touch-based input scheme in addition to / instead of a conventional input scheme such as a button, a keyboard, or a mouse, which allows a user to easily, intuitively, or conveniently input information or commands. The sensor layer may sense a touch state of a user's physical body. Summary of the invention

[0004] Embodiments of the present disclosure provide an electronic device with improved touch sensing reliability.

[0005] According to an embodiment, an electronic device may include: a host processor for outputting a first signal having a first frequency and a second signal having a second frequency higher than the first frequency and containing frame data; a drive controller configured to receive the frame data from the host processor and generate image data based on the frame data; a display layer for displaying an image based on the image data; a sensor layer disposed on the display layer and including a plurality of sensing electrodes; and a sensor driver for providing a transmission signal having a third frequency to the plurality of sensing electrodes. The host processor determines the first frequency based on the third frequency.

[0006] The third frequency may be an integer multiple of the first frequency.

[0007] The transmission signal may include a first transmission period having a first level and a second transmission period after the first transmission period and having a second level lower than the first level, and the first signal may have a third level during the first period and a fourth level lower than the third level during the second period after the first period.

[0008] The width of the first transmission period and the width of the second transmission period may both be wider than the width of the first period.

[0009] The first sending period may completely overlap with the first period.

[0010] The second transmission period may completely overlap with the first period.

[0011] The first frequency may be equal to the third frequency.

[0012] The first frequency may be higher than the third frequency.

[0013] The width of the first transmission period and the width of the second transmission period may both be narrower than the width of the first period.

[0014] A plurality of first transmission time periods are set, and two first transmission time periods that are consecutive to each other and a second transmission time period disposed between the two first transmission time periods may jointly completely overlap with the first time period.

[0015] A rising time point of the first period may be within one of two consecutive first transmission periods, and a falling time point of the first period may be within the remaining one of the two consecutive first transmission periods.

[0016] The first frequency may be higher than the third frequency.

[0017] The electronic device may further include: a connector electrically connecting the host processor to the display layer; and a first communication line electrically connected between the sensor driver and the connector to transmit driving information of the sensor layer.

[0018] The electronic device may further include: a data driver electrically connected to the display layer; and a second communication line electrically connected between the sensor driver and the data driver to transmit driving information of the sensor layer.

[0019] The electronic device may further include: a display signal line electrically connected to the display layer and the host processor to send or receive the first signal and the second signal; and a sensor signal line electrically connected between the sensor layer and the sensor driver to send or receive the transmission signal. When viewed in a plan view, the display signal line and the sensor signal line overlap each other.

[0020] According to an embodiment of the present disclosure, an electronic device may include: a host processor for outputting a first signal having a first frequency and a second signal having a second frequency higher than the first frequency and containing frame data; a drive controller connected to the host processor to receive frame data from the host processor and generate image data; a display layer for displaying an image based on the image data; a sensor layer, disposed on the display layer and including a plurality of sensing electrodes; and a sensor driver for providing a transmission signal having a third frequency to the plurality of sensing electrodes. The host processor measures noise in a received signal by sweeping a grouping frequency within a grouping frequency range and driving the sensor layer, and selects one of a plurality of candidate frequencies as a first frequency, at which the measured noise is less than or equal to a predetermined threshold.

[0021] The host processor may include a memory for storing values ​​of the measured noise at each of the packet frequencies.

[0022] The noise having the predetermined threshold is preset based on erroneous operation of the sensor layer.

[0023] The host processor may output a first signal having the selected first frequency.

[0024] When the sensor driver is reset, the host processor can remeasure the noise for each of the grouped frequencies.

[0025] According to an embodiment of the present disclosure, an electronic device may include: a host processor for outputting a first signal having a first frequency and a second signal having a second frequency higher than the first frequency and containing frame data; a drive controller connected to the host processor to receive the frame data from the host processor and generate image data; a display layer for displaying an image based on the image data; a sensor layer disposed on the display layer and including a plurality of sensing electrodes; and a sensor driver for providing a transmission signal having a third frequency to the plurality of sensing electrodes and receiving a reception signal from the plurality of sensing electrodes. The effective period of the transmission signal completely overlaps with the effective period of the first signal.

[0026] The width of the effective period of the transmission signal may be wider than the width of the effective period of the first signal.

[0027] The first frequency may be equal to or higher than the third frequency.

[0028] The electronic device may further include: a connector electrically connecting the host processor to the display layer; and a first communication line electrically connected between the sensor driver and the connector to transmit driving information of the sensor layer.

[0029] The electronic device may further include: a second communication line electrically connected between the sensor driver and the data driver to transmit driving information of the sensor layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other aspects and features of the present disclosure will become apparent by describing in detail embodiments of the present disclosure with reference to the accompanying drawings.

[0031] Figure 1 is a block diagram of an electronic device according to an embodiment of the present disclosure.

[0032] Figure 2 is a block diagram illustrating the operation of an electronic device according to an embodiment of the present disclosure.

[0033] Figure 3 is a block diagram of an electronic device according to an embodiment of the present disclosure.

[0034] Figure 4 is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0035] Figure 5 is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0036] Figure 6 is a plan view of a display layer, a flexible substrate, and a sensor driver according to an embodiment of the present disclosure.

[0037] Figure 7 is a plan view of a sensor layer according to an embodiment of the present disclosure.

[0038] Figure 8 is a plan view of a display layer, a flexible substrate, and a sensor driver according to an embodiment of the present disclosure.

[0039] Fig. 9A The present invention is a diagram showing an embodiment of the present invention. Figure 6 An exploded perspective view of area AA'.

[0040] Fig. 9B The present invention is a diagram showing an embodiment of the present invention. Figure 6 The area AA' corresponds to an exploded perspective view of the area.

[0041] Fig.10 is a circuit diagram illustrating an electrical connection relationship among a sensor layer, a display signal line, a sensor signal line, and a sensor driver according to an embodiment of the present disclosure.

[0042] Fig.11A A tearing signal and a data signal according to an embodiment of the present disclosure are shown.

[0043] Fig. 11B A data signal according to an embodiment of the present disclosure is shown.

[0044] Fig. 11C A data signal according to an embodiment of the present disclosure is shown.

[0045] Fig.11D A data signal according to an embodiment of the present disclosure is shown.

[0046] Fig.11E A data signal according to an embodiment of the present disclosure is shown.

[0047] Fig. 12A is a timing diagram illustrating signals according to an embodiment of the present disclosure.

[0048] Fig. 12B is a timing diagram illustrating signals according to an embodiment of the present disclosure.

[0049] Fig. 12Cis a timing diagram illustrating signals according to an embodiment of the present disclosure.

[0050] Fig.12D is a timing diagram illustrating signals according to an embodiment of the present disclosure.

[0051] Fig.13A is a graph showing noise per packet frequency according to an embodiment of the present disclosure.

[0052] Fig. 13B is a graph showing noise per packet frequency according to an embodiment of the present disclosure.

[0053] Fig. 13C is a graph showing noise per packet frequency according to an embodiment of the present disclosure.

[0054] Fig.13D is a graph showing noise per packet frequency according to an embodiment of the present disclosure.

[0055] Fig.13E is a graph showing noise per packet frequency according to an embodiment of the present disclosure.

[0056] Fig.13F is a graph showing noise per packet frequency according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0057] In the specification, the expression that a first component (or region, layer, part, portion, etc.) is "on", "connected to" or "coupled to" a second component means that the first component is directly on, directly connected to or directly coupled to the second component in some embodiments or that a third component is placed between the first and second components in other embodiments.

[0058] The same reference numerals will be assigned to the same components. In addition, in the drawings, the thickness, proportion, size of the components may be exaggerated in order to effectively describe the technical features. The term "and / or" includes any combination and all combinations of one or more of the related components.

[0059] Although the terms "first", "second", etc. may be used to describe various components, these components should not be construed as being limited by these terms. These terms are only used to distinguish one component from another component. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component, without departing from the scope and spirit of the inventive concept. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form.

[0060] In addition, the terms "below", "lower", "above", and "upper" are used to describe the relationship between components shown in the drawings. The terms are relative and are described with reference to the directions indicated in the drawings.

[0061] It will also be understood that the terms “comprises,” “including,” “having” or variations thereof indicate the presence of stated features, quantities, steps, operations, components, parts and / or combinations thereof, but do not exclude the presence or addition of one or more other features, quantities, steps, operations, components, parts and / or combinations thereof.

[0062] Unless otherwise defined, all terms (including technical and scientific terms) used in the specification have the same meaning as those generally understood by those skilled in the art to which the present disclosure belongs. In addition, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with the meaning in the context of the relevant technology and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0063] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0064] Figure 1 is a block diagram of an electronic device according to an embodiment of the present disclosure.

[0065] Reference Figure 1 , the electronic device 1000 can output various types of information through the display device DD under the operating system. When the host processor 1001 executes the application stored in the memory 1300 , the display device DD can provide application information to the user through the display layer 100 .

[0066] The host processor 1001 may obtain external input through the input module 1400 or the sensor module 1610 and execute an application corresponding to the external input. For example, when a user selects a camera icon displayed on the display layer 100, the host processor 1001 may obtain user input through the input sensor 1612 and activate the camera module 1710. The host processor 1001 may transmit frame data corresponding to a captured image acquired through the camera module 1710 to the display device DD. The display device DD may display an image corresponding to the captured image through the display layer 100.

[0067] As another example, when personal information authentication is performed in the display device DD, the fingerprint sensor 1611 may obtain input fingerprint information as input data. The host processor 1001 may compare the input data obtained by the fingerprint sensor 1611 with the authentication data stored in the memory 1300, and execute the application according to the comparison result. The display device DD may display information executed according to the logic of the application through the display layer 100.

[0068] For example, when a music streaming icon displayed on the display device DD is selected, the host processor 1001 may obtain a user input through the input sensor 1612 and activate a music streaming application stored in the memory 1300. When a music execution command is input in the music streaming application, the host processor 1001 may activate the sound output module 1630 to provide the user with sound information corresponding to the music execution command.

[0069] As described above, an example operation of the electronic device 1000 has been briefly described. Hereinafter, the configuration of the electronic device 1000 will be described in detail. Some of the components of the electronic device 1000 to be described later may be integrated and provided in the form of one component; however, one component may be divided and provided as two or more components.

[0070] The electronic device 1000 may communicate with the external electronic device 2000 through a network (e.g., a short-range wireless communication network or a long-range wireless communication network). According to an embodiment, the electronic device 1000 may include a host processor 1001, a memory 1300, an input module 1400, a display device DD, a power module 1500, a built-in module 1600, and an external module 1700. According to an embodiment, at least one of the above components may be omitted, or one or more different components may be added to the electronic device 1000. According to an embodiment, some of the components (e.g., a sensor module 1610, an antenna module 1620, or a sound output module 1630) may be integrated into another component (e.g., a display device DD).

[0071] The host processor 1001 may execute software to control at least one different component (e.g., hardware or software component) of the electronic device 1000 connected to the host processor 1001, and may perform various data processing or operations. According to an embodiment, as at least part of the data processing or operation, the host processor 1001 may store commands or data received from different components (e.g., the input module 1400, the sensor module 1610, or the communication module 1730) in the volatile memory 1310, process the commands or data stored in the volatile memory 1310, and store the resultant data in the non-volatile memory 1320.

[0072] The host processor 1001 may include a main processor 1100 and an auxiliary processor 1200. The main processor 1100 may include at least one of a central processing unit (CPU) and an application processor. The main processor 1100 may also include at least one of a graphics processing unit (GPU), a communication processor (CP), and an image signal processor (ISP). The main processor 1100 may also include a neural processing unit (NPU) 1120. The neural processing unit 1120 is a processor specifically used to process an artificial intelligence model, and the artificial intelligence model may be generated by machine learning. The artificial intelligence model may include multiple artificial neural network layers. The artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, and at least one of a combination of two or more of the above, but is not limited to the above examples. In addition to the above hardware structure, the artificial intelligence model may additionally or optionally include a software structure. At least two of the above-mentioned processing units and processors may be implemented as one integrated component (eg, a single chip), or each of the above-mentioned processing units and processors may be implemented as an independent component (eg, a plurality of chips).

[0073] The auxiliary processor 1200 may include an image processing circuit 210 , a data conversion circuit 1210 , a gamma correction circuit 1220 , and a rendering circuit 1230 .

[0074] The image processing circuit 210 may convert the data format of the image data and output the converted data format.

[0075] The data conversion circuit 1210 may receive frame data from the driving controller 100C, compensate the frame data so that an image of desired brightness is displayed based on the characteristics of the electronic device 1000 or user settings, or convert the frame data to reduce power consumption or compensate for afterimages. The gamma correction circuit 1220 may convert the frame data or the gamma reference voltage so that the image displayed by the electronic device 1000 has a desired gamma characteristic. The rendering circuit 1230 may receive frame data from the driving controller 100C, and render the frame data based on the pixel arrangement of the display layer 100 applied to the electronic device 1000. At least one of the data conversion circuit 1210, the gamma correction circuit 1220, and the rendering circuit 1230 may be integrated into different components (e.g., the main processor 1100 or the driving controller 100C). At least one of the data conversion circuit 1210, the gamma correction circuit 1220, and the rendering circuit 1230 may be integrated into a data driver DIC to be described later.

[0076] The memory 1300 may store various data used by at least one component of the electronic device 1000 (eg, the host processor 1001 or the sensor module 1610) and input data or output data for related commands. The memory 1300 may include at least one of a volatile memory 1310 and a nonvolatile memory 1320.

[0077] The input module 1400 may receive a command or data to be used in a component of the electronic device 1000 (eg, the host processor 1001 , the sensor module 1610 , or the sound output module 1630 ) from the outside (eg, a user or an external electronic device 2000 ).

[0078] The input module 1400 may include a first input module 1410 that allows a user to input a command or data and a second input module 1420 that allows the external electronic device 2000 to input a command or data. The first input module 1410 may include a microphone, a mouse, a keyboard (e.g., a button), or a pen (e.g., a passive pen or an active pen). The second input module 1420 may support a specified protocol that can be connected to the external electronic device 2000 in a wired or wireless manner. According to an embodiment, the second input module 1420 may include a high-definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface. The second input module 1420 may include a connector that can be physically connected to the external electronic device 2000, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0079] The display device DD can visually provide information to the user. The display device DD may include a display layer 100, a drive controller 100C, and a data driver DIC. The display device DD may also include a window, a chassis, a bracket, etc. for protecting the display layer 100. The display device DD may also include a light emitting drive circuit and a voltage generator. The display device DD will be described later.

[0080] The power module 1500 may supply power to the components of the electronic device 1000. The power module 1500 may include a battery charged with a power voltage. The battery may include a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. The power module 1500 may include a power management integrated circuit (PMIC). The PMIC may supply optimized power to each of the above-mentioned modules and modules to be described later. The PMIC may supply optimized power to each of the above-mentioned components and components to be described later. The power module 1500 may include a wireless power transmission / reception member electrically connected to the battery. The wireless power transmission / reception member may include a plurality of antenna radiators in the form of a coil.

[0081] The electronic device 1000 may further include a built-in module 1600 and an external module 1700. The built-in module 1600 may include a sensor module 1610, an antenna module 1620, and a sound output module 1630. The external module 1700 may include a camera module 1710, an optical module 1720, and a communication module 1730.

[0082] The sensor module 1610 may detect an input of a user's body or an input of a pen of the first input module 1410 and generate an electrical signal or a data value corresponding to the input. The sensor module 1610 may include at least one of a fingerprint sensor 1611, an input sensor 1612, and a digitizer 1613.

[0083] The fingerprint sensor 1611 may generate a data value corresponding to the user's fingerprint. The fingerprint sensor 1611 may include any one of an ultrasonic type, an optical type, and a capacitive type fingerprint sensor.

[0084] The input sensor 1612 may generate a data value corresponding to the coordinate information of the input of the user's body or the input of the pen. The amount of capacitance change due to the input of the input sensor 1612 may be generated as a data value. The input sensor 1612 may detect the input of the passive pen, or may send and receive data to and from the active pen.

[0085] The input sensor 1612 may measure bio-signals such as blood pressure, moisture, or body fat. For example, when a part of the user's body touches the sensor layer or the sensing panel and does not move within a certain time, the input sensor 1612 may sense the bio-signal and may output information desired by the user to the display device DD based on a change in the electric field caused by the part of the body.

[0086] The digitizer 1613 may generate a data value corresponding to the coordinate information of the input of the pen. The digitizer 1613 may generate the amount of electromagnetic change caused by the input as a data value. The digitizer 1613 may sense the input of the passive pen, or may send and receive data to and from the active pen.

[0087] At least one of the fingerprint sensor 1611, the input sensor 1612, and the digitizer 1613 may be implemented as a sensor layer formed on the display layer 100 by a subsequent process. At least one of the fingerprint sensor 1611, the input sensor 1612, and the digitizer 1613 may be disposed above the display layer 100, and the remaining components of the fingerprint sensor 1611, the input sensor 1612, and the digitizer 1613 (for example, the digitizer 1613) may be disposed under the display layer 100.

[0088] At least two of the fingerprint sensor 1611, the input sensor 1612, and the digitizer 1613 may be integrated into one sensing panel through the same process. When integrated into one sensing panel, the sensing panel may be disposed between the display layer 100 and a window disposed above the display layer 100. According to an embodiment, the sensing panel may be disposed on the window, and the position of the sensing panel is not particularly limited.

[0089] At least one of the fingerprint sensor 1611, the input sensor 1612, and the digitizer 1613 may be embedded in the display layer 100. In other words, at least one of the fingerprint sensor 1611, the input sensor 1612, and the digitizer 1613 may be simultaneously formed by a process for forming elements (e.g., light emitting elements, transistors) included in the display layer 100.

[0090] In addition, the sensor module 1610 may generate an electrical signal or a data value corresponding to an internal state or an external state of the electronic device 1000. The sensor module 1610 may also include, for example, a gesture sensor, a gyro sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illumination sensor.

[0091] The antenna module 1620 may include at least one antenna to transmit or receive signals or power to or from the outside. According to an embodiment, the communication module 1730 may transmit or receive signals to or from the external electronic device 2000 through an antenna suitable for a communication method. The antenna pattern of the antenna module 1620 may be integrated into a component (e.g., the display layer 100) of the display device DD or the input sensor 1612.

[0092] The sound output module 1630 is a device for outputting a sound signal to the outside of the electronic device 1000, and may include a speaker for general purposes such as multimedia playback or recording playback and a receiver specifically for telephone reception. According to an embodiment, the receiver may be formed integrally or separately from the speaker. The sound output pattern of the sound output module 1630 may be integrated with the display device DD.

[0093] The camera module 1710 may capture still images and moving images. According to an embodiment, the camera module 1710 may include at least one of a lens, an image sensor, and an image signal processor. The camera module 1710 may also include an infrared camera to measure the presence or absence of a user, the position of the user, and the gaze of the user.

[0094] The light module 1720 may provide light. The light module 1720 may include a light emitting diode or a xenon lamp. The light module 1720 may operate in conjunction with the camera module 1710, or may operate independently.

[0095] The communication module 1730 can support the establishment of a wired communication channel or a wireless communication channel between the electronic device 1000 and the external electronic device 2000, and communicate through the established communication channel. The communication module 1730 may include one or all of a wireless communication module (such as a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) and a wired communication module (such as a local area network (LAN) communication module or a power line communication module). The communication module 1730 can communicate with the external electronic device 2000 through a short-range communication network such as Bluetooth, WiFi Direct, or IrDA (Infrared Data Association) or a long-range communication network such as a cellular network, the Internet, or a computer network (e.g., LAN or WAN). The above-mentioned various types of communication modules 1730 can be implemented in the form of a single chip, or can be implemented in the form of separate chips.

[0096] The input module 1400 , the sensor module 1610 , and the camera module 1710 may be used to control the operation of the display device DD linked to the host processor 1001 .

[0097] The host processor 1001 may output a command or data sound output module 1630, camera module 1710, or optical module 1720 to the display device DD based on the input data received from the input module 1400. For example, the host processor 1001 may generate frame data in response to input data applied through a mouse or an active pen and output the frame data to the display device DD, or may generate command data in response to the input data and output the command data to the camera module 1710 or the optical module 1720. When no input data is received from the input module 1400 within a certain time, the host processor 1001 may switch the operation mode of the electronic device 1000 to a low power mode or a sleep mode, thereby reducing the power consumption of the electronic device 1000.

[0098] The host processor 1001 may output commands or data to the display device DD, the sound output module 1630, and the camera module 1710 based on the sensing data received from the sensor module 1610. Optionally, the host processor 1001 may output commands or data to the optical module 1720. For example, the host processor 1001 may compare the authentication data authenticated by the fingerprint sensor 1611 with the authentication data stored in the memory 1300, and then execute an application according to the comparison result. The host processor 1001 may execute a command based on the sensing data obtained by the input sensor 1612 or the digitizer 1613, or output relevant frame data to the display device DD. When the temperature sensor is included in the sensor module 1610, the host processor 1001 may receive temperature data about the measured temperature from the sensor module 1610, and further perform brightness correction on the frame data based on the temperature data.

[0099] The host processor 1001 may receive measurement data regarding the presence or absence of a user, the position of a user, the gaze of a user, etc. from the camera module 1710. The host processor 1001 may further perform brightness correction on the frame data based on the measurement data. For example, the host processor 1001, which determines the presence or absence of a user based on the input from the camera module 1710, may output frame data whose brightness is corrected through the data conversion circuit 1210 or the gamma correction circuit 1220 to the display device DD.

[0100] Some of the above components may be connected to each other through a communication method between peripheral devices (such as a bus, a general purpose input / output (GPIO), a serial peripheral interface (SPI), a mobile industry processor interface (MIPI), or an ultra-path interconnect (UPI) link) to exchange signals (e.g., commands or data). The host processor 1001 may communicate with the display device DD through a mutually committed interface. For example, the host processor 1001 may adopt the above-mentioned communication method, and the present disclosure is not limited to the above-mentioned communication method.

[0101] The electronic device 1000 according to various embodiments disclosed in this document may be various types of devices. The electronic device 1000 may include, for example, at least one of a portable communication device (e.g., a smart phone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, and a home appliance. The electronic device 1000 according to an embodiment of this document is not limited to the above-mentioned devices.

[0102] Figure 2 is a block diagram illustrating the operation of an electronic device according to an embodiment of the present disclosure.

[0103] Reference Figure 2, the electronic device 1000 may include a display layer 100, a sensor layer 200, a driving controller 100C, a sensor driver 200C, and a host processor 1001. The sensor layer 200 and the sensor driver 200C may be Figure 1 An example of a component of input sensor 1612.

[0104] The display layer 100 may be configured to basically generate and display an image. The display layer 100 may be a light-emitting display layer. For example, the display layer 100 may be an organic light-emitting display layer, a quantum dot display layer, a micro-LED display layer, or a nano-LED display layer. The display layer 100 may be referred to as a display panel.

[0105] The sensor layer 200 may be disposed on the display layer 100. The sensor layer 200 may sense an external input 3000 applied from the outside. The external input 3000 may be any suitable input mechanism for providing a capacitance change. For example, the sensor layer 200 may detect not only a passive input unit such as a user's body, but also an input of an active input unit providing a transmission signal. The sensor layer 200 may be referred to as a sensor, a touch layer, a touch panel, an input sensing layer, or an input sensing panel.

[0106] The host processor 1001 may control the overall operation of the electronic device 1000. For example, the host processor 1001 may control the operation of the driving controller 100C and the operation of the sensor driver 200C. The host processor 1001 may include at least one microprocessor.

[0107] The driving controller 100C may drive the display layer 100. The driving controller 100C may receive a data signal DATA and one or more control signals D-CS (hereinafter referred to as "control signal D-CS") from the host processor 1001. The data signal DATA may be a MIPI signal. The control signal D-CS may include various signals. For example, the control signal D-CS may include an input vertical synchronization signal, an input horizontal synchronization signal, a main clock, and a data enable signal. The driving controller 100C may generate a scan control signal and a data control signal for controlling the driving of the display layer 100 based on the control signal D-CS.

[0108] The driving controller 100C may generate image data DT obtained by converting the format of the data signal DATA to meet the interface specification of the display layer 100 .

[0109] The sensor driver 200C may drive the sensor layer 200. The sensor driver 200C may receive a control signal I-CS from the host processor 1001. The control signal I-CS may include a clock signal of the sensor layer 200.

[0110] The sensor driver 200C may output a transmission signal TS to the sensor layer 200. The sensor driver 200C may calculate the input coordinate information based on the reception signal RS received from the sensor layer 200, and provide a coordinate signal I-SS having the coordinate information to the host processor 1001. The host processor 1001 performs an operation corresponding to the user input based on the coordinate signal I-SS. For example, the host processor 1001 may operate the driving controller 100C to display a new application image on the display layer 100.

[0111] Figure 3 is a block diagram of an electronic device according to an embodiment of the present disclosure.

[0112] Reference Figure 3 The electronic device 1000 may be a touch screen display device activated according to an electrical signal. The electronic device 1000 may process image data and display the processed image data through the display layer 100.

[0113] The electronic device 1000 may include a host processor 1001 and a display device DD. The display device DD may include a driving controller 100C and a display layer 100.

[0114] The host processor 1001 may be implemented in the form of an integrated circuit, a system on chip, an application processor, or a mobile application processor, but the present disclosure is not particularly limited thereto. The host processor 1001 may control various components (eg, the driving controller 100C) included in the electronic device 1000 .

[0115] The host processor 1001 and the driving controller 100C may be connected to each other through an interface such as a Mobile Industry Processor Interface (MIPI).

[0116] The driving controller 100C may output a tearing signal TE to the host processor 1001. The tearing signal TE may be generated based on the vertical synchronization signal. The tearing signal TE may be referred to as a tearing effect (TE) signal. The tearing signal is an example of a signal for preventing a tearing effect, which is a visual artifact in which a "tear line" (moving or stationary) exists in a displayed image.

[0117] The data signal DATA may be sent in the form of a packet (or referred to as a "packet"). The data signal DATA may include a first signal LP (see Fig.11A ) and a second signal HS following the first signal LP and containing frame data (see Fig.11A ). The details will be described later.

[0118] The host processor 1001 may include an image processing circuit 210 , a data transmission unit TX, a central processing unit (CPU) 220 , a bus 230 , and a first clock source (or clock source 1 ) 240 .

[0119] The image processing circuit 210 may convert the image data into a format that can be processed by the data transmitting unit TX.

[0120] The data transmission unit TX may include one clock channel and one or more data channels.

[0121] The clock channel may transmit a clock signal CLK. The clock signal CLK may be a signal that switches periodically. The clock signal CLK may be generated based on a first clock signal CLK1 to be described later.

[0122] The data channel can send a data signal DATA. The data signal DATA can be sent through a bidirectional data channel or a unidirectional data channel.

[0123] The central processing unit 220 may control the host processor 1001 to compress the image data, and transmit the compressed image data to the driving controller 100C through the data transmitting unit TX.

[0124] The central processing unit 220 may control components of the host processor 1001 via the bus 230 .

[0125] The first clock source 240 may generate a first clock signal CLK1 that switches continuously. The first clock signal CLK1 may be used in the host processor 1001 to drive various components and generate various signals. The first clock source 240 may include a ring oscillator, an RC oscillator, a crystal oscillator, or a temperature compensated crystal oscillator. For example, the first clock source 240 may be a crystal oscillator.

[0126] The driving controller 100C may control the display layer 100. The driving controller 100C may be connected to the host processor 1001 in a specific interface mode. The driving controller 100C may receive data (e.g., a data signal DATA) from the host processor 1001, and generate image data DT obtained by converting the format of the data signal DATA to meet the interface specification of the display layer 100.

[0127] The driving controller 100C may include a data receiving unit RX and a second clock source (clock source 2 ) 130 .

[0128] The data receiving unit RX may include a clock channel and at least one data channel. The data receiving unit RX may be connected to the data transmitting unit TX via MIPI.

[0129] The clock channel may receive a clock signal CLK. The clock channel of the data receiving unit RX may correspond to the clock channel of the data transmitting unit TX. The clock signal CLK may be provided to the second clock source 130. The second clock source 130 may synchronize the second clock signal CLK2 with the first clock signal CLK1 based on the clock signal CLK.

[0130] The data channel may receive a data signal DATA. The data channel of the data receiving unit RX may correspond to the data channel of the data transmitting unit TX.

[0131] The second clock source 130 may generate a second clock signal CLK2 that is continuously switched. The second clock signal CLK2 may be used to drive various components disposed in the drive controller 100C and to generate various signals. For example, the drive controller 100C may generate a control signal for driving the display layer 100 based on the second clock signal CLK2. The second clock source 130 may include a ring oscillator, an RC oscillator, a crystal oscillator, or a temperature compensated crystal oscillator. For example, the second clock source 130 may be a ring oscillator.

[0132] The second clock source 130 may synchronize the second clock signal CLK2 with the first clock signal CLK1 based on the clock signal CLK.

[0133] The driving controller 100C may output a tearing signal TE for controlling a transmission period of the data signal DATA to the host processor 1001 .

[0134] The driving controller 100C may control the period of the tearing signal TE. For example, the driving controller 100C may receive and interpret a command output from the host processor 1001 to adjust the period of the tearing signal TE. The command may include information about the size of the vertical blank area of ​​the data signal DATA.

[0135] Figure 4 is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0136] Reference Figure 4 , the display device DD may include a display layer 100 and a sensor layer 200 .

[0137] The display layer 100 may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 , and an encapsulation layer 140 .

[0138] The base layer 110 may be a member providing a base surface on which the circuit layer 120 is disposed. The base layer 110 may be a glass substrate, a metal substrate, or a polymer substrate. However, the configuration is not limited thereto, and the base layer 110 may be an inorganic layer, an organic layer, or a composite material layer.

[0139] The base layer 110 may have a multi-layer structure. For example, the base layer 110 may include a first synthetic resin layer, a silicon oxide (SiO x ) layer, an amorphous silicon (a-Si) layer disposed on the silicon oxide layer, and a second synthetic resin layer disposed on the amorphous silicon layer. The silicon oxide layer and the amorphous silicon layer may be referred to as a substrate barrier layer.

[0140] Each of the first synthetic resin layer and the second synthetic resin layer may include a polyimide-based resin. In addition, each of the first synthetic resin layer and the second synthetic resin layer may include at least one of an acrylate-based resin, a methacrylate-based resin, a polyisoprene-based resin, a vinyl-based resin, an epoxy-based resin, a urethane-based resin, a cellulose-based resin, a siloxane-based resin, a polyamide-based resin, and a perylene-based resin. Meanwhile, in the present specification, the term "a-based resin" may refer to "a functional group of a-based resin".

[0141] The circuit layer 120 may be disposed on the base layer 110. The circuit layer 120 may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal line. The insulating layer, the semiconductor layer, and the conductive layer are formed on the base layer 110 by a coating scheme and a deposition scheme. Thereafter, the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned by a plurality of photolithography processes. Then, the semiconductor pattern, the conductive pattern, and the signal line included in the circuit layer 120 may be formed.

[0142] The light emitting element layer 130 may be disposed on the circuit layer 120. The light emitting element layer 130 may include a light emitting element. For example, the light emitting element layer 130 may include an organic light emitting material, quantum dots, quantum rods, micro LEDs, or nano LEDs.

[0143] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may protect the light emitting element layer 130 from moisture, oxygen, and foreign substances such as dust particles.

[0144] The sensor layer 200 may be disposed on the display layer 100. The sensor layer 200 may sense an external input applied from the outside. The external input may be a user input. The user input may include various types of external inputs such as a part of a user's body, light, heat, a pen, or pressure.

[0145] The sensor layer 200 may be formed on the display layer 100 through a subsequent process. In this case, the sensor layer 200 may be expressed as being directly disposed on the display layer 100. The term “directly disposed” may mean that no third component is disposed between the sensor layer 200 and the display layer 100. In other words, a separate bonding member may not be disposed between the sensor layer 200 and the display layer 100. Alternatively, the sensor layer 200 may be bonded to the display layer 100 through a bonding member. The bonding member may include a conventional adhesive or adhesive.

[0146] Although not shown, the display device DD may further include an anti-reflection layer and an optical layer disposed on the sensor layer 200. The anti-reflection layer may reduce the reflectivity of external light incident from the outside of the display device DD. The optical layer may improve the front brightness of the display device DD by controlling the direction of light incident from the display layer 100.

[0147] Figure 5 is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0148] Reference Figure 5 , at least one inorganic layer is formed on the top surface of the base layer 110. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. The inorganic layer may be formed as a multilayer. The multilayer inorganic layer may include a barrier layer and / or a buffer layer. According to an embodiment, the display layer 100 is shown to include a buffer layer BFL.

[0149] The buffer layer BFL may improve the bonding force between the base layer 110 and the semiconductor pattern. The buffer layer BFL may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the buffer layer BFL may have a structure in which silicon oxide layers and silicon nitride layers are alternately stacked.

[0150] The semiconductor pattern may be disposed on the buffer layer BFL. The semiconductor pattern may include polysilicon. However, the semiconductor pattern is not limited thereto and may include amorphous silicon, low temperature polysilicon, or an oxide semiconductor.

[0151] Figure 5 Only some semiconductor patterns are shown, and semiconductor patterns may also be provided in other regions. Semiconductor patterns may be arranged in a specific rule across pixels. Semiconductor patterns may have different electrical characteristics depending on whether the semiconductor patterns are doped. The semiconductor pattern may include a first region having high conductivity and a second region having low conductivity. The first region may be doped with an N-type dopant or a P-type dopant. A P-type transistor may include a doped region doped with a P-type dopant, and an N-type transistor may include a doped region doped with an N-type dopant. The second region may be an undoped region or a region doped with a concentration lower than that of the first region.

[0152] The conductivity of the first region is greater than that of the second region, and the first region can be basically used as an electrode or a signal line. The second region can basically correspond to the active region (or channel) of the transistor. In other words, a portion of the semiconductor pattern can be the active region of the transistor, another portion of the semiconductor pattern can be the source or drain of the transistor, and another portion of the semiconductor pattern can be a connecting electrode or a connecting signal line.

[0153] Each of the pixels may have an equivalent circuit including seven transistors, one capacitor, and the light emitting element 100PE, and the equivalent circuit diagram of the pixel may be modified in various forms. Figure 5 One transistor 100PC and a light emitting element 100PE included in a pixel are shown.

[0154] The source SC, the active area AL, and the drain DR of the transistor 100PC may be formed of a semiconductor pattern. When viewed in a cross-sectional view, the source SC and the drain DR may extend from the active area AL in opposite directions. Figure 5 A portion of a connection signal line SCL formed of a semiconductor pattern is shown. Although not separately shown, the connection signal line SCL may be connected to the drain DR of the transistor 100PC when viewed in a plan view.

[0155] The first insulating layer 10 may be disposed on the buffer layer BFL. The first insulating layer 10 may be overlapped with a plurality of pixels in common and may cover a semiconductor pattern. The first insulating layer 10 may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The first insulating layer 10 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. According to an embodiment, the first insulating layer 10 may be a single layer of silicon oxide. In addition to the first insulating layer 10, the insulating layer of the circuit layer 120 to be described later may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The inorganic layer may include at least one of the above materials, but the present disclosure is not limited thereto.

[0156] The gate GT of the transistor 100PC is disposed on the first insulating layer 10. The gate GT may be a part of the metal pattern. The gate GT overlaps the active area AL. The gate GT may be used as a mask in the process of doping the semiconductor pattern.

[0157] The second insulating layer 20 may be disposed on the first insulating layer 10 and may cover the gate electrode GT. The second insulating layer 20 may overlap with the pixel in common. The second insulating layer 20 may include an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The second insulating layer 20 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. According to an embodiment, the second insulating layer 20 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.

[0158] The third insulating layer 30 may be disposed on the second insulating layer 20. The third insulating layer 30 may have a single layer structure or a multi-layer structure. For example, the third insulating layer 30 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.

[0159] The first connection electrode CNE1 may be disposed on the third insulating layer 30. The first connection electrode CNE1 may be connected to the connection signal line SCL through a contact hole CNT-1 formed through the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30.

[0160] The fourth insulating layer 40 may be disposed on the third insulating layer 30. The fourth insulating layer 40 may be a single silicon oxide layer. The fifth insulating layer 50 may be disposed on the fourth insulating layer 40. The fifth insulating layer 50 may be an organic layer.

[0161] The second connection electrode CNE2 may be disposed on the fifth insulating layer 50. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole CNT-2 formed through the fourth insulating layer 40 and the fifth insulating layer 50.

[0162] The sixth insulating layer 60 may be disposed on the fifth insulating layer 50 and may cover the second connection electrode CNE2. The sixth insulating layer 60 may be an organic layer.

[0163] The light emitting element layer 130 may be disposed on the circuit layer 120. The light emitting element layer 130 may include a light emitting element 100PE. For example, the light emitting element layer 130 may include an organic light emitting material, a quantum dot, a quantum rod, a micro LED, or a nano LED. Hereinafter, although the light emitting element 100PE will be described as an organic light emitting element by way of example, the present disclosure is not particularly limited thereto.

[0164] The light emitting element 100PE may include a first electrode AE, a light emitting layer EL, and a second electrode CE.

[0165] The first electrode AE ​​may be disposed on the sixth insulating layer 60. The first electrode AE ​​may be connected to the second connection electrode CNE2 through a contact hole CNT-3 formed through the sixth insulating layer 60.

[0166] The pixel defining layer 70 may be disposed on the sixth insulating layer 60 and may cover a portion of the first electrode AE. An opening 70-OP is defined in the pixel defining layer 70. The opening 70-OP in the pixel defining layer 70 may expose at least a portion of the first electrode AE.

[0167] The active area of ​​the display device DD may include a light emitting area PXA and a non-light emitting area NPXA adjacent to the light emitting area PXA. The non-light emitting area NPXA may surround the light emitting area PXA. According to an embodiment, the light emitting area PXA may be defined to correspond to a partial area of ​​the first electrode AE ​​exposed by the opening 70-OP.

[0168] The light emitting layer EL may be disposed on the first electrode AE. The light emitting layer EL may be disposed in a region corresponding to the opening 70-OP. In other words, the light emitting layer EL may be formed separately for each of the pixels. When the light emitting layer EL is formed separately for each of the pixels, each of the light emitting layers EL may emit at least one of blue, red, and green light. However, the present disclosure is not limited thereto, and the light emitting layer EL may be provided in common for a plurality of pixels. In this case, the light emitting layer EL may provide blue light or white light.

[0169] The second electrode CE may be disposed on the light emitting layer EL. The second electrode CE may have an integral form and may be commonly disposed in a plurality of pixels.

[0170] Although not shown, a hole control layer may be disposed between the first electrode AE ​​and the light emitting layer EL. The hole control layer may be commonly disposed in the light emitting region PXA and the non-light emitting region NPXA. The hole control layer may include a hole transport layer and may further include a hole injection layer. The electron control layer may be disposed between the light emitting layer EL and the second electrode CE. The electron control layer may include an electron transport layer and may further include an electron injection layer. The hole control layer and the electron control layer may be commonly formed in a plurality of pixels using an opening mask.

[0171] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may include an inorganic layer, an organic layer, and an inorganic layer sequentially stacked, but the layers constituting the encapsulation layer 140 are not limited thereto.

[0172] The inorganic layer can protect the light emitting element layer 130 from moisture and oxygen, and the organic layer can protect the light emitting element layer 130 from foreign matter such as dust particles. The inorganic layer may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer may include an acrylic organic layer, but the present disclosure is not limited thereto.

[0173] The sensor layer 200 may include a base layer 201 , a first conductive layer 202 , a sensing insulating layer 203 , a second conductive layer 204 , and a cover insulating layer 205 .

[0174] The base layer 201 may be an inorganic layer including at least one of silicon nitride, silicon oxynitride and silicon oxide. Alternatively, the base layer 201 may be an organic layer including epoxy resin, acrylic resin or imide resin. The base layer 201 may have a single layer structure or a multilayer structure stacked in the third direction DR3.

[0175] Each of the first conductive layer 202 and the second conductive layer 204 may have a single layer structure or a multi-layer structure stacked in the third direction DR3.

[0176] The conductive layer having a single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium zinc tin oxide (IZTO). In addition, the transparent conductive layer may include a conductive polymer such as PEDOT, a metal nanowire, graphene, etc.

[0177] The conductive layer having a multi-layer structure may include a metal layer. The metal layer may have a three-layer structure of, for example, titanium / aluminum / titanium. The conductive layer having a multi-layer structure may include at least one metal layer and at least one transparent conductive layer.

[0178] At least one of the sensing insulating layer 203 and the capping insulating layer 205 may include an inorganic film. The inorganic film may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0179] At least one of the sensing insulating layer 203 and the cover insulating layer 205 may include an organic film. The organic film may include at least one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.

[0180] The parasitic capacitor Cb may be formed between the sensor layer 200 and the second electrode CE. The parasitic capacitor Cb may be referred to as a substrate capacitor. As the distance between the sensor layer 200 and the second electrode CE decreases, the capacitance of the parasitic capacitor Cb may increase. As the capacitance of the parasitic capacitor Cb increases, the ratio of the capacitance variation to the reference value increases. The capacitance variation refers to the capacitance variation between the input unit (e.g., the user's body 300 (see Figure 2 )) before the input is connected to the input unit (eg, the user's body 300 (see Figure 2 )) after the input changes.

[0181] The sensor driver 200C (see Figure 2 ) A calibration operation of removing a value corresponding to the capacitance of the parasitic capacitor Cb from the sensed signal may be performed. Through the calibration operation, the ratio of the capacitance variation to the reference value increases, and thus the sensing sensitivity may be improved.

[0182] Figure 6 is a plan view showing a display layer, a flexible substrate, and a sensor driver according to an embodiment of the present disclosure.

[0183] Reference Figure 6 , the display device DD may include a display layer 100 , a power pattern VDD, a data driver DIC, a flexible substrate CF, a sensor driver 200C, a display signal line L1 , a sensor signal line L2 , a first communication line DTL, and a connector CNT.

[0184] The display area DP-DA and the peripheral area DP-NDA adjacent to the display area DP-DA may be defined in the display layer 100. The display area DP-DA may be an area in which an image is displayed. A plurality of pixels PX may be disposed in the display area DP-DA. The peripheral area DP-NDA may be an area in which a driving circuit and a driving wiring are disposed.

[0185] The display layer 100 may include a base layer 110 , a plurality of pixels PX, a plurality of signal lines GL, DL, PL, and EL, a plurality of display pads (also referred to as “pads”) P1 and P2 , and a plurality of sensing pads PDT.

[0186] Each of the plurality of pixels PX may display one of the primary colors or one of the mixed colors. The primary colors may include red, green, or blue. The mixed colors may include various colors such as white, yellow, cyan, or magenta. However, the color displayed by each of the pixels PX is not limited thereto.

[0187] A plurality of signal lines GL, DL, PL, and EL may be provided on the base layer 110. The plurality of signal lines GL, DL, PL, and EL may be connected to the plurality of pixels PX to transmit electrical signals to the plurality of pixels PX. The plurality of signal lines GL, DL, PL, and EL may include a plurality of scan lines GL, a plurality of data lines DL, a plurality of power lines PL, and a plurality of emission control lines EL. However, this is provided for illustrative purposes only, and the configuration of the plurality of signal lines GL, DL, PL, and EL according to an embodiment of the present disclosure is not limited thereto. For example, the plurality of signal lines GL, DL, PL, and EL according to an embodiment of the present disclosure may further include an initialization voltage line.

[0188] The power pattern VDD may be disposed in the peripheral area DP-NDA. The power pattern VDD may be connected to a plurality of power lines PL. Each of the plurality of pixels PX may receive a power voltage ELVDD provided by the power line PL.

[0189] A plurality of display pads P1 and P2 may be provided in the peripheral area DP-NDA. The plurality of display pads P1 and P2 may include a first pad P1 and a second pad P2. A plurality of first pads P1 may be provided. The plurality of first pads P1 may be connected to a plurality of data lines DL, respectively. The second pad P2 may be connected to a power pattern VDD to be electrically connected to a plurality of power lines PL. The display panel DP may provide an externally provided electrical signal to a plurality of pixels PX through the plurality of display pads P1 and P2. Meanwhile, in addition to the first pad P1 and the second pad P2, the plurality of display pads P1 and P2 may further include pads for receiving different electrical signals, and the present disclosure is not limited thereto.

[0190] The data driver DIC may be installed in the peripheral area DP-NDA. The data driver DIC may be a timing control circuit in a chip form. The data driver DIC may respond to image data (DT, see Figure 2 ) and outputs grayscale voltages to the plurality of data lines DL. The plurality of data lines DL may be electrically connected to the plurality of first pads P1, respectively, via the data driver DIC. However, this is exemplary, and the data driver DIC according to an embodiment of the present disclosure may be mounted on a film separated from the display layer 100. The data driver DIC may be electrically connected to the plurality of display pads P1 and P2 through the film. For example, the film may be a flexible substrate CF.

[0191] A plurality of sensing pads PDT may be disposed in the peripheral area DP-NDA. The plurality of sensing pads PDT may be electrically connected to the sensor layer 200 (see Figure 2 ). The plurality of sensing pads PDT may include a plurality of first sensing pads TD1 and a plurality of second sensing pads TD2.

[0192] The flexible substrate CF may be electrically connected to the plurality of display pads P1 and P2 and the plurality of sensing pads PDT.

[0193] The sensor driver 200C may be mounted on the flexible substrate CF. The sensor driver 200C may be electrically connected to a plurality of sensing pads PDT.

[0194] The connector CNT may electrically connect the host processor 1001 to the display layer 100. The connector CNT may be disposed on the flexible substrate CF.

[0195] The display signal line L1 may be electrically connected between the display layer 100 and the host processor 1001. For example, the display signal line L1 may be connected between a plurality of display pads P1, P2 and a connector CNT. The display signal line L1 may transmit and receive a data signal DATA (see Figure 2 ). The display signal line L1 may be disposed on the flexible substrate CF. The display signal line L1 may be referred to as a MIPI wiring.

[0196] The sensor signal line L2 may be electrically connected between the sensor layer 200 and the sensor driver 200C. For example, the sensor signal line L2 may be connected between the plurality of sensing pads PDT and the sensor driver 200C. The sensor signal line L2 may transmit and receive a transmission signal TS (see Figure 2 ) and the received signal RS (see Figure 2 ). The sensor signal line L2 may be disposed on the flexible substrate CF.

[0197] The first communication line DTL may be electrically connected between the sensor driver 200C and the connector CNT. The first communication line DTL may transmit driving information of the sensor layer 200. The first communication line DTL may include various communication lines for transmitting driving information. For example, the first communication line DTL may include a general purpose input / output (GPIO).

[0198] The first communication line DTL may output driving information to the host processor 1001. The host processor 1001 may change the first signal LP (see Fig.11A ) relative to the delay of the sense transmission signal or relative to the tearing signal, the duty cycle (“duty factor”) of the first signal LP and the data signal DATA (see Figure 2 The details will be described later.

[0199] Figure 7 is a plan view of a sensor layer according to an embodiment of the present disclosure.

[0200] Reference Figure 6 and Figure 7 , the sensor layer 200 may include an active area AR and a peripheral area NAR adjacent to the active area AR. The active area AR may be an area activated by an electrical signal. The active area AR may be an area for sensing input. The active area AR may overlap with the display area DP-DA of the display layer 100. The peripheral area NAR may overlap with the peripheral area DP-NDA of the display layer 100.

[0201] The sensor layer 200 may include a base layer 201, a plurality of sensing electrodes SP, and a plurality of sensing lines TL1 and TL2. A plurality of first sensing electrodes TE1 and a plurality of second sensing electrodes TE2 may be disposed in the active area AR, and a plurality of sensing lines TL1 and TL2 may be disposed in the peripheral area NAR.

[0202] The base layer 201 may be an inorganic layer including any one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the base layer 201 may be an organic layer including epoxy resin, acrylic resin, or imide resin. The base layer 201 may be directly formed on the display layer 100. Alternatively, the base layer 201 may be bonded to the display layer 100 by an adhesive member.

[0203] The plurality of sensing electrodes SP may include a plurality of first sensing electrodes TE1 and a plurality of second sensing electrodes TE2. The input sensing layer may obtain information about external input through a capacitance change between the plurality of first sensing electrodes TE1 and the plurality of second sensing electrodes TE2.

[0204] The plurality of first sensing electrodes TE1 may extend in the first direction DR1 and may be arranged in the second direction DR2. The plurality of first sensing electrodes TE1 may include a plurality of first portions SP1 and a plurality of second portions BSP1. Each of the plurality of second portions BSP1 may electrically connect two adjacent first portions SP1. The plurality of first portions SP1 and the plurality of second portions BSP1 may have a mesh structure. The plurality of first portions SP1 may be referred to as a plurality of first sensing portions SP1. The plurality of second portions BSP1 may be referred to as a plurality of first connecting portions BSP1.

[0205] The plurality of second sensing electrodes TE2 may extend in the second direction DR2 and may be arranged in the first direction DR1. The plurality of second sensing electrodes TE2 may include a plurality of sensing patterns SP2 and a plurality of bridge patterns BSP2. The plurality of bridge patterns BSP2 may electrically connect two adjacent sensing patterns SP2 to each other. The plurality of sensing patterns SP2 may have a mesh structure. The plurality of sensing patterns SP2 may be referred to as a plurality of second sensing portions SP2. The plurality of bridge patterns BSP2 may be referred to as a plurality of second connection portions BSP2.

[0206] The plurality of second portions BSP1 may be disposed at different layers from the plurality of bridge patterns BSP2. The plurality of bridge patterns BSP2 may be insulated from the plurality of first sensing electrodes TE1 while crossing the plurality of first sensing electrodes TE1. For example, the plurality of second portions BSP1 may be insulated from the plurality of bridge patterns BSP2 while crossing the plurality of bridge patterns BSP2.

[0207] The plurality of sensing lines TL1 and TL2 may include a plurality of first sensing lines TL1 and a plurality of second sensing lines TL2. The plurality of first sensing lines TL1 may be electrically connected to the plurality of first sensing electrodes TE1, respectively. The plurality of second sensing lines TL2 may be electrically connected to the plurality of second sensing electrodes TE2, respectively.

[0208] The plurality of first sensing lines TL1 may be electrically connected to the plurality of first sensing pads TD1 through the contact holes, respectively. The plurality of second sensing lines TL2 may be electrically connected to the plurality of second sensing pads TD2 through the contact holes, respectively.

[0209] Figure 8 is a plan view of a display layer, a flexible substrate, and a sensor driver according to an embodiment of the present disclosure. Figure 8 In the description, the same reference numerals will be assigned to the reference Figure 6 The same components are described herein and their details will be omitted.

[0210] Reference Figure 8 , the second communication line DTLa may be electrically connected between the sensor driver 200C and the data driver DIC. The second communication line DTLa may transmit driving information of the sensor layer 200. The second communication line DTLa may include various communication lines capable of transmitting driving information. For example, the second communication line DTLa may include a general purpose input / output (GPIO).

[0211] The second communication line DTLa can output the driving information to the data driver DIC. The data driver DIC can transmit the data signal DATA (see FIG. 1 ) for requesting a change based on the driving information. Figure 2 ) of the first signal LP (see Fig.11A ) delay, the first signal LP (see Fig.11A ) duty cycle, and the first signal LP (see Fig.11A ) of the first frequency F1 (see Fig.11A ) signal is sent to the host processor 1001.

[0212] Fig. 9A The present invention is a diagram showing an embodiment of the present invention. Figure 6 An exploded perspective view of area AA'.

[0213] Reference Figure 6 and Fig. 9A , the display signal line L1 and the sensor signal line L2 may be disposed on the flexible substrate CF. For example, the sensor signal line L2 may be placed on the flexible substrate CF, and the display signal line L1 may be placed on the sensor signal line L2. The display signal line L1 and the sensor signal line L2 may be spaced apart from each other in the third direction DR3.

[0214] The display signal line L1 and the sensor signal line L2 may overlap when viewed in a plan view. A specific interference capacitor CC may be formed between the display signal line L1 and the sensor signal line L2.

[0215] According to the present disclosure, an additional layer for shielding an electromagnetic field may not be provided between the display signal line L1 and the sensor signal line L2. Therefore, the number of layers provided on the flexible substrate CF is reduced, and thus the thickness of the flexible substrate CF can be reduced. In addition, the degree of freedom can be increased in the design of the layers provided on the flexible substrate CF. Therefore, an electronic device 1000 with improved reliability can be provided (see Figure 1 ).

[0216] Fig. 9B The present invention is a diagram showing an embodiment of the present invention. Figure 6 The area AA' corresponds to an exploded perspective view of the area.

[0217] Reference Figure 6 and Fig. 9B , the display signal line L1-1, the sensor signal line L2-1, and the ground layer GND may be disposed on the flexible substrate CF. For example, the sensor signal line L2-1 may be disposed on the flexible substrate CF, the ground layer GND may be disposed on the sensor signal line L2-1, and the display signal line L1-1 may be disposed on the ground layer GND. The display signal line L1-1 and the sensor signal line L2-1 may be spaced apart from each other in the third direction DR3 while placing the ground layer GND between the display signal line L1-1 and the sensor signal line L2-1.

[0218] The ground layer GND may be provided between the display signal line L1-1 and the sensor signal line L2-1. The ground layer GND may be provided to minimize interference between the display signal line L1-1 and the sensor signal line L2-1. The ground layer GND may have a mesh structure for impedance matching of the display signal line L1-1. However, this is provided for illustrative purposes only, and the form of the ground layer GND according to the embodiment of the present disclosure is not limited thereto. For example, the ground layer GND may be provided in the form of a solid plate. In addition, a plurality of ground layers GND may be provided.

[0219] The display signal line L1-1 and the sensor signal line L2-1 may overlap each other when viewed in a plan view. A specific interference capacitor CC-1 may be formed between the display signal line L1-1 and the sensor signal line L2-1.

[0220] Fig.10 is a circuit diagram illustrating an electrical connection relationship among a sensor layer, a display signal line, a sensor signal line, and a sensor driver according to an embodiment of the present disclosure.

[0221] Reference Figure 6 , Figure 7 and Fig.10 , the first sensing line TL1 may have a first sensing resistor Ra. A transmission signal TS may be provided to the first sensing line TL1.

[0222] Parasitic capacitor Cb (see Figure 5 ) may include a first parasitic capacitor Cb-1 between the first sensing part SP1 of the first sensing electrode TE1 and the second electrode CE, and a second parasitic capacitor Cb-2 between the second sensing part SP2 of the second sensing electrode TE2 and the second electrode CE.

[0223] In addition, the capacitance of the mutual capacitor Cm defined between the first sensing part SP1 and the second sensing part SP2 may be changed according to the external input TC. The sensing capacitor Ct may be formed between the external input TC and the sensing electrode SP according to the external input TC. The sensing capacitor Ct may include a first sensing capacitor formed between the external input TC and the first sensing part SP1 and a second sensing capacitor formed between the external input TC and the second sensing part SP2.

[0224] The second sensing line TL2 may have a second sensing resistor Rb. A reception signal RS may be provided to the second sensing line TL2.

[0225] When the external input TC ends, the reception signal RS may be provided with a component caused by the capacitance of each of the first and second sensing capacitors.

[0226] The display signal line L1 may have a first resistor R1 and a second resistor R2. A data signal DATA may be provided to the display signal line L1.

[0227] The sensor signal line L2 may have a third resistor R3. A reception signal RS may be provided to the sensor signal line L2.

[0228] The interference capacitor CC may be formed between the display signal line L1 and the sensor signal line L2 .

[0229] The data signal DATA may cause interference to the reception signal RS through the interference capacitor CC. In this case, the high frequency component of the data signal DATA may be filtered by the operational amplifier AP of the sensor driver 200C.

[0230] In conventional electronic devices, the low-frequency component of the data signal DATA may affect the analysis of the received signal RS. However, according to the present disclosure, the host processor 1001 may determine the frequency of the low-frequency component based on the frequency of the transmitted signal TS and control the timing of the rising component and the falling component of the low-frequency component so that the noise caused by the rising component and the falling component in a specific sampling period of the received signal RS cancels each other out. Optionally, after sweeping the packet frequency of the data signal DATA within the packet frequency range and driving the sensor layer 200 to measure the noise from the received signal RS, the host processor 1001 may select one of a plurality of candidate frequencies having noise below a predetermined threshold as the frequency of the low-frequency component. Thus, the noise of the received signal RS may be removed or reduced. Thus, an electronic device 1000 with improved reliability may be provided (see Figure 1 ).

[0231] The sensor driver 200C may include an operational amplifier AP, a capacitor Cf, a switch SW, and a resistor RT.

[0232] The signal via the output node is input to the first input node (e.g., negative input node) of the operational amplifier AP. The reference signal ref operated at a specific cycle is input to the second input node (e.g., positive input node) of the operational amplifier AP. The capacitor Cf is provided between the first input node and the output node of the operational amplifier AP. The capacitor Cf, the switch SW, and the resistor RT may be connected in parallel to each other.

[0233] The reference signal ref is a voltage signal for generating a current of an output node and sensing a current change caused by a touch. For example, the reference signal ref can be implemented in the form of a square wave. When the voltage range of the reference signal ref swings to a specific voltage range, the operational amplifier AP can convert the current sensed by the output node into a voltage. The detection voltage CVA detected in the operational amplifier AP can be provided to the output node as a feedback voltage through the switch SW.

[0234] Fig.11A A tearing signal and a data signal according to an embodiment of the present disclosure are shown.

[0235] Reference Figure 3 , Figure 6 and Fig.11A , the display layer 100 can display an image in units of a frame period FR. The frame period FR can be implemented by displaying an image frame at a specific frame frequency (1 / FR Hz).

[0236] The driving controller 100C may output a tearing signal TE for controlling a transmission period of the data signal DATA to the host processor 1001. The driving controller 100C may control the period of the tearing signal TE. The tearing signal TE may operate in units of a frame period FR.

[0237] The host processor 1001 may output frame data output during the frame period FR to the driving controller 100C in units of packets through a plurality of data channels in response to the tearing signal TE of the driving controller 100C.

[0238] The data signal DATA may be transmitted in the form of packets. The data signal DATA may include a plurality of packets PK. Each of the plurality of packets PK may include a first signal LP and a second signal HS.

[0239] The first signal LP may not include frame data. For example, the first signal LP is a signal of the start of each horizontal period. The first signal LP may be a low-power signal. Since the first signal LP does not include frame data, power that would otherwise be consumed for processing such frame data can be saved during the time when the first signal LP is sent. Therefore, the first signal LP may be considered a "low-power signal". The first signal LP may have a first frequency F1. The first frequency F1 may have a frequency in the range of 80kHz to 600kHz. The first signal LP may have a voltage of 1.0V to 1.2V. The first frequency F1 may be referred to as the frequency of packet PK.

[0240] The first signal LP may be referred to as a low frequency component of the data signal DATA. A period in which the first signal LP is transmitted may be referred to as a period of a low power (LP) mode.

[0241] The second signal HS may be provided after the first signal LP. The second signal HS may be provided during the non-valid period of the first signal LP. The second signal HS may include frame data. The second signal HS may be a high-speed differential signal. The second signal HS may have a second frequency, which may be higher than the first frequency F1. Although the second signal HS is Fig.11A 1 and 12. The second signal HS may be shown as a periodic pulse train in FIG. 1 , but the second signal HS may have non-periodic pulses for transmitting corresponding data, wherein the data rate may be proportional to or equal to the second frequency. The second frequency may have a frequency ranging from 400 MHz to 500 MHz. The second signal HS may have a voltage lower than the first signal LP. The second signal HS may have a voltage of 100 mV to 300 mV.

[0242] The second signal HS may be referred to as a high frequency component of the data signal DATA. A period in which the second signal HS is transmitted may be referred to as a period of a high speed (HS) mode.

[0243] The data signal DATA may pass through the interference capacitor CC (see Fig.10 ) for the received signal RS (see Fig.10 ) causes interference. In this case, the second signal HS may be filtered by the sensor driver 200C.

[0244] In a conventional display device, the first signal LP may affect the analysis of the received signal RS. However, according to the present disclosure, the host processor 1001 may receive the driving information of the sensor layer 200 through the first communication line DTL. The driving information may include information about the transmission signal TS (see FIG. Fig.10 ) information. The host processor 1001 can determine the first frequency F1 based on the frequency of the transmission signal TS and control the rising component (e.g., the time of the rising edge of the pulse) and the falling component (e.g., the time of the falling edge of the pulse) of the low-frequency component to offset the falling component and the rising component of the transmission signal in a specific sampling period of the received signal RS, respectively. Optionally, after sweeping the packet frequency of the data signal DATA within the packet frequency range and driving the sensor layer 200 to extract noise from the received signal RS, the host processor 1001 can select one of a plurality of candidate frequencies having a noise level less than or equal to a predetermined threshold noise from the noise level at the packet frequency used for driving as the frequency of the low-frequency component. Therefore, the noise of the received signal RS can be reduced or removed (to a negligible amount) because the frame display frequency is adjusted to a frequency that avoids interfering with the sensing operation at the sensing circuit frequency. Therefore, an electronic device 1000 with improved reliability can be provided.

[0245] although Fig.11A It is shown that the multiple packets PK provided in one frame period FR have the same frequency, but the frequency of each of the multiple packets PK provided in one frame period FR according to the embodiment of the present disclosure is not limited thereto (wherein the "packet frequency" here is relative to the frequency of the adjacent packets). For example, the first frequency F1 of the first packet may be 300kHz, the first frequency F1 of the second packet may be 150kHz, and the first frequency F1 of the third packet may be 600kHz.

[0246] In addition, the plurality of packets PK may have various frequencies according to the frame period FR. For example, the first frequency F1 of each of the plurality of packets PK of the first frame period may be 300kHz, the first frequency F1 of each of the plurality of packets PK of the second frame period may be 150kHz, and the first frequency F1 of each of the plurality of packets PK of the third frame period may be 300kHz.

[0247] Fig. 11B A data signal according to an embodiment of the present disclosure is shown.

[0248] Reference Fig.11A and Fig. 11B , the data signal DATA-1 may include a first signal LP-1 and a second signal HS-1.

[0249] The first signal LP-1 may not include frame data. The first signal LP-1 may have a frequency F1-1, which may be lower than the first frequency F1.

[0250] The second signal HS-1 may be provided after the first signal LP-1. The second signal HS-1 may be provided in a non-valid period of the first signal LP-1. The second signal HS-1 may include frame data. The second signal HS-1 may have a frequency higher than the frequency F1-1.

[0251] When the first signal LP-1 "operates at the frequency F1-1" (for example, the first signal LP-1 is a pulse train having pulses repeated at the frequency F1-1), a blank period BLK may be provided as a non-active period after the second signal HS-1 is provided. For example, the blank period BLK may be referred to as a horizontal blank period.

[0252] Fig. 11C A data signal according to an embodiment of the present disclosure is shown.

[0253] Reference Fig.11A and Fig. 11C , the data signal DATA-2 may include a first signal LP-2 and second signals HS-2, HS-2a, and HS-2b.

[0254] The first signal LP-2 may not include frame data. The first signal LP-2 may have a frequency F1-2. The frequency F1-2 may be lower than the first frequency F1. For example, the frequency F1-2 may be the same as the frequency F1-1 (see Fig. 11B )same.

[0255] The second signal HS-2 may be provided after the first pulse of the first signal LP-2. The second signal HS-2 may be provided in a non-valid period of the first signal LP-2. The second signal HS-2 may include frame data. The second signal HS-2 may have a frequency higher than the frequency F1-2.

[0256] The second signals HS-2a and HS-2b may represent data included in the next frame of data. The second signal HS-2a may include a portion of the next frame of data. The second signal HS-2a may start at time t1 before the second pulse of the first signal LP-2. The drive controller 100C may distinguish the second signal HS-2a from the second signal HS-2 based on a predetermined signal exchange or protocol with the host processor 1001 in which the drive controller 100C is notified that the signal HS-2a starts at time t1. For example, the second signal HS-2a may be in the blank period BLK (see Fig. 11B ) period.

[0257] The second signal HS-2b may include at least some of the remaining portion of the next frame data. The second signal HS-2b may be provided after the third pulse of the first signal LP-2.

[0258] Fig.11D A data signal according to an embodiment of the present disclosure is shown.

[0259] Reference Fig.11A and Fig.11D , the data signal DATA-3 may include a first signal LP-3 and second signals HS-3a and HS-3b.

[0260] The first signal LP-3 may not include frame data. The first signal LP-3 may have a frequency F1-3, which may be higher than the first frequency F1.

[0261] The second signals HS-3a and HS-3b may each have a frequency higher than the frequency F1-3.

[0262] The second signal HS-3a may include a portion of the frame data of the first frame. The second signal HS-3a may be provided after the first pulse of the signal LP-3. The second signal HS-3a may be provided in the non-valid period of the first signal LP-3.

[0263] The second signal HS-3b may include at least some of the remaining portion of the frame data of the first frame.The second signal HS-3b may be provided after the second pulse of the first signal LP-3.

[0264] Fig.11E A data signal according to an embodiment of the present disclosure is shown.

[0265] Reference Fig.11A and Fig.11E , the data signal DATA-4 may include a first signal LP-4 and second signals HS-4a, HS-4b, HS-4c and HS-4d.

[0266] The first signal LP-4 may not include frame data. The first signal LP-4 may have a frequency F1-4. The frequency F1-4 may be higher than the first frequency F1. For example, the frequency F1-4 may be higher than the frequency F1-3 (see Fig.11D )same.

[0267] The second signals HS-4a, HS-4b, HS-4c, and HS-4d may each have a frequency higher than the frequency F1-4.

[0268] The second signal HS-4a may include a portion of the frame data of the first frame. The second signal HS-4a may be provided after the first pulse of the first signal LP-4. The second signal HS-4a may be provided in the non-valid period of the first signal LP-4.

[0269] The second signal HS-4b may include at least some of the remaining portion of the frame data of the first frame.The second signal HS-4b may be provided after the second pulse of the first signal LP-4.

[0270] The second signals HS-4c and HS-4d may include next frame data.

[0271] The second signal HS-4c may include a portion of the next frame of data. The second signal HS-4c may be provided at time t2 after the second signal HS-4b. The second signal HS-4c may be placed between the first signal provided twice and the first signal provided three times after the first signal provided twice.

[0272] The second signal HS-4d may include at least some of the remaining portion of the next frame data. The second signal HS-4d may be provided after the third pulse of the first signal LP-4.

[0273] Fig. 12A is a timing diagram illustrating signals according to an embodiment of the present disclosure.

[0274] exist Fig. 12A In the example, the horizontal axis may represent time and the vertical axis may represent signal strength.

[0275] Reference Figure 2 , Fig.10 and Fig. 12A , the sensor driver 200C may provide a plurality of first sensing electrodes TE1 (see Figure 7 ) outputs the sending signal TS.

[0276] The transmission signal TS may have a first level during a first transmission period PD1, and may have a second level during a second transmission period PD2 after the first transmission period PD1. The second level may be lower than the first level. For example, the first level may be 10V and the second level may be 0V. However, this is provided only for illustrative purposes, and the voltage of each signal may not be limited thereto, but may be provided in various ways.

[0277] The first transmission period PD1 may be referred to as a positive sampling period, and the second transmission period PD2 may be referred to as a negative sampling period.

[0278] The transmission signal TS may have a sensing frequency TFR. The sensing frequency TFR may be referred to as a third frequency. The first transmission period PD1 and the second transmission period PD2 may be repeated at the sensing frequency TFR.

[0279] The sensor driver 200C can sense the plurality of second sensing electrodes TE2 (see FIG. Figure 7 ) receives the received signal RS.

[0280] The data signal DATA may include a first signal LP. The electronic device 1000 may output the first signal LP under a first condition G1 or a fourth condition G4. A conventional electronic device may output the first signal LP under a second condition G2 or a third condition G3. The first to fourth conditions G1, G2, G3, and G4 may be classified according to a rising time point of an effective portion of the first signal LP (a time point of a rising edge of a pulse of the first signal LP) and a falling time point of an effective portion (a time point of a falling edge of a pulse of the first signal LP).

[0281] The first condition G1 and the fourth condition G4 adopt the driving method of the electronic device 1000 according to the embodiment of the present disclosure, and the second condition G2 and the third condition G3 adopt the conventional driving method of the electronic device different from the present disclosure. Fig. 12A In all conditions G1 to G4 of the example, the capacitance of the interference capacitor CC may be 300 fF (femtofarad).

[0282] Under the first condition G1, the first signal LP may be delayed by a first time D1 from a rising time point of the transmission signal TS in the first transmission period PD1. The first time D1 may be 0.25 μs (microseconds).

[0283] The first signal LP may have a third level during a first period P1, and may have a fourth level during a second period P2 after the first period P1. The fourth level may be lower than the third level. The first period P1 may be an effective period of the first signal LP, and the second period P2 may be an ineffective period of the first signal LP. For example, the third level may be 1.2V, and the fourth level may be 0V. However, this is provided only for illustrative purposes, and the voltage of each signal is not limited thereto. For example, the voltage of each signal may be provided in various ways.

[0284] The first signal LP may have a first frequency F1 (in other words, pulses of the first signal LP repeat at the first frequency F1 ). The first period P1 and the second period P2 may repeat at the first frequency F1 .

[0285] Each of the width of the first transmission period PD1 and the width of the second transmission period PD2 may be wider than the width of the first period P1. The first transmission period PD1 may completely overlap the first period P1.

[0286] According to the present disclosure, in the first period P1, the rising time point (time point of the rising edge) and the falling time point (time point of the falling edge) of one pulse of the first signal LP may occur during the first transmission period PD1 of one cycle of the transmission signal TS (wherein one cycle has a duration of 1 / TFR). Therefore, the rising component and the falling component of the first signal LP, which is an interference signal propagated through the interference capacitor CC, may depend on the first transmission period PD1, which is a specific sampling period. The noise caused by the rising component and the falling component may offset each other to be removed within the specific sampling period. In other words, the noise may be reduced or removed. The sensitivity may be improved by increasing the signal-to-noise ratio (SNR) of the detection voltage CVA. Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0287] Host processor 1001 (see Figure 2 ) The first frequency F1 may be determined based on the sensing frequency TFR. Under the first condition G1, the first frequency F1 may be the same as the sensing frequency TFR. For example, the first frequency F1 may be 300 kHz.

[0288] According to the present disclosure, the first frequency F1 may be a divisor of the sensing frequency TFR. In other words, the sensing frequency TSR may be an integer multiple of the first frequency F1. Therefore, even if the transmission signal TS and the first signal LP are repeated at each of the sensing frequency TFR and the first frequency F1, the rising component and the falling component of the first signal LP may fall within the first transmission period PD1 of each pulse of the first signal LP, respectively. The noise caused by the rising component and the falling component may offset each other to be removed within a specific sampling period. In other words, the noise may be reduced or removed. The sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0289] Under the second condition G2, the first signal LP may be delayed by a second time D2 from the rising time point of the transmission signal TS in the first transmission period PD1. The second time D2 may be 0.75 μs. The first transmission period PD1 may not completely overlap with the effective period of the first signal LP (the time of the pulse of the first signal LP). The effective period of the first signal LP may overlap with both the first transmission period PD1 and the second transmission period PD2.

[0290] Under the third condition G3, the first signal LP may be delayed by a third time D3 from the rising time point of the transmission signal TS in the first transmission period PD1. The third time D3 may be 1.25 μs. The first transmission period PD1 may not completely overlap with the effective period of the first signal LP. The effective period of the first signal LP may overlap with both the first transmission period PD1 and the second transmission period PD2.

[0291] Under the fourth condition G4, each of the width of the first transmission period PD1 and the width of the second transmission period PD2 may be wider than the width of the effective period of the first signal LP. The second transmission period PD2 may overlap the first period P1.

[0292] According to the present disclosure, the rising time point and the falling time point of the effective period of the first signal LP can overlap with a second transmission period PD2. Therefore, the rising component and the falling component of the first signal LP, which is an interference signal propagated through the interference capacitor CC, can fall within the second transmission period PD2 as a specific sampling period. The rising component and the falling component can be offset and removed from each other within a specific sampling period. In other words, noise can be reduced or removed. Sensitivity can be improved by increasing the signal-to-noise ratio (SNR) of the detection voltage CVA. Therefore, an electronic device 1000 with improved sensing reliability can be provided.

[0293] The sensor driver 200C may output a detection voltage CVA based on the reception signal RS received from the sensor layer 200 , and may output a coordinate signal I-SS based on the detection voltage CVA. The sensor driver 200C may provide the coordinate signal I-SS to the host processor 1001 .

[0294] The coordinate signal I-SS may have a specific value. For example, under the first to fourth conditions G1, G2, G3, and G4, the coordinate signal I-SS may have a value of about 25 voltage units. In this case, when a signal-to-noise ratio (SNR) is measured for each of the first to fourth conditions G1, G2, G3, and G4, an SNR of 40 dB (decibel) or more may be determined as normal, and an SNR of less than 40 dB may be determined as unqualified.

[0295] In a conventional electronic device, under the second condition G2, the noise level may have a value of about 9 voltage units. In this case, the signal-to-noise ratio may have a value of 8.9 dB (calculated based on 25 / 9=2.78). Under the third condition G3, the noise level may have a value of about 18 voltage units. In this case, the signal-to-noise ratio may have a value of 2.8 dB. Since the signal-to-noise ratio (SNR) in each of the second condition G2 and the third condition G3 is less than 40 dB, in this case, the SNR may be determined to be defective. However, according to the present disclosure, under the first condition G1 and the fourth condition G4, the noise caused by the rising component and the falling component of the first signal LP may offset each other within a specific sampling period. Under the first condition G1, the noise level may have a value of about 0.002 voltage units. In this case, the signal-to-noise ratio may have a value of 81.9 dB (calculated based on 25 / 0.002=12500). Since the signal-to-noise ratio (SNR) under the first condition G1 is 40 dB or more, the SNR may be determined to be normal. Therefore, the electronic device 1000 having improved reliability may be provided.

[0296] Fig. 12B is a timing diagram showing signals according to an embodiment of the present disclosure. Fig. 12B In the description, the same reference numerals are assigned to the reference Fig. 12A The same components are described and their details are omitted.

[0297] Reference Figure 2 , Fig.10 and Fig. 12B , the data signal DATA may include a first signal LP. The electronic device 1000 (see Figure 1 ) can output signals measured under the first condition G1, the second condition G1a and the third condition G1b. These conditions can be classified based on the capacitance of the interference capacitor CC.

[0298] The first to third conditions G1, G1a, and G1b employ the driving method of the electronic device 1000 according to the embodiment of the present disclosure. The interference capacitor CC may have different capacitances under the first to third conditions G1, G1a, and G1b.

[0299] Under the first condition G1 , the capacitance of the interference capacitor CC may be 300 fF (femtofarad).

[0300] Under the second condition G1a, the first signal LP may include a first period P1 and a second period P2. The first period P1 may be an effective period of the first signal LP, and the second period P2 may be an ineffective period of the first signal LP.

[0301] The first signal LP may have a first frequency F1. Each of a width of the first transmission period PD1 and a width of the second transmission period PD2 may be wider than a width of the first period P1. The first transmission period PD1 may completely overlap with the first period P1.

[0302] Under the second condition G1a, the capacitance of the interference capacitor CC may be 2400 fF.

[0303] According to the present disclosure, the rising time point and the falling time point of the first period P1 can fall within a first transmission period PD1. Therefore, the rising component and the falling component of the first signal LP, which is an interference signal transmitted through the interference capacitor CC, can fall within the first transmission period PD1 as a specific sampling period. The noise caused by the rising component and the falling component can offset each other within the specific sampling period. In other words, the noise can be reduced or removed. The sensitivity can be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 with improved sensing reliability can be provided.

[0304] Under the third condition G1b, the first signal LP may include a first period P1 and a second period P2. The first period P1 may be an effective period of the first signal LP, and the second period P2 may be an ineffective period of the first signal LP.

[0305] The first signal LP may have a first frequency F1. Each of a width of the first transmission period PD1 and a width of the second transmission period PD2 may be wider than a width of the first period P1. The first transmission period PD1 may overlap with the first period P1.

[0306] Under the third condition G1b, the capacitance of the interference capacitor CC may be 3000 fF.

[0307] According to the present disclosure, the rising time point and the falling time point of the first period P1 may overlap with a first transmission period PD1. Therefore, the rising component and the falling component of the first signal LP, which is an interference signal transmitted through the interference capacitor CC, may depend on the first transmission period PD1, which is a specific sampling period. The noise caused by the rising component and the falling component may offset each other within a specific sampling period. In other words, the noise may be reduced or removed. The sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0308] The first signal LP under each of the second condition G1a and the third condition G1b may be substantially the same as the first signal LP under the first condition G1.

[0309] The sensor driver 200C may output a detection voltage CVA based on the reception signal RS received from the sensor layer 200 , and may output a coordinate signal I-SS based on the detection voltage CVA. The sensor driver 200C may provide the coordinate signal I-SS to the host processor 1001 .

[0310] The coordinate signal I-SS may have a specific value. For example, under the first to third conditions G1, G1a, and G1b, the coordinate signal I-SS may have a value (eg, an arbitrary voltage unit or power unit) of about 25.

[0311] According to the present disclosure, under the first to third conditions G1, G1a, G1b, the noise caused by the rising component and the falling component of the first signal LP can offset each other within a specific sampling period. Under the first condition G1, the noise level can have a value of about 0.002 voltage units. In this case, the signal-to-noise ratio can have a value of 81.9dB. Under the second condition G1a, the noise level can have a value of about 0.032 voltage units. In this case, the signal-to-noise ratio can have a value of 57.9dB. Under the third condition G1b, the noise level can have a value of about 0.035 voltage units. In this case, the signal-to-noise ratio can have a value of 57.0dB. Since the signal-to-noise ratio (SNR) under the first to third conditions G1, G1a and G1b is 40dB or more, in this case, the SNR can be determined to be normal. Therefore, an electronic device 1000 with improved reliability can be provided.

[0312] Fig. 12C is a timing diagram showing signals according to an embodiment of the present disclosure. Fig. 12C In the description, the same reference numerals will be assigned to the reference Fig. 12A The same components are described herein and their details will be omitted.

[0313] Reference Figure 2 , Fig.10 and Fig. 12C , the data signal DATA may include a first signal LP. The electronic device 1000 may output the first signal LP measured under the first condition G1-1, the second condition G2-1, and the third condition G3-1. The first to third conditions G1-1, G2-1, and G3-1 may be classified according to the rising time point of the valid period of the first signal LP.

[0314] The first to third conditions G1-1, G2-1, and G3-1 employ the driving method of the electronic device 1000 according to the embodiment of the present disclosure. In this example, for each of the conditions G1-1, G2-1, and G3-1, the capacitance of the interference capacitor CC may be 300 fF (femtofarad).

[0315] Under the first condition G1-1, the first signal LP may be delayed by a first time D1-1 from a rising time point of the first transmission period PD1. The first time D1-1 may be 0.25 μs (microseconds).

[0316] The first signal LP may include a first period P1a and a second period P2a. The second period P2a may be after the first period P1a. The first period P1a may be an effective period of the first signal LP, and the second period P2a may be an ineffective period of the first signal LP.

[0317] The first signal LP may have a first frequency F1a. The first period P1a and the second period P2a may be repeated at the first frequency F1a.

[0318] A plurality of first transmission periods PD1 may be set. In other words, the first transmission period PD1 is repeated. Two consecutive first transmission periods PD1 and one second transmission period PD2 placed therebetween may completely overlap with the first period P1a.

[0319] According to the present disclosure, the rising time point of the first period P1a can fall within one of the two first transmission periods PD1, and the falling time point of the first period P1a can fall within the remaining one of the two first transmission periods PD1. For this reason, the rising component and the falling component of the first signal LP, which is an interference signal propagated through the interference capacitor CC, can fall within the continuous first transmission period PD1 as a specific sampling period. In addition, an even number of first transmission periods PD1 overlapping with the first period P1a can be set. Therefore, the noise caused by the rising component and the falling component can offset each other within a specific sampling period. In other words, the noise can be reduced or removed. The sensitivity can be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 with improved sensing reliability can be provided.

[0320] Host processor 1001 (see Figure 2 ) The first frequency F1a may be determined based on the sensing frequency TFR. Under the first condition G1-1, the first frequency F1a may be lower than the sensing frequency TFR. For example, the sensing frequency TFR may be 300 kHz, and the first frequency F1a may be 150 kHz.

[0321] According to the present disclosure, the first frequency F1a may be a multiple of the sensing frequency TFR. Therefore, even if the transmission signal TS and the first signal LP are repeated at each of the sensing frequency TFR and the first frequency F1a, the rising component and the falling component of the first signal LP may depend on an even number of first transmission periods PD1. The rising component and the falling component may be offset and removed from each other within a specific sampling period. In other words, noise may be reduced or removed. Sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 having improved sensing reliability may be provided.

[0322] Under the second condition G2 - 1 , the first signal LP may be delayed from the rising time point of the first transmission period PD1 by a second time D2 - 1 , which may be 0.50 μs.

[0323] A plurality of first transmission periods PD1 may be set. Two consecutive first transmission periods PD1 and one second transmission period PD2 interposed therebetween may completely overlap with the effective period of the first signal LP.

[0324] According to the present disclosure, the rising time point of the effective period of the first signal LP may overlap with one of the two first transmission periods PD1, and the falling time point of the effective period of the first signal LP may overlap with the remaining one of the two first transmission periods PD1. For this reason, the rising component and the falling component of the first signal LP, which is an interference signal transmitted through the interference capacitor CC, may depend on the first transmission period PD1, which is a specific sampling period. In addition, an even number of first transmission periods PD1 overlapping with the effective period of the first signal LP may be set. Therefore, the noise caused by the rising component and the falling component may offset each other within a specific sampling period. In other words, the noise may be reduced or removed. The sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0325] Under the third condition G3 - 1 , the first signal LP may be delayed by a third time D3 - 1 from the rising time point of the first transmission period PD1 . The third time D3 - 1 may be 0.75 μs.

[0326] A plurality of first transmission periods PD1 may be set. Two consecutive first transmission periods PD1 and one second transmission period PD2 interposed therebetween may completely overlap with the effective period of the first signal LP.

[0327] According to the present disclosure, the rising time point of the effective period of the first signal LP may overlap with one of the two first transmission periods PD1, and the falling time point of the effective period of the first signal LP may overlap with the remaining one of the two first transmission periods PD1. For this reason, the rising component and the falling component of the first signal LP, which is an interference signal transmitted through the interference capacitor CC, may depend on the first transmission period PD1, which is a specific sampling period. In addition, an even number of first transmission periods PD1 overlapping with the effective period of the first signal LP may be set. Therefore, the rising component and the falling component may be offset from each other and removed within a specific sampling period. In other words, noise may be reduced or removed. Sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0328] The sensor driver 200C may output a detection voltage CVA based on the reception signal RS received from the sensor layer 200 , and may output a coordinate signal I-SS based on the detection voltage CVA. The sensor driver 200C may provide the coordinate signal I-SS to the host processor 1001 .

[0329] The coordinate signal I-SS may have a specific value. For example, under the first to third conditions G1, G1a, and G1b, the coordinate signal I-SS may have a value (eg, an arbitrary voltage unit or power unit) of about 25.

[0330] According to the present disclosure, under the first to third conditions G1-1, G2-1 and G3-1, the rising component and the falling component of the first signal LP may be offset from each other and removed within a specific sampling period. Under the first condition G1-1, the noise level may have a value of about 0.0001 voltage units. In this case, the signal-to-noise ratio may have a value of 102.4dB. Under the second condition G2-1, the noise level may have a value of about 0.001 voltage units. In this case, the signal-to-noise ratio may have a value of 91.8dB. Under the third condition G3-1, the noise level may have a value of about 0.0001 voltage units. In this case, the signal-to-noise ratio may have a value of 98.4dB. Since the signal-to-noise ratio (SNR) under the first to third conditions G1-1, G2-1 and G3-1 is 40dB or more, in this case, the SNR may be determined to be normal. Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0331] Fig.12Dis a timing diagram showing signals according to an embodiment of the present disclosure. Fig.12D In the description, the same reference numerals will be assigned to the reference Fig. 12A The same components are described herein and their details will be omitted.

[0332] Reference Figure 2 , Fig.10 and Fig.12D , the data signal DATA may include a first signal LP. The electronic device 1000 may output the first signal LP measured under the first condition G1-2, the second condition G2-2, and the third condition G3-2. The first to third conditions G1-2, G2-2, and G3-2 may be classified according to the rising time point of the valid period of the first signal LP.

[0333] The first to third conditions G1-2, G2-2, and G3-2 employ the driving method of the electronic device 1000 according to the embodiment of the present disclosure. In this case, the capacitance of the interference capacitor CC may be 300 fF (femtofarad).

[0334] Under the first condition G1-2, the first signal LP may be delayed by a first time D1-2 from a rising time point of the first transmission period PD1. The first time D1-2 may be 0.25 μs (microseconds).

[0335] The first signal LP may include a first period P1b and a second period P2b. The second period P2b may be after the first period P1b. The first period P1b may be an effective period of the first signal LP, and the second period P2b may be an ineffective period of the first signal LP.

[0336] The first signal LP may have a first frequency F1b. The first period P1b and the second period P2b may be repeated at the first frequency F1b.

[0337] Each of the width of the first transmission period PD1 and the width of the second transmission period PD2 may be wider than the width of the first period P1b. The first transmission period PD1 and the second transmission period PD2 may overlap the first period P1b.

[0338] According to the present disclosure, the rising time point and the falling time point of the first period P1b may overlap with each of the first transmission period PD1 and the second transmission period PD2. Therefore, the rising component and the falling component of the first signal LP, which is an interference signal transmitted through the interference capacitor CC, may depend on the first transmission period PD1 or the second transmission period PD2, which is a specific sampling period. The noise caused by the rising component and the falling component may cancel each other out within a specific sampling period. In other words, the noise may be reduced or removed. The sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0339] Host processor 1001 (see Figure 2 ) The first frequency F1b may be determined based on the sensing frequency TFR. Under the first condition G1-2, the first frequency F1b may be higher than the sensing frequency TFR. For example, the sensing frequency TFR may be 300 kHz, and the first frequency F1b may be 600 kHz.

[0340] According to the present disclosure, the first frequency F1b may be a multiple of a divisor of the sensing frequency TFR. Therefore, even if the transmission signal TS and the first signal LP are repeated at each of the sensing frequency TFR and the first frequency F1b, the rising component and the falling component of the first signal LP may depend on the first transmission period PD1 or the second transmission period PD2. The noise caused by the rising component and the falling component may cancel each other out within a specific sampling period. In other words, the noise may be reduced or removed. The sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 having improved sensing reliability may be provided.

[0341] Under the second condition G2-2, the first signal LP may be delayed from the rising time point of the first transmission period PD1 by a second time D2-2, and the second time D2-2 may be 0.50 μs.

[0342] Each of the first transmission period PD1 and the second transmission period PD2 may overlap with the effective period of the first signal LP.

[0343] According to the present disclosure, the rising time point and the falling time point of the effective period of the first signal LP may overlap with each of the first transmission period PD1 and the second transmission period PD2. Therefore, the rising component and the falling component of the first signal LP as the interference signal transmitted through the interference capacitor CC may depend on the first transmission period PD1 or the second transmission period PD2 as a specific sampling period. The rising component and the falling component may be offset and removed from each other within a specific sampling period. In other words, noise may be reduced or removed. Sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0344] Under the third condition G3-2, the first signal LP may be delayed from the rising time point of the first transmission period PD1 by a third time D3-2. The third time D3-2 may be 0.75 μs.

[0345] The first transmission period PD1 and the second transmission period PD2 may overlap with the effective period of the first signal LP.

[0346] According to the present disclosure, the rising time point and the falling time point of the effective period of the first signal LP may overlap with each of the first transmission period PD1 and the second transmission period PD2. Therefore, the rising component and the falling component of the first signal LP as the interference signal transmitted through the interference capacitor CC may depend on the first transmission period PD1 or the second transmission period PD2 as a specific sampling period. The noise caused by the rising component and the falling component may offset each other within the specific sampling period. In other words, the noise may be reduced or removed. The sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0347] The sensor driver 200C may output a detection voltage CVA based on the reception signal RS received from the sensor layer 200 , and may output a coordinate signal I-SS based on the detection voltage CVA. The sensor driver 200C may provide the coordinate signal I-SS to the host processor 1001 .

[0348] The coordinate signal I-SS may have a specific value. For example, under the first to third conditions G1-2, G2-2, and G3-2, the coordinate signal I-SS may have a value of about 25 (eg, an arbitrary voltage unit or power unit).

[0349] According to the present disclosure, under the first to third conditions G1-2, G2-2 and G3-2, the rising component and the falling component of the first signal LP may be offset from each other and removed within a specific sampling period. Under the first condition G1-2, the noise level may have a value of about 0.001 voltage units. In this case, the signal-to-noise ratio may have a value of 93.8dB. Under the second condition G2-2, the noise level may have a value of about 0.001 voltage units. In this case, the signal-to-noise ratio may have a value of 87.4dB. Under the third condition G3-1, the noise level may have a value of about 0.001 voltage units. In this case, the signal-to-noise ratio may have a value of 88.8dB. Since the signal-to-noise ratio (SNR) under the first to third conditions G1-2, G2-2 and G3-2 is 40dB or more, the SNR may be determined to be normal. Therefore, an electronic device 1000 with improved sensing reliability may be provided.

[0350] Fig.13A is a graph showing noise per packet frequency according to an embodiment of the present disclosure.

[0351] exist Fig.13A In FIG. 1 , the horizontal axis may represent the packet frequency and the vertical axis may represent the noise level. In this case, “au” may refer to a measurement value of the noise level with arbitrary units.

[0352] Reference Figure 2 , Fig.10 , Fig.11A and Fig.13A , the host processor 1001 may sweep the packet frequency of consecutive packets PK and drive the sensor layer 200 to measure the noise in the received signal RS. The packet frequency may be substantially equal to the first frequency F1 of the first signal LP.

[0353] An example of noise (e.g., touch noise) measured for each packet frequency is shown by the first curve GP1. The first curve GP1 shows the noise of each packet frequency when the duty ratio (duty ratio is the ratio between the effective period of the first signal LP and the period of one cycle (non-effective period plus effective period)) is 0.5 at a fixed sensing frequency TFR, the capacitance of the interference capacitor CC is 300fF, and the sensing frequency TFR is fixed.

[0354] The noise level for each grouped frequency may be stored in memory 1300 (see Figure 1 ). Memory 1300 (see Figure 1 ) may include a flash memory. In other words, at least some of the values ​​corresponding to the first curve GP1 may be stored in the memory 1300 (see Figure 1 )middle.

[0355] The host processor 1001 may determine a plurality of candidate frequencies V2 whose noise level is less than or equal to a predetermined threshold noise TH. The threshold noise TH may be a preset value based on a fault of the sensor layer 200. In an example, when calculating a signal-to-noise ratio (SNR) of a particular coordinate signal I-SS, the threshold noise TH may be defined as a noise at 40 dB. In this case, the coordinate signal I-SS may have a value (e.g., an arbitrary voltage or power unit) of about 25.

[0356] The host processor 1001 may select one of the plurality of candidate frequencies V2 as the first frequency F1.

[0357] The host processor 1001 may output the data signal DATA including the first signal LP having the selected first frequency F1 to the driving controller 100C.

[0358] In a conventional electronic device driven by a first signal LP having a first frequency V1 (the first frequency V1 has a noise level greater than a predetermined threshold noise TH), the noise generated by the interference capacitor CC may affect the interpretation of the received signal RS. However, according to the present disclosure, after sweeping the packet frequency of the data signal DATA within the packet frequency range and driving the sensor layer 200 to measure the noise from the received signal RS, the host processor 1001 may select one of a plurality of candidate frequencies V2 having a noise level less than or equal to a predetermined threshold noise TH as the first frequency F1 of the first signal LP. Therefore, the noise of the received signal RS may be removed to a negligible level or reduced to below a predetermined threshold. The sensitivity may be improved by increasing the signal-to-noise ratio. Therefore, an electronic device 1000 having improved sensing reliability may be provided.

[0359] In an example, one of the plurality of candidate frequencies V2 in the first curve GP1 may be 180 kHz. In this case, the signal-to-noise ratio may have a value of 69.2 dB. In the case of driving using any one of the plurality of candidate frequencies V2 whose noise level is lower than the threshold noise TH, since the signal-to-noise ratio (SNR) is 40 dB or more, the SNR may be determined to be normal.

[0360] Fig.13A It is shown that the electronic device 1000 is driven at 180kHz among the multiple candidate frequencies V2, but the frequency of each of the multiple groups PK provided in one frame period FR according to the embodiment of the present disclosure is not limited thereto. For example, the first frequency F1 of the first group may be 180kHz as one of the multiple candidate frequencies V2, the first frequency F1 of the second group may be another of the multiple candidate frequencies V2, and the first frequency F1 of the third group may be yet another of the multiple candidate frequencies V2 (wherein the frequency of any one of the groups is relative to the frequency of the adjacent group).

[0361] In addition, the plurality of packets PK may have different frequencies for the frame period FR. For example, the first frequency F1 of each of the plurality of packets PK of the first frame period may be 180 kHz, which is one of the plurality of candidate frequencies V2, the first frequency F1 of each of the plurality of packets PK of the second frame period may be another of the plurality of candidate frequencies V2, and the first frequency F1 of each of the plurality of packets PK of the third frame period may be yet another of the plurality of candidate frequencies V2.

[0362] When the sensor driver 200C is reset or driving information is changed after booting the host processor 1001 or updating the operating system (OS), the host processor 1001 may re-measure the noise of each packet frequency.

[0363] Fig. 13Bis a graph showing the noise of each packet frequency according to an embodiment of the present disclosure. Fig. 13B In the description, the same reference numerals will be assigned to the reference Fig.13A The same components are described herein and their details will be omitted.

[0364] Reference Figure 2 , Fig.10 , Fig.11A and Fig. 13B , the extracted noise (eg, touch noise) of each group frequency can be represented by a second curve GP2. The second curve GP2 shows the noise at each group frequency when the duty cycle of the first signal LP is 0.25 and the capacitance of the interference capacitor CC is 300fF.

[0365] When a conventional electronic device is driven with a first signal LP having a first frequency V1-1 (the first frequency V1-1 has a noise level greater than a predetermined threshold noise TH among the noise of each packet frequency), the noise caused by the interference capacitor CC affects the analysis of the received signal RS. However, according to the present disclosure, after sweeping the packet frequency of the data signal DATA and driving the sensor layer 200 to extract noise from the received signal RS, the host processor 1001 can select one of a plurality of candidate frequencies V2-1 having a noise having a predetermined threshold noise TH or less from the noise of the packet frequency as the first frequency F1 of the first signal LP. Therefore, the noise of the received signal RS can be removed or reduced. The sensitivity can be improved by increasing the signal-to-noise ratio. Therefore, an electronic device 1000 with improved sensing reliability can be provided.

[0366] One of the plurality of candidate frequencies V2-1 in the second curve GP2 may be 160 kHz. In this case, the signal-to-noise ratio may have a value of 93.9 dB. When the electronic device 1000 is driven using the plurality of candidate frequencies V2-1, since the signal-to-noise ratio (SNR) is 40 dB or more, in this case, the SNR may be determined to be normal.

[0367] Fig. 13C is a graph showing the noise of each packet frequency according to an embodiment of the present disclosure. Fig. 13C In the description, the same reference numerals will be assigned to the reference Fig.13A The same components are described herein and their details will be omitted.

[0368] Reference Figure 2 , Fig.10 , Fig.11A and Fig. 13C, the extracted noise (eg, touch noise) of each grouping frequency can be represented by a third curve GP3. The third curve GP3 shows the noise of each grouping frequency when the duty cycle of the first signal LP is 0.125 and the capacitance of the interference capacitor CC is 300fF.

[0369] When a conventional electronic device is driven with a first signal LP having a first frequency V1-2 (the first frequency V1-2 has a noise level greater than a predetermined threshold noise level TH among the noise of the packet frequency), the noise caused by the interference capacitor CC affects the analysis of the received signal RS. However, according to the present disclosure, after sweeping the packet frequency of the data signal DATA and driving the sensor layer 200 to extract noise from the received signal RS, the host processor 1001 can select one of a plurality of candidate frequencies V2-2 having a noise with a predetermined threshold noise TH or less from among the noise of the packet frequency as the first frequency F1 of the first signal LP. Therefore, the noise of the received signal RS can be removed or reduced. The sensitivity can be improved by increasing the signal-to-noise ratio. Therefore, an electronic device 1000 with improved sensing reliability can be provided.

[0370] In the third graph GP3, one of the plurality of candidate frequencies V2-2 may be 150 kHz. In this case, the signal-to-noise ratio may have a value of 64.2 dB. When the electronic device 1000 is driven using the plurality of candidate frequencies V2-2, the signal-to-noise ratio may be determined to be normal because the signal-to-noise ratio is 40 dB or more.

[0371] Fig.13D is a graph showing the noise of each packet frequency according to an embodiment of the present disclosure. Fig.13D In the description, the same reference numerals will be assigned to the reference Fig.13A The same components are described herein and their details will be omitted.

[0372] Reference Figure 2 , Fig.10 , Fig.11A and Fig.13D , the extracted noise (eg, touch noise) of each packet frequency may be represented in the form of a fourth curve GP4. The fourth curve GP4 shows the noise of each packet frequency when the duty cycle of the first signal LP is 0.5 and the capacitance of the interference capacitor CC is 3000 fF.

[0373] Unlike the present disclosure, when the electronic device 1000 is driven based on the first signal LP having the interference frequency V1-3 (the interference frequency V1-3 has a noise greater than a predetermined threshold noise TH among the noise of each packet frequency), the noise caused by the interference capacitor CC affects the analysis of the received signal RS. However, according to the present disclosure, after sweeping the packet frequency of the data signal DATA and driving the sensor layer 200 to extract the noise from the received signal RS, the host processor 1001 can select one of a plurality of candidate frequencies V2-3 having a noise having a predetermined threshold noise TH or less from among the noise of the packet frequency used for driving as the first frequency F1 of the first signal LP. Therefore, the received signal RS (see Fig.10 ) noise. In addition, the SNR can be increased, thereby improving the sensitivity. Therefore, the electronic device 1000 with improved sensing reliability can be provided.

[0374] One of the plurality of candidate frequencies V2-3 in the fourth graph GP4 may be 180 kHz. In this case, the signal-to-noise ratio may have a value of 49.2 dB. When the electronic device 1000 is driven using the plurality of candidate frequencies V2-3, since the signal-to-noise ratio (SNR) is 40 dB or more, the SNR may be determined to be normal.

[0375] Fig.13E is a graph showing the noise of each packet frequency according to an embodiment of the present disclosure. Fig.13E In the description, the same reference numerals will be assigned to the reference Fig.13A The same components are described herein and their details will be omitted.

[0376] Reference Figure 2 , Fig.10 , Fig.11A and Fig.13E , the extracted noise (eg, touch noise) of each packet frequency can be represented by a fifth curve GP5. The fifth curve GP5 shows the noise of each packet frequency when the duty cycle of the first signal LP is 0.25 and the capacitance of the interference capacitor CC is 3000fF.

[0377] When a conventional electronic device is driven with a first signal LP having interference noise V1-4 (the interference noise V1-4 has a noise level greater than a predetermined threshold noise TH among the noise of the packet frequency), the noise caused by the interference capacitor CC affects the analysis of the received signal RS. However, according to the present disclosure, after sweeping the packet frequency of the data signal DATA and driving the sensor layer 200 to extract noise from the received signal RS, the host processor 1001 can select one of a plurality of candidate frequencies V2-4 having a noise with a predetermined threshold noise TH or less from among the noise of the packet frequency as the first frequency F1 of the first signal LP. Therefore, the noise of the received signal RS can be removed or reduced. The sensitivity can be improved by increasing the signal-to-noise ratio. Therefore, an electronic device 1000 with improved sensing reliability can be provided.

[0378] One of the plurality of candidate frequencies V2-4 in the fifth graph GP5 may be 160 kHz. In this case, the signal-to-noise ratio may have a value of 83.2 dB. When the electronic device 1000 is driven using the plurality of candidate frequencies V2-4, since the signal-to-noise ratio (SNR) is 40 dB or more, the SNR may be determined to be normal.

[0379] Fig.13F is a graph showing the noise of each packet frequency according to an embodiment of the present disclosure. Fig.13F In the description, the same reference numerals will be assigned to the reference Fig.13A The same components are described herein and their details will be omitted.

[0380] Reference Figure 2 , Fig.10 , Fig.11A and Fig.13F , the extracted noise (eg, touch noise) of each packet frequency can be represented by a sixth curve GP6. The sixth curve GP6 shows the noise of each packet frequency when the duty cycle of the first signal LP is 0.125 and the capacitance of the interference capacitor CC is 3000fF.

[0381] When a conventional electronic device is driven with a first signal LP having an interference frequency V1-5 (the interference frequency V1-5 has a noise level greater than a predetermined threshold noise TH among the noise of the packet frequency), the noise caused by the interference capacitor CC affects the analysis of the received signal RS. However, according to the present disclosure, after sweeping the packet frequency of the data signal DATA and driving the sensor layer 200 to extract noise from the received signal RS, the host processor 1001 can select one of a plurality of candidate frequencies V2-5 having a noise having a predetermined threshold noise TH or less from among the noise of the packet frequency as the first frequency F1 of the first signal LP. Therefore, the noise of the received signal RS can be removed or reduced. The sensitivity can be improved by increasing the signal-to-noise ratio. Therefore, an electronic device 1000 with improved sensing reliability can be provided.

[0382] One of the plurality of candidate frequencies V2-5 in the sixth curve GP6 may be 150 kHz. In this case, the signal-to-noise ratio may have a value of 64.2 dB. When the electronic device 1000 is driven using any one of the plurality of candidate frequencies (such as the candidate frequency V2-5) whose noise is lower than the threshold noise TH, the signal-to-noise ratio may be determined to be normal because the signal-to-noise ratio is 40 dB or more.

[0383] As described above, one of the rising time point and the falling time point of the first time period may be within a first transmission time period. Therefore, the rising component and the falling component of the first signal as an interference signal transmitted by the interference capacitor may depend on the first transmission time period as a specific sampling period. The noise caused by the rising component and the falling component may offset each other to be removed within a specific sampling period. In other words, the noise may be reduced or removed. The sensitivity may be improved by increasing the signal-to-noise ratio (SNR). Therefore, an electronic device with improved sensing reliability may be provided.

[0384] In addition, as described above, after sweeping the packet frequency of the data signal and driving the sensor layer to measure the noise from the received signal, the host processor can select one of a plurality of candidate frequencies whose measured noise level is less than or equal to a predetermined threshold as the first frequency of the first signal. Therefore, the noise of the received signal can be removed or reduced. The sensitivity can be improved by increasing the SNR. Therefore, an electronic device with improved reliability can be provided.

[0385] Although the embodiments of the present disclosure have been described for illustrative purposes, it will be understood by those skilled in the art that various modifications and substitutions are possible without departing from the scope and spirit of the inventive concept as disclosed in the appended claims. Therefore, the technical scope of the present disclosure is not limited to the detailed description of this specification, but is defined by the claims.

Claims

1. An electronic device, comprising: a host processor configured to output a first signal having a first frequency and a second signal having a second frequency higher than the first frequency and containing frame data; a drive controller configured to receive the frame data from the host processor and generate image data based on the frame data; a display layer configured to display an image based on the image data; A sensor layer, disposed on the display layer and comprising a plurality of sensing electrodes; as well as a sensor driver configured to provide a transmission signal having a third frequency to the plurality of sensing electrodes, The host processor determines the first frequency based on the third frequency.

2. The electronic device according to claim 1, wherein: The third frequency is an integer multiple of the first frequency.

3. The electronic device according to claim 1, wherein: The sending signal comprises: a first transmission period having a first level; and a second transmission period following the first transmission period and having a second level lower than the first level, and The first signal has a third level during a first period, and has a fourth level lower than the third level during a second period after the first period.

4. The electronic device according to claim 3, wherein: A width of the first transmission period and a width of the second transmission period are both wider than a width of the first period.

5. The electronic device according to claim 4, wherein: The first sending period completely overlaps with the first period.

6. The electronic device according to claim 4, wherein: The second sending period completely overlaps with the first period.

7. The electronic device according to claim 4, wherein: The first frequency is equal to the third frequency.

8. The electronic device according to claim 4, wherein: The first frequency is higher than the third frequency.

9. The electronic device according to claim 3, wherein: A width of the first transmission period and a width of the second transmission period are both narrower than a width of the first period.

10. The electronic device according to claim 9, wherein: A plurality of first sending time periods are set, and The two consecutive first sending time periods and the second sending time period therebetween completely overlap with the first time period.

11. The electronic device according to claim 10, wherein: A rising time point of the first period is within one of the two consecutive first sending periods, and a falling time point of the first period is within the remaining one of the two consecutive first sending periods.

12. The electronic device according to claim 9, wherein: The first frequency is higher than the third frequency.

13. The electronic device according to claim 1, further comprising: a connector to electrically connect the host processor to the display layer; as well as A first communication line is electrically connected between the sensor driver and the connector to transmit driving information of the sensor layer.

14. The electronic device according to claim 1, further comprising: a data driver electrically connected to the display layer; as well as A second communication line is electrically connected between the sensor driver and the data driver to transmit driving information of the sensor layer.

15. The electronic device according to claim 1, further comprising: a display signal line electrically connected to the display layer and the host processor to send or receive the first signal and the second signal; as well as A sensor signal line, electrically connected between the sensor layer and the sensor driver to send or receive the sending signal, Wherein, when viewed in a plan view, the display signal line and the sensor signal line overlap each other.

16. An electronic device, comprising: a host processor configured to output a first signal having a first frequency and a second signal having a second frequency higher than the first frequency and containing frame data; a drive controller configured to receive the frame data from the host processor and generate image data based on the frame data; a display layer configured to display an image based on the image data; A sensor layer, disposed on the display layer and comprising a plurality of sensing electrodes; as well as a sensor driver configured to provide transmission signals to the plurality of sensing electrodes and receive reception signals from the plurality of sensing electrodes, wherein the host processor measures the noise in the received signal by sweeping the packet frequency within the packet frequency range and driving the sensor layer, and The host processor selects one of a plurality of candidate frequencies as the first frequency, and at the plurality of candidate frequencies, the measured noise is equal to or lower than a predetermined threshold.

17. The electronic device according to claim 16, wherein: The host processor comprises: A memory is provided for storing the value of the measured noise at each grouped frequency.

18. The electronic device according to claim 16, wherein: The predetermined threshold value of noise is preset based on an erroneous operation of the sensor layer.

19. The electronic device according to claim 16, wherein: The host processor outputs the first signal having the selected first frequency.

20. The electronic device according to claim 16, wherein: When the sensor driver is reset, the host processor remeasures the noise for each packet frequency.

21. An electronic device, comprising: a host processor configured to output a first signal having a first frequency and a second signal having a second frequency higher than the first frequency and containing frame data; a driving controller configured to receive the frame data from the host processor and generate an image signal based on the frame data; A display layer, used for receiving the image signal; A sensor layer, disposed on the display layer and comprising a plurality of sensing electrodes; as well as a sensor driver configured to provide a transmission signal having a third frequency to the plurality of sensing electrodes and receive a reception signal from the plurality of sensing electrodes, The effective period of the transmitted signal completely overlaps with the effective period of the first signal.

22. The electronic device according to claim 21, wherein: A width of the effective period of the transmission signal is wider than a width of the effective period of the first signal.

23. The electronic device according to claim 21, wherein: The first frequency is equal to or higher than the third frequency.

24. The electronic device according to claim 21, further comprising: a connector to electrically connect the host processor to the display layer; as well as A first communication line is electrically connected between the sensor driver and the connector to transmit driving information of the sensor layer.

25. The electronic device according to claim 21, further comprising: A second communication line is electrically connected between the sensor driver and the drive controller to send drive information of the sensor layer.

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