FLASH data partition management method, computer equipment and product

Abstract

The invention discloses a FLASH data partition management method, computer equipment and a product, and aims to solve the problems of power failure, electromagnetic interference, unbalanced erasing and writing and the like in the existing FLASH storage process, ensure the robustness of FLASH storage and solve the problems of huge size and complicated transplantation of a common FLASH management algorithm in the market. According to the method, the FLASH is logically divided into a plurality of partitions by dynamically adjusting a partition strategy, a corresponding logic partition table is created, the size of the partitions is determined according to the size of data stored each time, each partition comprises a plurality of pages with the same size, and the FLASH can be erased only when all storage areas are fully written. The erasing frequency is far lower than that of a direct operation FLASH, the space utilization rate is far higher than that of the direct operation FLASH, and the service life of the FLASH is prolonged. And meanwhile, a CRC (Cyclic Redundancy Check) check strategy is adopted in the read-write process, so that the robustness of FLASH storage is ensured.

Description

Technical Field

[0001] The present application relates to the technical field of embedded devices, and in particular to a FLASH partition management method. Background Art

[0002] In the actual use of embedded FLASH today, unexpected power outages, electromagnetic interference (EMI), excessive erase frequency, and continuous reading and writing of the same data area may occur, resulting in abnormal FLASH data and shortened life, affecting the normal operation of the machine. In response to the above phenomenon, although there are some FLASH management systems in the current market, they often face problems such as large size, complex migration and lack of specificity. These problems limit the practicality and efficiency of these systems in specific application scenarios. In addition, the complex migration process may increase development time and cost, especially when cross-platform or cross-hardware use is required. The lack of specificity means that these systems may not fully meet the specific needs of specific applications, such as specific data storage formats, security requirements, or performance standards. Summary of the invention

[0003] The present application provides a FLASH data partition management method, computer equipment and product, aiming to solve the problems of power failure, electromagnetic interference, uneven erase and write in the existing FLASH storage process, ensure the robustness of FLASH storage, and solve the problems of large size and complex transplantation of commonly used FLASH management algorithms on the market.

[0004] In a first aspect, a FLASH data partition management method is provided, wherein the data partition includes logically dividing the FLASH into multiple partitions by dynamically adjusting the partition strategy, and creating a corresponding logical partition table to implement a mapping relationship between a physical address and a logical address, wherein the size of the partition is determined according to the amount of data stored each time, and each partition includes multiple pages of the same size, wherein the page is composed of a table header and multiple data areas of the same size, wherein the table header includes a data index and a page status, and the page status is divided into four states: uninitialized, idle, in use, and full and dirty;

[0005] When performing a write operation on FLASH, the partition to be written is determined according to the partition start address in the initialized data partition table, the page state is switched from the idle state to the in-use state, all the table headers of the partition to be written are traversed, the corresponding page is found, the target data is written into the data area of ​​the corresponding page, and the target data is subjected to a CRC check before and after the target data is written. When both CRC checks pass, the data index table is updated; otherwise, if the check fails, the target data is continued to be written into the next data area and a CRC check is performed until the target data is written, and the data index table is updated;

[0006] When performing a read operation on FLASH, the page in use is found according to the page status, the target data is found according to the data index table, the target data is read and the CRC check is performed on the target data again. If the check passes, it means that the target data is transmitted normally. Otherwise, the FLASH read exception error code is returned.

[0007] In the above scheme, further optionally, it includes:

[0008] When all the partitions of the FLASH are fully written, all pages that are fully full and fully dirty are erased.

[0009] In the above scheme, optionally, performing CRC check on the target data before and after writing the target data includes:

[0010] Before the target data is written, a CRC check is performed on the target data to obtain a CRC check code before the target data is written, and the CRC check code before the target data is written and the target data are written together into the data area corresponding to the data index table. After the writing is completed, the CRC check code before the target data is written and the target data are read out from the data area and a CRC check is performed again. When both CRC checks pass, the data index table is updated.

[0011] In the above solution, optionally, the step of continuing to write data into the next data area and performing CRC check further includes:

[0012] If there is no available data area in the current page, switch to the next page and mark the current page as full. Write data in the data area of ​​the next page and perform CRC check until the data writing is completed and the data index table is updated.

[0013] In the above solution, optionally, reading the data and performing CRC check on the data again includes:

[0014] The data written into the data area includes the target data and the CRC check code before the target data is written. The target data and the CRC check code before the target data is written are read, and the target data is CRC checked again. When the CRC check code before the target data is written is consistent, the check passes and the data transmission is normal.

[0015] The above solution may optionally include:

[0016] When FLASH is powered on for the first time, all uninitialized interfaces are initialized, and the page state is changed from the uninitialized state to the idle state.

[0017] The above solution may optionally include:

[0018] When called for the first time, all FLASH registration information and logical partitions are traversed and checked to ensure the accuracy of the FLASH registration information and the legitimacy of the logical partition table. When an abnormality is found, it directly enters the assertion and prompts the user that the operation is out of bounds.

[0019] The above solution may optionally include:

[0020] When FLASH is logically divided into multiple partitions, the size of the partition should be at least larger than the size of the data stored by the user each time. At the same time, the partition cannot be smaller than the minimum erase unit and the partitions cannot overlap; the minimum erase unit is determined by the actual size supported by the FLASH chip.

[0021] In a second aspect, a computer device comprises a memory, a processor and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method described above.

[0022] In a third aspect, a computer program product comprises a computer program / instruction, which implements the steps of the method described above when executed by a processor.

[0023] Compared with the prior art, this application has at least the following beneficial effects:

[0024] This application is based on further analysis and research of existing technical problems, and recognizes the problems of power failure, electromagnetic interference, and uneven erase and write in the existing FLASH storage process. At the same time, the commonly used FLASH management algorithms on the market have large size and complex transplantation. By creating logical partition tables, page table indexes, and page table states, the FLASH is divided multiple times. Compared with the direct operation of FLASH, each time the entire FLASH is erased, this application will only erase the FLASH when all storage areas are full. The erasure frequency is much lower than the direct operation of FLASH, and the space utilization rate is much higher than the direct operation of FLASH, which extends the service life of FLASH.

[0025] Through verification and comparison with the direct read and write operation FLASH algorithm, it is found that the accuracy of data reading and writing of this application is superior to that of direct operation FLASH. Since the algorithm of this application adopts a double CRC check strategy during the reading and writing process, it ensures that there will be no data reading and writing abnormalities due to electromagnetic interference and hardware errors during data transmission.

[0026] In terms of power-off protection, the original FLASH does not protect data when power is off. This algorithm is optimized and upgraded. After the CRC results before and after the verification are consistent, the FLASH will be updated. If there is a sudden power outage, the data index table will not be updated because the data CRC verification fails. The address of the last data storage is still saved. This ensures that data will not be lost when power is off during data reading and writing, ensuring the integrity of reading and writing. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A schematic diagram of FLASH data partitioning provided for an embodiment of the present application;

[0028] Figure 2 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0030] In the description of this application: unless otherwise specified, "plurality" means two or more. "Including", "comprising", "having" and other expressions also mean "not limited to" (certain units, components, materials, steps, etc.).

[0031] This application aims to develop a lightweight embedded FlASH data partition management algorithm to solve the problems of unbalanced erasure and writing of the existing direct reading and writing of the entire FLASH, power-off data loss, and abnormal data storage caused by electromagnetic interference. It is convenient for developers to manage and use the FlASH memory more easily. At the same time, the algorithm has extremely low resource occupancy and clear design. It only provides users with a simple API interface, hides the internal implementation details, conforms to the design concept of high cohesion and low coupling, and provides necessary documentation with sample code for users to understand and use. It supports various MCU chips and external FLASH memories. It only needs to register FLASH, configure the add, delete, modify and check interface, create partitions, initialize partitions and other simple configurations to complete the management of FLASH. The library mainly includes three functions: read and write detection function, power-off protection function, and erase and write balance function.

[0032] In one embodiment, Figure 1As shown, a FLASH data partition management method is provided, wherein the data partition includes logically dividing the FLASH into multiple partitions by dynamically adjusting the partition strategy, and creating a corresponding logical partition table to realize the mapping relationship between the physical address and the logical address. The size of the partition is determined according to the amount of data stored each time. Each partition includes multiple pages of the same size. The page consists of a header and multiple data areas of the same size. The header includes a data index and a page status. The page status is divided into four states: uninitialized, idle, in use, and full and dirty.

[0033] When performing a write operation on FLASH, the partition to be written is determined according to the partition start address in the initialized data partition table, the page state is switched from the idle state to the in-use state, all the table headers of the partition to be written are traversed, the corresponding page is found, the target data is written into the data area of ​​the corresponding page, and the target data is subjected to a CRC check before and after the target data is written. When both CRC checks pass, the data index table is updated; otherwise, if the check fails, the target data is continued to be written into the next data area and a CRC check is performed until the target data is written, and the data index table is updated;

[0034] When performing a read operation on FLASH, the page in use is found according to the page status, the target data is found according to the data index table, the target data is read and the CRC check is performed on the target data again. If the check passes, it means that the target data is transmitted normally. Otherwise, the FLASH read exception error code is returned.

[0035] In this embodiment, each partition may contain 1-n pages. Each page consists of a header (data index + page status) and a data area. The page status is divided into four states: uninitialized, idle, in use, and full and dirty. When FLASH is powered on for the first time, all uninitialized interfaces will be initialized, and the page status will change from uninitialized to idle. When data is written, the page status will switch to in use. When the current page is full, it will switch to full state, and the next page will be marked as in use. The overall logic of data operations is realized through different page states. The data index quickly locates the current position of the data, which is convenient for read and write operations.

[0036] In this embodiment, when performing a write operation on FLASH, the partition address to be written is found according to the starting address of each partition in the data partition table, and then the page numbers of all pages are traversed to find the write position. FLASH specifies the partition size, starting address and number of partitions when initialized.

[0037] In one embodiment, it includes: when all partitions of FLASH are fully written, erasing all pages that are fully full and fully dirty. In this embodiment, fully dirty means that the data of the page is discarded data or data that fails CRC check.

[0038] In one embodiment, it includes: when the FLASH data partition management algorithm is called for the first time, the algorithm will traverse and detect all FLASH registration information and logical partitions to ensure the accuracy of the FLASH registration information and the legitimacy of the logical partition table. When an abnormality is found, it will directly enter the assertion and prompt the user that the operation is out of bounds.

[0039] In one embodiment, performing CRC check on the target data before and after writing the target data includes: before writing the target data, performing CRC check on the target data to obtain a CRC check code before writing the target data, writing the CRC check code before writing the target data and the target data together into a data area corresponding to a data index table, after writing is completed, reading the CRC check code before writing the target data and the target data from the data area and performing CRC check again, and when both CRC checks pass, updating the data index table.

[0040] In one embodiment, continuing to write data to the next data area and performing a CRC check also includes: if the current page has no available data area, switching to the next page and marking the current page as full, writing data in the data area of ​​the next page and performing a CRC check until the data writing is completed and the data index table is updated.

[0041] In the present embodiment, when there is a data write operation, the FLASH data partition management algorithm will first traverse all the headers of the partition, find the page of the corresponding operation and perform the write operation. The algorithm will perform CRC-16 software verification on the data to be written before the write operation, obtain the CRC check code before writing and write it together with the data into the data area corresponding to the index table. After the writing is completed, the data and the CRC check code before writing will be read out from the data area and the CRC check code will be performed again. Only when the current and the latter two checks are passed will the data index table be updated and the data writing is successful. Otherwise, if the verification fails, the data will continue to be written to the next data area. If there is no available data area at present, it will switch to the next page and mark the current page as full. Repeat the above operation until the data writing is completed, and then update the data index table. The double CRC verification mechanism is used to ensure that the data will not fail to write to the FLASH due to power failure, FLASH bad blocks and other operations during the transmission process. The algorithm uses the data area as the read / write unit instead of the original whole FLASH as the read / write unit. When new data is written, if there is still free data area, it will be written directly to FLASH without erasing. Only when all data areas are full will FLASH be erased once. The purpose of improving data writing efficiency is achieved by reducing the erase / write frequency.

[0042] In one embodiment, reading data and performing CRC check on the data again includes: the data written to the data area includes the target data and the CRC check code before the target data is written, reading the target data and the CRC check code before the target data is written, and performing CRC check on the target data again. When the CRC check code is consistent with the CRC check code before the target data is written, the check passes and the data transmission is normal.

[0043] In this embodiment, when there is a data read operation, the FLASH data partition management algorithm will find the page being used according to the page status, and then find the location of the data in the data area according to the data index table, read the data and the CRC check code before the data is written, and perform another CRC check. If the current and rear CRC check values ​​are the same, it means that the data transmission is normal. Otherwise, the user will return the FLASH read abnormality error code.

[0044] The above read-write strategy ensures that the data index table will not be updated immediately when a sudden power failure occurs during data transmission. It will only be updated when the double CRC checks are consistent, avoiding FLASH read-write errors caused by half-transmission of data, thereby achieving the purpose of read-write detection and power-off protection. The FLASH data partition management algorithm establishes a mapping relationship between the logical address and the physical address through the logical partition table and the page table header to quickly locate the data location, thereby improving the reading efficiency.

[0045] Since the number of times FLASH can be erased and written is limited, if a small amount of data is stored, the rest of the space will be completely wasted. The entire sector will be erased again when the current sector is operated next time. If the frequency of erasing and writing required by the user is too frequent, the life of FLASH will be shortened. The algorithm divides FLASH into n partitions, each partition contains n pages of the same size, and each page contains n data areas of the same size. When data is written, the same area of ​​FLASH will not be erased frequently. Only when all partitions are full will an erase operation be performed, and all pages marked as full and dirty will be erased. This method effectively reduces the frequency of erasure and the erase area, thereby achieving the purpose of read-write balance.

[0046] In one embodiment, it includes: when FLASH is logically divided into multiple partitions, the size of the partition should be at least larger than the size of data stored by the user each time, and the partition cannot be smaller than the minimum erase unit, and the partitions cannot overlap; wherein the minimum erase unit is determined by the actual size supported by the FLASH chip.

[0047] In this embodiment, when FLASH is partitioned, the specific partition size needs to be determined by the user according to the amount of data stored each time. If the size of data stored by the user each time is 4K (the size of 1 data area), then the minimum partition size applied for must be greater than 4K. Otherwise, it will be detected by the algorithm error detection mechanism. At the same time, the partitions cannot overlap and be smaller than the minimum erase unit.

[0048] Through the verification and comparison of this FLASH data partition management algorithm and the direct read and write operation FLASH algorithm, it is found that the accuracy of data reading and writing is better than that of direct operation FLASH. Since the algorithm adopts a double CRC check strategy during the reading and writing process, it ensures that there will be no data reading and writing abnormalities due to electromagnetic interference and hardware errors during the data transmission process. Direct operation FLASH erases the entire FLASH each time. This algorithm divides the FLASH multiple times by creating logical partition tables, page table indexes, and page table states. The FLASH will only be erased when all storage areas are full. The erasure frequency is much lower than that of direct operation FLASH, and the space utilization rate is much higher than that of direct operation FLASH, which extends the service life of FLASH. In terms of power-off protection, the original FLASH will not protect data when power is off. This algorithm is optimized and upgraded. After the results of the two CRCs before and after the verification are consistent, the FLASH will be updated. If a sudden power outage occurs, the data index table will not be updated because the data CRC check fails, and the address of the last data storage is still saved. Ensure that data will not be lost during power off during data reading and writing, and ensure the integrity of reading and writing.

[0049] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 2 As shown. The computer device includes a processor, a memory, a communication interface, and a human-computer interaction interface (such as a combination of a display, a keyboard, and a mouse, and a touch screen, etc.) connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities, and the communication interface is used to communicate with an external terminal in a wired or wireless manner. The wireless method can be implemented through WIFI, an operator network, NFC (near field communication) or other technologies. The computer device implements the above-mentioned FLASH data partition management method by loading and running a computer program.

[0050] Those skilled in the art will understand that Figure 2 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0051] In one embodiment, a computer program product is also provided, including a computer program / instruction, which implements the steps of the above-mentioned embodiment method when executed by a processor.

[0052] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A FLASH data partition management method, characterized in that: The data partitioning includes logically dividing the FLASH into multiple partitions by dynamically adjusting the partitioning strategy, and creating a corresponding logical partition table to realize the mapping relationship between the physical address and the logical address. The size of the partition is determined according to the amount of data stored each time. Each partition contains multiple pages of the same size. The page consists of a table header and multiple data areas of the same size. The table header includes a data index and a page status. The page status is divided into four states: uninitialized, idle, in use, and full and dirty. When performing a write operation on FLASH, the partition to be written is determined according to the partition start address in the initialization data partition table, the page state is switched from idle to in use, all the table headers of the partition to be written are traversed, the corresponding page is found, the target data is written to the data area of ​​the corresponding page, and the target data is checked for CRC before and after writing. When both CRC checks pass, the data index table is updated; otherwise, if the check fails, the target data is written to the next data area and the CRC check is performed until the target data is written, and the data index table is updated; When performing a read operation on FLASH, the page in use is found according to the page status, the target data is found according to the data index table, the target data is read and the CRC check is performed on the target data again. If the check passes, it means that the target data is transmitted normally. Otherwise, the FLASH read exception error code is returned.

2. The FLASH data partition management method according to claim 1, characterized in that: include: When all the partitions of the FLASH are fully written, all pages that are fully full and fully dirty are erased.

3. The FLASH data partition management method according to claim 1, characterized in that: The step of performing CRC check on the target data before and after writing the target data comprises: Before the target data is written, a CRC check is performed on the target data to obtain a CRC check code before the target data is written, and the CRC check code before the target data is written and the target data are written together into the data area corresponding to the data index table. After the writing is completed, the CRC check code before the target data is written and the target data are read out from the data area and CRC check is performed again. When both CRC checks pass, the data index table is updated.

4. The FLASH data partition management method according to claim 1, characterized in that: The step of continuing to write data into the next data area and performing CRC check also includes: If there is no available data area in the current page, switch to the next page and mark the current page as full. Write data in the data area of ​​the next page and perform CRC check until the data writing is completed and the data index table is updated.

5. The FLASH data partition management method according to claim 1, characterized in that: The reading of data and performing CRC check on the data again comprises: The data written into the data area includes the target data and the CRC check code before the target data is written. The target data and the CRC check code before the target data is written are read, and the target data is CRC checked again. When the CRC check code before the target data is written is consistent, the check passes and the data transmission is normal.

6. The FLASH data partition management method according to claim 1, characterized in that: include: When FLASH is powered on for the first time, all uninitialized interfaces are initialized, and the page state is changed from the uninitialized state to the idle state.

7. The FLASH data partition management method according to claim 1, characterized in that: include: When called for the first time, all FLASH registration information and logical partitions are traversed and checked to ensure the accuracy of the FLASH registration information and the legitimacy of the logical partition table. When an abnormality is found, it directly enters the assertion and prompts the user that the operation is out of bounds.

8. The FLASH data partition management method according to claim 1, characterized in that: include: When FLASH is logically divided into multiple partitions, the size of the partition should be at least larger than the size of the data stored by the user each time. At the same time, the partition cannot be smaller than the minimum erase unit and the partitions cannot overlap; the minimum erase unit is determined by the actual size supported by the FLASH chip.

9. A computer device comprising a memory, a processor and a computer program stored in the memory, characterized in that: The processor executes the computer program to implement the steps of the method of claim 1.

10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method according to claim 1 are implemented.

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