Calibration method and device of wafer defect automatic detection image, and computer readable storage medium

Abstract

The invention relates to the technical field of image calibration, and provides a wafer defect automatic detection image calibration method, which comprises the following steps of: acquiring an initial image of the peripheral edge of a wafer by adopting an industrial line-scan digital camera; obtaining a grey-scale map of the wafer edge initial image, and calculating an image gradient value through convolution; performing threshold segmentation on the obtained gradient map, and extracting an edge feature region; sequentially carrying out image expansion and image corrosion processing on the edge feature region to obtain a processed edge feature region; calculating the area of the processed edge feature region, and extracting a feature curve; performing linear regression calculation on the characteristic curve to generate a mobile affine transformation matrix; and processing the initial image to obtain a calibration image. According to the invention, image dislocation and offset generated in an image acquisition process in a non-ideal environment can be corrected, the edge morphology of the wafer can be restored, and the image quality can be optimized. The invention further discloses a wafer defect automatic detection image calibration device and a computer readable storage medium.

Description

Technical Field

[0001] The present invention belongs to the technical field of image calibration, and in particular relates to a calibration method and device for automatic wafer defect detection images, and a computer-readable storage medium. Background Art

[0002] At present, with the development of the semiconductor industry, wafer inspection technology faces the challenge of balancing accuracy and speed. As the feature size decreases, the requirements for inspection accuracy are getting higher and higher, but high-precision inspection often means longer inspection time, affecting production efficiency. In order to overcome these challenges, manufacturers continue to develop new inspection technologies and algorithms to improve inspection accuracy and speed. At the same time, the technological trend of wafer inspection equipment is developing towards high, precise, advanced and automated, including the diversification of test varieties, micro-deformation contact technology and non-contact measurement technology. Accurately detecting subtle defects is an important and critical technology in the semiconductor industry. When using non-contact measurement, due to the possible slight jitter of the wafer support stage mechanism, accurately collecting the surface morphology of the wafer is a difficulty that needs to be overcome.

[0003] Early camera shake compensation techniques mainly relied on software algorithms to reduce image blur caused by camera shake. These methods include single image deblurring and multi-image deblurring techniques, which estimate the blur kernel in the image and use these estimates to restore the original image. However, this algorithm is not suitable for the restoration of target objects by line array cameras. With the advancement of technology, many digital cameras have developed optical image stabilization systems that can stabilize the input image by mechanically moving the optical system (lens shift or sensor shift). These image stabilization systems are divided into two categories: lens shift method and sensor shift method. This method optimizes the imaging system through the hardware layer, but it is difficult to accurately restore objects with slight shakes. So a way is needed to correct the shifted image.

[0004] In order to solve the above technical problems, the present invention designs a calibration method and device for automatic wafer defect detection images, and a computer-readable storage medium. Summary of the invention

[0005] The present invention provides a method and device for calibrating an automatic wafer defect detection image, and a computer-readable storage medium, aiming to solve the problem of inter-frame and intra-frame misalignment of images scanned by a linear array camera due to slight jitter of a wafer rotating stage during wafer defect detection.

[0006] To achieve the above object, the present invention provides the following technical solution: a method for calibrating a wafer defect automatic detection image, comprising the following steps: S1, using an industrial line array camera to capture the initial image of the wafer periphery; S2, obtaining the grayscale image of the initial image of the wafer edge and calculating the image gradient value by convolution; S3, performing threshold segmentation on the obtained gradient image to extract edge feature areas; S4, performing image dilation and image erosion processing on the edge feature region in sequence to obtain a processed edge feature region; S5, calculating the area of ​​the processed edge feature region and extracting the feature curve; S6, performing linear regression calculation on the characteristic curve to generate a moving affine transformation matrix; S7, processing the initial image according to the mobile affine transformation matrix to obtain a calibration image.

[0007] Based on the above technical solution, in step S1, the wafer is placed on a wafer stage, the wafer stage rotates horizontally at a uniform speed, a C-shaped ring light source is used for illumination, and an industrial linear array camera is used to capture an initial image of a circle around the outer edge of the wafer.

[0008] Based on the above technical solution, in step S2, the Sobel operator is selected as the convolution template to calculate the gradient of the image in the vertical direction.

[0009] Based on the above technical solution, step S3 includes the following steps: A1, convert the gradient image obtained by calculating the gradient value into an absolute value to obtain a new grayscale image; A2, calculate the average gray value in the new gray image as the segmentation threshold, and extract the area where the image gray value is greater than the average gray value as the edge feature area.

[0010] Based on the above technical solution, step S4 includes the following steps: B1, dilate the edge feature area to increase the connected area and obtain a coherent edge feature curve; B2, performing image erosion processing on the edge feature region after the image dilation processing, reducing the area of ​​the connected region, and obtaining the processed edge feature region.

[0011] Based on the above technical solution, in step S5, the lower left corner of the edge feature area is taken as the coordinate origin, the y direction is from bottom to top, and the x direction is from left to right. The target interval is set in the y direction, and the curve with the largest area in the target interval is selected as the characteristic curve, wherein the center of the edge feature area is located in the area corresponding to the target interval.

[0012] Based on the above technical solution, step S6 includes the following steps: C1, obtaining the pixel position coordinates corresponding to the minimum value of the characteristic curve obtained in step S5 in the y direction; C2, use the least square method to perform linear regression calculation on the characteristic curve to generate a new fitting straight line; C3, generates a moving affine transformation matrix A according to the relationship between the pixel positions corresponding to the characteristic curve and the fitting line. According to the matrix A, the scattered points deviating from the fitting line are mapped to the fitting line. The element size in the matrix A is

[0013] In the above formula, n is the ordinate of the pixel position coordinate (i, j) of the fitting line.

[0014] Based on the above technical solution, in step S7, the initial image is split and represented in the form of column vectors, and the mobile affine transformation matrix A obtained in step S6 is used as a weight matrix to transform the grayscale value of the initial image to obtain the grayscale value matrix of the calibration image. The calculation formula is as follows:

[0015] In the above formula, is the gray value of the coordinate (i, j) in the calibration image, is the weight matrix, is the initial image gray value matrix, and m is the number of pixels in the i-th column.

[0016] In a second aspect, the present invention provides a calibration device for automatic wafer defect detection images, comprising a processor and a memory storing program instructions, wherein the processor is configured to execute a calibration method for automatic wafer defect detection images as described in any one of the above embodiments when running the program instructions.

[0017] In a third aspect, the present invention provides a computer-readable storage medium storing program instructions, which, when executed, are used to enable a computer to execute a method for calibrating an image of automatic wafer defect detection as described in any one of the above embodiments.

[0018] Compared with the related art, the beneficial effects of the present invention are as follows: The present invention can correct the image misalignment and offset generated during the image acquisition process under non-ideal environments such as micro-jitter of the wafer stage, restore the edge morphology of the wafer, optimize the image quality, generate an image that is convenient for observing the accurate morphology of the wafer edge, and provide an excellent original image for subsequent image defect recognition. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only one embodiment of the present invention, and for ordinary technicians in this field, other implementation drawings can be derived from the provided drawings without creative work.

[0020] Figure 1 It is a flow chart of a method for calibrating a wafer defect automatic detection image provided by the present invention; Figure 2 It is an initial image slice diagram for automatic detection of wafer defects provided by the present invention; Figure 3 It is a grayscale image obtained after convolution calculation of a wafer defect automatic detection image provided by the present invention; Figure 4 It is a grayscale image obtained by converting an image of automatic wafer defect detection provided by the present invention into an absolute value; Figure 5 It is a grayscale image after threshold segmentation of a wafer defect automatic detection image provided by the present invention; Figure 6 The present invention provides Figure 5 A partial enlarged view of Figure 7 It is a grayscale image after the wafer defect automatic detection image expansion and corrosion processing provided by the present invention; Figure 8 The present invention provides Figure 7 A partial enlarged view of Fig. 9 It is a grayscale image after extracting a characteristic curve from a wafer defect automatic detection image provided by the present invention; Fig.10 It is a curve diagram of linear regression fitting of a wafer defect automatic detection image provided by the present invention; Fig.11 It is a grayscale image of a calibration image of a wafer defect automatic detection image provided by the present invention; Fig.12 It is a schematic diagram of a calibration image of a wafer defect automatic detection image provided by the present invention; Fig.13 It is a structural schematic diagram of a wafer defect automatic detection image calibration device provided by the present invention. DETAILED DESCRIPTION

[0021] The present invention will be further described below in conjunction with the accompanying drawings and examples: Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0022] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0023] In the description of the present invention, it should be understood that the terms "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0024] Combination Figure 1 As shown, the embodiment of the present disclosure provides a method for calibrating a wafer defect automatic detection image, comprising the following steps: S1, using an industrial linear array camera to capture the initial image of the wafer periphery; S2, obtaining the grayscale image of the initial image of the wafer edge and calculating the image gradient value by convolution; S3, performing threshold segmentation on the obtained gradient image to extract edge feature areas; S4, performing image dilation and image erosion processing on the edge feature region in sequence to obtain a processed edge feature region; S5, calculating the area of ​​the processed edge feature region and extracting the feature curve; S6, performing linear regression calculation on the characteristic curve to generate a moving affine transformation matrix; S7, processing the initial image according to the mobile affine transformation matrix to obtain a calibration image.

[0025] The calibration method for automatic wafer defect detection images provided in the embodiment of the present disclosure can correct image misalignment and offset caused by slight jitter of the wafer stage during image acquisition under non-ideal conditions, restore the wafer edge morphology, optimize image quality, generate an image that is convenient for observing the accurate morphology of the wafer edge, and provide an excellent original image for subsequent image defect recognition.

[0026] Based on the above technical solution, in step S1, a wafer is placed on a wafer stage, the wafer stage rotates horizontally at a constant speed, a C-shaped ring light source is used for illumination, and an industrial linear array camera is used to capture an initial image of a circle around the periphery of the wafer. Figure 2 As shown, the embodiment of the present disclosure takes the initial image slice grayscale image as an example.

[0027] During the acquisition process of the line array camera, the camera is fixed by a fixture, which has 4-axis freedom for adjustment (XYZ-θ), and the wafer stage has 3-axis freedom (XYZ). The acquisition speed of the line array camera is determined by the rotation speed of the wafer stage. The camera is operated by external triggering, and the correct line scan rate is controlled by the encoder.

[0028] In the implementation process of the above calibration method, the Sobel operator is selected as the convolution template in step S2 to calculate the gradient in the vertical direction of the image. The convolution template Sobel operator used is as follows:

[0029] Since the misalignment in the grayscale image of the initial image collected in step S1 occurs in the vertical direction, we need to calculate the gradient value in the vertical direction of the image. The first-order gradient value in the vertical direction is calculated by the Sobel operator.

[0030] In the above formula, x and y are the horizontal and vertical coordinates of the pixel point in the initial image grayscale image, so as to obtain the gradient map in the vertical direction, such as Figure 3 As shown, since the grayscale values ​​of the pixels in the obtained gradient image are negative, the grayscale values ​​of all pixels are increased by 128 to ensure the normal display of the grayscale image.

[0031] In the implementation process of the above calibration method, step S3 includes the following steps: A1, converting the gradient image into an absolute value to obtain a new grayscale image, such as Figure 4 As shown; A2, calculate the average gray value in the new gray image as the segmentation threshold, and extract the area where the image gray value is greater than the average gray value as the edge feature area, such as Figure 5 shown.

[0032] In step A1, the specific calculation formula for absolute value is as follows:

[0033] In the above formula, is the new gray value after the absolute value of the coordinate (x, y) in the gradient image, is the grayscale value of the gradient map coordinate (x, y) in the vertical direction of the image obtained in step S2, and the new grayscale image is obtained after absolute value conversion, such as Figure 4 As shown. Since we only need to care about the size of the grayscale value in the gradient map, the grayscale value range of the pixel points in the vertical gradient map obtained in step S2 is converted from [-128, 127] to an absolute value through the above formula and mapped to the grayscale value range of [0, 128].

[0034] In step A2, the specific calculation formula of the average gray value is as follows:

[0035] In the above formula, m is the number of pixels in the horizontal direction of the grayscale image, and n is the number of pixels in the vertical direction of the grayscale image. The average grayscale value is calculated according to the above formula. For example, the average grayscale value is 18. When the grayscale value of the pixel in the image area is greater than or equal to 18, the grayscale value of the pixel is assigned to 255 and classified as an edge feature area. When the grayscale value of the pixel in the image area is less than 18, the grayscale value of the pixel is assigned to 0 and classified as a non-edge feature area. In this way, the edge feature area in the image area is obtained, such as Figure 5 shown.

[0036] Based on the above technical solution, step S4 includes the following steps: B1, performing image expansion processing on the edge feature area to increase the connected area and obtain a coherent edge feature curve. B2, performing image erosion processing on the edge feature area after image expansion processing to reduce the area of ​​the connected area and obtain a processed edge feature area, such as Figure 7 shown.

[0037] The purpose of dilating and eroding an image is to obtain a continuous and uninterrupted curve in the region, such as Figure 6 Shown Figure 5 A partial enlarged view of Figure 6 It shows that there are multiple discontinuity locations before the expansion and corrosion treatment, such as Figure 8 Shown Figure 7 A partial enlarged view of Figure 8 It shows that after the image is dilated and eroded, the curves in the processed area are continuous and uninterrupted, and the redundant noise generated by the dilation process has been removed.

[0038] The image expansion process is as follows: When the image is expanded, the convolution kernel size is set to 3*21, the proportion of pixels with a gray value of 255 in the convolution kernel is calculated, and the target weight is set. The target weight usually ranges from 0.6 to 1.0. The gray value of pixels exceeding the target weight ratio is assigned to 255 to complete the image expansion process.

[0039] The image corrosion process is as follows: During image corrosion processing, the convolution kernel size is set to 3*3. When there is an area with a pixel grayscale value of 0 in the convolution kernel, the grayscale value of the pixel is assigned to 0 to complete the image corrosion processing.

[0040] By first performing image dilation on the edge feature area, a coherent edge feature curve can be obtained, and then performing image erosion can reduce the area of ​​the connected area, thereby reducing the data increment brought by the dilation operation and improving the accuracy of the data in expressing the features of the initial image.

[0041] In step S5, the lower left corner of the edge feature region is taken as the coordinate origin, the y direction is from bottom to top, and the x direction is from left to right. The target interval is set in the y direction, and the curve with the largest area in the target interval is selected as the feature curve, wherein the center of the edge feature region is located in the corresponding area of ​​the target interval, so as to determine the feature curves in the image except the upper and lower edge curves, such as Fig. 9 As shown, for example, the target interval in the y direction is selected as [200,500]. There are three curves in the edge feature area. The area of ​​the first curve is 5021 pixels, the area of ​​the second curve is 16324 pixels, but it falls outside the target interval. The area of ​​the third curve is 6698 pixels. In comparison, within the range of [200,500], the area of ​​the third curve is the largest. Therefore, the third curve is determined to be the characteristic curve.

[0042] The step S6 comprises the following steps: C1, obtaining the pixel position coordinates corresponding to the minimum value of the characteristic curve obtained in step S5 in the y direction; C2, performing linear regression calculation on the characteristic curve using the least squares method to generate a new fitting straight line, such as Fig.10 As shown; C3, generates a moving affine transformation matrix A according to the relationship between the pixel positions corresponding to the characteristic curve and the fitting line, and maps the scattered points deviating from the fitting line to the fitting line according to the matrix A. The element size in the matrix A is

[0043] In the above formula, n is the ordinate of the pixel position coordinate (i, j) of the fitting line.

[0044] Based on the above technical solution, in step S7, the initial image is split and represented in the form of column vectors, and the mobile affine transformation matrix A obtained in step S6 is used as a weight matrix to transform the grayscale value of the initial image to obtain the grayscale value matrix of the calibration image. The calculation formula is as follows:

[0045] In the above formula, is the gray value of the coordinate (i, j) in the calibration image, is the weight matrix, is the initial image gray value matrix, and m is the number of pixels in the i-th column.

[0046] The grayscale image of the calibration image obtained according to the obtained calibration image grayscale value matrix is ​​as follows Fig.11 As shown, the calibration image is Fig.12 shown.

[0047] Combination Fig.13 As shown, an embodiment of the present disclosure provides a calibration device for automatic detection images of wafer defects, including a processor and a memory storing program instructions. Optionally, the device may also include a communication interface and a bus. Among them, the processor, the communication interface, and the memory can communicate with each other through the bus. The communication interface can be used for information transmission. The processor is configured to execute the calibration method for automatic detection images of wafer defects as described in any of the above embodiments when running the program instructions.

[0048] In addition, the logic instructions in the above-mentioned memory can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product.

[0049] The memory, as a computer-readable storage medium, can be used to store software programs and computer executable programs, such as program instructions / modules corresponding to the method in the embodiments of the present disclosure. The processor executes the function application and data processing by running the program instructions / modules stored in the memory, that is, the calibration method of the wafer defect automatic detection image described in the above embodiment is realized.

[0050] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory may include a high-speed random access memory and may also include a non-volatile memory.

[0051] An embodiment of the present disclosure provides a computer-readable storage medium storing program instructions, which, when executed, are used to enable a computer to execute the method for calibrating an image of automatic wafer defect detection as described in any one of the above embodiments.

[0052] The technical solution of the embodiment of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium and includes one or more instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the embodiment of the present disclosure. The aforementioned storage medium may be a non-transient storage medium, such as: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk, and other media that can store program codes.

[0053] The above description and the accompanying drawings fully illustrate the embodiments of the present disclosure so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent only possible changes. Unless explicitly required, separate components and functions are optional, and the order of operations may vary. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. Moreover, the words used in this application are only used to describe the embodiments and are not used to limit the claims. As used in the description of the embodiments and the claims, unless the context clearly indicates, the singular forms of "a", "an" and "the" are intended to include plural forms as well. Similarly, the term "and / or" as used in this application refers to any and all possible combinations of one or more associated listings. In addition, when used in this application, the term "comprise" and its variants "comprises" and / or comprising refer to the presence of stated features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof. In the absence of further restrictions, the elements defined by the sentence "including one..." do not exclude the presence of other identical elements in the process, method or device including the elements. In this article, each embodiment may focus on the differences from other embodiments, and the same and similar parts between the embodiments may refer to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method part disclosed in the embodiments, then the relevant parts can refer to the description of the method part.

[0054] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software may depend on the specific application and design constraints of the technical solution. The technicians may use different methods for each specific application to implement the described functions, but such implementations should not be considered to exceed the scope of the embodiments of the present disclosure. The technicians may clearly understand that, for the convenience and simplicity of description, the specific working processes of the systems, devices and units described above may refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.

[0055] In the embodiments disclosed herein, the disclosed methods and products (including but not limited to devices, equipment, etc.) can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units can be only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to implement this embodiment. In addition, each functional unit in the embodiment of the present disclosure may be integrated in a processing unit, or each unit may exist physically alone, or two or more units may be integrated in one unit.

[0056] The flowchart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to the embodiment of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. In the description corresponding to the flowchart and the block diagram in the accompanying drawings, the operations or steps corresponding to different boxes can also occur in a different order from the order disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. Each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified functions or actions, or may be implemented by a combination of dedicated hardware and computer instructions.

Claims

1. A method for calibrating a wafer defect automatic detection image, characterized in that: The following steps are involved: S1, using an industrial linear array camera to capture the initial image of the wafer periphery; S2, obtaining the grayscale image of the initial image of the wafer edge and calculating the image gradient value by convolution; S3, performing threshold segmentation on the obtained gradient image to extract edge feature areas; S4, performing image dilation and image erosion processing on the edge feature region in sequence to obtain a processed edge feature region; S5, calculating the area of ​​the processed edge feature region and extracting the feature curve; S6, performing linear regression calculation on the characteristic curve to generate a moving affine transformation matrix; S7, processing the initial image according to the mobile affine transformation matrix to obtain a calibration image.

2. The wafer defect automatic detection image calibration method according to claim 1, characterized in that: In the step S1, a wafer is placed on a wafer stage, the wafer stage is rotated horizontally at a uniform speed, a C-shaped ring light source is used for illumination, and an industrial linear array camera is used to capture an initial image of a circle around the periphery of the wafer.

3. The wafer defect automatic detection image calibration method according to claim 1, characterized in that: In step S2, the Sobel operator is selected as the convolution template to calculate the gradient of the image in the vertical direction.

4. The wafer defect automatic detection image calibration method according to claim 1, characterized in that: The step S3 comprises the following steps: A1, convert the gradient image obtained by calculating the gradient value into an absolute value to obtain a new grayscale image; A2, calculate the average gray value in the new gray image as the segmentation threshold, and extract the area where the image gray value is greater than the average gray value as the edge feature area.

5. The wafer defect automatic detection image calibration method according to claim 1, characterized in that: The step S4 comprises the following steps: B1, dilate the edge feature area to increase the connected area and obtain a coherent edge feature curve; B2, performing image erosion processing on the edge feature region after the image dilation processing, reducing the area of ​​the connected region, and obtaining the processed edge feature region.

6. The wafer defect automatic detection image calibration method according to claim 1, characterized in that: In step S5, the lower left corner of the edge feature area is taken as the coordinate origin, the y direction is from bottom to top, and the x direction is from left to right. The target interval is set in the y direction, and the curve with the largest area in the target interval is selected as the feature curve, wherein the center of the edge feature area is located in the area corresponding to the target interval.

7. The wafer defect automatic detection image calibration method according to claim 6, characterized in that: The step S6 comprises the following steps: C1, obtaining the pixel position coordinates corresponding to the minimum value of the characteristic curve obtained in step S5 in the y direction; C2, use the least square method to perform linear regression calculation on the characteristic curve to generate a new fitting straight line; C3, generates a moving affine transformation matrix A according to the relationship between the pixel positions corresponding to the characteristic curve and the fitting line. According to the matrix A, the scattered points deviating from the fitting line are mapped to the fitting line. The element size in the matrix A is In the above formula, n is the ordinate of the pixel position coordinate (i, j) of the fitting line.

8. The wafer defect automatic detection image calibration method according to claim 7, characterized in that: In step S7, the initial image is split and represented in the form of column vectors, and the mobile affine transformation matrix A obtained in step S6 is used as a weight matrix to transform the grayscale value of the initial image to obtain a grayscale value matrix of the calibration image. The calculation formula is as follows: In the above formula, is the gray value of the coordinate (i, j) in the calibration image, is the weight matrix, is the initial image gray value matrix, and m is the number of pixels in the i-th column.

9. A wafer defect automatic detection image calibration device, comprising a processor and a memory storing program instructions, characterized in that: The processor is configured to execute the wafer defect automatic detection image calibration method according to any one of claims 1 to 8 when running the program instructions.

10. A computer-readable storage medium storing program instructions, characterized in that: When the program instructions are executed, the computer is used to execute the calibration method for automatic wafer defect detection images as described in any one of claims 1 to 8.

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