Data processing method, system and device, electronic equipment and storage medium

Abstract

The invention discloses a data processing method, system and device, electronic equipment and a storage medium. The data processing method comprises the steps that in response to a received first write-in request for a first address of first storage corresponding to first slave equipment, the first write-in request is sent to the first slave equipment, and the first write-in request carries first data corresponding to the first address; in response to a second write-in request for a second address of a second storage corresponding to a second slave device received after the first write-in request is received, the second write-in request is sent to the second slave device, and the second write-in request carries second data corresponding to the second address; and in response to receiving the first target completion information from the first slave device and receiving the second target completion information from the second slave device, sending second source completion information to the second slave device so that the second slave device writes the second data into the second storage. According to the data processing method, the write request bandwidth can be improved while the write sequence is ensured.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to a data processing method, system and device, electronic device and storage medium. Background Art

[0002] With the advent of the era of big data and artificial intelligence, the demand for high-performance and high-computing chips is increasing, and storage performance in the system has become a crucial link. This is especially true in systems that use chips or other complex interconnect structures. When the number of caches is large enough and the network scale is large enough, the efficiency of data transmission becomes particularly important because it directly affects the system's power consumption, latency, and bus bandwidth utilization. Summary of the invention

[0003] At least one embodiment of the present disclosure provides a data processing method, comprising: in response to receiving a first write request for a first address of a first storage corresponding to a first slave device, sending the first write request to the first slave device, the first write request carrying first data corresponding to the first address; in response to receiving a second write request for a second address of a second storage corresponding to a second slave device after receiving the first write request, sending a second write request to the second slave device, the second write request carrying second data corresponding to the second address; and in response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device, sending second source completion information to the second slave device so that the second slave device writes the second data to the second storage, the first target completion information indicating that the first slave device has added the first write request to a first task queue to be processed, and the second target completion information indicating that the second slave device has added the second write request to a second task queue to be processed.

[0004] For example, in the data processing method provided by at least one embodiment of the present disclosure, after sending a second write request to the second slave device, the second slave device sends a first probe request to the second master device, so that the second master device returns first probe response information carrying dirty data corresponding to the second address to the second slave device.

[0005] For example, in the data processing method provided by at least one embodiment of the present disclosure, in response to receiving first target completion information from a first slave device and receiving second target completion information from a second slave device, sending second source completion information to the second slave device so that the second slave device writes second data to a second storage, including: in response to receiving second target completion information carrying a first flag, sending second source completion information carrying the second data to the second slave device, the second target completion information carrying the first flag being issued by the second slave device in response to the first probe response information.

[0006] For example, in the data processing method provided by at least one embodiment of the present disclosure, in response to not receiving the first target completion information within a first predetermined time period after receiving the third target completion information in response to the first probe response information, a first cancellation information is sent to the second slave device to delete the second write request from the second task queue, and the third target completion information indicates that the second slave device has added the second write request to the second task queue to be processed and needs to resend the second data to the second slave device.

[0007] For example, in the data processing method provided by at least one embodiment of the present disclosure, after sending the first cancellation information to the second slave device, the second slave device writes the dirty data back to the second storage.

[0008] For example, in the data processing method provided by at least one embodiment of the present disclosure, after sending a first cancellation message to the second slave device, a second write request carrying second data is resent to the second slave device so that the second slave device re-adds the second write request to the second task queue.

[0009] At least one embodiment of the present disclosure also provides a data processing method, including: in response to receiving a first write request for a first address of a first storage from a first master device, sending a first probe request to a second master device, the first write request carrying first data corresponding to the first address; in response to receiving a first probe response message carrying dirty data corresponding to the first address from the second master device, sending first target completion message carrying a first flag to the first master device so that the first master device returns the first data; and in response to receiving a first source completion message from the first master device, writing the first data to the first storage, the first source completion message being sent by the first master device after receiving the first target completion message.

[0010] For example, in a data processing method provided by at least one embodiment of the present disclosure, in response to receiving first probe response information carrying dirty data from a second master device, the dirty data replaces the first data.

[0011] For example, in the data processing method provided by at least one embodiment of the present disclosure, in response to receiving a first cancel message from a first master device, the first write request is deleted from a task queue to be processed.

[0012] For example, in a data processing method provided by at least one embodiment of the present disclosure, in response to receiving first cancel information from a first master device, dirty data is written back to a first storage.

[0013] For example, in a data processing method provided by at least one embodiment of the present disclosure, in response to receiving a retransmitted first write request carrying first data from a first master device, the first write request is added to a task queue to be processed.

[0014] For example, in the data processing method provided by at least one embodiment of the present disclosure, after the resent first write request is added to the task queue to be processed, first target completion information is sent to the first master device, the first target completion information indicates that the first write request has been re-added to the task queue to be processed, and in response to receiving the first source completion information from the first master device, the first data is written to the first storage, including: in response to receiving the first source completion information in response to the first target completion information from the first master device, the first data is written to the first storage.

[0015] At least one embodiment of the present disclosure also provides a data processing system, including: multiple slave devices, including a first slave device and a second slave device; an object master device, configured to: in response to receiving a first write request for a first address of a first storage corresponding to the first slave device, send the first write request to the first slave device, the first write request carrying first data corresponding to the first address; in response to receiving a second write request for a second address of a second storage corresponding to the second slave device after receiving the first write request, send the second write request to the second slave device, the second write request carrying second data corresponding to the second address; and in response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device, send second source completion information to the second slave device so that the second slave device writes the second data to the second storage, the first target completion information indicating that the first slave device has added the first write request to the first task queue to be processed, and the second target completion information indicating that the second slave device has added the second write request to the second task queue to be processed.

[0016] At least one embodiment of the present disclosure also provides a data processing system, including: multiple master devices, including a first master device and a second master device; an object slave device, configured to: in response to receiving a first write request for a first address of a first storage from the first master device, send a first probe request to the second master device, the first write request carrying first data corresponding to the first address; in response to receiving a first probe response message carrying dirty data corresponding to the first address from the second master device, send first target completion message carrying a first flag to the first master device so that the first master device returns the first data; and in response to receiving a first source completion message from the first master device, write the first data to the first storage, the first source completion message being issued by the first master device after receiving the first target completion message.

[0017] At least one embodiment of the present disclosure also provides a data processing device, including: a first response module, configured to send a first write request to the first slave device in response to receiving a first write request for a first address of a first storage corresponding to a first slave device, the first write request carrying first data corresponding to the first address; a second response module, configured to send a second write request to the second slave device in response to receiving a second write request for a second address of a second storage corresponding to a second slave device after receiving the first write request, the second write request carrying second data corresponding to the second address; and a third response module, configured to send second source completion information to the second slave device in response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device so that the second slave device writes the second data into the second storage, the first target completion information indicating that the first slave device has added the first write request to the first task queue to be processed, and the second target completion information indicating that the second slave device has added the second write request to the second task queue to be processed.

[0018] At least one embodiment of the present disclosure also provides a data processing device, including: a first response processing module, configured to send a first probe request to a second master device in response to receiving a first write request for a first address of a first storage from a first master device, the first write request carrying first data corresponding to the first address; a second response processing module, configured to send first target completion information carrying a first flag to the first master device in response to receiving a first probe response information carrying dirty data corresponding to the first address from the second master device so that the first master device returns the first data; and a third response processing module, configured to write the first data to the first storage in response to receiving a first source completion information from the first master device, the first source completion information being issued by the first master device after receiving the first target completion information.

[0019] At least one embodiment of the present disclosure further provides a data processing device, comprising: at least one memory storing computer-executable instructions; and at least one processor configured to execute the computer-executable instructions, wherein when the computer-executable instructions are executed by the at least one processor, the data processing method described in any of the above embodiments is implemented.

[0020] At least one embodiment of the present disclosure further provides an electronic device, comprising the data processing device as described in any of the above embodiments.

[0021] At least one embodiment of the present disclosure further provides a non-transitory storage medium that non-transitorily stores computer-executable instructions, wherein when the computer-executable instructions are executed by a processor, the data processing method described in any of the above embodiments is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0023] Figure 1 A schematic diagram of a topology of an on-chip network is shown;

[0024] Figure 2 A schematic diagram of a write request sequence preservation process is shown;

[0025] Figure 3A A schematic diagram of a write request sequence preservation process is shown;

[0026] Figure 3B A schematic diagram of a retransmission order-preserving process of a write request is shown;

[0027] Figure 4 A schematic flow chart of a data processing method of a first master device provided by at least one embodiment of the present disclosure is shown;

[0028] Figure 5 A topological diagram of a network on chip provided by at least one embodiment of the present disclosure is shown;

[0029] Fig. 6A A schematic diagram of an order-preserving process of a write request provided by at least one embodiment of the present disclosure is shown;

[0030] Figure 6B A schematic diagram of an order-preserving process for resending a write request provided by at least one embodiment of the present disclosure is shown;

[0031] Fig. 7A A flowchart of writing dirty data copies provided by at least one embodiment of the present disclosure is shown;

[0032] Figure 7B A resending write flow chart involving a dirty data copy provided by at least one embodiment of the present disclosure is shown;

[0033] Figure 7C A writing flow chart involving a clean copy provided by at least one embodiment of the present disclosure is shown;

[0034] Fig.7D A resending write flow chart involving a clean copy provided by at least one embodiment of the present disclosure is shown;

[0035] Figure 8 A schematic flow chart of a data processing method of a slave device provided by at least one embodiment of the present disclosure is shown;

[0036] Fig. 9A schematic block diagram of a data processing device of a first master device provided by at least one embodiment of the present disclosure is shown;

[0037] Fig.10 A schematic block diagram of a data processing apparatus of a slave device provided by at least one embodiment of the present disclosure is shown;

[0038] Fig.11 A schematic block diagram of a data processing device provided by at least one embodiment of the present disclosure is shown;

[0039] Fig.12 A schematic diagram showing an electronic device provided by at least one embodiment of the present disclosure; and

[0040] Fig.13 A schematic diagram of a non-transitory storage medium provided by at least one embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0041] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0042] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0043] The present disclosure is described below through several specific embodiments. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits the detailed description of known functions and known components. When any component of the embodiments of the present disclosure appears in more than one figure, the component is represented by the same or similar reference numeral in each figure.

[0044] The terms used in this disclosure are those general terms currently widely used in the art in consideration of the functions of the technical features in the embodiments of the present disclosure, but these terms may vary according to the intentions of those skilled in the art, precedents, or new technologies in the art. In addition, specific terms may be selected by the applicant, and in this case, their detailed meanings will be described in the detailed description of the present disclosure. Therefore, the terms used in the specification should not be understood as simple names, but rather as an overall description based on the meaning of the terms and the present disclosure.

[0045] Flowcharts are used in this disclosure to illustrate the operations performed by the system according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed precisely in order. On the contrary, various steps may be processed in reverse order or simultaneously as required. At the same time, other operations may also be added to these processes, or one or more operations may be removed from these processes.

[0046] In computer architecture, especially in the efficient collaboration scenario of multi-core processors and high-speed I / O interfaces (such as those under the PCIe standard), maintaining the writing and reading order of write requests through an order-preserving process is a key way to ensure data consistency and enable read requests to read the latest written data.

[0047] Figure 1 A topological diagram of an on-chip network is shown.

[0048] Network on Chip (NOC) is a communication architecture for on-chip integrated circuits, specifically used to connect various functional modules and processor cores inside the chip to achieve internal chip communication. NOC includes communication channels, routing nodes, and switches, etc., which are used to transmit data and control signals inside the chip. The main purpose of NOC is to provide a high-bandwidth, low-latency and reliable communication mechanism to support the communication needs between various functional modules in multi-core processors and large-scale integrated circuits.

[0049] like Figure 1As shown, the topology of the on-chip network includes an interconnection network, multiple request terminals 00-nn, multiple master devices 00-nn, multiple slave devices 00, 01-nn, and multiple memories 00, 01-nn, etc. For example, the multiple memories 00-nn can be double data rate synchronous dynamic random access memory (Double Data Rate Synchronous Dynamic Random Access Memory, DDR SDRAM) (hereinafter also referred to as DDR 00-nn).

[0050] The Internet is a public communication trunk for information transmission. For example, the Internet can be a transmission line bundle including electronic components such as wires. The Internet is coupled to multiple master devices 00-nn and also coupled to multiple slave devices 00-nn. Multiple request terminals 00-nn are coupled to multiple master devices 00-nn, and multiple memories 00-nn are coupled to multiple slave devices 00-nn.

[0051] The multiple request ends 00-nn may be caches, or may be, for example, processors (processor cores), various controllers (such as DMA controllers, etc.), or input / output interfaces (IOs), etc., which are any devices capable of issuing requests.

[0052] The multiple master devices 00-nn may be agent devices that send requests to the multiple request terminals 00-nn, for example, they may be agent devices (I / O Agents) of input / output interfaces. The multiple master devices 00-nn perform agent processing on the requests sent by the multiple request terminals 00-nn.

[0053] Multiple slave devices 00~nn can be proxy devices used to process specific functions, for example, multiple slave devices 00~nn are coupled to multiple memories 00~nn, and multiple slave devices 00~nn can be proxy devices used to process data exchanges of multiple memories 00~nn, for example, multiple slave devices 00~nn process read and write requests for multiple memories 00~nn.

[0054] Figure 2 A schematic diagram of an operation flow of a write request is shown.

[0055] like Figure 2 As shown, the master device 10 may correspond to Figure 1 The request end 10 can be any one of the multiple master devices 00~nn. Figure 1 The multiple request terminals 00~nn correspond to one of the master devices 10, and the slave device 00 can correspond to Figure 1 Any one of the multiple slave devices 00~nn, slave device 01 can correspond to a slave device other than slave device 00. Figure 1 Any one of multiple slave devices 00~nn.

[0056] In the case where the request end 10 issues multiple write requests, for example, the request end 10 issues two write requests to the master device 10 in sequence, the master device 10 will first transmit the write request issued first (also called the "old request") to the corresponding slave device. Although the master device 10 receives the write request issued later (also called the "new request"), it cannot immediately issue the new request unless the old request is globally visible (that is, the master device 10 has received the completion information of the old request).

[0057] For example, the old request is the first write request WriteA1+WD, and the new request is the second write request WriteA2+WD. The first write request WriteA1+WD is first sent to the corresponding slave device 01, wherein the first write request WriteA1+WD carries the write data. After the slave device 01 completes the write operation corresponding to the first write request WriteA1+WD, the slave device 01 sends the first target completion information TgtDoneA1 to inform the master device 10.

[0058] After receiving the first target completion information TgtDoneA1 , the master device 10 sends a first confirmation completion signal SrcDnA1 to the slave device 01 and sends a first response signal Rsp( A1 ) to the request end 10 .

[0059] When the master device 10 receives the first target completion information TgtDoneA1 of the first write request from the slave device 01 (that is, the old request becomes globally visible), the master device 10 will send the second write request WriteA2+WD to the corresponding slave device 00. After the slave device 00 completes the write operation corresponding to the second write request WriteA2+WD, the slave device 00 will send the second target completion information TgtDoneA2 to inform the master device 10.

[0060] After receiving the second target completion information TgtDoneA2 , the master device 10 sends a second confirmation completion signal SrcDnA2 to the slave device 00 and sends a second response signal Rsp(A2) to the request end 10 .

[0061] The first confirmation completion information SrcDnA1 / the second confirmation completion information SrcDn2 are used to inform the corresponding slave device 01 and the slave device 00 that the resources occupied by the corresponding first write request and the second write request can be released.

[0062] Although the above method ensures the writing order when receiving multiple consecutive write requests through the master device, the above method makes the write operation processing of the multiple write requests have high delay and low efficiency, and the bandwidth for processing the multiple write requests is insufficient.

[0063] Figure 3A A schematic diagram of an operation flow of a write request is shown; Figure 3B A schematic diagram of an operation flow of resending a write request is shown.

[0064] like Figure 3A As shown, the main device 20 may correspond to Figure 1 The request end 20 can be any one of the multiple master devices 00~nn. Figure 1 The multiple request terminals 00 to nn correspond to one of the master device 20, and the slave device 10 can correspond to Figure 1 Any one of the multiple slave devices 00~nn, slave device 11 can correspond to a slave device other than slave device 00. Figure 1 Any one of multiple slave devices 00~nn.

[0065] In the case where the receiving request end 20 sends multiple write requests, for example, the request end 20 sends two write requests to the master device 20 in sequence, the master device 20 will format the write request sent first (also called the "old request") and the write request sent later (also called the "new request") so that both write requests do not carry write data, and then send the processed old request and the processed new request to the corresponding slave device 11 and slave device 10.

[0066] For example, the old request is the first write request WriteA1+WD, and the new request is the second write request WriteA2+WD. The master device 20 will format the first write request WriteA1+WD and the second write request WriteA2+WD. After that, the master device 20 can continuously send the first processing write request WriteA1(+ND) (also called "processed old request") to the slave device 11 and send the second processing write request WriteA2(+ND) (also called "processed new request") to the slave device 10. Neither the first processing write request nor the second processing write request carries write data.

[0067] The slave device 11 and the slave device 10 can process and respond to the first processing write request WriteA1 (+ND) and the second processing write request WriteA2 (+ND) in parallel, and the processing speed of the second processing write request WriteA2 (+ND) can be faster than the processing speed of the first processing write request WriteA1 (+ND). For example, after the second processing write request WriteA2 (+ND) is processed, the second target completion information TgtDoneA2 can be sent to the master device 20 first.

[0068] When the master device 20 receives the second target completion information TgtDoneA2 but does not receive the first target completion information TgtDoneA1, the master device 20 does not respond to the second target completion information TgtDoneA2. When the master device 20 receives the first target completion information TgtDoneA1, it means that the processed old request has completed processing. At this time, the master device 20 will first send a confirmation completion signal carrying the old request data (i.e., the first source completion information SrcDnA1+WD) to the slave device 11 corresponding to the old request, and then send a confirmation completion signal carrying the new request data (i.e., the second source completion information SrcDnA2+WD) to the slave device 10 corresponding to the new request, and inform the corresponding slave device 11 and slave device 10 to release the resources occupied by the write request through the above-mentioned first source completion information and second source completion information, so as to ensure the writing order that the old request completes writing first and the new request completes writing later.

[0069] After the master device 20 sends the first source completion information SrcDnA1+WD, it sends the first response signal Rsp(A1) to the request end 10; after the master device 20 sends the second source completion information SrcDnA2+WD, it sends the second response signal Rsp(A2) to the request end 10.

[0070] In order to improve the processing bandwidth for write requests, the above method does not control the order in which old requests and new requests are sent to the corresponding slave devices. Therefore, when the processing speed of the new request is too fast, it cannot wait for the target completion information of the old request to be processed, resulting in the occupancy state of the slave device being maintained but data cannot be written, causing the write process of multiple write requests to deadlock.

[0071] like Figure 3B As shown, a waiting time can be set after the second target completion information TgtDoneA2 to wait for the first target completion information TgtDoneA1. For example, a timer Timer00 can be set. If the first target completion information TgtDoneA1 is not received within the waiting time, a first cancellation message SrcDn (cancel=1) is sent to the slave device 10 to cancel the operation performed by the slave device 10 in response to the second processing write request WriteA2 (+ND), and the master device 20 resends the second processing write request WriteA2 (+ND) to the slave device 10. In this way, the master device 20 receives the first target completion information TgtDoneA1 (the target completion information of the old request) before the waiting time of the second target completion information TgtDoneA2 expires. The above operation cancels the write request (for example, a new request) so that Figure 3A The deadlock of the write process shown is broken.

[0072] In the above method, the master device is required to perform format conversion processing on the write request to filter out the write data, that is, the write data is not carried in the request stage; after receiving the target completion information of the processed old request, the write data is sent along with the corresponding source completion information, that is, the write data is sent along with the signal that causes the slave device that performs the write operation to release resources. Although this method improves the bandwidth for writing request processing to a certain extent, it will also cause an impact on the writing process. For example, according to the situation that the write request stage does not carry the write data, the master device and the slave device of the original process are additionally modified and set, which will cause an impact on the writing process.

[0073] To this end, at least one embodiment of the present disclosure provides a data processing method, including: in response to receiving a first write request for a first address of a first storage corresponding to a first slave device, sending the first write request to the first slave device, the first write request carrying first data corresponding to the first address; in response to receiving a second write request for a second address of a second storage corresponding to a second slave device after receiving the first write request, sending a second write request to the second slave device, the second write request carrying second data corresponding to the second address; and in response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device, sending second source completion information to the second slave device so that the second slave device writes the second data to the second storage, the first target completion information indicating that the first slave device has added the first write request to a first task queue to be processed, and the second target completion information indicating that the second slave device has added the second write request to a second task queue to be processed.

[0074] In the data processing method of the above embodiment of the present disclosure, the master device sends the received first write request and the second write request to the corresponding slave device without limiting the order, thereby improving the processing bandwidth of the write request, and further ensures the globally visible order of the first write request before the second write request by first sending the first source completion information to the first slave device and then sending the second source completion information to the second slave device after receiving the first target completion information and the second target completion information. This method can improve the processing bandwidth of the write request on the basis of maintaining the write order of the write request, and will not cause an impact on the write process.

[0075] Various embodiments of the present disclosure will be described below with reference to specific examples.

[0076] Figure 4 A topological diagram of a network on chip provided by at least one embodiment of the present disclosure is shown.

[0077] like Figure 4As shown, the topology of the on-chip network includes an interconnection network, multiple request terminals 0-n, multiple first master devices 0-n, multiple second master devices 0-n, multiple processors 0-n, multiple slave devices 0-n, and multiple storage devices 0-n. The multiple storage devices 0-n can be storage devices of the main memory, which is also referred to as memory. For example, the storage device can be a random access memory, such as a dynamic random access memory (DRAM), such as a double data rate synchronous dynamic random access memory (Double Data Rate Synchronous Dynamic Random Access Memory, DDR SDRAM) (referred to as DDR), for example, the multiple storage devices 0-n can be DDR 0-n.

[0078] The interconnection network is coupled to a plurality of first master devices 0-n, and the interconnection network is also coupled to a plurality of second master devices 0-n and is also coupled to a plurality of slave devices 0-n. A plurality of request terminals 0-n are coupled to a plurality of first master devices 0-n, a plurality of processors 0-n are coupled to a plurality of second master devices 0-n, a plurality of storage devices 0-n are coupled to a plurality of slave devices 0-n, for example, a plurality of DDRs 0-n are coupled to a plurality of slave devices 0-n.

[0079] The multiple request ends 0-n may be various internal controllers (eg, DMA controllers, etc.) or any device that can issue a request through an input / output interface (IO), such as a keyboard, a mouse, etc.

[0080] The multiple first master devices 0-n may be agent devices (Agent) that send requests to the multiple request terminals 0-n, for example, they may be devices that access the data bus via PCIe (referred to as "PCIe devices"), for example, they may be agent devices (I / O Agents) of input / output interfaces (I / O). The multiple master devices 0-n perform agent processing on the requests sent by the multiple request terminals 0-n.

[0081] The plurality of processing cores 0-n may be processing cores of any computing processing device such as a central processing unit or a graphics processing unit. The embodiments of the present disclosure have no limitation on the specification, type, micro-architecture or instruction set executed by the processing core.

[0082] The plurality of second master devices 0-n may be agent devices (Agent) for processing requests to the plurality of processors 0-n, for example, may be agent devices (Core Agent) of processing cores (Core).

[0083] For example, when a second master device needs to use data, the master device will first search from its corresponding cache (i.e., dedicated to the master device or shared with other master devices). If the required data is not found in its corresponding cache, it will go to, for example, the memory, the private cache of other master devices (for example, a cache with data forwarding status F), etc. to obtain the required data. This access process needs to be carried out according to relevant communication protocols when using the Internet.

[0084] The multiple slave devices 0-n may be caches, for example, first-level caches, second-level caches, or higher-level caches (such as last-level caches (LLC)), which can improve the response speed and efficiency of the multiple memories 0-n. The multiple slave devices 0-n may also be any device for maintaining cache coherency. The multiple slave devices 0-n may also be proxy devices for processing data exchange between the multiple storage devices 0-n, for example, the multiple slave devices 0-n proxy processing of read and write requests to the multiple memories 0-n.

[0085] Figure 5 A flow chart of a data processing method for a first master device provided by at least one embodiment of the present disclosure is shown.

[0086] like Figure 5 As shown, in some embodiments of the present disclosure, the data processing method includes steps S30-S32, and the method is applied to the first master device.

[0087] Step S30, in response to receiving a first write request for a first address of a first storage corresponding to the first slave device, sending the first write request to the first slave device, the first write request carrying first data corresponding to the first address.

[0088] Step S31, in response to receiving a second write request for a second address of a second storage corresponding to a second slave device after receiving the first write request, sending the second write request to the second slave device, the second write request carrying second data corresponding to the second address.

[0089] Step S32, in response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device, sending second source completion information to the second slave device so that the second slave device writes the second data to the second storage, the first target completion information indicating that the first slave device has added the first write request to the first task queue to be processed, and the second target completion information indicating that the second slave device has added the second write request to the second task queue to be processed.

[0090] The following is based on Fig. 6A The example of steps S30-S32 of the above data processing method is described in detail.

[0091] Fig. 6A A schematic diagram of an order-preserving process of a write request provided by at least one embodiment of the present disclosure is shown.

[0092] like Fig. 6A As shown, request end 0 can correspond to Figure 4 In any one of the multiple request terminals 0 to n, the first master device 2 can correspond to Figure 4 One of the multiple first master devices 0 to n corresponds to the request end 0, and the second master device 2 can correspond to Figure 4 Any one of the multiple second master devices 0 to n in the master, slave device 0 can correspond to Figure 4 Slave device 1 can correspond to any of the multiple slave devices 0 to n except slave device 0. Figure 4 Any one of the multiple slave devices 0~n is different from slave device 0.

[0093] For step S30, the first master device 2 sends a first write request Write_D+WD to the first slave device in response to receiving a first write request Write_D+WD for a first storage first address in a first slave device (e.g., slave device 0), and the first write request Write_D+WD carries first data corresponding to the first address.

[0094] For step S31, the first master device 2 receives a second write request Write_F+WD for a second address of a second storage in a second slave device (e.g., slave device 1) after receiving the first write request Write_D+WD, and sends the second write request Write_F+WD to the second slave device, where the second write request Write_F+WD carries second data corresponding to the second address.

[0095] The first write request and the second write request are write requests pointing to different addresses of two different storages, and carry write data corresponding to different addresses. For example, the first write request carries the first data corresponding to the first address, and the second write request carries the second data corresponding to the second address. The first write request and the second write request can be write requests of the same type but pointing to different addresses, or can be write requests of different types and pointing to different addresses. For example, the first write request Write_D+WD is a data write request, and the second write request Write_F+WD is a status write request. For example, the second write request Write_F+WD can be used as a status write request to record the write status of the first write request Write_D+WD.

[0096] The first slave device and the second slave device are different slave devices, for example, the first slave device is slave device 0, and the second slave device is slave device 1. The first slave device and the second slave device may be different caches, for example, the first storage may be a memory corresponding to the first slave device (cache); for example, the second storage may be a memory corresponding to the second slave device (cache).

[0097] For example, the request end 0 may issue multiple write requests to the first master device 2, and the multiple write requests are consecutive write requests in a certain order. For example, the request end 0 first issues a write request (also called an "old write request"), and then issues another write request (also called a "new write request") after the old write request. For example, the old write request is the first write request Write_D+WD, and the new write request is the second write request Write_F+WD. The first master device 2, in response to the old write request received from the request end 0, sends the old write request to the corresponding first slave device, and in response to the new write request received after the old write request is received from the request end 0, sends the new write request to the second slave device. For example, a first write request Write_D+WD is sent to slave device 0, and a second write request Write_F+WD received thereafter is sent to slave device 1, wherein the first write request Write_D+WD carries address information (e.g., "first address") of a storage (e.g., "first storage") in slave device 0, and the second write request Write_F+WD carries address information (e.g., "second address") of a storage (e.g., "second storage") in slave device 1. The first address and the second address are, for example, physical addresses.

[0098] It should be noted that the first write request may be a write request issued earlier than the second write request among multiple write requests, and the second write request may be the last write request issued among the multiple write requests, or may be a write request issued later than the first write request.

[0099] The first slave device and the second slave device can process the old write request and the new write request to write different addresses in parallel, and the first slave device and the second slave device can process the first write request and the second write request by adding the first write request and the second write request to their respective corresponding task queues to be processed. For example, after slave device 0 receives the corresponding first write request Write_D+WD, slave device 0 can start processing the first write request Write_D+WD; after slave device 1 receives the second write request Write_F+WD, slave device 1 can also start processing the second write request Write_F+WD.

[0100] In some embodiments of the present disclosure, after the second slave device completes the processing of the new write request, the second target completion information corresponding to the second write request may be sent first. For example, the second write request Write_F+WD may be added to the second task queue to be processed after the second slave device completes the processing. For example, the second write request Write_F+WD may be processed faster than the first write request Write_D+WD, and after the second write request Write_F+WD is processed, the second target completion information TgtDone_F may be sent to the first master device 2 first.

[0101] For step S32, the first master device 2, in response to receiving the first target completion information TgtDone_D from the first slave device (e.g., slave device 0) and receiving the second target completion information TgtDone_F from the second slave device (e.g., slave device 1), sends the second source completion information SrcDn_F to the second slave device, so that the second slave device writes the second data into the second storage. Here, the first target completion information TgtDone_D indicates that the first slave device has added the first write request Write_D+WD to the first task queue to be processed, and the second target completion information TgtDone_F indicates that the second slave device has added the second write request Write_F+WD to the second task queue to be processed.

[0102] The first task queue may be used to sequentially store multiple operation requests with the same address as the first address of the first write request Write_D+WD operation, and the second task queue may be used to sequentially store multiple operation requests with the same address as the second address of the second write request Write_F+WD operation. The multiple operation requests may be write requests for operations on the first storage / second storage, or read requests, etc., which are not limited in the embodiments of the present disclosure.

[0103] In some embodiments of the present disclosure, when the first master device 2 receives the second target completion information TgtDone_F sent first but does not receive the first target completion information TgtDone_D, the first master device 2 does not respond to the second target completion information TgtDone_F, that is, the first master device 2 does not send the second source completion information SrcDn_F to the second slave device, indicating that the second slave device has not completed writing the second data into the second storage. After the first master device 2 receives both the second target completion information TgtDone_F and the first target completion information TgtDone_D, it indicates that the old write request sent first has completed processing.

[0104] First, the first source completion information SrcDn_D is sent to the slave device 0 corresponding to the first write request Write_D+WD, and then the second source completion information SrcDn_F is sent to the slave device 1 corresponding to the second write request Write_F+WD, so that the first master device 2 can ensure the global visible order of the old write request and the new write request.

[0105] It should be noted that the first write request and the second write request are any two write requests among multiple write requests. If the first write request is the first write request issued among all write requests (also called the "oldest write request"), then after the first master device receives the first target completion information, it can send the first source completion information to the first slave device.

[0106] The first source completion information and the second source completion information are used to inform the corresponding slave device to release the resources occupied by the write request. Therefore, in the above example, after the slave device 0 receives the first source completion information SrcDn_D, the resources corresponding to the first address are released, and other operation requests in the first task queue where the first write request is located begin to execute; after the slave device 1 receives the second source completion information SrcDn_F, the resources corresponding to the second address are released, and other operation requests in the second task queue where the second write request is located begin to execute.

[0107] After the first master device 2 sends the first source completion information SrcDn_D, it sends the first response signal Rsp_D to the request end 0; after the first master device 2 sends the second source completion information SrcDn_F, it sends the second response signal Rsp_F to the request end 0.

[0108] Continue to refer Fig. 6A For example, after the first write request Write_D+WD and the second write request Write_F+WD are issued, the second master device (for example, the second master device 2 in the figure) issues a first read signal Read_D to read the data in the first address and / or a second read signal Read_F to read the data in the second address.

[0109] For example, the first master device first sends a first write request Write_D+WD and then sends a second write request Write_F+WD, the second master device first sends a second read signal Read_F to read the write data corresponding to the second write request Write_F+WD, and then sends the first read signal Read_D to read the write data of the first write request Write_D+WD. For example, if the second master device first sends the second read signal Read_F and does not read the write data, it will resend the second read signal Read_F until the second read signal Read_F reads the write data, and then sends the first read signal Read_D. In this way, by reading the data through the second read signal Read_F, it can be ensured that the first read signal Read_D can also read the write data.

[0110] Since from the perspective of slave device 0, the first write request Write_D+WD is received first, and then the first read signal Read_D request is received, the resource of the first address needs to be released only after the first source completion information SrcDn_D is received, and then the first read signal Read_D will be responded to. For example, after receiving the first source completion information SrcDn_D, slave device 0 processes the first read signal Read_D and sends the first read return signal RdRsp_D, wherein the first read field in the first read return signal RdRsp_D is used to indicate whether the first read signal Read_D reads the write data, for example, the first read field D=1 is a new value, indicating that the write data is read; the first read field D=0 is an old value, indicating that the old data is read.

[0111] From the perspective of slave device 1, the second write request Write_F+WD is received first and then the second read signal Read_F request is received. Therefore, the resource at the second address needs to be released only after the second source completion information SrcDn_F is received, and then the second read signal Read_F will be responded to.

[0112] It should be noted that the first read signal Read_D and the second read signal Read_F can be read signals of the same type or different types. For example, the first read signal Read_D and the second read signal Read_F can both be data read signals; for example, the second read signal Read_F can be a state read signal, and the first read signal Read_D can be a data read signal. For example, before the first read signal Read_D reads data, the state data of the corresponding data can be read by the second read signal Read_F first, and then the corresponding data can be read by the first read signal Read_D.

[0113] For example, after receiving the first source completion information SrcDn_F, slave device 1 processes the second read signal Read_F and sends a second read return signal RdRsp_F, wherein the second read field in the second read return signal RdRsp_F is used to indicate whether the second read signal Read_F reads the write data, for example, the second read field F=1 is a new value, indicating that the write data has been read; the second read field F=0 is an old value, indicating that the old data has been read.

[0114] By the slave device not responding to the corresponding read signal during the processing of the write request, the second master device that sends the read signal can read the latest data.

[0115] It should be noted that, although the above embodiments of the present disclosure are described by taking two write requests and two read requests as an example, the number of write requests and the number of read requests of the present disclosure are not limited.

[0116] In some embodiments of the present disclosure, the above data processing method may further include step S33.

[0117] Step S33: after sending the first cancel information to the second slave device, the first master device 2 resends the second write request carrying the second data to the second slave device, so that the second slave device re-adds the second write request to the second task queue.

[0118] According to the following Figure 6B An example including step S33 is described in detail. Figure 6B A schematic diagram of an order-preserving process for resending a write request provided by at least one embodiment of the present disclosure is shown;

[0119] like Figure 6B As shown, the first master device 2 may set a predetermined time period after the second target completion information TgtDone_F to wait for the first target completion information TgtDone_D. For example, a timer Timer 1 may be set. If the first master device 2 does not receive the first target completion information TgtDone_D within the predetermined time period, the first master device 2 sends a first cancellation message SrcDnCancel_F to the slave device 1 to cancel the operation performed by the slave device 1 in response to the second write request Write_F+WD, and then the first master device 2 resends the second write request Write_F+WD to the slave device 1. The above operation is performed until the first master device 2 receives the first target completion information TgtDone_D before the predetermined time period after the second target completion information TgtDone_F ends.

[0120] For example, the second slave device deletes the second write request from the second task queue to be processed of the second write request in response to the first cancel message received from the first master device.

[0121] For example, in response to receiving a retransmitted second write request from the first master device, the second slave device adds the retransmitted second write request to the second task queue to be processed. In this way, when the processing speed of the new write request is too fast than the processing speed of the old write request and causes a deadlock in the process, the new write request can be cancelled and then retransmitted to make the process deadlocked. Fig. 6A The write process shown continues normally.

[0122] In some embodiments of the present disclosure, the second master device (e.g., the second master device 2) issues a first read signal Read_D after a first write request Write_D+WD, and issues a second read signal Read_F after a second write request Write_F+WD. However, if the resources of the slave device corresponding to the first read signal Read_D and the second read signal Read_F are not released, the two read signals will not be responded to.

[0123] For example, if the first master device 2 does not receive the first target completion information TgtDone_D before the end of a predetermined time period after the second target completion information TgtDone_F, it sends a first cancellation message SrcDnCancel_F to the slave device 1 to cancel the operation performed by the slave device 1 in response to the second write request Write_F+WD and release resources.

[0124] For example, the second read signal Read_F is an adjacent operation request after the second write request Write_F+WD in the second task queue. Therefore, after the resources occupied by the second write request Write_F+WD are released, the slave device 1 will respond according to the operation request sequence in the second task queue and send a second read return signal RdRsp_F to the second master device 2. Since all operations related to the second write request Write_F+WD are canceled in the slave device 1, the second read field in the second read return signal RdRsp_F is the old value, that is, the second read field F=0.

[0125] For example, the first read signal Read_D and the second read signal Read_F are a set of related read signals. If the first read field in the first read return signal RdRsp_D is not empty and the second read field in the second read return signal RdRsp_F is not empty, it indicates that the data is read successfully. Therefore, if the first read field in the first read return signal RdRsp_D is not empty and the second read field in the second read return signal RdRsp_F is empty, for example, the first read field D=1 and the second read field F=0, it indicates that the data reading fails, triggering a request to reread, that is, resending the first read signal Read_D and the second read signal Read_F. Until the first read field D=1 and the second read field F=1, it indicates that the data is read successfully.

[0126] In some embodiments of the present disclosure, step S32 of the above data processing method further includes step S320.

[0127] Step S320, in response to receiving the second target completion information carrying the first flag, sending the second source completion information carrying the second data to the second slave device. Here, the second target completion information carrying the first flag is sent by the second slave device in response to the first probe response information.

[0128] In some embodiments of the present disclosure, the above data processing method also includes step S34.

[0129] Step S34, after sending the second write request to the second slave device, the second slave device sends a first probe request to the second master device, so that the second master device returns first probe response information carrying dirty data corresponding to the second address to the second slave device.

[0130] According to the following Fig. 7A The steps S320 and S34 in the above example are described in detail.

[0131] Fig. 7A A write flowchart involving a dirty data copy provided by at least one embodiment of the present disclosure is shown.

[0132] like Fig. 7A As shown, the second write request Write_F+WD issued by the request end 0 is taken as an example for explanation. The write process of the first write request or other write requests involving dirty data copies is the same as the following record, and the present disclosure does not limit it here.

[0133] For example, the writing process of the dirty data copy involves the request end 0 corresponding to the second write request Write_F+WD, the first master device 2, the slave device 1, the second master device 2 and the storage device DDR 1.

[0134] For step S34, after the first master device 2 sends the second write request Write_F+WD to the second slave device (for example, slave device 1), the second slave device sends a first probe request PrbInvalid (RD=1) to the second master device 2, so that the second master device returns a first probe response information PrbRspData carrying dirty data corresponding to the second address to the second slave device.

[0135] In some embodiments of the present disclosure, after the second slave device receives the second write request, a first probe request may be issued to the second master device. The second slave device may identify a dirty data copy for the second address of the second write request to find out whether the second master device has a dirty data copy corresponding to the second address.

[0136] It should be noted that the dirty data copy is used to indicate that the data copy stored in the cache is different from the data copy in the corresponding storage device. For example, the second master device has a cache, and the cache has a dirty data copy. When the second slave device recognizes that the second master device has a dirty data copy, it will obtain the dirty data of the dirty data copy.

[0137] For example, the second slave device may also be a cache, and the data in the cache may have an M (Modified) state, an E (Exclusive) state, an S (Shared) state, an I (Invalid) state, an O (Owned) state, an F (Forward) state (i.e., a cache state of MESIOF), and a D (Dirty) state.

[0138] The M state indicates that the cache line exclusively owns the corresponding data, which has been modified and has not yet been written back to storage;

[0139] The E state indicates that the cache line exclusively owns the corresponding data and the data has not been modified;

[0140] The S state indicates that the cache line shares the corresponding data with other caches;

[0141] The I state indicates that the cache line does not contain any data.

[0142] The O state indicates that the cache line has dirty data (or modified data) and the dirty data is shared by other caches;

[0143] The F state indicates a cache used to forward data among multiple caches in the S state;

[0144] The D state indicates that the cache line has been modified since the last load.

[0145] It should be noted that, although the embodiment of the present disclosure shows seven states here, the embodiment of the present disclosure is not limited thereto, and the specific number of states can be flexibly set or defined according to different situations.

[0146] For example, the second slave device can query the data state in the current cache through the address information of the second write request to determine whether there is a dirty data copy in the second master device. For example, when it is determined that the state of the data in the cache is M, D or O, it is considered that there is a dirty data copy in the second master device.

[0147] For example, if the second slave device has a directory structure, the second slave device can know whether the second master device has a dirty data copy through the records in the directory structure, and send a first probe signal carrying an identifier to the second master device that is determined to have a dirty data copy. For example, if the second slave device has no directory structure, the first probe signal carrying an identifier can be sent to all second master devices by broadcasting. For example, slave device 0 sends a first probe request PrbInvalid (RD=1) to second master device 2.

[0148] For example, when the second master device has dirty data, after the second master device receives the first probe request, it returns the first probe response information carrying the dirty data corresponding to the second address to the second slave device. For example, the second master device 2 returns the first probe response information PrbRspData carrying the dirty data corresponding to the second address to the slave device 1.

[0149] For step S320, the first master device 2 sends second source completion information SrcDn_F(+WD) carrying second data to the second slave device (for example, slave device 1) in response to receiving the second target completion information TgtDone_F(+Flag) carrying the first flag, and the second target completion information TgtDone_F(+Flag) carrying the first flag is issued by the second slave device in response to the first probe response information PrbRspData.

[0150] The first identifier is used to indicate that there is a dirty data copy in the second master device. The second slave device will send second target completion information carrying the first flag to the first master device, for example, sending second target completion information TgtDone_F(+Flag) to the first master device 2, thereby informing the first master device 2 that there is dirty data corresponding to the first probe request in the second master device 1.

[0151] refer to Fig. 7AFor example, before the slave device 1 receives the first probe response information, the write data of the second write signal Write_F+WD is written in the second address of the second storage. After the slave device 1 receives the first probe response information PrbRspData, the write data (also called "first data") is replaced with dirty data in the second address of the second storage of the slave device 1. In addition, the slave device 1 generates a second target completion information TgtDone_F(+Flag) carrying a first flag. After the first master device 2 receives the second target completion information TgtDone_F(+Flag) carrying the first flag, the first master device 2 will send a second source completion information SrcDn_F(+WD) carrying the second data. The slave device 1 writes the second data it carries into the slave device 1 according to the second source completion information SrcDn_F(+WD).

[0152] It should be noted that slave device 1 may be a cache. For example, when the write request indicates writing according to the entire cache line, the second write data is written to the second slave device (for example, slave device 1). For example, when the write request indicates writing according to a non-entire cache line, the fusion data of the second data and the dirty data is written to the second slave device (for example, slave device 1).

[0153] In some embodiments of the present disclosure, the above data processing method may further include step S35.

[0154] Step S35: after sending the first cancellation information to the second slave device, enable the second slave device to write the dirty data back to the second storage.

[0155] In some embodiments of the present disclosure, the above data processing method may further include step S36.

[0156] Step S36, in response to not receiving the first target completion information within a first predetermined time period after receiving the third target completion information in response to the first probe response information, sending a first cancellation information to the second slave device to delete the second write request from the second task queue, the third target completion information indicating that the second slave device has added the second write request to the second task queue to be processed and needs to resend the second data to the second slave device.

[0157] In some embodiments of the present disclosure, the above data processing method may further include step S37.

[0158] Step S37, after sending the first cancellation information to the second slave device, resend the second write request carrying the second data to the second slave device, so that the second slave device re-adds the first write request to the second task queue.

[0159] Figure 7BFIG. 1 shows a flowchart of resending and writing dirty data copies provided by at least one embodiment of the present disclosure. Figure 7B As shown, after the first master device (for example, the first master device 2) receives the second target completion information TgtDone_F (+Flag) carrying the first flag, it does not wait for the target completion signal of the old write request, for example, the first target completion signal TgtDone_D (refer to Figure 6B ), a predetermined time period may be set after receiving the second target completion information TgtDone_F(+Flag) carrying the first flag to wait for the first target completion information TgtDone_D. For example, the first predetermined time may be set, for example, by setting the timer Timer 2.

[0160] For example, when the first target completion information TgtDone_D is not received within a predetermined period of time, the second slave device will write the dirty data back to the second storage in response to receiving the first cancellation information from the first master device.

[0161] For example, if the first master device 2 does not receive the first target completion information TgtDone_D within a predetermined time period, the first master device 2 sends a first cancellation information SrcDnCancel_F to the second slave device (for example, slave device 1), canceling the operation performed by slave device 1 in response to the second write request Write_F+WD, and then the first master device 2 will resend the second write request Write_F+WD to slave device 1. For step S35, after sending the first cancellation information SrcDnCancel_F to the second slave device, the second slave device writes the dirty data back to the second storage.

[0162] For example, if the second slave device receives the first probe response information PrbRspData carrying dirty data corresponding to the second address, the second slave device will temporarily store the dirty data in the second master device. If the second slave device receives the first cancellation information SrcDnCancel_F, the dirty data will be written to the second slave device and its corresponding storage device (for example, storage device DDR 1).

[0163] For example, after the first master device 2 sends the first cancel message SrcDnCancel_F to the slave device 1 , the slave device 1 sends a main memory write signal Wr+WD to the storage device DDR 1 , so that the dirty data copy is written into the storage device DDR 1 .

[0164] For example, the third target completion information may be the second target completion information carrying the first flag.

[0165] For step S36, the first master device 2 does not receive the first target completion information TgtDone_D (reference number) within a first predetermined period of time after receiving the third target completion information TgtDone_F (+Flag) in response to the first probe response information PrbRspData. Figure 6B ), the first master device 2 sends a first cancel message SrcDnCancel_F to the second slave device (for example, slave device 1) to delete the second write request Write_F+WD from the second task queue, and the third target completion message TgtDone_F (+Flag) indicates that the second slave device has added the second write request to the second task queue to be processed and needs to resend the second data to the second slave device.

[0166] The contents related to the second task queue to be processed are basically the same as described above, so they will not be repeated here.

[0167] After the slave device recognizes that the second master device has a dirty data copy, in order to prevent the dirty data (latest data) in the dirty data copy of the second master device from being lost, the dirty data is written to the slave device and the storage device corresponding to the slave device so that the latest data will not be lost. For example, if after the first cancel signal SrcDnCancel_F, the adjacent operation request in the second task queue to be processed corresponding to the slave device 1 is the second read signal Read_F (reference Figure 6B ), since the second slave device (slave device 1) stores the dirty data, the second read signal can read the data that the system considers to be legal before the second write request is completed.

[0168] Figure 7C A writing flow chart involving a cleaning copy provided by at least one embodiment of the present disclosure is shown.

[0169] In some embodiments of the present disclosure, reference Figure 7C When the second slave device receives the second write request Write_F+WD, it finds that the second master device has a clean copy (i.e., no dirty data copy), and then the second slave device sends a first probe request PrbInvalid (RD=1) to the second master device, and then receives a second probe response message PrbRsp fed back by the second master device. A clean copy is used to indicate that the data stored in the address in the slave device corresponding to the current write request is equal to the data in the data copy in the second master device.

[0170] After receiving the second probe response information PrbRsp from device 1 , second target completion information TgtDone_F is sent. At this time, the second target completion information does not carry the first flag.

[0171] Fig.7DA resending write flow chart involving a clean copy provided by at least one embodiment of the present disclosure is shown.

[0172] like Fig.7D As shown, the slave device 1 sends the second target completion information TgtDone_F to the master device in response to the received second probe response information PrbRsp. The setting of the first predetermined time after the first master device 2 receives the second target completion information TgtDone_F is the same as above, please refer to the above.

[0173] Figure 8 A flow chart of a data processing method for a slave device provided by at least one embodiment of the present disclosure is shown.

[0174] like Figure 8 As shown, in some embodiments of the present disclosure, the data processing method includes steps S40-S42, and the steps S40-S42 are applied to the slave device.

[0175] Step S40 , in response to receiving a first write request for a first address of a first storage from a first master device, sending a first probe request to a second master device, the first write request carrying first data corresponding to the first address.

[0176] Step S41 , in response to receiving first probe response information carrying dirty data corresponding to a first address from a second master device, sending first target completion information carrying a first flag to a first master device so that the first master device returns the first data.

[0177] Step S42, in response to receiving first source completion information from the first master device, writing the first data into the first storage, the first source completion information being sent by the first master device after receiving the first target completion information.

[0178] In some embodiments of the present disclosure, the above data processing method may further include step S43.

[0179] Step S43: in response to receiving the first probe response information carrying dirty data from the second master device, replace the first data with the dirty data. In some embodiments of the present disclosure, the data processing method further includes step S44.

[0180] Step S44, in response to receiving the first cancellation information from the first master device, the first write request is deleted from the task queue to be processed.

[0181] In some embodiments of the present disclosure, the above data processing method may further include step S45.

[0182] Step S45, in response to receiving the first cancel information from the first master device, writing the dirty data back to the first storage.

[0183] In some embodiments of the present disclosure, the above data processing method also includes step S46.

[0184] Step S46, in response to receiving a retransmitted first write request carrying the first data from the first master device, adding the first write request to a task queue to be processed.

[0185] In some embodiments of the present disclosure, the above data processing method may further include step S47.

[0186] Step S47, after adding the resent first write request to the queue of pending tasks, sending first target completion information to the first master device, the first target completion information indicating that the first write request has been re-added to the queue of pending tasks, in which case, in response to receiving the first source completion information from the first master device, writing the first data to the first storage, including: in response to receiving the first source completion information in response to the first target completion information from the first master device, writing the first data to the first storage.

[0187] It should be noted that, for steps S40 to S47 applied to the slave device, the first write request and the second write request do not distinguish the order of processing in time. Therefore, in steps S40 to S47, the first write request and the second write request can be the same write request, that is, in S40 to S47, the description corresponding to the first write request can be the same as the description corresponding to the second write request above, and therefore will not be repeated.

[0188] It should be noted that steps S40 to S47 of the present disclosure are descriptions of the data processing method S30 to S37 provided by the present disclosure from the perspective of the device. The detailed description of the substantial part of steps S40 to S47 can refer to the aforementioned description of the data processing method S30 to S37 provided by the present disclosure. Figure 5 to Figure 7D The technical effect of the data processing method of the above embodiment of the present disclosure is the same as the technical effect of the above data processing method, so it will not be repeated.

[0189] At least one embodiment of the present disclosure also provides a data processing system.

[0190] Refer to the above Figure 4 The data processing system of the embodiment of the present disclosure includes multiple slave devices and multiple master devices, and the multiple master devices include an object master device. The multiple slave devices include a first slave device and a second slave device. Among them, the multiple slave devices can be multiple slave devices 0 to n, and the description of the first slave device and the second slave device can be referred to above. For example, the object master device is any one of the multiple master devices as the description object.

[0191] The above-mentioned object master device is configured as follows: in response to receiving a first write request for a first address of a first storage corresponding to a first slave device, sending the first write request to the first slave device, the first write request carrying first data corresponding to the first address; in response to receiving a second write request for a second address of a second storage corresponding to a second slave device after receiving the first write request, sending the second write request to the second slave device, the second write request carrying second data corresponding to the second address; and in response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device, sending second source completion information to the second slave device so that the second slave device writes the second data into the second storage, the first target completion information indicating that the first slave device has added the first write request to the first task queue to be processed, and the second target completion information indicating that the second slave device has added the second write request to the second task queue to be processed.

[0192] For example, the target master device can be Figure 4 Any one of the first master devices 0-n in the example shown, for the relevant description of the first master device, please refer to the above.

[0193] At least one embodiment of the present disclosure further provides a data processing system including multiple master devices and multiple slave devices, wherein the multiple slave devices include an object slave device. For example, the object slave device is any one of the multiple slave devices that is a description object.

[0194] The plurality of master devices include a first master device and a second master device. Figure 4 The first master device may be any one of the first master devices 0 to n, and the second master device may be any one of the second master devices 0 to n. For the relevant description of the first master device and the second master device, please refer to the above.

[0195] The above-mentioned object slave device is configured as follows: in response to receiving a first write request for a first address of a first storage from a first master device, sending a first probe request to a second master device, the first write request carrying first data corresponding to the first address; in response to receiving a first probe response message carrying dirty data corresponding to the first address from the second master device, sending first target completion message carrying a first flag to the first master device so that the first master device returns the first data; and in response to receiving a first source completion message from the first master device, writing the first data to the first storage, the first source completion message being issued by the first master device after receiving the first target completion message.

[0196] For example, the object slave device can be Figure 4 Any one of the first slave devices 0 to n in the setup shown, for the relevant description of the first slave device, please refer to the above.

[0197] At least one embodiment of the present disclosure further provides a data processing device, Fig. 9 A schematic block diagram of a data processing apparatus of a first master device provided by at least one embodiment of the present disclosure is shown.

[0198] like Fig. 9 As shown, the data processing device 70 includes a first response module 701 , a second response module 702 and a third response module 703 .

[0199] The first response module 701 is configured to, in response to receiving a first write request for a first address of a first storage corresponding to a first slave device, send a first write request to the first slave device, the first write request carrying first data corresponding to the first address.

[0200] The second response module 702 is configured to send a second write request to the second slave device in response to receiving a second write request for a second storage second address corresponding to the second slave device after receiving the first write request, the second write request carrying second data corresponding to the second address.

[0201] The third response module 703 is configured to send second source completion information to the second slave device in response to receiving first target completion information from the first slave device and second target completion information from the second slave device so that the second slave device writes the second data into the second storage, the first target completion information indicating that the first slave device has added the first write request to the first task queue to be processed, and the second target completion information indicating that the second slave device has added the second write request to the second task queue to be processed.

[0202] The technical effect of the data processing device of the above embodiment of the present disclosure is the same as the technical effect of the above data processing method, so it will not be repeated.

[0203] At least one embodiment of the present disclosure further provides a data processing device, Fig.10 A schematic block diagram of a data processing apparatus of a slave device provided by at least one embodiment of the present disclosure is shown.

[0204] like Fig.10 As shown, the data processing device 80 includes a first response processing module 801 , a second response processing module 802 and a third response processing module 803 .

[0205] The first response processing module 801 is configured to send a first probe request to the second master device in response to receiving a first write request for a first address of a first storage from the first master device, the first write request carrying first data corresponding to the first address.

[0206] The second response processing module 802 is configured to send first target completion information carrying a first flag to the first master device in response to receiving first probe response information carrying dirty data corresponding to the first address from the second master device so that the first master device returns the first data.

[0207] The third response processing module 803 is configured to write the first data into the first storage in response to receiving the first source completion information from the first master device, where the first source completion information is sent by the first master device after receiving the first target completion information.

[0208] The technical effect of the data processing device of the above embodiment of the present disclosure is the same as the technical effect of the above data processing method, so it will not be repeated.

[0209] Fig.11 A schematic diagram of a data processing device provided by at least one embodiment of the present disclosure is shown.

[0210] like Fig.11 As shown, the data processing device 60 according to the embodiment of the present disclosure includes a processor 620 and a memory 610, and the processor 620 and the memory 610 can be interconnected and communicated through a bus.

[0211] The processor 620 can perform various actions and processes according to the program or code stored in the memory 610. Specifically, the processor 620 can be an integrated circuit chip with signal processing capabilities. For example, the above-mentioned processor 620 can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, and can implement or execute the various methods and steps disclosed in the embodiments of the present disclosure. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc., which can be an X86 architecture, an ARM architecture, a RISC-V architecture, etc.

[0212] The memory 610 is used to store computer executable instructions in a non-temporary manner, and the processor 620 is used to execute the computer executable instructions. When the computer executable instructions are executed by the processor 620, the data processing method provided by at least one embodiment of the present disclosure is implemented.

[0213] For example, the memory 610 may be a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memory. The nonvolatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronously linked dynamic random access memory (SLDRAM), and direct storage bus random access memory (DRRAM). It should be noted that the memory of the method described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0214] At least one embodiment of the present disclosure further provides an electronic device, wherein the electronic device includes the data processing device described in at least one of the above embodiments.

[0215] Fig.12 A schematic block diagram of an electronic device provided for at least one embodiment of the present disclosure.

[0216] The electronic devices in the embodiments of the present disclosure may include but are not limited to mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. The electronic device 1000 shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0217] For example, refer to Fig.12In some examples, the electronic device 1000 includes at least one processing device (e.g., a central processing unit, a graphics processor, etc.) 1001, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage device 1008 to a random access memory (RAM) 1003. For example, at least one input / output (I / O) interface 1005 can be used as the first master device 0-n in the embodiment of the present disclosure, the processing device 1001 can be used as the second master device 0-n in the embodiment of the present disclosure, and the RAM 1003 can include the slave devices 0-n and the double data rate synchronous dynamic random access memory DDR 0-n in the embodiment of the present disclosure. In the RAM 1003, various programs and data required for the operation of the computer system are also stored. The processing device 1001, the input / output (I / O) interface 1005, the ROM 1002, and the RAM 1003 are connected to each other through an Internet network 1004.

[0218] For example, the following components can be connected to the I / O interface 1005: an input device 1006 including, for example, a touch screen, a touchpad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; the input device 1006 can be used as the request end 0-n in the embodiment of the present disclosure, including an output device 1007 such as a liquid crystal display (LCD), a speaker, a vibrator, etc.; a storage device 1008 including, for example, a magnetic tape, a hard disk, etc.; a communication device 1009 which can also include, for example, a network interface card such as a LAN card, a modem, etc. The communication device 1009 can allow the electronic device 1000 to communicate with other devices wirelessly or wired to exchange data, and perform communication processing via a network such as the Internet. The drive 1010 is also connected to the I / O interface 1005 as needed. A removable medium 1011, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 1010 as needed, so that the computer program read therefrom can be installed into the storage device 1008 as needed. Although the electronic device 1000 is shown to include various devices, it should be understood that it is not required to implement or include all of the devices shown. More or fewer devices may be implemented or included instead.

[0219] For example, the electronic device 1000 may further include a peripheral interface (not shown in the figure), etc. The peripheral interface may be various types of interfaces, such as a USB interface, a lightning interface, etc. The communication device 1009 may communicate with a network and other devices through wireless communication, such as the Internet, an intranet and / or a wireless network such as a cellular phone network, a wireless local area network (LAN) and / or a metropolitan area network (MAN). Wireless communication may use any of a variety of communication standards, protocols, and techniques, including, but not limited to, Global System for Mobile Communications (GSM), Enhanced Data GSM Environment (EDGE), Wideband Code Division Multiple Access (W-CDMA), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Bluetooth, Wi-Fi (e.g., based on IEEE 802.11a, IEEE 802.11b, IEEE 802.11g and / or IEEE 802.11n standards), Voice over Internet Protocol (VoIP), Wi-MAX, protocols for email, instant messaging and / or Short Message Service (SMS), or any other suitable communication protocol.

[0220] For example, the electronic device 1000 can be any device such as a mobile phone, a tablet computer, a laptop computer, an e-book, a game console, a television, a digital photo frame, a navigator, a server, etc., or it can be any combination of data processing devices and hardware, and the embodiments of the present disclosure are not limited to this.

[0221] At least one embodiment of the present disclosure further provides a non-transitory storage medium that non-transitorily stores computer executable instructions. For example, when the computer executable instructions are executed by a processor, the data processing method provided by at least one embodiment of the present disclosure is implemented.

[0222] Fig.13 is a schematic diagram of a non-transitory storage medium provided by some embodiments of the present disclosure. Fig.13 As shown, the non-transitory storage medium 900 can non-transitorily store computer executable instructions 910 , and the computer executable instructions 910 implement the data processing method provided by any embodiment of the present disclosure when executed by a computer.

[0223] Similarly, the non-transitory storage medium in the embodiments of the present disclosure may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory. It should be noted that the memory of the methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0224] The technical effect of the above-mentioned non-temporary storage medium is the same as the technical effect of the above-mentioned data processing method, which will not be repeated here.

[0225] It should be noted that the flowcharts and block diagrams in the accompanying drawings illustrate the possible architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment, or a part of a code, and the module, program segment, or a part of the code contains at least one executable instruction for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0226] In general, various example embodiments of the present disclosure may be implemented in hardware or dedicated circuits, software, firmware, logic, or any combination thereof. Certain aspects may be implemented in hardware, while other aspects may be implemented in firmware or software that may be executed by a controller, microprocessor, or other computing device. When various aspects of the embodiments of the present disclosure are illustrated or described as block diagrams, flow charts, or using some other graphical representation, it will be understood that the blocks, devices, systems, techniques, or methods described herein may be implemented in hardware, software, firmware, dedicated circuits or logic, general hardware or controllers or other computing devices, or some combination thereof as non-limiting examples.

[0227] There are a few points to note about this disclosure:

[0228] (1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are involved, and other structures can refer to the general design.

[0229] (2) In the absence of conflict, features in the same embodiment or in different embodiments of the present disclosure may be combined with each other.

[0230] The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A data processing method, comprising: In response to receiving a first write request for a first address of a first storage corresponding to a first slave device, sending the first write request to the first slave device, wherein the first write request carries first data corresponding to the first address; In response to receiving a second write request for a second address of a second storage corresponding to a second slave device after receiving the first write request, sending the second write request to the second slave device, wherein the second write request carries second data corresponding to the second address; and In response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device, sending second source completion information to the second slave device so that the second slave device writes the second data into the second storage, The first target completion information indicates that the first slave device has added the first write request to a first task queue to be processed, and the second target completion information indicates that the second slave device has added the second write request to a second task queue to be processed.

2. The data processing method according to claim 1, further comprising: After sending the second write request to the second slave device, the second slave device sends a first probe request to the second master device, so that the second master device returns first probe response information carrying dirty data corresponding to the second address to the second slave device.

3. The data processing method according to claim 2, wherein: In response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device, sending second source completion information to the second slave device so that the second slave device writes the second data into the second storage, comprising: In response to receiving the second target completion information carrying the first flag, sending the second source completion information carrying the second data to the second slave device, wherein the second target completion information carrying the first flag is sent by the second slave device in response to the first probe response information.

4. The data processing method according to claim 2, further comprising: In response to not receiving the first target completion information within a first predetermined time period after receiving the third target completion information in response to the first probe response information, sending a first cancellation message to the second slave device to delete the second write request from the second task queue, The third target completion information indicates that the second slave device has added the second write request to a second task queue to be processed and needs to resend the second data to the second slave device.

5. The data processing method according to claim 4, further comprising: After sending the first cancellation information to the second slave device, the second slave device is caused to write the dirty data back to the second storage.

6. The data processing method according to claim 4, further comprising: After sending the first cancel information to the second slave device, resending the second write request carrying the second data to the second slave device, so that the second slave device re-adds the second write request to the second task queue.

7. A data processing method, comprising: In response to receiving a first write request for a first address of a first storage from a first master device, sending a first probe request to a second master device, wherein the first write request carries first data corresponding to the first address; In response to receiving a first probe response message carrying dirty data corresponding to the first address from the second master device, sending a first target completion message carrying a first flag to the first master device so that the first master device returns the first data again; and In response to receiving first source completion information from the first master device, the first data is written into the first storage, wherein the first source completion information is issued by the first master device after receiving the first target completion information.

8. The data processing method according to claim 7, further comprising: In response to receiving the first probe response information carrying the dirty data from the second master device, the first data is replaced by the dirty data.

9. The data processing method according to claim 7, further comprising: In response to receiving a first cancel message from the first master device, the first write request is deleted from a queue of pending tasks.

10. The data processing method according to claim 9, further comprising: In response to receiving a first cancel message from the first master device, writing the dirty data back to the first storage.

11. The data processing method according to claim 7, further comprising: In response to receiving the retransmitted first write request carrying the first data from the first master device, adding the first write request to a task queue to be processed.

12. The data processing method according to claim 7, further comprising: After adding the retransmitted first write request to the task queue to be processed, sending first target completion information to the first master device, wherein the first target completion information indicates that the first write request has been re-added to the task queue to be processed, Wherein, in response to receiving the first source completion information from the first master device, writing the first data into the first storage comprises: In response to receiving a first source completion message from the first master device in response to the first target completion message, the first data is written to the first storage.

13. A data processing system comprising: A plurality of slave devices, including a first slave device and a second slave device; The object master device is configured as follows: In response to receiving a first write request for a first address of a first storage corresponding to the first slave device, sending the first write request to the first slave device, wherein the first write request carries first data corresponding to the first address; In response to receiving a second write request for a second address of a second storage corresponding to the second slave device after receiving the first write request, sending the second write request to the second slave device, wherein the second write request carries second data corresponding to the second address; and In response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device, sending second source completion information to the second slave device so that the second slave device writes the second data to the second storage, wherein the first target completion information indicates that the first slave device has added the first write request to a first task queue to be processed, and the second target completion information indicates that the second slave device has added the second write request to a second task queue to be processed.

14. A data processing system comprising: A plurality of master devices, including a first master device and a second master device; The object is a slave device, configured as: In response to receiving a first write request for a first address of a first storage from a first master device, sending a first probe request to a second master device, wherein the first write request carries first data corresponding to the first address; In response to receiving a first probe response message carrying dirty data corresponding to the first address from the second master device, sending a first target completion message carrying a first flag to the first master device so that the first master device returns the first data again; and In response to receiving first source completion information from the first master device, the first data is written into the first storage, wherein the first source completion information is issued by the first master device after receiving the first target completion information.

15. A data processing device, comprising: A first response module, configured to, in response to receiving a first write request for a first address of a first storage corresponding to a first slave device, send the first write request to the first slave device, wherein the first write request carries first data corresponding to the first address; a second response module, configured to, in response to receiving a second write request for a second address of a second storage corresponding to a second slave device after receiving the first write request, send the second write request to the second slave device, wherein the second write request carries second data corresponding to the second address; and a third response module, configured to, in response to receiving first target completion information from the first slave device and receiving second target completion information from the second slave device, send second source completion information to the second slave device so that the second slave device writes the second data into the second storage, The first target completion information indicates that the first slave device has added the first write request to a first task queue to be processed, and the second target completion information indicates that the second slave device has added the second write request to a second task queue to be processed.

16. A data processing device, comprising: A first response processing module, configured to send a first probe request to a second master device in response to receiving a first write request for a first address of a first storage from a first master device, wherein the first write request carries first data corresponding to the first address; a second response processing module, configured to, in response to receiving a first probe response message carrying dirty data corresponding to the first address from the second master device, send first target completion information carrying a first flag to the first master device so that the first master device returns the first data again; and The third response processing module is configured to write the first data into the first storage in response to receiving first source completion information from the first master device, wherein the first source completion information is sent by the first master device after receiving the first target completion information.

17. A data processing device, comprising: at least one memory storing computer executable instructions; as well as at least one processor configured to execute the computer executable instructions, Wherein, when the computer executable instructions are executed by the at least one processor, the data processing method according to any one of claims 1-12 is implemented.

18. An electronic device comprising the data processing device according to any one of claims 15 to 17.

19. A non-transitory storage medium that non-transitorily stores computer-executable instructions, wherein: When the computer executable instructions are executed by at least one processor, the data processing method according to any one of claims 1 to 12 is implemented.

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