Display panel, display panel preparation method and display device

Abstract

The invention discloses a display panel, a display panel preparation method and a display device, the display panel comprises a first area and a second area which are adjacent, and the display panel comprises a substrate; the array layer is arranged on one side of the substrate, and the array layer comprises a thin film transistor; the shielding structure is at least arranged in the first area and comprises a first part arranged on the side, facing the substrate, of the thin film transistor, a first sub-part arranged on the side, away from the substrate, of the thin film transistor and a second sub-part connected with the first part and the first sub-part, and the second sub-part is located on the side face of the thin film transistor; the first part, the first sub-part and the second sub-part define a shielding space, and at least part of the thin film transistor is located in the shielding space. By arranging the shielding structure, light is prevented from irradiating the thin film transistor, the problem that the display panel generates splash screen due to current leakage caused by light irradiation of the thin film transistor is avoided, and the display effect and the use performance of the display panel are improved.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular, relates to a display panel, a method for preparing a display panel, and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) and flat panel display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display devices.

[0003] However, the performance of current OLED display products needs to be improved.

[0004] Therefore, there is an urgent need for a new display panel, a method for manufacturing a display panel, and a display device. Summary of the invention

[0005] The embodiments of the present application provide a display panel, a method for preparing a display panel, and a display device. By setting a shielding structure, the light emitted by the optical element is blocked from irradiating the thin film transistor, thereby avoiding the problem of screen flickering of the display panel caused by leakage current of the thin film transistor due to irradiation by light, thereby improving the display effect and performance of the display panel.

[0006] On the one hand, an embodiment of the present application provides a display panel, including a first area and a second area adjacent to each other, the transmittance of the first area being greater than the transmittance of the second area, the display panel including: a substrate; an array layer, arranged on one side of the substrate, the array layer including a thin film transistor; a shielding structure, arranged at least in the first area, the shielding structure including a first part and a second part, the first part being arranged on the side of the thin film transistor facing the substrate, the orthographic projection of the thin film transistor on the substrate overlaps with the orthographic projection of the first part on the substrate, and is located within the orthographic projection range of the first part on the substrate, the second part surrounds at least part of the side surface of the thin film transistor, and / or the second part is arranged on the side of the thin film transistor away from the substrate, the orthographic projection of the thin film transistor on the substrate is located within the edge of the orthographic projection of the second part on the substrate.

[0007] According to one aspect of the present application, the second part includes a first sub-part and a second sub-part that are connected to each other, the first sub-part is arranged on the side of the thin film transistor facing away from the substrate, and the second sub-part surrounds at least part of the side surface of the thin film transistor; the first part, the first sub-part and the second sub-part form a shielding space, and the thin film transistor is at least partially located in the shielding space.

[0008] According to one aspect of the present application, it also includes a planarization layer disposed on a side of the thin film transistor facing away from the substrate; at least a portion of the planarization layer forms the first sub-portion.

[0009] According to one aspect of the present application, along a direction away from the substrate, the planarization layer includes a first planarization layer and a second planarization layer that are stacked; at least a portion of the first planarization layer and / or at least a portion of the second planarization layer forms the first sub-portion.

[0010] According to one aspect of the present application, it also includes a planarization layer, a pixel definition layer and a display function layer arranged on the side of the thin film transistor away from the substrate, and at least part of the pixel definition layer and / or at least part of the planarization layer forms the first sub-part.

[0011] According to one aspect of the present application, the array layer includes at least one insulating layer, the insulating layer is provided with a via, and the second sub-portion fills the via; preferably, the orthographic projection of the second sub-portion on the substrate is arranged around the orthographic projection of the thin film transistor on the substrate.

[0012] According to one aspect of the present application, the shielding structure includes metal material and / or organic material; preferably, the shielding structure includes at least one of molybdenum metal, aluminum metal, silver metal, and / or the shielding structure includes organic glue material; preferably, the material of at least two of the first part, the first sub-part and the second sub-part is the same; preferably, the first part and the second sub-part include metal material, and the first sub-part includes organic material.

[0013] According to one aspect of the present application, it also includes a signal line electrically connected to the thin film transistor or the display function layer; the shielding structure includes a conductive material, and at least a portion of the signal line forms the shielding structure.

[0014] On the other hand, the present invention also provides a method for preparing a display panel, wherein the display panel includes a first area and a second area adjacent to each other, the transmittance of the first area is greater than the transmittance of the second area, and the method for preparing the display panel includes: providing a substrate; forming an array layer and a shielding structure on one side of the substrate, the array layer including a thin film transistor, the shielding structure being arranged at least in the first area, the shielding structure including a first part and a second part, the first part being arranged on the side of the thin film transistor facing the substrate, the orthographic projection of the thin film transistor on the substrate overlaps with the orthographic projection of the first part on the substrate, and is located within the range of the orthographic projection of the first part on the substrate, the second part surrounds at least part of the side surface of the thin film transistor, and / or the second part is arranged on the side of the thin film transistor away from the substrate, the orthographic projection of the thin film transistor on the substrate is located within the edge of the orthographic projection of the second part on the substrate.

[0015] According to another aspect of the present application, the step of forming an array layer and a shielding structure on one side of a substrate includes: forming the first part on one side of the substrate; forming the thin film transistor in the array layer on the side of the first part away from the substrate; forming a via hole in the insulating layer on the side of the thin film transistor, forming the second sub-part in the via hole, and the second sub-part is connected to the first part; forming the first sub-part on the side of the thin film transistor away from the substrate, the first sub-part is connected to the second sub-part, the first sub-part and the second sub-part form the second part, and the first part, the first sub-part and the second sub-part enclose the shielding space.

[0016] Another aspect of the present invention provides a display device, comprising: a display panel, wherein the display panel is the display panel in any of the above embodiments; and an optical element disposed in the first area.

[0017] Compared with the prior art, the display panel provided by the embodiment of the present invention includes a substrate, an array layer and a shielding structure. The first part, the first sub-part and the second sub-part of the shielding structure respectively shield the light from the bottom, the top and the side directions of the thin film transistor. When the display panel is provided with an optical element (such as an infrared face recognition element), the light output from the optical element can be blocked from irradiating the thin film transistor, thereby avoiding the problem of screen flickering of the display panel caused by leakage current of the thin film transistor due to irradiation with light, thereby improving the display effect and performance of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 is a schematic structural diagram of a display panel provided by an embodiment of the present invention;

[0020] Figure 2 An embodiment provides Figure 1 Schematic diagram of the cross-sectional structure at BB in the middle;

[0021] Figure 3 Another embodiment provides Figure 1 Schematic diagram of the cross-sectional structure at BB in the middle;

[0022] Figure 4 Yet another embodiment provides Figure 1 Schematic diagram of the cross-sectional structure at BB in the middle;

[0023] Figure 5 Yet another embodiment provides Figure 1 Schematic diagram of the cross-sectional structure at BB in the middle;

[0024] Figure 6 is a flow chart of a method for preparing a display panel provided by an embodiment of the present invention;

[0025] Figure 7 It is a schematic cross-sectional view of a structure obtained in step S110 in a method for preparing a display panel provided in an embodiment of the present invention.

[0026] In the attached figure:

[0027] 1-substrate; 11-substrate; 12-inorganic layer; 13-buffer layer; 2-array layer; 3-shielding structure; 31-first part; 32-second part; 321-first sub-part; 322-second sub-part; 4-planarization layer; 41-first planarization layer; 42-second planarization layer; 5-pixel definition layer; 6-display function layer; 61-first electrode layer; 62-light-emitting layer; 63-second electrode layer; T-thin film transistor; Y-active layer; G-gate; S-source; D-drain; K-via; R-shielding space; AA1-first area; AA2-second area. DETAILED DESCRIPTION

[0028] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain the present application and are not configured to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0029] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0030] It should be understood that when describing the structure of a component, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean that it is directly on the other layer or another region, or that other layers or regions are included between it and the other layer or another region. Moreover, if the component is turned over, the layer or a region will be "below" or "beneath" another layer or another region.

[0031] It is obvious to those skilled in the art that various modifications and changes can be made in the present application without departing from the spirit or scope of the present application. Therefore, the present application is intended to cover modifications and changes of the present application that fall within the scope of the corresponding claims (technical solutions for protection) and their equivalents. It should be noted that the implementation methods provided in the embodiments of the present application can be combined with each other without contradiction.

[0032] The embodiments of the present application provide a display panel, a method for manufacturing a display panel, and a display device. Figures 1 to 7 Various embodiments of a display panel, a method for manufacturing a display panel, and a display device are described.

[0033] See also Figure 1 to Figure 2A display panel provided in an embodiment of the present application includes a first area AA1 and a second area AA2 adjacent to each other, the transmittance of the first area AA1 is greater than the transmittance of the second area AA2, and the display panel includes: a substrate 1; an array layer 2, which is arranged on one side of the substrate 1, and the array layer 2 includes a thin film transistor T; a shielding structure 3, which is at least arranged in the first area AA1, and the shielding structure 3 includes a first part 31 and a second part 32, the first part 31 is arranged on the side of the thin film transistor T facing the substrate 1, and the orthographic projection of the thin film transistor T on the substrate 1 overlaps with the orthographic projection of the first part 31 on the substrate 1, and is located within the orthographic projection range of the first part 31 on the substrate 1, which can be understood as the orthographic projection of the first part 31 on the substrate 1 covers the orthographic projection of the thin film transistor T on the substrate 1. The second part 32 surrounds at least part of the side surface of the thin film transistor T, and / or, the second part 32 is arranged on the side of the thin film transistor T away from the substrate 1, and the orthographic projection of the thin film transistor T on the substrate 1 is located within the edge of the orthographic projection of the second part 32 on the substrate 1. When the second portion 32 surrounds at least part of the side surface of the thin film transistor T, the orthographic projection of the second portion 32 on the substrate 1 is arranged around the periphery of the orthographic projection of the thin film transistor T on the substrate 1, and the two do not overlap, and the orthographic projection of the thin film transistor T on the substrate 1 is located within the edge of the orthographic projection of the second portion 32 on the substrate; when the second portion 32 is arranged on the side of the thin film transistor T away from the substrate 1, the orthographic projection of the thin film transistor T on the substrate 1 overlaps with the orthographic projection of the second portion 32 on the substrate 1, and is located within the orthographic projection range of the second portion 32 on the substrate 1, that is, the orthographic projection of the second portion 32 on the substrate 1 covers the orthographic projection of the thin film transistor T on the substrate 1; the second portion 32 surrounds at least part of the side surface of the thin film transistor T, and when the second portion 32 is arranged on the side of the thin film transistor T away from the substrate 1, the orthographic projection of the second portion 32 on the substrate 1 covers the orthographic projection of the thin film transistor T on the substrate 1.

[0034] The display panel provided by the embodiment of the present invention includes a substrate 1, an array layer 2 and a shielding structure 3. The first part 31 and the second part 32 of the shielding structure 3 respectively shield the light from the bottom, top and / or side directions of the thin film transistor T. When the display panel is provided with an optical element (for example, an infrared face recognition element), the light emitted by the optical element can be blocked from irradiating the thin film transistor T, thereby avoiding the problem of screen flickering of the display panel caused by leakage current of the thin film transistor T due to irradiation with light, thereby improving the display effect and performance of the display panel.

[0035] In this embodiment, the display panel includes adjacent first and second areas AA1 and AA2, the transmittance of the first area AA1 is greater than the transmittance of the second area AA2, and the first area AA1 can be used to set up cameras, infrared recognition elements and other elements with high light requirements. For example, an infrared face recognition element can be set in the first area AA1, and the infrared face recognition element can emit infrared light in the direction of the substrate 1 to achieve face recognition. When the infrared light is irradiated to the thin film transistor T, it will cause the thin film transistor T to generate leakage current, affecting the performance of the thin film transistor T, and further causing the display panel to have a flickering screen problem.

[0036] To solve the above problem, in this embodiment, a shielding structure 3 is provided to shield the thin film transistor T in all directions, thereby preventing the leakage current of the thin film transistor T caused by being irradiated by light from causing the display panel to flicker.

[0037] Optionally, the substrate 1 may be a hard substrate, such as a glass substrate, or a flexible substrate, and its material may be polyimide, polystyrene, polyethylene terephthalate, polyparaxylene, polyethersulfone or polyethylene naphthalate. The substrate 1 is mainly used to support the device disposed thereon.

[0038] Optionally, the array layer 2 includes a pixel circuit, which includes a plurality of thin film transistors T. Exemplarily, the pixel driving circuit disposed in the array layer 2 includes a thin film transistor T and a storage capacitor. The thin film transistor T includes an active layer Y, a gate G, a source S and a drain D.

[0039] The first portion 31 is disposed on the side of the thin film transistor T facing the substrate 1, that is, the first portion 31 can be disposed between the array layer 2 and the substrate 1, or, be disposed in the array layer 2, between the thin film transistor T and the substrate 1, or, be disposed in the substrate 1, without special limitation, as long as the first portion 31 can be used to block the light from the side of the thin film transistor T facing the substrate 1 from irradiating the thin film transistor T.

[0040] Optionally, the substrate 1 includes a double-layer substrate 11 , an inorganic layer 12 disposed between the substrates 11 , and at least one buffer layer 13 disposed on the side of the inorganic layer 12 facing the array layer 2 , and the first portion 31 may be disposed between the buffer layer 13 and the array layer 2 .

[0041] Optionally, the second part 32 includes a first sub-part 321 and a second sub-part 322 that are connected to each other, the first sub-part 321 is arranged on the side of the thin film transistor T facing away from the substrate 1, and the second sub-part 322 surrounds at least part of the side surface of the thin film transistor T. The first part 31, the first sub-part 321 and the second sub-part 322 form a shielding space R, and the thin film transistor T is at least partially located in the shielding space R.

[0042] The shielding structure 3 is provided to shield the thin film transistor T in all directions, that is, the first part 31, the first sub-part 321 and the second sub-part 322 respectively shield the light from the bottom, top and side directions of the thin film transistor T, so as to avoid the leakage current of the thin film transistor T caused by the exposure to light, which may cause the display panel to flicker.

[0043] See also Figures 2 to 3 In some optional embodiments, the display panel further includes a planarization layer 4 disposed on a side of the thin film transistor T facing away from the substrate 1 ; at least a portion of the planarization layer 4 forms the first sub-portion 321 .

[0044] It should be noted that since the planarization layer 4 needs to achieve the shading effect of the shielding structure 3, the planarization layer 4 can be prepared by an opaque black organic glue material. The black organic glue can block the light emitted by the absorbing optical element or the external light from irradiating to the thin film transistor T. For example, the black organic glue can absorb the infrared light emitted by the infrared face recognition element.

[0045] In this embodiment, the entire planarization layer 4 can be used as the first sub-portion 321, that is, the entire planarization layer 4 is made of black organic glue material to ensure the light shielding effect. Alternatively, only part of the planarization layer 4 can be used as the first sub-portion 321, that is, the part of the planarization layer 4 corresponding to shielding the thin film transistor T is made of black organic glue material to serve as the first sub-portion 321.

[0046] According to actual needs, one planarization layer 4 or multiple planarization layers 4 may be provided, and at least one layer of the multiple planarization layers 4 forms the first sub-portion 321 of the shielding structure 3 .

[0047] See also Figures 2 to 3 In some optional embodiments, along the direction away from the substrate 1 , the planarization layer 4 includes a first planarization layer 41 and a second planarization layer 414 which are stacked; at least a portion of the first planarization layer 41 and / or at least a portion of the second planarization layer 414 forms a first sub-portion 321 .

[0048] In this embodiment, the planarization layer 4 is provided with two layers, so that the first planarization layer 41 and the second planarization layer 42 can form the first sub-portion 321 respectively. Figure 3 As shown, both the first planarization layer 41 and the second planarization layer 42 are provided with a light shielding portion, or one of the first planarization layer 41 and the second planarization layer 42 forms the first sub-portion 321, for example, at least a portion of the first planarization layer 41 forms the first sub-portion 321, as shown in FIG. Figure 2 As shown, at least part of the second planarization layer 42 forms the first sub-portion 321 , and there is no special limitation and it can be selected according to actual conditions.

[0049] See also Figures 4 to 5 In some optional embodiments, the display panel also includes a planarization layer 4, a pixel definition layer 5 and a display function layer 6 arranged on the side of the thin film transistor T facing away from the substrate 1, and at least part of the pixel definition layer 5 and / or at least part of the planarization layer 4 forms a first sub-portion 321.

[0050] Considering that the pixel definition layer 5 is also located above the thin film transistor T, the pixel definition layer 5 can also serve as the first sub-portion 321 of the shielding structure 3 to shield the thin film transistor T. In the present embodiment, the pixel definition layer 5 and the planarization layer 4 can both form the first sub-portion 321. For example, the entire pixel definition layer 5 and the planarization layer 4 can be made of black organic glue material. Alternatively, only the pixel definition layer 5 can form the first sub-portion 321, or only the planarization layer 4 can form the first sub-portion 321, as long as the light from the side of the thin film transistor T away from the substrate 1 can be effectively blocked from irradiating the thin film transistor T.

[0051] Optionally, in the direction away from the substrate 1 , the display function layer 6 may include a first electrode layer 61 , a light emitting layer 62 , and a second electrode layer 63 which are stacked.

[0052] Optionally, the light-emitting layer 62 includes one or more of an electron injection layer, an electron transport layer, a light-emitting material layer, a hole blocking layer, an electron blocking layer, a hole transport layer and a hole injection layer. The specific type of the light-emitting layer 62 can be selected without special limitation. The electron injection layer, the electron transport layer and the hole blocking layer can be arranged between the second electrode layer 63 and the light-emitting material layer. The electron blocking layer, the hole transport layer and the hole injection layer can be arranged between the first electrode layer 61 and the light-emitting material layer.

[0053] The material of the first electrode layer 61 is generally a material with a high work function to improve the hole injection efficiency, and may be gold (Au), platinum (Pt), titanium (Ti), silver (Ag), indium tin oxide (ITO), zinc tin oxide (IZO) or a transparent conductive polymer (such as polyaniline), etc. For example, the first electrode layer 61 may be made of an ITO-Ag-ITO composite material, without particular limitation.

[0054] The material of the second electrode layer 63 can be one of the metal materials such as silver (Ag), aluminum (Al), lithium (Li), magnesium (Mg), ytterbium (Yb), calcium (Ca) or indium (In), and can also be an alloy of the aforementioned metal materials, such as magnesium-silver alloy (Mg / Ag) and lithium-aluminum alloy (Li / Al), but this embodiment does not limit this.

[0055] In some optional embodiments, the array layer 2 includes at least one insulating layer, the insulating layer is provided with a via K, and the second sub-portion 322 is filled in the via K.

[0056] It is understandable that, in order to achieve mutual insulation between the conductive layers in the array layer 2, an insulating layer needs to be provided between the conductive layers to achieve insulation. For example, the insulating layer can be provided between the active layer Y and the gate G of the thin film transistor T, between the gate G and the source S, and the drain D. After the thin film transistor T and the insulating layer are prepared, a portion of the insulating layer located on the side of the thin film transistor T can be removed by photolithography to form a via K, and a light shielding material, such as a black organic glue material, is coated and filled in the via K to form the second sub-portion 322.

[0057] Optionally, the orthographic projection of the second sub-portion 322 on the substrate 1 is at least partially arranged around the orthographic projection of the thin film transistor T on the substrate 1, that is, the second sub-portion 322 can be partially arranged around the thin film transistor T, or can be arranged to completely surround the thin film transistor T. For example, a plurality of vias K can be arranged, and the vias K are arranged at intervals and around the thin film transistor T. Alternatively, the orthographic projection of the via K on the substrate 1 is annular and is arranged around the thin film transistor T, so that the second sub-portion 322 coated in the via K is correspondingly arranged around the thin film transistor T.

[0058] In this embodiment, the insulating layer may be made of an inorganic material, such as at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0059] In some optional embodiments, the shielding structure 3 includes a metal material and / or an organic material;

[0060] It should be noted that the material of the shielding structure 3 can be any type of metal material or organic material as long as it can ensure that the shading effect meets the requirements. For example, the shielding structure 3 includes molybdenum metal, aluminum metal, silver metal, etc., or the shielding structure 3 includes black organic glue material.

[0061] Optionally, at least two of the first portion 31, the first sub-portion 321, and the second sub-portion 322 may be made of the same material to reduce production costs and facilitate preparation. For example, the first portion 31 and the second sub-portion 322 may be made of the same material, or the first sub-portion 321 and the second sub-portion 322 may be made of the same material, or the first portion 31, the first sub-portion 321, and the second sub-portion 322 may be made of the same material to facilitate preparation.

[0062] Optionally, the first portion 31 and the second sub-portion 322 include metal materials, and the first sub-portion 321 includes organic materials. For example, the first portion 31 and the second sub-portion 322 may be made of molybdenum metal, and the first sub-portion 321 may be made of black organic glue material.

[0063] In some optional embodiments, the display panel further includes a signal line electrically connected to the thin film transistor T or the display function layer 6 ; the shielding structure 3 includes a conductive material, and at least a portion of the signal line forms the shielding structure 3 .

[0064] In this embodiment, the signal line can specifically be a voltage signal line, such as a high-level voltage signal line VDD, or a low-level voltage signal line VSS, etc. When the signal line is prepared using a material with good light-shielding properties such as metal, at least part of the signal line can be formed into a shielding structure 3 for use, so as to simplify the preparation process and reduce production costs.

[0065] See also Figure 6 The embodiment of the present invention further provides a method for manufacturing a display panel, wherein the display panel includes a first area AA1 and a second area AA2 adjacent to each other, wherein the transmittance of the first area AA1 is greater than the transmittance of the second area AA2, and the method for manufacturing the display panel includes:

[0066] S110: Provide a substrate 1, such as Figure 7 As shown;

[0067] S120: forming an array layer 2 and a shielding structure 3 on one side of the substrate 1, wherein the array layer 2 includes a thin film transistor T, the shielding structure 3 is at least provided in the first area AA1, and the shielding structure 3 includes a first portion 31 and a second portion 32, wherein the first portion 31 is provided on a side of the thin film transistor T facing the substrate 1, and the second portion 32 surrounds at least a part of a side surface of the thin film transistor T, and / or the second portion 32 is provided on a side of the thin film transistor T facing away from the substrate 1, such as Figure 2 shown.

[0068] The display panel preparation method provided in the embodiment of the present invention blocks light from the bottom, top and / or side directions of the thin film transistor T through the first part 31 and the second part 32 of the shielding structure 3, respectively. When the display panel is provided with an optical element (for example, an infrared face recognition element), the light emitted by the optical element can be blocked from irradiating the thin film transistor T, thereby avoiding the problem of screen flickering of the display panel caused by leakage current of the thin film transistor T due to irradiation with light, thereby improving the display effect and performance of the display panel.

[0069] In step S110, the substrate 1 can be formed by coating, curing, film forming and other processes. The substrate 1 can be a hard substrate, such as a glass substrate; or a flexible substrate, and its material can be polyimide, polystyrene, polyethylene terephthalate, polyparaxylene, polyethersulfone or polyethylene naphthalate. The substrate 1 is mainly used to support the device arranged thereon. Optionally, the substrate 1 includes a double-layer substrate 11, an inorganic layer 12 arranged between the substrates 11, and at least one buffer layer 13 arranged on the side of the inorganic layer 12 facing the array layer 2, and the first part 31 can be arranged between the buffer layer 13 and the array layer 2.

[0070] In step S120, the step of forming the array layer 2 and the shielding structure 3 on one side of the substrate 1 includes: forming a first portion 31 on one side of the substrate 1; forming a thin film transistor T in the array layer 2 on the side of the first portion 31 away from the substrate 1; forming a via K in the insulating layer on the side of the thin film transistor T, forming a second sub-portion 322 in the via K, and the second sub-portion 322 is connected to the first portion 31; forming a first sub-portion 321 on the side of the thin film transistor T away from the substrate 1, the first sub-portion 321 and the second sub-portion 322 are connected, the first sub-portion 321 and the second sub-portion 322 form a second portion 32, and the first portion 31, the first sub-portion 321 and the second sub-portion 322 enclose a shielding space R.

[0071] In this embodiment, the substrate 11 of the substrate 1 may be formed first, and the substrate 11 may be made of PI material, and then the shielding pattern of the thin film transistor T, that is, the first part 31, may be formed by deposition and photolithography on the substrate 11. The first part 31 may be made of metal or black organic glue, and the black organic glue may absorb infrared light, and then the source S, drain D, insulating layer and gate G patterns of the thin film transistor T are formed by photolithography process;

[0072] An insulating layer is deposited on the gate G, and a via K is formed around the thin film transistor T by photolithography. The via K can be formed by a one-step etching process or a multiple insulating layer via K process. The via K can be etched to the peripheral film layer or the film layer below the active layer Y. This process can be formed together with other vias K without adding an additional mask process.

[0073] Then, the organic glue process is completed. The organic glue in this process can be organic black glue, which is applied to the via hole K, that is, the second sub-portion 322;

[0074] Finally, the first sub-portion 321 is prepared. The first sub-portion 321 may be a planarization layer 4 or a pixel definition layer 5. The shielding structure 3 is formed through the above process to achieve all-round shielding protection for the thin film transistor T.

[0075] In this embodiment, the via K may be a single via K, or a plurality of vias K. For example, a plurality of vias K may be provided, and each via K is provided at intervals and around the thin film transistor T. Correspondingly, the second sub-portion 322 located in the via K may be partially provided around the thin film transistor T, or the orthographic projection of the via K on the substrate 1 is annular and provided around the thin film transistor T, so that the second sub-portion 322 coated in the via K is correspondingly provided around the thin film transistor T.

[0076] An embodiment of the present invention further provides a display device, including a display panel, where the display panel is the display panel in any of the above embodiments; and an optical element disposed in the first area AA1.

[0077] In this embodiment, the display panel includes adjacent first area AA1 and second area AA2, the transmittance of the first area AA1 is greater than the transmittance of the second area AA2, and the first area AA1 can be used to set up cameras, infrared recognition elements and other elements that have high light requirements. For example, an infrared face recognition element can be set in the first area AA1, and the infrared face recognition element can emit infrared light in the direction of the substrate 1 to achieve face recognition.

[0078] In this embodiment, the shielding structure 3 is provided to prevent the infrared light emitted by the infrared face recognition element from being refracted and scattered in the display panel, thereby reducing the impact of leakage current on the thin film transistor T caused by infrared light irradiation on the screen body and improving the display effect and performance of the display device.

[0079] The display device provided by the embodiment of the present invention has the technical effect of the technical solution of the display panel in any of the above embodiments, and the explanation of the structures and terms that are the same as or corresponding to the above embodiments will not be repeated here.

[0080] The display device provided in the embodiment of the present invention may be an organic light-emitting diode (OLED) display device, a quantum dot light-emitting diode (QLED) or a micro flat panel display device (Micro-OLED or Micro-LED).

[0081] The display device provided in the embodiment of the present application can be applied to a mobile phone, or it can be any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc. The embodiment of the present application does not make any special limitations on this.

[0082] The above are only specific implementation methods of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

[0083] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

Claims

1. A display panel, characterized in that: The display panel comprises a first area and a second area adjacent to each other, wherein the light transmittance of the first area is greater than the light transmittance of the second area, and the display panel comprises: substrate; An array layer, disposed on one side of the substrate, the array layer comprising thin film transistors; A shielding structure is at least arranged in the first area, and the shielding structure includes a first part and a second part, the first part is arranged on the side of the thin film transistor facing the substrate, the orthographic projection of the thin film transistor on the substrate overlaps with the orthographic projection of the first part on the substrate, and is located within the orthographic projection range of the first part on the substrate, the second part surrounds at least part of the side surface of the thin film transistor, and / or the second part is arranged on the side of the thin film transistor away from the substrate, and the orthographic projection of the thin film transistor on the substrate is located within the edge of the orthographic projection of the second part on the substrate.

2. The display panel according to claim 1, characterized in that: The second portion includes a first sub-portion and a second sub-portion connected to each other, the first sub-portion is arranged on a side of the thin film transistor away from the substrate, and the second sub-portion surrounds at least a part of a side surface of the thin film transistor; The first portion, the first sub-portion, and the second sub-portion enclose a shielding space, and the thin film transistor is at least partially located in the shielding space.

3. The display panel according to claim 2, characterized in that: It also includes a planarization layer disposed on a side of the thin film transistor away from the substrate; At least part of the planarization layer forms the first sub-portion.

4. The display panel according to claim 3, characterized in that: Along a direction away from the substrate, the planarization layer includes a first planarization layer and a second planarization layer which are stacked; At least part of the first planarization layer and / or at least part of the second planarization layer forms the first sub-portion.

5. The display panel according to claim 2, characterized in that: It also includes a planarization layer, a pixel definition layer and a display function layer arranged on the side of the thin film transistor away from the substrate, and at least part of the pixel definition layer and / or at least part of the planarization layer forms the first sub-part.

6. The display panel according to claim 2, characterized in that: The array layer comprises at least one insulating layer, the insulating layer is provided with a via hole, and the second sub-portion is filled in the via hole; Preferably, the shielding structure comprises metal material and / or organic material; Preferably, the shielding structure comprises at least one of molybdenum metal, aluminum metal, and silver metal, and / or the shielding structure comprises an organic glue material; Preferably, at least two of the first portion, the first sub-portion and the second sub-portion are made of the same material; Preferably, the first portion and the second sub-portion include metallic materials, and the first sub-portion includes organic materials.

7. The display panel according to claim 1, characterized in that: Also includes a signal line electrically connected to the thin film transistor or the display function layer; The shielding structure includes a conductive material, and at least a portion of the signal line forms the shielding structure.

8. A method for preparing a display panel, characterized in that: The display panel includes a first area and a second area adjacent to each other, the light transmittance of the first area is greater than the light transmittance of the second area, and the display panel manufacturing method includes: providing a substrate; An array layer and a shielding structure are formed on one side of a substrate, wherein the array layer includes a thin film transistor, and the shielding structure is at least arranged in the first region, and the shielding structure includes a first part and a second part, wherein the first part is arranged on the side of the thin film transistor facing the substrate, the orthographic projection of the thin film transistor on the substrate overlaps with the orthographic projection of the first part on the substrate, and is located within the orthographic projection range of the first part on the substrate, the second part surrounds at least part of the side surface of the thin film transistor, and / or the second part is arranged on the side of the thin film transistor away from the substrate, and the orthographic projection of the thin film transistor on the substrate is located within the edge of the orthographic projection of the second part on the substrate.

9. The method for preparing a display panel according to claim 8, characterized in that: The step of forming an array layer and a shielding structure on one side of the substrate includes: forming the first portion on one side of the substrate; forming the thin film transistor in the array layer on a side of the first portion away from the substrate; A via hole is formed in the insulating layer on the side of the thin film transistor, and a second sub-portion is formed in the via hole, wherein the second sub-portion is connected to the first portion; A first sub-portion is formed on the side of the thin film transistor away from the substrate, the first sub-portion is connected to the second sub-portion, the first sub-portion and the second sub-portion form the second portion, and the first portion, the first sub-portion and the second sub-portion enclose the shielding space.

10. A display device, characterized in that: include: A display panel, wherein the display panel is the display panel according to any one of claims 1 to 7; The optical element is arranged in the first area.

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