Autonomous vehicle monitoring system using on-die system-on-chip resources

Abstract

A peer-to-peer monitoring system and method that enables monitoring, for example, the execution of various performance core processes by one or more performance core processors in an autonomous vehicle system. Each performance core processor is integrated on a single chip or die with a corresponding monitoring core processor for monitoring performance of the performance core processor, execution of performance core processing, etc. Each monitoring core processor is communicatively coupled to and monitors all other monitoring core processors in a peer-to-peer monitoring system. Each monitoring core processor may perform various actions upon receiving communications from another monitoring core processor to ensure continuity of operation of the peer-to-peer monitoring system and / or the performance core processor.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 363,596, filed on April 26, 2022, and incorporates by reference the disclosures of U.S. non-provisional patent application No. 46154-0438001 / I2022068, filed on April 26, 2023, entitled “SCALABLE CONFIGURABLE CHIP ARCHITECTURE,” and U.S. non-provisional patent application No. 46154-0445001 / I2022075, filed on April 26, 2023, entitled “DISTRIBUTED COMPUTING ARCHITECTURE WITH SHARED MEMORY FOR AUTONOMOUS ROBOTIC SYSTEMS.” Background Art

[0003] An autonomous vehicle is capable of sensing its surroundings and navigating without human input. Upon receiving data representing the environment and / or any other parameters, the vehicle processes the data to determine its movement decisions, such as stopping, moving forward / backward, turning, etc. These decisions are intended to safely navigate the vehicle along a selected path to avoid obstacles and react to various scenarios such as the presence, movement, etc. of other vehicles, pedestrians, and / or any other objects. The various systems that perform processing in the vehicle may be subject to errors, failures, etc., and timely detection and resolution of these errors, failures, etc. is important for the safe operation of the vehicle and / or any component of the vehicle. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figure 1 is an example environment in which a vehicle including one or more components of an autonomous system may be implemented;

[0005] Figure 2 is a diagram of one or more systems of a vehicle including an autonomous system;

[0006] Figure 3 yes Figure 1 and Figure 2 a diagram of one or more devices and / or components of one or more systems;

[0007] Figure 4A is a diagram of some components of an autonomous system;

[0008] Figure 4B is a graph of the implementation of a neural network;

[0009] Figure 4C and Figure 4D is a diagram illustrating an example operation of a CNN;

[0010] Figure 5A and Figure 5B A diagram illustrating an example monitoring system;

[0011] Fig. 6A is a diagram of an example of a monitoring system according to some implementations of the current subject matter;

[0012] Figure 6B is a diagram of an example chiplet system;

[0013] FIG. 6C to FIG. 6E are diagrams of other examples of monitoring systems according to some implementations of the current subject matter; and

[0014] Figure 7 An example monitoring process according to some embodiments of the current subject matter is illustrated. DETAILED DESCRIPTION

[0015] In the following description, for the purpose of explanation, many specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be apparent that the embodiments described in the present disclosure can be implemented without these specific details. In some instances, well-known configurations and devices are illustrated in block diagram form to avoid unnecessarily obscuring aspects of the present disclosure.

[0016] In the accompanying drawings, for ease of description, the specific arrangement or order of schematic elements (such as those representing systems, devices, modules, instruction blocks and / or data elements, etc.) is illustrated. However, those skilled in the art will understand that, unless explicitly described, the specific order or arrangement of schematic elements in the accompanying drawings is not intended to mean that a specific processing order or sequence, or separation of processing is required. In addition, unless explicitly described, the inclusion of schematic elements in the accompanying drawings is not intended to mean that such elements are required in all embodiments, nor is it intended to mean that the features represented by such elements cannot be included in some embodiments or cannot be combined with other elements in some embodiments.

[0017] In addition, in the accompanying drawings, connecting elements (such as solid or dotted lines or arrows, etc.) are used to illustrate the connection, relationship or association between or among two or more other schematic elements, and the absence of any such connecting elements is not intended to mean that there can be no connection, relationship or association. In other words, some connections, relationships or associations between elements are not illustrated in the accompanying drawings so as not to obscure the present disclosure. In addition, for ease of illustration, a single connecting element can be used to represent multiple connections, relationships or associations between elements. For example, if the connecting element represents the communication of a signal, data or instruction (e.g., "software instruction"), it will be understood by those skilled in the art that such an element can represent one or more than one signal path (e.g., bus) that may be needed to affect the communication.

[0018] Although the terms "first", "second" and / or "third", etc. are used to describe various elements, these elements should not be limited by these terms. The terms "first", "second" and / or "third" are only used to distinguish one element from another. For example, a first contact may be referred to as a second contact, and similarly, a second contact may be referred to as a first contact without departing from the scope of the described embodiments. Both the first contact and the second contact are contacts, but they are not the same contacts.

[0019] The terms used in the specification of the various embodiments described herein are included only for the purpose of describing specific embodiments and are not intended to be limiting. As used in the specification of the various embodiments described and the appended claims, the singular forms "a", "an" and "the" are also intended to include plural forms and can be used interchangeably with "one or more than one" or "at least one", unless the context clearly indicates otherwise. It will also be understood that the term "and / or" as used herein refers to and includes any and all possible combinations of one or more than one of the associated listed items. It will also be understood that when the terms "include", "comprise", "have" and / or "have" are used in this specification, the stated features, integers, steps, operations, elements and / or components are specifically stated, but the presence or addition of one or more than one other features, integers, steps, operations, elements, components and / or groups thereof are not excluded.

[0020] As used herein, the terms "communication" and "communicating" refer to at least one of receiving, receiving, transmitting, transmitting and / or providing information (or information represented by, for example, data, signals, messages, instructions and / or commands, etc.). For a unit (e.g., a device, a system, a component of a device or system, and / or a combination thereof) to communicate with another unit, this means that the unit is able to directly or indirectly receive information from the other unit and / or send (e.g., transmit) information to the other unit. This can refer to a direct or indirect connection that is wired and / or wireless in nature. In addition, even if the transmitted information can be modified, processed, relayed and / or routed between the first unit and the second unit, the two units can communicate with each other. For example, even if the first unit passively receives information and does not actively transmit information to the second unit, the first unit can communicate with the second unit. As another example, if at least one intermediary unit (e.g., a third unit located between the first unit and the second unit) processes the information received from the first unit and transmits the processed information to the second unit, the first unit can communicate with the second unit. In some embodiments, a message may refer to a network packet (eg, a data packet, etc.) that includes data.

[0021] As used herein, the term "if" is optionally interpreted to mean "when," "at," "in response to being determined to be," and / or "in response to being detected," etc., depending on the context. Similarly, the phrases "if it is determined" or "if [the stated condition or event] is detected" are optionally interpreted to mean "when determining," "in response to being determined to be" or "when [the stated condition or event] is detected," and / or "in response to being detected," etc., depending on the context. In addition, as used herein, the terms "have," "have," or "possess," etc. are intended to be open-ended terms. Furthermore, unless expressly stated otherwise, the phrase "based on" is intended to mean "based at least in part on."

[0022] Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the various embodiments described. However, it will be apparent to one of ordinary skill in the art that the various embodiments described may be implemented without these specific details. In other cases, well-known methods, processes, components, circuits, and networks have not yet been described in detail in order not to unnecessarily obscure aspects of the embodiments.

[0023] General Overview

[0024] Vehicles, such as autonomous vehicles, can process images from their cameras using a streamlined image processing pipeline that omits steps that are not necessary for the images used, for example, in vehicle navigation. For example, images captured by cameras are typically processed using an image and signal processing pipeline (ISP). Some processing steps produce images that are more suitable for the human eye, but are not necessary for image use in vehicle navigation. These steps can be omitted in the pipeline.

[0025] Some of the advantages of these techniques include faster image processing of camera data. By omitting unnecessary image processing steps, images captured by vehicle cameras can be prepared more quickly for use in navigation.

[0026] Reference now Figure 1 , illustrates an example environment 100 in which vehicles including autonomous systems and vehicles not including autonomous systems operate. As illustrated, the environment 100 includes vehicles 102a-102n, objects 104a-104n, routes 106a-106n, areas 108, vehicle-to-infrastructure (V2I) devices 110, a network 112, a remote autonomous vehicle (AV) system 114, a fleet management system 116, and a V2I system 118. The vehicles 102a-102n, the vehicle-to-infrastructure (V2I) devices 110, the network 112, the autonomous vehicle (AV) system 114, the fleet management system 116, and the V2I system 118 are interconnected (e.g., establish connections for communication, etc.) via wired connections, wireless connections, or a combination of wired or wireless connections. In some embodiments, objects 104a-104n are interconnected with at least one of vehicles 102a-102n, vehicle-to-infrastructure (V2I) devices 110, networks 112, autonomous vehicle (AV) systems 114, fleet management systems 116, and V2I systems 118 via wired connections, wireless connections, or a combination of wired or wireless connections.

[0027] Vehicles 102a-102n (individually referred to as vehicles 102 and collectively referred to as vehicles 102) include at least one device configured to transport goods and / or people. In some embodiments, vehicles 102 are configured to communicate with V2I devices 110, remote AV systems 114, fleet management systems 116, and / or V2I systems 118 via network 112. In some embodiments, vehicles 102 include cars, buses, trucks, and / or trains, etc. In some embodiments, vehicles 102 are similar to vehicles 200 described herein (see Figure 2). In some embodiments, vehicles 200 in the set of vehicles 200 are associated with an autonomous queue manager. In some embodiments, vehicles 102 travel along respective routes 106a-106n (individually referred to as routes 106 and collectively referred to as routes 106) as described herein. In some embodiments, one or more vehicles 102 include an autonomous system (e.g., an autonomous system that is the same as or similar to autonomous system 202).

[0028] Objects 104a-104n (individually referred to as objects 104 and collectively referred to as objects 104) include, for example, at least one vehicle, at least one pedestrian, at least one cyclist, and / or at least one structure (e.g., a building, a sign, a fire hydrant, etc.), etc. Each object 104 is stationary (e.g., located at a fixed location and over a period of time) or moves (e.g., has a speed and is associated with at least one trajectory). In some embodiments, objects 104 are associated with corresponding locations in area 108.

[0029] Routes 106a-106n (individually referred to as routes 106 and collectively referred to as routes 106) are each associated with (e.g., specify a series of actions (also referred to as trajectories) connecting states along which the AV can navigate. Each route 106 begins at an initial state (e.g., a state corresponding to a first spatiotemporal location and / or speed, etc.) and ends at a final target state (e.g., a state corresponding to a second spatiotemporal location different from the first spatiotemporal location) or a target zone (e.g., a subspace of acceptable states (e.g., terminal states)). In some embodiments, the first state includes a location where one or more individuals will board the AV, and the second state or zone includes one or more locations where one or more individuals boarding the AV will disembark. In some embodiments, routes 106 include multiple acceptable state sequences (e.g., multiple spatiotemporal location sequences) that are associated with (e.g., define multiple trajectories). In an example, routes 106 include only high-level actions or imprecise state locations, such as a series of connecting roads indicating a change of direction at a roadway intersection, etc. Additionally or alternatively, the route 106 may include more precise actions or states, such as, for example, specific target lanes or precise locations within lane regions and target speeds at those locations, etc. In an example, the route 106 includes a plurality of precise state sequences along at least one high-level action with a limited look-ahead horizon to an intermediate target, wherein a combination of consecutive iterations of the limited horizon state sequences cumulatively correspond to a plurality of trajectories that collectively form a high-level route terminating at a final target state or region.

[0030] The area 108 includes a physical area (e.g., a geographic region) in which the vehicle 102 can navigate. In an example, the area 108 includes at least one state (e.g., a country, a province, a separate state of a plurality of states included in a country, etc.), at least a portion of a state, at least one city, at least a portion of a city, etc. In some embodiments, the area 108 includes at least one named thoroughfare (referred to herein as a "road"), such as a highway, an interstate highway, a parkway, a city street, etc. Additionally or alternatively, in some examples, the area 108 includes at least one unnamed road, such as a driveway, a section of a parking lot, a section of an open space and / or undeveloped area, a dirt road, etc. In some embodiments, the road includes at least one lane (e.g., a portion of the road that the vehicle 102 can traverse). In an example, the road includes at least one lane associated with (e.g., identified based on) at least one lane marking line.

[0031] The vehicle-to-infrastructure (V2I) device 110 (sometimes referred to as a vehicle-to-infrastructure or vehicle-to-everything (V2X) device) includes at least one device configured to communicate with the vehicle 102 and / or the V2I system 118. In some embodiments, the V2I device 110 is configured to communicate with the vehicle 102, the remote AV system 114, the fleet management system 116, and / or the V2I system 118 via the network 112. In some embodiments, the V2I device 110 includes a radio frequency identification (RFID) device, a sign, a camera (e.g., a two-dimensional (2D) and / or three-dimensional (3D) camera), lane markings, street lights, parking meters, etc. In some embodiments, the V2I device 110 is configured to communicate directly with the vehicle 102. Additionally or alternatively, in some embodiments, the V2I device 110 is configured to communicate with the vehicle 102, the remote AV system 114, and / or the fleet management system 116 via the V2I system 118. In some embodiments, the V2I device 110 is configured to communicate with the V2I system 118 via the network 112.

[0032] The network 112 includes one or more wired and / or wireless networks. In an example, the network 112 includes a cellular network (e.g., a long-term evolution (LTE) network, a third generation (3G) network, a fourth generation (4G) network, a fifth generation (5G) network, a code division multiple access (CDMA) network, etc.), a public land mobile network (PLMN), a local area network (LAN), a wide area network (WAN), a metropolitan area network (MAN), a telephone network (e.g., a public switched telephone network (PSTN)), a private network, an ad hoc network, an intranet, the Internet, a fiber-based network, a cloud computing network, etc., and / or a combination of some or all of these networks, etc.

[0033] The remote AV system 114 includes at least one device configured to communicate with the vehicle 102, the V2I device 110, the network 112, the fleet management system 116, and / or the V2I system 118 via the network 112. In an example, the remote AV system 114 includes a server, a server group, and / or other similar devices. In some embodiments, the remote AV system 114 is co-located with the fleet management system 116. In some embodiments, the remote AV system 114 participates in the installation of some or all of the components of the vehicle (including autonomous systems, autonomous vehicle computing, and / or software implemented by autonomous vehicle computing, etc.). In some embodiments, the remote AV system 114 maintains (e.g., updates and / or replaces) these components and / or software during the life of the vehicle.

[0034] The queue management system 116 includes at least one device configured to communicate with the vehicles 102, the V2I devices 110, the remote AV system 114, and / or the V2I system 118. In an example, the queue management system 116 includes a server, a server group, and / or other similar devices. In some embodiments, the queue management system 116 is associated with a ridesharing company (e.g., an organization for controlling the operation of multiple vehicles (e.g., vehicles including autonomous systems and / or vehicles not including autonomous systems)).

[0035] In some embodiments, the V2I system 118 includes at least one device configured to communicate with the vehicle 102, the V2I device 110, the remote AV system 114, and / or the fleet management system 116 via the network 112. In some examples, the V2I system 118 is configured to communicate with the V2I device 110 via a connection other than the network 112. In some embodiments, the V2I system 118 includes a server, a server group, and / or other similar devices. In some embodiments, the V2I system 118 is associated with a municipality or a private agency (e.g., a private agency for maintaining the V2I device 110, etc.).

[0036] supply Figure 1 The number and arrangement of elements illustrated are examples. Figure 1 There may be additional elements, fewer elements, different elements, and / or differently arranged elements than those illustrated. Additionally or alternatively, at least one element of environment 100 may be described as being Figure 1 Additionally or alternatively, at least one set of elements of environment 100 may perform one or more functions described as being performed by at least one different set of elements of environment 100.

[0037] Reference now Figure 2 , a vehicle 200 (the vehicle 200 may be Figure 1 102) includes, or is associated with, autonomous system 202, powertrain control system 204, steering control system 206, and braking system 208. In some embodiments, vehicle 200 is similar to vehicle 102 (see Figure 1 ). In some embodiments, the autonomous system 202 is configured to give the vehicle 200 autonomous driving capabilities (e.g., implementing at least one of the following driving automatic or maneuvering-based functions, features, and / or devices, etc., which enable the vehicle 200 to operate partially or completely without human intervention, including but not limited to fully autonomous vehicles (e.g., vehicles that abandon reliance on human intervention, such as Level 5 ADS operating vehicles, etc.), highly autonomous vehicles (e.g., vehicles that abandon reliance on human intervention in certain situations, such as Level 4 ADS operating vehicles, etc.), and / or conditionally autonomous vehicles (e.g., vehicles that abandon reliance on human intervention in limited situations, such as Level 3 ADS operating vehicles, etc.). S operating vehicle, etc.). In one embodiment, the autonomous system 202 includes the operational or tactical functionality required to enable the vehicle 200 to operate in road traffic and continuously perform part or all of the dynamic driving tasks (DDT). In another embodiment, the autonomous system 202 includes an advanced driver assistance system (ADAS) including driver support features. The autonomous system 202 supports various levels of driving automation ranging from no driving automation (e.g., level 0) to full driving automation (e.g., level 5). For a detailed description of fully autonomous vehicles and highly autonomous vehicles, reference may be made to SAE International's standard J3016: Taxonomy and Definitions for Terms Related to On-Road Motor Vehicle Automated Driving Systems, the entire contents of which are incorporated by reference. In some embodiments, the vehicle 200 is associated with an autonomous queue manager and / or a ride-sharing company.

[0038] Autonomous system 202 includes a sensor suite that includes one or more devices such as camera 202a, LiDAR sensor 202b, Radar sensor 202c, and microphone 202d. In some embodiments, autonomous system 202 may include more or fewer devices and / or different devices (e.g., ultrasonic sensors, inertial sensors, GPS receivers (discussed below), and / or odometer sensors for generating data associated with an indication of the distance that vehicle 200 has traveled, etc.). In some embodiments, autonomous system 202 uses one or more devices included in autonomous system 202 to generate data associated with environment 100 described herein. Data generated by one or more devices of autonomous system 202 can be used by one or more systems described herein to observe the environment (e.g., environment 100) in which vehicle 200 is located. In some embodiments, autonomous system 202 includes communication device 202e, autonomous vehicle computing 202f, drive-by-wire (DBW) system 202h, and safety controller 202g.

[0039] The camera 202a includes a communication device 202e, an autonomous vehicle computer 202f, and / or a safety controller 202g configured to communicate with the communication device 202e via a bus (e.g., Figure 3 The camera 202a includes at least one device for communicating with the autonomous vehicle computing 202f (e.g., an image processing unit 202a, a bus ... Figure 1In some embodiments, the autonomous vehicle computing 202f determines a depth to one or more objects in a field of view of at least two of the plurality of cameras based on image data from the at least two cameras. In some embodiments, the camera 202a is configured to capture images of objects within a distance relative to the camera 202a (e.g., up to 100 meters and / or up to 1 kilometer, etc.). Thus, the camera 202a includes features such as sensors and lenses that are optimized for sensing objects at one or more distances relative to the camera 202a.

[0040] In an embodiment, the camera 202a includes at least one camera configured to capture one or more images associated with one or more traffic lights, street signs, and / or other physical objects that provide visual navigation information. In some embodiments, the camera 202a generates traffic light data associated with the one or more images. In some examples, the camera 202a generates traffic light detection (TLD) data associated with one or more images including a format (e.g., RAW, JPEG, and / or PNG, etc.). In some embodiments, the camera 202a that generates TLD data differs from other systems including cameras described herein in that the camera 202a may include one or more cameras with a wide field of view (e.g., a wide-angle lens, a fisheye lens, and / or a lens with a viewing angle of about 120 degrees or greater, etc.) to generate images related to as many physical objects as possible.

[0041] The light detection and ranging (LiDAR) sensor 202b includes a communication device 202e, an autonomous vehicle computing device 202f, and / or a safety controller 202g via a bus (e.g., Figure 3The LiDAR sensor 202b includes at least one device that communicates with a bus (the same or similar bus as the bus 302 of the embodiment of the present invention). The LiDAR sensor 202b includes a system configured to emit light from a light emitter (e.g., a laser emitter). The light emitted by the LiDAR sensor 202b includes light outside the visible spectrum (e.g., infrared light, etc.). In some embodiments, during operation, the light emitted by the LiDAR sensor 202b encounters a physical object (e.g., a vehicle) and is reflected back to the LiDAR sensor 202b. In some embodiments, the light emitted by the LiDAR sensor 202b does not penetrate the physical object encountered by the light. The LiDAR sensor 202b also includes at least one light detector that detects the light emitted from the light emitter after encountering the physical object. In some embodiments, at least one data processing system associated with the LiDAR sensor 202b generates an image (e.g., a point cloud and / or a combined point cloud, etc.) representing objects included in the field of view of the LiDAR sensor 202b. In some examples, at least one data processing system associated with the LiDAR sensor 202b generates an image representing the boundaries of the physical object and / or the surface of the physical object (e.g., the topology of the surface), etc. In such examples, the image is used to determine the boundaries of the physical object in the field of view of the LiDAR sensor 202b.

[0042] The radio detection and ranging (Radar) sensor 202c includes a sensor configured to communicate with the communication device 202e, the autonomous vehicle computing 202f, and / or the safety controller 202g via a bus (e.g., Figure 3 At least one device for communicating with a bus (same or similar bus as bus 302 of the embodiment of the present invention). Radar sensor 202c includes a system configured to transmit (pulsed or continuous) radio waves. The radio waves transmitted by Radar sensor 202c include radio waves within a predetermined spectrum. In some embodiments, during operation, the radio waves transmitted by Radar sensor 202c encounter physical objects and are reflected back to Radar sensor 202c. In some embodiments, the radio waves transmitted by Radar sensor 202c are not reflected by some objects. In some embodiments, at least one data processing system associated with Radar sensor 202c generates a signal representing an object included in the field of view of Radar sensor 202c. For example, at least one data processing system associated with Radar sensor 202c generates an image representing the boundary of a physical object and / or the surface of a physical object (e.g., the topology of the surface), etc. In some examples, the image is used to determine the boundary of a physical object in the field of view of Radar sensor 202c.

[0043] The microphone 202d includes a microphone configured to communicate with the communication device 202e, the autonomous vehicle computing device 202f, and / or the safety controller 202g via a bus (e.g., Figure 3 At least one device for communicating with the vehicle 200 (the same or similar bus as bus 302 of FIG. 1 ). Microphone 202d includes one or more microphones (e.g., an array microphone and / or an external microphone, etc.) that capture an audio signal and generate data associated with (e.g., representing) the audio signal. In some examples, microphone 202d includes a transducer device and / or the like. In some embodiments, one or more systems described herein can receive the data generated by microphone 202d and determine the position (e.g., distance, etc.) of an object relative to vehicle 200 based on an audio signal associated with the data.

[0044] The communication device 202e includes at least one device configured to communicate with the camera 202a, the LiDAR sensor 202b, the Radar sensor 202c, the microphone 202d, the autonomous vehicle computing 202f, the safety controller 202g, and / or the Drive-By-Wire (DBW) system 202h. For example, the communication device 202e may include at least one device configured to communicate with the camera 202a, the LiDAR sensor 202b, the Radar sensor 202c, the microphone 202d, the autonomous vehicle computing 202f, the safety controller 202g, and / or the Drive-By-Wire (DBW) system 202h. Figure 3 The communication device 202e may be a device that is the same as or similar to the communication interface 314 of the vehicle. In some embodiments, the communication device 202e includes a vehicle-to-vehicle (V2V) communication device (eg, a device for enabling wireless communication of data between vehicles).

[0045] The autonomous vehicle computing 202f includes at least one device configured to communicate with the camera 202a, the LiDAR sensor 202b, the Radar sensor 202c, the microphone 202d, the communication device 202e, the safety controller 202g and / or the DBW system 202h. In some examples, the autonomous vehicle computing 202f includes devices such as client devices, mobile devices (e.g., cellular phones and / or tablet computers, etc.), and / or servers (e.g., computing devices including one or more central processing units and / or graphics processing units, etc.). In some embodiments, the autonomous vehicle computing 202f is configured to implement the autonomous vehicle software 400 described herein. In an embodiment, the autonomous vehicle computing 202f is the same as or similar to a distributed computing architecture. Additionally or alternatively, in some embodiments, the autonomous vehicle computing 202f is configured to communicate with an autonomous vehicle system (e.g., with Figure 1 remote AV system 114 of the same or similar autonomous vehicle system), a fleet management system (e.g., Figure 1 of the same or similar queue management system as the queue management system 116), V2I devices (e.g., Figure 1V2I device 110 that is the same as or similar to V2I device 110) and / or V2I system (e.g., Figure 1 The V2I system 118 may communicate with the same or similar V2I system.

[0046] Safety controller 202g includes at least one device configured to communicate with camera 202a, LiDAR sensor 202b, Radar sensor 202c, microphone 202d, communication device 202e, autonomous vehicle computing 202f, and / or DBW system 202h. In some examples, safety controller 202g includes one or more controllers (electrical controllers and / or electromechanical controllers, etc.) configured to generate and / or transmit control signals to operate one or more devices of vehicle 200 (e.g., powertrain control system 204, steering control system 206, and / or braking system 208, etc.). In some embodiments, safety controller 202g is configured to generate control signals that take precedence over (e.g., override) control signals generated and / or transmitted by autonomous vehicle computing 202f.

[0047] The DBW system 202h includes at least one device configured to communicate with the communication device 202e and / or the autonomous vehicle computing 202f. In some examples, the DBW system 202h includes one or more controllers (e.g., electrical controllers and / or electromechanical controllers, etc.) configured to generate and / or transmit control signals to operate one or more devices of the vehicle 200 (e.g., powertrain control system 204, steering control system 206, and / or braking system 208, etc.). Additionally or alternatively, one or more controllers of the DBW system 202h are configured to generate and / or transmit control signals to operate at least one different device of the vehicle 200 (e.g., turn signal lights, headlights, door locks, and / or windshield wipers, etc.).

[0048] The powertrain control system 204 includes at least one device configured to communicate with the DBW system 202h. In some examples, the powertrain control system 204 includes at least one controller and / or actuator, etc. In some embodiments, the powertrain control system 204 receives control signals from the DBW system 202h, and the powertrain control system 204 causes the vehicle 200 to perform longitudinal vehicle movement such as starting forward movement, stopping forward movement, starting backward movement, stopping backward movement, accelerating in a certain direction, decelerating in a certain direction, etc., or lateral vehicle movement such as turning left and / or turning right. In an example, the powertrain control system 204 increases, maintains the same, or decreases the energy (e.g., fuel and / or electricity, etc.) provided to the motor of the vehicle, thereby rotating or not rotating at least one wheel of the vehicle 200.

[0049] The steering control system 206 includes at least one device configured to rotate one or more wheels of the vehicle 200. In some examples, the steering control system 206 includes at least one controller and / or actuator, etc. In some embodiments, the steering control system 206 rotates the two front wheels and / or the two rear wheels of the vehicle 200 to the left or right to turn the vehicle 200 left or right. In other words, the steering control system 206 causes the activities necessary to adjust the y-axis component of the vehicle's motion.

[0050] Braking system 208 includes at least one device configured to actuate one or more brakes to decelerate and / or hold vehicle 200 stationary. In some examples, braking system 208 includes at least one controller and / or actuator configured to cause one or more calipers associated with one or more wheels of vehicle 200 to close on respective rotors of vehicle 200. Additionally or alternatively, in some examples, braking system 208 includes an automatic emergency braking (AEB) system and / or a regenerative braking system, etc.

[0051] In some embodiments, vehicle 200 includes at least one platform sensor (not explicitly illustrated) for measuring or inferring a property of a state or condition of vehicle 200. In some examples, vehicle 200 includes platform sensors such as a global positioning system (GPS) receiver, an inertial measurement unit (IMU), wheel rate sensors, wheel brake pressure sensors, wheel torque sensors, engine torque sensors, and / or steering angle sensors. Although braking system 208 is Figure 2 200 , but the braking system 208 may be located anywhere in the vehicle 200 .

[0052] Reference now Figure 3 , a schematic diagram of an exemplary device 300. As illustrated, device 300 includes a processor 304, a memory 306, a storage component 308, an input interface 310, an output interface 312, a communication interface 314, and a bus 302. In some embodiments, device 300 corresponds to: at least one device of vehicle 102 (e.g., at least one device of a system of vehicle 102); and / or one or more devices of network 112 (e.g., one or more devices of a system of network 112). In some embodiments, one or more devices of vehicle 102 (e.g., one or more devices of a system of vehicle 102), and / or one or more devices of network 112 (e.g., one or more devices of a system of network 112) include at least one device 300 and / or at least one component of device 300. As Figure 3As shown, apparatus 300 includes a bus 302 , a processor 304 , a memory 306 , a storage component 308 , an input interface 310 , an output interface 312 , and a communication interface 314 .

[0053] The bus 302 includes components for communication between components of the licensing device 300. In some cases, the processor 304 includes a processor (e.g., a central processing unit (CPU), a graphics processing unit (GPU), and / or an accelerated processing unit (APU), etc.), a digital signal processor (DSP), and / or any processing component that can be programmed to perform at least one function (e.g., a field programmable gate array (FPGA) and / or an application specific integrated circuit (ASIC), etc.). The memory 306 includes a random access memory (RAM), a read-only memory (ROM), and / or another type of dynamic and / or static storage device (e.g., flash memory, magnetic memory, and / or optical memory, etc.) that stores data and / or instructions for use by the processor 304.

[0054] Storage component 308 stores data and / or software related to the operation and use of device 300. In some examples, storage component 308 includes a hard disk (e.g., a magnetic disk, an optical disk, a magneto-optical disk, and / or a solid-state disk, etc.), a compact disk (CD), a digital versatile disk (DVD), a floppy disk, a cassette, a tape, a CD-ROM, a RAM, a PROM, an EPROM, a FLASH-EPROM, an NV-RAM, and / or another type of computer-readable medium, and a corresponding drive.

[0055] The input interface 310 includes components that permit the device 300 to receive information, such as via user input (e.g., a touch screen display, a keyboard, a keypad, a mouse, a button, a switch, a microphone, and / or a camera, etc.). Additionally or alternatively, in some embodiments, the input interface 310 includes a sensor for sensing information (e.g., a global positioning system (GPS) receiver, an accelerometer, a gyroscope, and / or an actuator, etc.). The output interface 312 includes components for providing output information from the device 300 (e.g., a display, a speaker, and / or one or more light emitting diodes (LEDs), etc.).

[0056] In some embodiments, communication interface 314 includes a transceiver-like component (e.g., a transceiver and / or a separate receiver and transmitter, etc.) that permits device 300 to communicate with other devices via a wired connection, a wireless connection, or a combination of a wired connection and a wireless connection. In some examples, communication interface 314 permits device 300 to receive information from another device and / or provide information to another device. In some examples, communication interface 314 includes an Ethernet interface, an optical interface, a coaxial interface, an infrared interface, a radio frequency (RF) interface, a universal serial bus (USB) interface, interface and / or cellular network interface, etc.

[0057] In some embodiments, the device 300 performs one or more processes described herein. The device 300 performs these processes based on the processor 304 executing software instructions stored by a computer-readable medium such as a memory 306 and / or a storage component 308. Computer-readable media (e.g., non-transitory computer-readable media) are defined herein as non-transitory memory devices. Non-transitory memory devices include storage space located within a single physical storage device or storage space distributed across multiple physical storage devices.

[0058] In some embodiments, the software instructions are read into the memory 306 and / or storage component 308 from another computer-readable medium or from another device via the communication interface 314. The software instructions stored in the memory 306 and / or storage component 308, when executed, cause the processor 304 to perform one or more processes described herein. Additionally or alternatively, hardwired circuitry is used in place of or in combination with the software instructions to perform one or more processes described herein. Therefore, unless expressly stated otherwise, the embodiments described herein are not limited to any specific combination of hardware circuitry and software.

[0059] The memory 306 and / or the storage component 308 include a data storage unit or at least one data structure (e.g., a database, etc.). The device 300 can receive information from the data storage unit or at least one data structure in the memory 306 or the storage component 308, store information in the data storage unit or at least one data structure, communicate information to the data storage unit or at least one data structure, or search for information stored in the data storage unit or at least one data structure. In some examples, the information includes network data, input data, output data, or any combination thereof.

[0060] In some embodiments, the device 300 is configured to execute software instructions stored in the memory 306 and / or the memory of another device (e.g., another device that is the same as or similar to the device 300). As used herein, the term "module" refers to at least one instruction stored in the memory 306 and / or the memory of another device, which, when executed by the processor 304 and / or the processor of another device (e.g., another device that is the same as or similar to the device 300), causes the device 300 (e.g., at least one component of the device 300) to perform one or more processes described herein. In some embodiments, the module is implemented in software, firmware, and / or hardware, etc.

[0061] supply Figure 3 The number and arrangement of components illustrated are examples. Figure 3 The device 300 may include additional components, fewer components, different components, or differently arranged components than the components illustrated. Additionally or alternatively, a set of components (e.g., one or more components) of the device 300 may perform one or more functions described as being performed by another component or another set of components of the device 300.

[0062] Reference now Figure 4A , illustrates an example block diagram of autonomous vehicle software 400 (sometimes referred to as an "AV stack"). As illustrated, autonomous vehicle software 400 includes a perception system 402 (sometimes referred to as a perception module), a planning system 404 (sometimes referred to as a planning module), a positioning system 406 (sometimes referred to as a positioning module), a control system 408 (sometimes referred to as a control module), and a database 410. In some embodiments, perception system 402, planning system 404, positioning system 406, control system 408, and database 410 are included in and / or implemented in an automatic navigation system of a vehicle (e.g., autonomous vehicle computing 202f of vehicle 200). Additionally or alternatively, in some embodiments, perception system 402, planning system 404, positioning system 406, control system 408, and database 410 are included in one or more independent systems (e.g., one or more systems that are the same or similar to autonomous vehicle software 400, etc.). In some examples, the perception system 402, planning system 404, positioning system 406, control system 408, and database 410 are included in one or more independent systems located in the vehicle and / or at least one remote system as described herein. In some embodiments, any and / or all of the systems included in the autonomous vehicle software 400 are implemented in software (e.g., software instructions stored in a memory), computer hardware (e.g., by a microprocessor, microcontroller, application specific integrated circuit (ASIC) and / or field programmable gate array (FPGA), etc.), or a combination of computer software and computer hardware. It will also be understood that in some embodiments, the autonomous vehicle software 400 is configured to communicate with a remote system (e.g., an autonomous vehicle system that is the same or similar to the remote AV system 114, a fleet management system 116 that is the same or similar to the fleet management system 116, and / or a V2I system that is the same or similar to the V2I system 118, etc.).

[0063] In some embodiments, the perception system 402 receives data associated with at least one physical object in the environment (e.g., data used by the perception system 402 to detect at least one physical object) and classifies the at least one physical object. In some examples, the perception system 402 receives image data captured by at least one camera (e.g., camera 202a), the image being associated with (e.g., representing) one or more physical objects within the field of view of the at least one camera. In such examples, the perception system 402 classifies the at least one physical object based on one or more groups of physical objects (e.g., bicycles, vehicles, traffic signs, and / or pedestrians, etc.). In some embodiments, based on the classification of the physical object by the perception system 402, the perception system 402 transmits data associated with the classification of the physical object to the planning system 404.

[0064] In some embodiments, the planning system 404 receives data associated with a destination and generates data associated with at least one route (e.g., route 106) along which a vehicle (e.g., vehicle 102) can travel toward the destination. In some embodiments, the planning system 404 periodically or continuously receives data (e.g., data associated with the classification of physical objects described above) from the perception system 402, and the planning system 404 updates at least one trajectory or generates at least one different trajectory based on the data generated by the perception system 402. In other words, the planning system 404 can perform tasks related to tactical functions required to operate the vehicle 102 in traffic on the road. Tactical efforts involve maneuvering the vehicle in traffic during the journey, which includes but is not limited to deciding whether and when to overtake another vehicle, change lanes, or select an appropriate rate, acceleration, deceleration, etc. In some embodiments, the planning system 404 receives data associated with an updated position of the vehicle (e.g., vehicle 102) from the positioning system 406, and the planning system 404 updates at least one trajectory or generates at least one different trajectory based on the data generated by the positioning system 406.

[0065] In some embodiments, the positioning system 406 receives data associated with (e.g., representing) a location of a vehicle (e.g., vehicle 102) in an area. In some examples, the positioning system 406 receives LiDAR data associated with at least one point cloud generated by at least one LiDAR sensor (e.g., LiDAR sensor 202b). In some examples, the positioning system 406 receives data associated with at least one point cloud from multiple LiDAR sensors, and the positioning system 406 generates a combined point cloud based on each point cloud. In these examples, the positioning system 406 compares the at least one point cloud or the combined point cloud with a two-dimensional (2D) and / or three-dimensional (3D) map of the area stored in the database 410. Then, based on the positioning system 406 comparing the at least one point cloud or the combined point cloud with the map, the positioning system 406 determines the position of the vehicle in the area. In some embodiments, the map includes a combined point cloud of the area generated before the navigation of the vehicle. In some embodiments, the map includes, but is not limited to, a high-precision map of roadway geometry, a map describing the road network connectivity, a map describing the physical properties of the roadway (such as traffic speed, traffic volume, the number of vehicle and bicycle traffic lanes, lane width, lane traffic direction or the type and location of lane markings, or a combination thereof, etc.), and a map describing the spatial location of road features (such as crosswalks, traffic signs, or various types of other driving lights, etc.). In some embodiments, the map is generated in real time based on data received by the perception system.

[0066] In another example, positioning system 406 receives global navigation satellite system (GNSS) data generated by a global positioning system (GPS) receiver. In some examples, positioning system 406 receives GNSS data associated with a location of a vehicle in an area, and positioning system 406 determines the latitude and longitude of the vehicle in the area. In such an example, positioning system 406 determines the position of the vehicle in the area based on the latitude and longitude of the vehicle. In some embodiments, positioning system 406 generates data associated with the position of the vehicle. In some examples, based on the location of the vehicle determined by positioning system 406, positioning system 406 generates data associated with the position of the vehicle. In such an example, the data associated with the position of the vehicle include data associated with one or more semantic properties corresponding to the position of the vehicle.

[0067] In some embodiments, the control system 408 receives data associated with at least one trajectory from the planning system 404, and the control system 408 controls the operation of the vehicle. In some examples, the control system 408 receives data associated with at least one trajectory from the planning system 404, and the control system 408 controls the operation of the vehicle by generating and transmitting control signals to operate the powertrain control system (e.g., DBW system 202h and / or powertrain control system 204, etc.), the steering control system (e.g., steering control system 206) and / or the braking system (e.g., braking system 208). For example, the control system 408 is configured to perform operational functions such as lateral vehicle motion control or longitudinal vehicle motion control. Lateral vehicle motion control causes the activities necessary to adjust the y-axis component of the vehicle motion. Longitudinal vehicle motion control causes the activities necessary to adjust the x-axis component of the vehicle motion. In the example, in the case where the trajectory includes a left turn, the control system 408 transmits a control signal to cause the steering control system 206 to adjust the steering angle of the vehicle 200, thereby turning the vehicle 200 left. Additionally or alternatively, the control system 408 generates and transmits control signals to cause other devices of the vehicle 200 (eg, headlights, turn signal lights, door locks, and / or windshield wipers, etc.) to change states.

[0068] In some embodiments, perception system 402, planning system 404, positioning system 406, and / or control system 408 implement at least one machine learning model (e.g., at least one multi-layer perceptron (MLP), at least one convolutional neural network (CNN), at least one recurrent neural network (RNN), at least one autoencoder, and / or at least one transformer, etc.). In some examples, perception system 402, planning system 404, positioning system 406, and / or control system 408 implement at least one machine learning model alone or in combination with one or more of the above systems. In some examples, perception system 402, planning system 404, positioning system 406, and / or control system 408 implement at least one machine learning model as part of a pipeline (e.g., a pipeline for identifying one or more objects located in an environment, etc.). The following is about FIG. 4B to FIG. 4D Includes examples of implementations of machine learning models.

[0069] Database 410 stores data transmitted to, received from, and / or updated by perception system 402, planning system 404, positioning system 406, and / or control system 408. In some examples, database 410 includes a storage component (e.g., a storage component) for storing data and / or software related to operations and using at least one system of autonomous vehicle software 400. Figure 3In some embodiments, database 410 stores data associated with a 2D and / or 3D map of at least one area. In some examples, database 410 stores data associated with a 2D and / or 3D map of a portion of a city, portions of multiple cities, multiple cities, counties, states, and / or countries (State) (e.g., a country), etc. In such an example, a vehicle (e.g., a vehicle that is the same or similar to vehicle 102 and / or vehicle 200) can be driven along one or more drivable areas (e.g., single-lane roads, multi-lane roads, highways, remote roads, and / or off-road roads, etc.) and cause at least one LiDAR sensor (e.g., a LiDAR sensor that is the same or similar to LiDAR sensor 202b) to generate data associated with an image representing an object included in the field of view of the at least one LiDAR sensor.

[0070] In some embodiments, database 410 can be implemented across multiple devices. In some examples, database 410 includes a vehicle (e.g., a vehicle that is the same or similar to vehicle 102 and / or vehicle 200), an autonomous vehicle system (e.g., an autonomous vehicle system that is the same or similar to remote AV system 114), a fleet management system (e.g., a vehicle that is the same or similar to remote AV system 114), and a fleet management system (e.g., a vehicle that is the same or similar to remote AV system 114). Figure 1 The same or similar queue management system as the queue management system 116 of FIG. 1 and / or the V2I system (e.g., Figure 1 The V2I system 118 is the same as or similar to the V2I system 118).

[0071] Reference now Figure 4B , a diagram illustrating an implementation of a machine learning model. More specifically, a diagram illustrating an implementation of a convolutional neural network (CNN) 420. For purposes of illustration, the following description of CNN 420 will be with respect to implementing CNN 420 by perception system 402. However, it will be understood that in some examples, CNN 420 (e.g., one or more components of CNN 420) is implemented by other systems (such as planning system 404, positioning system 406, and / or control system 408, etc.) other than or in addition to perception system 402. Although CNN 420 includes certain features as described herein, these features are provided for purposes of illustration and are not intended to limit the present disclosure.

[0072] CNN 420 includes a plurality of convolutional layers including a first convolutional layer 422, a second convolutional layer 424, and a convolutional layer 426. In some embodiments, CNN 420 includes a subsampling layer 428 (sometimes referred to as a pooling layer). In some embodiments, subsampling layer 428 and / or other subsampling layers have a dimension that is smaller than the dimension of the upstream system (i.e., the number of nodes). With the subsampling layer 428 having a dimension that is smaller than the dimension of the upstream layer, CNN 420 merges the amount of data associated with the initial input and / or output of the upstream layer, thereby reducing the amount of computation required for CNN 420 to perform downstream convolution operations. Additionally or alternatively, with the subsampling layer 428 being associated with (e.g., configured to perform) at least one subsampling function (as described below with respect to Figure 4C and Figure 4D As described above, CNN 420 incorporates the amount of data associated with the initial input.

[0073] The perception system 402 performs the convolution operation based on the perception system 402 providing respective inputs and / or outputs associated with each of the first convolution layer 422, the second convolution layer 424, and the convolution layer 426 to generate respective outputs. In some examples, the perception system 402 implements the CNN 420 based on the perception system 402 providing data as input to the first convolution layer 422, the second convolution layer 424, and the convolution layer 426. In such examples, the perception system 402 provides data as input to the first convolution layer 422, the second convolution layer 424, and the convolution layer 426 based on the perception system 402 receiving data from one or more different systems (e.g., one or more systems of a vehicle that is the same or similar to the vehicle 102, a remote AV system that is the same or similar to the remote AV system 114, a queue management system that is the same or similar to the queue management system 116, and / or a V2I system that is the same or similar to the V2I system 118, etc.). The following is about Figure 4C Includes a detailed description of the convolution operation.

[0074] In some embodiments, the perception system 402 provides data associated with the input (referred to as the initial input) to the first convolutional layer 422, and the perception system 402 generates data associated with the output using the first convolutional layer 422. In some embodiments, the perception system 402 provides the output generated by the convolutional layer as input to a different convolutional layer. For example, the perception system 402 provides the output of the first convolutional layer 422 as input to the subsampling layer 428, the second convolutional layer 424, and / or the convolutional layer 426. In such an example, the first convolutional layer 422 is referred to as an upstream layer, and the subsampling layer 428, the second convolutional layer 424, and / or the convolutional layer 426 are referred to as downstream layers. Similarly, in some embodiments, the perception system 402 provides the output of the subsampling layer 428 to the second convolutional layer 424 and / or the convolutional layer 426, and in this example, the subsampling layer 428 will be referred to as the upstream layer, and the second convolutional layer 424 and / or the convolutional layer 426 will be referred to as the downstream layer.

[0075] In some embodiments, before the perception system 402 provides the input to the CNN 420, the perception system 402 processes the data associated with the input provided to the CNN 420. For example, the perception system 402 processes the data associated with the input provided to the CNN 420 based on the perception system 402 normalizing the sensor data (e.g., image data, LiDAR data, and / or Radar data, etc.).

[0076] In some embodiments, CNN 420 generates an output based on perception system 402 performing convolution operations associated with each convolution layer. In some examples, CNN 420 generates an output based on perception system 402 performing convolution operations associated with each convolution layer and the initial input. In some embodiments, perception system 402 generates an output and provides the output to fully connected layer 430. In some examples, perception system 402 provides the output of convolution layer 426 to fully connected layer 430, wherein fully connected layer 430 includes data associated with multiple feature values ​​referred to as F1, F2, ..., FN. In this example, the output of convolution layer 426 includes data associated with multiple output feature values ​​representing predictions.

[0077] In some embodiments, perception system 402 identifies a prediction from the plurality of predictions based on perception system 402 identifying a feature value associated with a highest likelihood of being a correct prediction from the plurality of predictions. For example, where fully connected layer 430 includes feature values ​​F1, F2, ..., FN and F1 is the largest feature value, perception system 402 identifies the prediction associated with F1 as the correct prediction from the plurality of predictions. In some embodiments, perception system 402 trains CNN 420 to generate the predictions. In some examples, perception system 402 trains CNN 420 to generate the predictions based on perception system 402 providing training data associated with the predictions to CNN 420.

[0078] Reference now Figure 4C and Figure 4D , a diagram illustrating an example operation of CNN 440 utilizing perception system 402. In some embodiments, CNN 440 (e.g., one or more components of CNN 440) is coupled to CNN 420 (e.g., one or more components of CNN 420) (see Figure 4B ) are the same or similar.

[0079] At step 450, the perception system 402 provides data associated with the image as input to the CNN 440 (step 450). For example, as illustrated, the perception system 402 provides data associated with the image to the CNN 440, where the image is a grayscale image represented as values ​​stored in a two-dimensional (2D) array. In some embodiments, the data associated with the image may include data associated with a color image represented as values ​​stored in a three-dimensional (3D) array. Additionally or alternatively, the data associated with the image may include data associated with an infrared image and / or a Radar image, etc.

[0080] At step 455, CNN 440 performs a first convolution function. For example, CNN 440 performs a first convolution function based on CNN 440 providing a value representing an image as an input to one or more neurons (not explicitly illustrated) included in first convolution layer 442. In this example, the value representing the image may correspond to a value of a region (sometimes referred to as a receptive field) representing the image. In some embodiments, each neuron is associated with a filter (not explicitly illustrated). The filter (sometimes referred to as a kernel) may be represented as an array of values ​​corresponding in size to the value provided as input to the neuron. In one example, the filter may be configured to identify edges (e.g., horizontal lines, vertical lines, and / or straight lines, etc.). In successive convolution layers, the filters associated with the neurons may be configured to continuously identify more complex patterns (e.g., arcs and / or objects, etc.).

[0081] In some embodiments, CNN 440 performs a first convolution function based on CNN 440 multiplying the values ​​of each neuron provided as input to one or more neurons included in the first convolution layer 442 by the values ​​of the filters corresponding to each neuron in the same or more neurons. For example, CNN 440 may multiply the values ​​of each neuron provided as input to one or more neurons included in the first convolution layer 442 by the values ​​of the filters corresponding to each neuron in the one or more neurons to generate a single value or an array of values ​​as output. In some embodiments, the collective output of the neurons of the first convolution layer 442 is referred to as a convolution output. In some embodiments, when each neuron has the same filter, the convolution output is referred to as a feature map.

[0082] In some embodiments, CNN 440 provides the output of each neuron of the first convolutional layer 442 to the neurons of the downstream layer. For clarity, the upstream layer may be a layer that transmits data to a different layer (referred to as the downstream layer). For example, CNN 440 may provide the output of each neuron of the first convolutional layer 442 to the corresponding neurons of the subsampling layer. In the example, CNN 440 provides the output of each neuron of the first convolutional layer 442 to the corresponding neurons of the first subsampling layer 444. In some embodiments, CNN 440 adds a bias value to the aggregate set of all values ​​provided to each neuron of the downstream layer. For example, CNN 440 adds a bias value to the aggregate set of all values ​​provided to each neuron of the first subsampling layer 444. In such an example, CNN 440 determines the final value to be provided to each neuron of the first subsampling layer 444 based on the aggregate set of all values ​​provided to each neuron and the activation function associated with each neuron of the first subsampling layer 444.

[0083] At step 460, CNN 440 performs a first subsampling function. For example, based on CNN 440 providing the values ​​output by first convolutional layer 442 to the corresponding neurons of first subsampling layer 444, CNN 440 may perform the first subsampling function. In some embodiments, CNN 440 performs the first subsampling function based on an aggregation function. In an example, CNN 440 performs the first subsampling function based on CNN 440 determining the maximum input (referred to as a maximum pooling function) among the values ​​provided to a given neuron. In another example, CNN 440 performs the first subsampling function based on CNN 440 determining the average input (referred to as an average pooling function) among the values ​​provided to a given neuron. In some embodiments, based on CNN 440 providing values ​​to the respective neurons of first subsampling layer 444, CNN 440 generates an output, which is sometimes referred to as a subsampled convolution output.

[0084] At step 465, CNN 440 performs a second convolution function. In some embodiments, CNN 440 performs the second convolution function in a manner similar to how CNN 440 performs the first convolution function described above. In some embodiments, CNN 440 performs the second convolution function based on CNN 440 providing the value output by first subsampling layer 444 as input to one or more neurons (not explicitly illustrated) included in second convolution layer 446. In some embodiments, as described above, each neuron of second convolution layer 446 is associated with a filter. As described above, the filter (one or more) associated with second convolution layer 446 can be configured to recognize more complex patterns than the filter associated with first convolution layer 442.

[0085] In some embodiments, the CNN 440 performs a second convolution function based on the CNN 440 multiplying the value of each neuron provided as input to the one or more neurons included in the second convolution layer 446 by the value of the filter corresponding to each neuron of the one or more neurons. For example, the CNN 440 may multiply the value of each neuron provided as input to the one or more neurons included in the second convolution layer 446 by the value of the filter corresponding to each neuron of the one or more neurons to generate a single value or a value array as an output.

[0086] In some embodiments, the CNN 440 provides the output of each neuron of the second convolutional layer 446 to the neurons of the downstream layer. For example, the CNN 440 may provide the output of each neuron of the first convolutional layer 442 to the corresponding neurons of the subsampling layer. In an example, the CNN 440 provides the output of each neuron of the first convolutional layer 442 to the corresponding neurons of the second subsampling layer 448. In some embodiments, the CNN 440 adds a bias value to the aggregate set of all values ​​provided to each neuron of the downstream layer. For example, the CNN 440 adds a bias value to the aggregate set of all values ​​provided to each neuron of the second subsampling layer 448. In such an example, the CNN 440 determines the final value provided to each neuron of the second subsampling layer 448 based on the aggregate set of all values ​​provided to each neuron and the activation function associated with each neuron of the second subsampling layer 448.

[0087] At step 470, CNN 440 performs a second subsampling function. For example, based on CNN 440 providing the values ​​output by second convolutional layer 446 to corresponding neurons of second subsampling layer 448, CNN 440 may perform a second subsampling function. In some embodiments, based on CNN 440 using an aggregation function, CNN 440 performs a second subsampling function. In an example, as described above, based on CNN 440 determining the maximum input or average input among the values ​​provided to a given neuron, CNN 440 performs a first subsampling function. In some embodiments, based on CNN 440 providing values ​​to respective neurons of second subsampling layer 448, CNN 440 generates an output.

[0088] At step 475, CNN 440 provides the output of each neuron of the second subsampling layer 448 to the fully connected layer 449. For example, CNN 440 provides the output of each neuron of the second subsampling layer 448 to the fully connected layer 449 so that the fully connected layer 449 generates an output. In some embodiments, the fully connected layer 449 is configured to generate an output associated with a prediction (sometimes referred to as a classification). The prediction may include an indication that the objects included in the image provided as input to CNN 440 include objects and / or sets of objects, etc. In some embodiments, the perception system 402 performs one or more operations and / or provides data associated with the prediction to the various systems described herein.

[0089] A system on a chip (SoC) refers to an integrated circuit (or "chip") that integrates all or most of the components of a computing system and / or other electronic system. Such components include, for example, a central processing unit (CPU), input / output (I / O) devices, memory, storage, etc. Other components may include various communication components, a graphics processing unit (GPU), etc. These components can be integrated on a single substrate or microchip. Various digital signal, analog signal, mixed signal and / or radio frequency (RF) signal processing functions, etc. may also be incorporated. SoC can integrate a microcontroller, a microprocessor and / or one or more processor cores with a GPU, Wi-Fi and / or cellular network radio components, etc. Similar to how a microcontroller integrates a microprocessor with peripheral circuits and memory, a SoC can be viewed as integrating a microcontroller with even more advanced peripherals. For an overview of integrating system components, see System Integration.

[0090] Figure 5A and Figure 5B Example monitoring systems 500 , 510 are illustrated that may be used to monitor one or more processing cores. Figure 5AThe example monitoring system 500 is illustrated as including one or more systems on chip, dies and / or integrated circuits 501, 508 (a, b, c). Each SoC 501, 508 may include one or more processing components. The example monitoring system 500 may be semi-hierarchically structured. For example, SoC 501 may include an upper-level monitoring processor ("upper-level monitor") 502 and an upper-level performance core processor ("upper-level performance component") 503. SoC 508a may include monitoring processor 1 ("monitor 1") 504a and performance core processor 1 ("performance component 1") 506a. SoC 508b may include monitoring processor 2 ("monitor 2") 504b and performance core processor 2 ("performance component 2") 506b. SoC 508c may include monitoring processor 3 ("monitor 3") 504c and performance core processor 3 ("performance component 3") 506c. As can be appreciated, the example monitoring system 500 may include other monitors 504 and performance components 506 .

[0091] Any monitoring processor 504a, 504b, 504c may include a monitoring processor cluster, such as a cluster including multiple different chiplets that may be packaged onto a common chassis, etc. The monitoring processor cluster may increase the reliability of the example monitoring system 500 to achieve continuity of operation. Each monitor 504a, 504b, 504c may be configured to monitor the operation and / or execution of one or more processes by the performance component 506 assigned to the monitor for monitoring (e.g., monitor 1504a monitors performance component 506a). In some embodiments, one or more of the monitors 504a, 504b, 504c (e.g., monitor 504c) may be a backup monitor that may perform the operations of other (failed) monitors included in the example monitoring system 500. Each monitor 504a, 504b, 504c may be configured to be directly connected to a high reliability core of the corresponding performance component 506a, 506b, 506c.

[0092] In some embodiments, the upper level monitor 502 may be configured to monitor the execution of the monitoring process by each individual monitor 504. The upper level monitor 502 may be configured (similarly to each individual monitor 504) on a separate monitoring core SoC 501 that is arranged in a semi-hierarchical manner with the lower level monitor 504. Each individual monitor 504 may be configured to be connected to the upper level monitor 502 via a communication link 512a, 512b, 512c (including on-die interconnects, wiring, and / or various buses). In addition, each such monitor 504a, 504b, 504c may be configured to detect errors that may occur during the execution of one or more processes by the performance component 506a, 506b, 506c and / or the connected monitors 504a, 504b, 504c.

[0093] exist Figure 5A In the example monitoring system 500 shown in FIG. 1 , monitoring processors 504a, 504b, 504c and / or performance core processors 506a, 506b, 506c may be located on a common chip (or die) 508a, 508b, 508c. Clustered positioning of processors 504a, 504b, 504c and / or cores, monitoring of performance core processors may optimize the execution of one or more actions performed by the performance core processors, the one or more actions including actions performed in response to requests from the monitoring processors, such as redirection of operations, etc. Clustering of two or more performance core processors and monitoring processors on a common chip (or die) may optimize general processing while preserving the underlying computing architecture, thereby making monitoring more efficient.

[0094] Figure 5B The example monitoring system 510 is illustrated as including one or more systems on a chip, dies and / or integrated circuits 508a, 508b. Each SoC 508a, 508b may include multiple processing components. The example monitoring system 510 may be hierarchically structured and / or peer-to-peer and / or loop-structured. For example, SoC508a may include monitoring processor 1 ("monitor 1") 504a, monitoring processor 2 ("monitor 2") 504b and performance core processor 1 ("performance component 1") 506a, performance core processor 2 ("performance component 2") 506b. SoC 508b may include monitoring processor 3 ("monitor 3") 504c, monitoring processor 4 ("monitor 4") 504d and performance core processor 3 ("performance component 3") 506c, performance core processor 4 ("performance component 4") 506d. As can be appreciated, the example monitoring system 510 may include other monitors 504 and performance components 506.

[0095] Each monitor 504a, 504b, 504c, 504d may be configured to monitor the operation and / or execution of one or more processes by one or more performance components 506a, 506b, 506c, 506d assigned for monitoring. In some embodiments, one or more of the monitors 504a, 504b, 504c, 504d (e.g., monitor 504c) may be a backup monitor that may perform the operations of other (failed) monitors included in the example monitoring system 510. Each monitor 504a, 504b, 504c, 504d may be configured to be directly connected to a high reliability core of the corresponding performance component 506a, 506b, 506c, 506d. Each individual monitor 504a, 504b, 504c, 504d may be configured to connect via communication links 512a-512j (including on-die interconnects, wiring, and / or various buses) to other monitors 504a, 504b, 504c, 504d and / or one or more performance components 506a, 506b, 506c, 506d, which may be within their respective on-chip systems, dies, and / or integrated circuits 508a, 508b or included in external on-chip systems, dies, and / or integrated circuits 508a, 508b. For example, the selected monitor 504a may monitor a plurality of performance components 506a, 506b and a plurality of other monitors 504a, 504b, 504c, 504d which also monitor other performance components and (one or more) monitors, thereby defining a cyclic monitoring system for ensuring that all components of the example monitoring system 510 are monitored and can be replaced in the event of an error detection. The described embodiments may be arranged to maintain full monitoring coverage of all performance components 506a, 506b, 506c, 506d in the event of a fault or error in any single monitoring device 504a, 504b, 504c, 504d.

[0096] Fig. 6AAn example monitoring system 600 that can be used to monitor one or more processing cores according to some implementations of the current subject matter is illustrated. The example monitoring system 600 can be configured to address the deficiencies of non-aggregated chiplets by locating one or more monitoring core processors 604a, 604b, 604c and one or more performance core processors 606a, 606b, 606c on a single chiplet 602, chip, and / or die, thereby optimizing the processing that may be required to perform monitoring functions. The use of a chiplet-based architecture can allow the use of on-die interconnects 610a, 610b, 610c in place of external connections for monitoring, thereby reducing latency. Multiple chiplets can also be packaged on a common chiplet 602, chip, and / or die, thereby providing low latency and built-in fault tolerance. Fault tolerance can be achieved by monitoring the monitoring core processors in addition to monitoring the performance core processors in a paired manner (e.g., each monitoring core processor monitors another monitoring core processor), dual-peer monitoring (e.g., each monitoring core processor monitors two or more other monitoring core processors), cyclic monitoring (e.g., each monitoring core processor monitors all other monitoring core processors in a cyclic manner), and / or any other monitoring manner.

[0097] Continue to refer Fig. 6A , the example monitoring system 600 may include one or more chiplets, chips, and / or dies 608 (a, b, c) that may be communicatively coupled to each other via one or more communication links 610 (a, b, c). As may be appreciated, there may be any number of chiplets, chips, and / or dies 608 that may each be communicatively coupled to one, several, and / or all other chiplets, chips, and / or dies 608. For example, in an autonomous vehicle system, the chiplets, chips, and / or dies 608 may be communicatively coupled to a vehicle (e.g., Figure 1 Associated with various sensors, components, etc. of the autonomous vehicle shown or mentioned in Figure 4.

[0098] Each of the chiplets, chips, and / or dies 608 can be configured to incorporate a monitoring core processor 604 and a performance core processor / component 606. For example, the chiplet, chiplet, and / or die 608a can include a monitoring core processor 1 604a and a performance core processor 1 606a; the chiplet, chiplet, and / or die 608b can include a monitoring core processor 2 604b and a performance core processor 2 606b; and the chiplet, chiplet, and / or die 608c can include a monitoring core processor 3 604c and a performance core processor 3 606c. In addition, the monitoring core processors 604 can be communicatively coupled to each other using communication links 610 to allow the monitoring core processors to monitor each other's monitoring operations. For example, the monitoring core processor 604a can be communicatively coupled to the monitoring core processor 604b using communication links 610a, and can also be communicatively coupled to the monitoring core processor 604c using communication links 610b. Likewise, monitoring core processor 604b may be coupled to monitoring core processor 604c using communication link 610c. Communication link 610c may be a single bidirectional communication link and / or may be separate links that communicatively couple each monitoring core processor 604.

[0099] In addition to monitoring other monitoring core processors, each monitoring core processor 604 can be configured to monitor the corresponding performance core processor 606 for various operations, actions, processes, etc. (e.g., processor 604a monitors processor 606a, etc.). The monitoring core processor and the performance core processor can be communicatively coupled using a peripheral component express interconnect (PCIe), a universal chiplet express interconnect (UCIe), and / or any other connection. For example, any desired method can be used to monitor the monitoring core processor and / or the performance core processor, such as by exchanging encrypted keep-alive messages using known interconnect technologies such as PCIe, UCIe, and / or other protocols. Alternatively or additionally, each monitoring core processor 604 can request one or more operating status updates from one, several, and / or all other monitoring core processors 604. Such status updates can be provided in any desired format. Monitoring and transmission of status updates, heartbeat messages, etc. can be performed using any desired scheduling (e.g., periodically, at a predetermined time, when an error occurs and / or is detected in one or more performance core processors and / or monitoring core processors).

[0100] Monitoring of the performance core processor and other monitors can ensure that any faults, errors, etc. that may occur during operation, testing, etc. of the autonomous vehicle and its systems, components, sensors, etc. are reported and handled quickly and with low latency. The example monitoring system 600 can be configured to allow an integrated on-chip / on-die monitoring core processor 604 to monitor the performance core processor 606, which in turn can provide easy and low-latency access to all monitoring-related signals from all performance core processors 606. In addition, monitoring of the monitoring core processor 604 can be performed by adjacent monitoring core processors 604 in any desired mode (e.g., paired mode, cyclic mode). Additionally, each individual monitoring core processor 604 can be configured to provide guarantees of high-confidence detection of errors. The guarantee of high-confidence detection of errors, together with peer monitoring utilizing other monitoring core processors 604, can allow for the monitoring of the performance core processor 606 without the need for an external monitoring core (e.g., such as Figure 5A , etc.) to quickly react to any loss and / or error on any individual integrated chip 608.

[0101] In some embodiments, the monitoring core processor 604 may be configured to analyze any monitoring signals that have been detected by other monitoring core processors 604 (and / or corresponding performance core processors 606) and / or transmitted to the monitoring core processor 604 from other monitoring core processors 604 (and / or corresponding performance core processors 606). Based on the analysis of such signals, the monitoring core processor 604 may be configured to generate a response that may be used, for example, to change the autonomous vehicle (e.g., Figures 1 to 4D ) of one or more systems, components, sensors, etc. of the autonomous vehicle. For example, the monitoring core processor 604 may be configured to reduce the weight of any and / or all such signals associated with one or more affected systems, components, sensors, etc. and / or ignore any and / or all such signals associated with one or more affected systems, components, sensors, etc., while allowing other processing (e.g., monitoring, performance, etc.) to continue safely. Alternatively or additionally, the response to such monitoring signals may cause the operation of one or more systems, components, sensors, etc. to be stopped, or new processing or new operations to be initiated, or multiple operations to be reconfigured or reallocated, while ensuring the safety of the operation of other systems, components, sensors, or other devices included in or coupled to the autonomous vehicle. In some embodiments, all monitoring core processors 604 may be configured to have access rights to trigger any fault / error response based on signals received from one or more other monitoring core processors 604. A monitoring core processor 604 may be programmed into a vehicle (e.g., Figures 1 to 4DA superset of the requested fault mitigation responses in the monitoring system of the vehicle shown in FIG. 4 can be configured to prevail.

[0102] In some embodiments, peer monitoring using monitoring core processors 604 may provide various levels of fault tolerance, where monitoring core processors 604 may be configured to maintain peer monitoring coverage even if one of the monitoring core processors 604 has failed. For example, monitoring core processors 604a and / or 604c may continue to monitor the operation of performance core processor 606b even if the corresponding monitoring core processor 604b that has been assigned to performance core processor 606b for monitoring has failed.

[0103] Figure 6B Another example chiplet architecture 611 is illustrated. The chiplet architecture 611 can be embodied as being capable of performing Figures 1 to 4D and Figure 7 Any type of engine, device, or collection of devices for the various computing functions described. The chiplet architecture 611 may include a packaging substrate and / or platform 608 on which one or more memory blocks 613, one or more processor blocks 615 (a, b), one or more memories, I / O, (one or more) controllers 617, one or more accelerator blocks 619, and one or more communication blocks 621 may be located / packaged.

[0104] The packaging substrate and / or platform 608 may include a silicon-based or epoxy-based laminate substrate. In other embodiments, the packaging substrate and / or platform 608 may include other suitable types of substrates. The chiplet architecture 611 may be connected to other electrical devices via (one or more) communication blocks 621. (One or more) communication blocks 621 may be coupled to the surface of the packaging substrate and / or platform 608 to route electrical signals to other electrical devices such as a motherboard, other chipsets, or multi-chip modules.

[0105] The memory block 613 may be embodied as any type of volatile memory (e.g., dynamic random access memory (DRAM), etc.) or non-volatile memory or data storage unit capable of performing the functions described herein. Volatile memory may be a storage medium that requires power to maintain the state of the data stored by the medium. Non-limiting examples of volatile memory may include various types of random access memory (RAM) such as DRAM or static random access memory (SRAM). One specific type of DRAM that may be used in a memory module is synchronous dynamic random access memory (SDRAM). In some embodiments, the memory block 613 may include a block addressable memory device, such as a block addressable memory device based on NAND or NOR technology, etc. The memory block 613 may also include a three-dimensional crosspoint memory device (e.g., Intel 3DXPoint TM Memory) or other byte-addressable write-in-place non-volatile memory devices. Memory block 613 can refer to the die itself and / or packaged memory products. In some examples, 3D crosspoint memory (e.g., Intel 3D XPoint TM The memory block 613 may include a transistor-less stackable cross-point architecture in which memory cells are located at the intersection of word lines and bit lines and are individually addressable, and bit storage is based on changes in body resistance. In some examples, all or a portion of the memory block 613 may be integrated into the processor block(s) 615(a, b). The memory block 613 may store various software and data used during vehicle operation, such as one or more applications, data operated by the application(s), libraries, and drivers, etc.

[0106] The (one or more) processor blocks 615 (a, b) may be embodied as any type of processor capable of performing the functions described herein (e.g., executing an application). For example, the (one or more) processor blocks 615 (a, b) may be embodied as (one or more) multi-core processors, microcontrollers, or other processors or processing / control circuits. In some examples, the (one or more) processor blocks 615 (a, b) may be embodied as an FPGA, an application specific integrated circuit (ASIC), a reconfigurable hardware or hardware circuit system, or other dedicated hardware, including an FPGA, an application specific integrated circuit (ASIC), a reconfigurable hardware or hardware circuit system, or other dedicated hardware, or coupled to an FPGA, an application specific integrated circuit (ASIC), a reconfigurable hardware or hardware circuit system, or other dedicated hardware, so as to perform the functions described herein. For example, the (one or more) processor blocks 615 (a, b) may include one or more processors that may be designed to perform one or more functionalities (e.g., as discussed herein, monitoring performance core processors and / or performing various functions, etc.).

[0107] The memory, I / O, controller(s) 617 may be embodied as circuit systems and / or components to facilitate input / output operations of the processor(s) blocks 615(a, b), memory blocks 613, and other components utilizing the chiplet architecture 611. For example, the memory, I / O, controller(s) 617 may be embodied as or otherwise include a memory controller hub, an input / output control hub, an integrated sensor hub, a firmware device, a communication link (e.g., a point-to-point link, a bus link, a wire, a cable, an optical guide, a printed circuit board trace, etc.), and / or other components and subsystems to facilitate input / output operations. In some examples, the memory, I / O, (one or more) controllers 617 can form part of a system on a chip (SoC) and be incorporated with one or more of the (one or more) processor blocks 615a, 615b, memory block 613, and other components of the chiplet architecture 611.

[0108] The (one or more) accelerator blocks 619 may include hardware, such as accelerator components configured to provide coordination of acceleration resources available for functions and distribution of functions between chiplet architectures 611 (which include "warm" chiplet architectures 611 that have been deployed or are in operation and "cold" chiplet architectures that need to be deployed or configured).

[0109] The communication block(s) 621 may be embodied as any communication circuit, device, or collection of communication circuits and devices capable of enabling communication over a network between the example chiplet architecture 611 and another computing device (e.g., another example chiplet architecture 611). The communication block(s) 621 may be configured to communicate using any one or more communication technologies (e.g., wired or wireless) and associated protocols (e.g., cellular network protocols such as 3GPP 4G or 5G standards, protocols such as IEEE 802.11 / Wireless LAN protocols, wireless WAN protocols, Ethernet, etc. etc.) to achieve communication. (One or more) communication blocks 621 may include a network interface controller (NIC), which may also be referred to as a host fabric interface (HFI). The NIC may be embodied as one or more plug-in boards, daughter cards, network interface cards, controller chips, chipsets, or other devices that can be used by (one or more) communication blocks 621 to connect to another computing device (e.g., a chiplet architecture 611). In some examples, the NIC may be embodied as part of a system on a chip (SoC) including one or more processors, or may be included in a multi-chip package that also includes one or more processors. In some examples, the NIC may include a local processor (not shown) and / or a local memory (not shown), both of which are local to the NIC. The local processor of the NIC may be able to perform one or more functions of the chiplet architecture 611 described herein. Additionally or alternatively, in such examples, the local memory of the NIC may be integrated into one or more components of the client computing node at the board level, socket level, chip level, and / or other level.

[0110] Figure 6C An example monitoring system 620 is illustrated that can be used to monitor one or more processing cores according to some implementations of the current subject matter. The example monitoring system 620 can be configured to monitor the core processors in a dual and / or paired and / or cyclic and / or multi-monitor manner. The example monitoring system 620 can be configured with Fig. 6A and Figure 6B At least a portion of the example monitoring systems 600, 611 shown in Fig. 6A and Figure 6BAt least a portion of the example monitoring systems 600, 611 shown in FIG. Similar to system 600, in example monitoring system 620, one or more monitoring core processors and one or more performance core processors can be located on a single chiplet, chip, and / or die, thereby reducing the time, processing, bandwidth, etc. that may be required to perform monitoring functions. Figure 6C As shown in , the example monitoring system 620 may include monitoring core processors 604a, 604b, 604c, 604d, performance core processors 606a, 606b, 606c, 606d, one or more chiplets, chips and / or dies 608 (a, b, c, d), and communication links 610a, 610b, 610c, 610d, 610e, 610f.

[0111] The chiplets, chips and / or dies 608 (a, b, c, d) may be connected to the reference Figure 6B 6. The chiplets, chips, and / or dies 608 (a, b, c, d) can be communicatively coupled to each other via one or more communication links 610 (a, b, c, d). As can be appreciated, there can be any number of chiplets, chips, and / or dies 608, wherein each chiplet, chip, and / or die 608 can be communicatively coupled to one, several, and / or all other chiplets, chips, and / or dies 608. Similar to system 600, in an autonomous vehicle system, chiplets, chips, and / or dies 608 can be communicatively coupled to a vehicle (e.g., Figure 1 Associated with various sensors, components, etc. of the autonomous vehicle shown or mentioned in Figure 4.

[0112] Each of the chiplets, chips, and / or dies 608 may be configured to incorporate a monitoring core processor 604 and a performance core processor / component 606. For example, the chiplet, chiplet, and / or die 608a may include a monitoring core processor 1 604a and a performance core processor 1 606a; the chiplet, chiplet, and / or die 608b may include a monitoring core processor 2 604b and a performance core processor 2 606b; the chiplet, chiplet, and / or die 608c may include a monitoring core processor 3 604c and a performance core processor 3 606c; and the chiplet, chiplet, and / or die 608d may include a monitoring core processor 4 604d and a performance core processor 4 606d. The monitoring core processors 604 may be communicatively coupled to each other using a communication link 610 to allow the monitoring core processors to monitor each other's monitoring operations. For example, monitoring core processor 604a can be communicatively coupled to monitoring core processor 604b using communication link 610a, can be communicatively coupled to monitoring core processor 604c using communication link 610b, and can be communicatively coupled to monitoring core processor 604d using communication link 610c. Similarly, other monitoring core processors 604b, 604c, and 604d can be communicatively coupled to other monitoring core processors. As can be appreciated, monitoring core processor 604 can be selectively communicatively coupled to other monitoring core processors 604, that is, each monitoring core processor 604 does not necessarily have to be communicatively coupled to all other monitoring core processors 604. Communication link 610 can be a single bidirectional communication link and / or can be a separate link that communicatively couples each monitoring core processor 604.

[0113] In addition to monitoring other monitoring core processors, each monitoring core processor 604 can also be configured to monitor the corresponding performance core processor 606 for various operations, actions, processes, etc. (e.g., processor 604a monitors processor 606a, etc.). The monitoring core processor and the performance core processor can be communicatively coupled using a peripheral component express interconnect (PCIe), a universal chiplet express interconnect (UCIe), and / or any other connection. For example, any desired method can be used to monitor the monitoring core processor and / or the performance core processor, such as by exchanging encrypted keep-alive messages using known interconnect technologies such as PCIe, UCIe, and / or other protocols. Alternatively or additionally, each monitoring core processor 604 can request one or more operating status updates from one, several, and / or all other monitoring core processors 604. Such status updates can be provided in any desired format. Monitoring and transmission of status updates, heartbeat messages, etc. can be performed using any desired scheduling (e.g., periodically, at a predetermined time, when an error occurs and / or is detected in one or more performance core processors and / or monitoring core processors).

[0114] Monitoring of the performance core processors and other monitors can ensure that any failures, errors, etc. that may occur during operation, testing, etc. of the autonomous vehicle and its systems, components, sensors, etc. are reported and handled quickly and with low latency. Fig. 6A Similarly to the system 600 shown in , the example monitoring system 620 can be configured to allow the integrated on-chip / on-die monitoring core processor 604 to monitor the performance core processor 606, which in turn can provide easy and low-latency access to all monitoring-related signals from all performance core processors 606. The monitoring of the monitoring core processor 604 can be performed by adjacent monitoring core processors 604 in any desired execution mode (e.g., dual mode, paired mode, cyclic mode, etc.). The execution mode of the monitoring cores monitoring each neighbor can be arranged so that full monitoring coverage is maintained in the presence of any single fault or in the presence of multiple faults in multiple monitoring cores that cause the loss of operational functionality of these monitoring cores. Each individual monitoring core processor 604 can be configured to provide a guarantee of high confidence detection of errors, and can allow rapid response to any loss and / or error on any individual integrated chip 608.

[0115] In some embodiments, the monitoring core processor 604 may be configured to analyze any monitoring signals that have been detected by other monitoring core processors 604 (and / or corresponding performance core processors 606) and / or transmitted to the monitoring core processor 604 from other monitoring core processors 604 (and / or corresponding performance core processors 606). Based on the analysis of such signals, the monitoring core processor 604 may be configured to generate a response that may be used, for example, to change the autonomous vehicle (e.g., Figures 1 to 4D , components, sensors, etc. of the autonomous vehicle). For example, the monitoring core processor 604 may be configured to reduce the weight of any and / or all such signals associated with one or more affected systems, components, sensors, etc. and / or ignore any and / or all such signals associated with one or more affected systems, components, sensors, etc., while allowing other processing (e.g., monitoring, performance, etc.) to continue safely. Alternatively or additionally, the response to such monitoring signals may cause the operation of one or more systems, components, sensors, etc. to be stopped while ensuring the safety of the operation of other systems, components, sensors, etc. of the autonomous vehicle. In some embodiments, all monitoring core processors 604 may be configured to have access rights to trigger any fault / error response based on signals received from one or more other monitoring core processors 604. A monitoring core processor 604 may be programmed into a vehicle (e.g., Figures 1 to 4D A superset of the requested fault mitigation responses in the monitoring system of the vehicle shown in FIG. 4 can be configured to prevail.

[0116] In some embodiments, peer monitoring using monitoring core processors 604 may provide various levels of fault tolerance, where monitoring core processors 604 may be configured to maintain peer monitoring coverage even if one of the monitoring core processors 604 has failed. For example, monitoring core processors 604a and / or 604c and / or 604d may continue to monitor the operation of performance core processor 606b even if the corresponding monitoring core processor 604b that has been assigned to performance core processor 606b for monitoring has failed.

[0117] Fig.6D An example monitoring system 630 is illustrated that can be used to monitor one or more processing cores according to some implementations of the current subject matter. The example monitoring system 630 can be configured to monitor the core processors in a dual and / or paired and / or cyclic and / or multi-monitor manner. The example monitoring system 630 can be configured with FIG. 6A to FIG. 6C At least a portion of the example monitoring systems 600, 611, 620 shown in FIG. 6A to FIG. 6C 600, 611, 620. The example monitoring system 630 may include monitoring core processors 604a-604k, performance core processors 606a-606m, one or more chiplets, chips and / or dies 608a-608k, and communication links 610a-610m.

[0118] The chiplets, chips and / or dies 608a-608k may be connected to the reference Figure 6B The chiplet architecture 611 described is similar. The chiplets, chips and / or dies 608 may have different configurations. For example, some of the chiplets, chips and / or dies 608c-608h, 608i, 608k may be configured to incorporate a monitoring core processor 604 and a single performance core processor / component 606c-606e. As another example, other chiplets, chips and / or dies 608c-608h, 608i, 608k may be configured to include a monitoring core processor 604 and multiple (two or more) performance core processors / components 606a, 606b, 606f, 606g, 606k, 606l. In some embodiments, a portion of the chiplets, chips and / or dies 608i, 608k may be configured to operate as a controller for operations performed by the example monitoring system 630.

[0119] Fig. 6E An example monitoring system 640 that can be used to monitor one or more processing cores according to some implementations of the current subject matter is illustrated. The example monitoring system 640 may be included in a vehicle (e.g., a vehicle having a plurality of processing cores). Figure 2The vehicle 200 described and / or referenced Figure 3 The example monitoring system 640 can monitor the core processor in a dual and / or paired and / or cyclic and / or multi-monitor manner to optimize vehicle operations, such as AV software (e.g., reference Figure 4A AV software 400 described and / or referenced Figure 7 The example monitoring system 640 may be configured to communicate with FIG. 6A to FIG. 6D At least a portion of the example monitoring systems 600, 611, 620, 630 shown in FIG. 6A to FIG. 6D 600, 611, 620, 630. The example monitoring system 640 may include monitoring core processors 604a-604k, performance core processors 606a-606m, one or more chiplets, chips and / or dies 608a-608k, communication links 610a-610m, and switches 642.

[0120] The chiplets, chips and / or dies 608a-608k may be connected to the reference Figure 6B The chiplet architecture 611 described above is similar. The chiplets, chips and / or dies 608 may have different configurations. For example, some of the chiplets, chips and / or dies 608c-608h, 608i, 608k may be configured to incorporate a monitoring core processor 604 and a single performance core processor / component 606c-606e. As another example, other chiplets, chips and / or dies 608c-608h, 608i, 608k may be configured to incorporate a monitoring core processor 604 and multiple (two or more) performance core processors / components 606a, 606b, 606f, 606g, 606k, 606l.

[0121] One or more of the performance core processors / components 606a-606m (e.g., one of a set of performance core processors / components 606a, 606b, 606d-606g, 606i-606m incorporated in a single chiplet, chip, and / or die 608a, 608c, 608d, 608f, 608g) may be configured as a safety performance core processor / component 606a, 606d, 606f, 606i, 606l. The safety performance core processor / component 606a, 606d, 606f, 606i, 606l may be configured to perform multiple types of operations, including its primary operations as well as backup operations performed in the event of a failure of the primary performance core processor / component 606b, 606e, 606g, 606k, 606m. The safety performance core processors / components 606a, 606d, 606f, 606i, 606l may be connected in a hierarchy to dual redundant safety performance core processors / components 606a, 606d, 606f, 606i, 606l for provided system level safety.

[0122] The switch 642 may include switching logic configured to redirect input signals to the various security performance core processors / components 606a, 606d, 606f, 606i, 606l. The switch 642 may enable the example monitoring system 640 to remain operational even if one or more performance core processors / components 606b, 606e, 606g, 606k, 606m fail (generate one or more errors or become inoperable due to failure to provide output).

[0123] like Fig. 6A and FIG. 6C to FIG. 6E As shown in , each monitoring core processor 604 (and / or 604) can be co-located with and communicatively coupled to at least one corresponding performance core processor 606 (and / or 606) (e.g., on the same chiplet / chip / die 608 (and / or 608)) (e.g., monitoring core processor 604a can be co-located with performance core processor 606a on the same chip / die 608a, etc., and for Figure 6C The monitoring core processor 604 (and / or 604) may also be configured to monitor the execution of one or more performance processes by at least one corresponding performance core processor 606 (and / or 606) (e.g., each monitoring core processor (e.g., 604a) monitors its respective performance core processor (e.g., 606a), and for Figure 6C). In addition, each performance core processor 606 (and / or 606) can be configured to perform one or more performance core processes (e.g., (one or more) performance core processors 606 (and / or 606) can perform various tasks associated with components, sensors, etc. in the AV system). Each monitoring core processor 604 (and / or 604) can be communicatively coupled to each monitoring core processor in the multiple monitoring core processors 606 (and / or 606) (e.g., each monitoring core processor (e.g., 604a (and / or 604a)) can be communicatively coupled to all other monitoring core processors (606b, 606c (and / or 606b, 606c, 606d)). Figure 7 An example monitoring process 700 is illustrated according to some embodiments of the current subject matter. Process 700 may be performed by Fig. 6A , FIG. 6C to FIG. 6E The example monitoring systems 600, 620, 630, 640 shown in FIG. 6 and in particular the monitoring core processor 604 (and / or Figure 6C The monitoring core processors 604 may be co-located with their corresponding performance core processors 606 (and / or 606) on the same chiplet / chip / die 608 (and / or 608a-608d) as shown in FIG. 6 .

[0124] At 702, at least one monitoring core processor (e.g., monitoring core processor 604(a, b, c) and / or monitoring core processor 604(a, b, c, d)) may perform monitoring of one or more monitoring processes performed by at least one other monitoring core processor. The monitoring may be performed by core processors that are co-located within the same chiplet / chip / die and communicatively coupled to a processor that may communicate with (e.g., FIG. 6C to FIG. 6E The monitoring core processor (and / or 604) may also be configured to monitor the execution of one or more performance processes by the at least one corresponding performance core processor. The performance core process may be associated with the operation of at least one sensing device of the vehicle. Figure 2 As described, the sensing device may include at least one of the following: a camera, a motion sensor, an image capture device, a scanner, a keypad sensing device, a LiDAR, a Radar, a microphone, an ultrasonic sensor, an inertial sensor, a GPS receiver, an odometer sensor, and any combination thereof. The performance core processing may be associated with the execution of a maneuver of the vehicle, which may be performed in response to processing of signals detected by (one or more than one) sensing devices. In some embodiments, the monitoring process may be performed using at least one predetermined execution mode (e.g., a dual mode, a paired mode, a cyclic mode, etc.).

[0125] At 704, a failure of the monitoring core processor is detected by another monitoring core processor of the monitoring system. Detection of the failure of the monitoring core processor may include determining that the monitoring core processor is inoperable by failing to generate an output within a set time interval and / or failing to generate an output at a set frequency or determining that the monitoring core processor is generating an output that includes an error (e.g., one or more parameters are outside of a set range). In some embodiments, failure detection may include comparing the detected error to an error threshold, and classifying the error as negligible if the error is below the threshold and classifying the error as severe if the error is above the threshold.

[0126] At 706, a communication is generated. The communication may include an error report identifying at least one error associated with the execution of one or more performance core processes and detected by at least another monitoring core processor. The communication may include activating a switch to redirect signal transmission from a failure monitoring core processor of the monitoring system to a corresponding safety monitoring core processor, the safety monitoring core processor being configured to perform operations originally assigned to the failure monitoring core processor. The switch may include management of hardware partitions of a chiplet incorporating a failure monitoring core processor and a safety monitoring core processor and a chiplet I / O component. Different partitions of the cluster may correspond to partitions that are dynamically created and associated with applications having specific process address identifiers.

[0127] At 708, the security monitoring core processor may be configured to perform at least one action in response to at least one communication received from another monitoring core processor based on the monitoring (e.g., in response to an error, perform at least one action in response to a communication from another monitoring core processor 604 via a corresponding link 610). The action may include at least one of: adjusting the execution of one or more performance core processes, adjusting the execution of one or more monitoring core processes, not performing an action, and any combination thereof.

[0128] As described above, the monitoring core processor and the performance core processor located at the same position on the chip and the connection between the monitoring core processor can reduce the number of chips in the system and provide further scalability of (one or more than one) systems in autonomous vehicles. In addition, the on-chip connection can provide higher reliability of the entire system, wherein each monitoring core processor can be configured to perform peer monitoring and detection of errors, failures, etc., thereby accelerating the taking of any necessary response and / or mitigation actions. The integration of the monitoring core can also improve the access to any and / or all hardware signals to be monitored during the SoC design. In addition, peer monitoring can achieve single-point fault tolerance, whereby the failure of a monitoring core processor can be negligible, because other monitoring core processors can be able to continue the failed monitoring core processing. Due to the dedicated hardware design with few contact points through the monitoring core processor, the peer monitoring system can also provide easy access to safety level calculation in a simplified implementation. In some embodiments, the system and / or method for monitoring as disclosed herein can comply with various safety standards (e.g., ISO 26262).

[0129] According to some non-limiting embodiments or examples, a system is provided, which includes: a plurality of monitoring core processors, each of which is communicatively coupled to each of which; and a plurality of performance core processors, each of which is configured to execute one or more performance core processes; each of which is co-located with and communicatively coupled to at least one corresponding performance core processor of the plurality of performance core processors, and is further configured to monitor the execution of one or more performance processes by the at least one corresponding performance core processor; wherein at least one of the plurality of monitoring core processors is configured to: monitor one or more monitoring processes executed by at least another monitoring core processor of the plurality of monitoring core processors, and based on the monitoring, execute at least one action in response to at least one communication received from the at least another monitoring core processor.

[0130] According to some non-limiting embodiments or examples, at least one non-transitory computer-readable medium is provided, which includes one or more instructions, which when executed by at least one processor cause the at least one processor to perform operations, the operations including: using at least one monitoring core processor among a plurality of monitoring core processors to monitor one or more monitoring processes performed by at least another monitoring core processor among the plurality of monitoring core processors, wherein each monitoring core processor among the plurality of monitoring core processors is co-located with at least one corresponding performance core processor among a plurality of performance core processors and communicatively coupled to at least one corresponding performance core processor among the plurality of performance core processors, and is also configured to monitor the execution of one or more performance processes by the at least one corresponding performance core processor; each performance core processor among the plurality of performance core processors is configured to execute one or more performance core processes; each monitoring core processor among the plurality of monitoring core processors is communicatively coupled to each monitoring core processor among the plurality of monitoring core processors; and based on the monitoring, using the at least one monitoring core processor to perform at least one action in response to at least one communication received from the at least another monitoring core processor.

[0131] According to some non-limiting embodiments or examples, a method is provided, which includes: using at least one monitoring core processor among a plurality of monitoring core processors to monitor one or more monitoring processes performed by at least another monitoring core processor among the plurality of monitoring core processors, wherein each monitoring core processor among the plurality of monitoring core processors is co-located with at least one corresponding performance core processor among a plurality of performance core processors and is communicatively coupled to at least one corresponding performance core processor among the plurality of performance core processors, and is also configured to monitor the execution of one or more performance processes by the at least one corresponding performance core processor; each performance core processor among the plurality of performance core processors is configured to execute one or more performance core processes; each monitoring core processor among the plurality of monitoring core processors is communicatively coupled to each monitoring core processor among the plurality of monitoring core processors; and based on the monitoring, using the at least one monitoring core processor to perform at least one action in response to at least one communication received from the at least another monitoring core processor.

[0132] Further non-limiting aspects or embodiments are set forth in the following numbered clauses:

[0133] Item 1: A method comprising: using at least one monitoring core processor among a plurality of monitoring core processors to monitor one or more monitoring processes performed by at least another monitoring core processor among the plurality of monitoring core processors, wherein each of the plurality of monitoring core processors is co-located with and communicatively coupled to at least one corresponding performance core processor among a plurality of performance core processors, and is also configured to monitor the execution of one or more performance processes by the at least one corresponding performance core processor; each of the plurality of performance core processors is configured to execute one or more performance core processes; each of the plurality of monitoring core processors is communicatively coupled to each of the plurality of monitoring core processors; and based on the monitoring, using the at least one monitoring core processor to perform at least one action in response to at least one communication received from the at least another monitoring core processor.

[0134] Clause 2: The method of clause 1, wherein each monitoring core processor of the plurality of monitoring core processors is co-located with the at least one corresponding performance core processor using a common integrated circuit.

[0135] Clause 3: A method according to clause 2, wherein the one or more performance core processing is associated with the operation of at least one sensing device of the vehicle, and the at least one sensing device includes at least one of the following items: a camera, a motion sensor, an image capture device, a scanner, a keypad sensing device, LiDAR, Radar, a microphone, an ultrasonic sensor, an inertial sensor, a GPS receiver, an odometer sensor, and any combination thereof.

[0136] Clause 4: A method according to any of the preceding clauses, wherein the one or more performance core processes are associated with the execution of at least one maneuver of a vehicle.

[0137] Clause 5: A method as described in any of the preceding clauses, wherein the at least one communication includes an error report, the error report being used to identify at least one error associated with execution of the one or more performance core processes and detected by the at least another monitoring core processor.

[0138] Clause 6: The method according to any of the preceding clauses further includes: detecting a failure of the at least another monitoring core processor; based on the detected failure, using at least a third monitoring core processor among the multiple monitoring core processors to monitor one or more monitoring processes previously performed by at least another monitoring core processor; and receiving the at least one communication from the third monitoring core processor.

[0139] Clause 7: The method of any preceding clause, wherein the one or more monitoring processes are performed using at least one predetermined execution mode.

[0140] Clause 8: A method according to any of the preceding clauses, wherein the at least one action includes at least one of the following: adjusting the execution of the one or more performance core processes, adjusting the execution of one or more monitoring core processes, not performing an action, and any combination thereof.

[0141] Clause 9: A system comprising: at least one processor; and at least one non-transitory storage medium storing instructions that, when executed by the at least one processor, cause the at least one processor to perform operations according to any of the preceding clauses.

[0142] Clause 10: At least one non-transitory storage medium storing instructions that, when executed by at least one processor, cause the at least one processor to perform operations according to any of the preceding clauses.

[0143] Item 11: A system comprising: a plurality of monitoring core processors, each of the plurality of monitoring core processors being communicatively coupled to each of the plurality of monitoring core processors; and a plurality of performance core processors, each of the plurality of performance core processors being configured to execute one or more performance core processes; each of the plurality of monitoring core processors being co-located with and communicatively coupled to at least one corresponding performance core processor of the plurality of performance core processors, and being further configured to monitor the execution of one or more performance processes by the at least one corresponding performance core processor; wherein at least one of the plurality of monitoring core processors is configured to: monitor one or more monitoring processes executed by at least another monitoring core processor of the plurality of monitoring core processors, and based on the monitoring, execute at least one action in response to at least one communication received from the at least another monitoring core processor.

[0144] In the previous description, aspects and embodiments of the present disclosure have been described with reference to many specific details, which may vary depending on the implementation. Therefore, the description and the accompanying drawings should be regarded as illustrative, not restrictive. The only and exclusive indication of the scope of the invention, and the applicant's expectation that the content of the scope of the invention is the literal and equivalent scope of the claims issued from this application in the specific form of the claims, including any subsequent amendments. Any definition of the terms used to be included in such claims that are clearly set forth herein should be based on the meaning of such terms as used in the claims. In addition, when the term "also includes" is used in the previous description or the attached claims, the following of the phrase may be an additional step or entity, or a sub-step / sub-entity of the previously described step or entity.

Claims

1. A method comprising: using at least one monitoring core processor of a plurality of monitoring core processors to monitor one or more monitoring processes performed by at least another monitoring core processor of the plurality of monitoring core processors, in, Each monitoring core processor of the plurality of monitoring core processors is co-located with and communicatively coupled to at least one corresponding performance core processor of the plurality of performance core processors, and is further configured to monitor execution of one or more performance processes by the at least one corresponding performance core processor; Each performance core processor of the plurality of performance core processors is configured to perform one or more performance core processes; Each of the plurality of monitoring core processors is communicatively coupled to each of the plurality of monitoring core processors; and Based on the monitoring, at least one action is performed using the at least one monitoring core processor in response to at least one communication received from the at least another monitoring core processor.

2. The method according to claim 1, wherein: Each monitoring core processor of the plurality of monitoring core processors is co-located with the at least one corresponding performance core processor using a common integrated circuit.

3. The method according to claim 2, wherein: The one or more performance core processing is associated with the operation of at least one sensing device of the vehicle, and the at least one sensing device includes at least one of the following items: a camera, a motion sensor, an image capture device, a scanner, a keypad sensing device, LiDAR, Radar, a microphone, an ultrasonic sensor, an inertial sensor, a GPS receiver, an odometer sensor, and any combination thereof.

4. A method according to any one of the preceding claims, wherein: The one or more performance core processes are associated with execution of at least one maneuver of the vehicle.

5. A method according to any one of the preceding claims, wherein: The at least one communication includes an error report identifying at least one error associated with execution of the one or more performance core processes and detected by the at least another monitoring core processor.

6. The method according to any one of the preceding claims, further comprising: detecting a failure of the at least another monitoring core processor; based on the detected failure, monitoring one or more monitoring processes previously performed by at least another monitoring core processor using at least a third monitoring core processor of the plurality of monitoring core processors; as well as The at least one communication is received from the third monitoring core processor.

7. A method according to any one of the preceding claims, wherein: The one or more monitoring processes are performed using at least one predetermined execution mode.

8. A method according to any one of the preceding claims, wherein: The at least one action includes at least one of: adjusting execution of the one or more performance core processes, adjusting execution of one or more monitoring core processes, not performing an action, and any combination thereof.

9. A system comprising: at least one processor; as well as At least one non-transitory storage medium storing instructions which, when executed by the at least one processor, cause the at least one processor to perform the operations of any one of claims 1 to 8.

10. At least one non-transitory storage medium storing instructions which, when executed by at least one processor, cause the at least one processor to perform the operations of any one of claims 1 to 8.

11. A system comprising: a plurality of monitoring core processors, each of the plurality of monitoring core processors being communicatively coupled to each of the plurality of monitoring core processors; as well as a plurality of performance core processors, each of the plurality of performance core processors being configured to perform one or more performance core processes; Each monitoring core processor of the plurality of monitoring core processors is co-located with and communicatively coupled to at least one corresponding performance core processor of the plurality of performance core processors, and is further configured to monitor execution of one or more performance processes by the at least one corresponding performance core processor; Wherein, at least one monitoring core processor among the plurality of monitoring core processors is configured as: monitoring one or more monitoring processes performed by at least another monitoring core processor of the plurality of monitoring core processors, and Based on the monitoring, at least one action is performed in response to at least one communication received from the at least another monitoring core processor.

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