Phase change memory and operating method
By applying reverse and forward voltage differences during the set and reset operations of the phase-change memory, the threshold voltage of the memory module is adjusted, thus solving the problem of deteriorating read window margin and achieving performance improvement and cost reduction in a shorter cycle.
Patent Information
- Application Number
- CN202411475070.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-22
- Publication Date
- 2025-12-26
- Estimated Expiration
- 2044-10-22
AI Technical Summary
The read window margin of phase-change memory gradually deteriorates during cyclic operation, affecting its further application.
By applying a reverse voltage difference to the word line and bit line during the set operation and a positive voltage difference during the reset operation, the threshold voltage of the memory module is adjusted to reduce the threshold voltage in the set state and increase the threshold voltage in the reset state, thereby improving the read window margin.
It improves read window margin within a shorter application cycle, enhances the cyclic performance of phase-change memory, reduces element diffusion, and lowers hardware cost and area.
Smart Images
Figure CN119495340B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of storage, in particular to a phase change memory and an operating method. BACKGROUND
[0002] Read window margin (RWM) and cycle performance are two key technical indexes of a phase change memory (PCM). The read window margin refers to the ability of the phase change memory to stably distinguish different states (such as "0" and "1") during a read operation.
[0003] However, as the number of cycle operations of the phase change memory increases, the read window margin deteriorates, which hinders further application of the phase change memory. SUMMARY
[0004] The present application provides a phase change memory and an operating method to alleviate the technical problem of deteriorating read window margin.
[0005] In a first aspect, the present application provides a phase change memory, which includes a word line, a bit line, and a storage module. In a set operation, the storage module is connected to the word line and the bit line to which a reverse voltage difference is applied, so as to reduce a threshold voltage of a set state of the storage module.
[0006] Optionally, in the set operation of the storage module, the storage module is connected to the word line to which a negative voltage is applied and the bit line to which a positive voltage is applied.
[0007] Optionally, in the set operation of the storage module, the positive voltage of the bit line decreases according to a preset negative slope after lasting for a period of time.
[0008] Optionally, in a reset operation, the storage module is connected to the word line and the bit line to which a forward voltage difference is applied, so as to increase a threshold voltage of a reset state of the storage module.
[0009] Optionally, in the reset operation of the storage module, the storage module is connected to the word line to which a positive voltage is applied and the bit line to which a negative voltage is applied.
[0010] Optionally, the negative voltage is less than or equal to -3V and greater than or equal to -5V, and the positive voltage is greater than or equal to 3V and less than or equal to 6V.
[0011] Optionally, the storage module includes a pass transistor and a storage cell connected in series, the storage cell is connected to the word line, and the pass transistor is connected to the bit line; the threshold voltage of the storage module is the sum of the threshold voltage of the pass transistor and the threshold voltage of the storage cell.
[0012] Optionally, the storage unit comprises tellurium elements, germanium elements and antimony elements; in the setting operation, the tellurium elements migrate to the bit line, and the germanium elements and the antimony elements migrate to the word line; in the resetting operation of the storage module, the tellurium elements migrate to the word line, and the germanium elements and the antimony elements migrate to the bit line.
[0013] In a second aspect, the application provides an operation method applied to the phase change memory, the operation method comprising: if a setting operation is performed on the storage module, applying a reverse voltage difference between the word line and the bit line connected with the storage module selected to perform the setting operation; and if a resetting operation is performed on the storage module, applying a forward voltage difference between the word line and the bit line connected with the storage module selected to perform the resetting operation.
[0014] Optionally, if the setting operation is performed on the storage module, the reverse voltage difference is applied between the word line and the bit line connected with the storage module selected to perform the setting operation, comprising: applying a negative voltage to the word line, and applying a positive voltage to the bit line.
[0015] Optionally, if the resetting operation is performed on the storage module, the forward voltage difference is applied between the word line and the bit line connected with the storage module selected to perform the resetting operation, comprising: applying a positive voltage to the word line, and applying a negative voltage to the bit line.
[0016] The phase change memory and the operation method provided by the application can reduce the threshold voltage of the storage module by connecting the word line and the bit line to which a reverse voltage difference is applied in the setting operation, so as to increase the difference between the threshold voltage of the storage module after the resetting operation and the threshold voltage of the storage module after the setting operation while keeping the threshold voltage of the storage module after the resetting operation unchanged, thereby improving the read window margin.
[0017] In addition, compared with a longer application cycle required for improving the read window margin by developing new materials, the above-mentioned method of applying a reverse voltage difference between the word line and the bit line in the setting operation can improve the read window margin in a shorter application cycle. BRIEF DESCRIPTION OF DRAWINGS
[0018] The technical solutions and other beneficial effects of the application will become apparent from the following detailed description of specific embodiments of the application, taken in conjunction with the accompanying drawings.
[0019] Figure 1 A normal distribution diagram of the threshold voltage in the related art is shown.
[0020] Figure 2 A change diagram between the cycle number and the raw bit error rate (RBER) in the related art is shown.
[0021] Figure 3 A structure diagram of the phase change memory provided by the embodiment of the application is shown.
[0022] Figure 4 Voltage diagram for set and reset operation.
[0023] Figure 5 Voltage diagram for threshold voltage change after set operation under forward and reverse voltage.
[0024] Figure 6 Voltage diagram for threshold voltage change after reset operation under forward and reverse voltage. DETAILED DESCRIPTION
[0025] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person skilled in the art without creative labor fall within the scope of protection of the present application.
[0026] In addition, the terms "first", "second" are only used for description purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features, so that the features with "first" and "second" can explicitly or implicitly include one or more of the features, and in the description of the present application, the meaning of "multiple" is two or more, unless otherwise explicitly and specifically limited.
[0027] Figure 1 Normal distribution diagram of threshold voltage in related art. In Figure 1 , the horizontal axis represents the threshold voltage (Vt) of each storage module in the phase change memory, and the vertical axis represents the number (Num) of the threshold voltage (Vt) of each storage module in the phase change memory. Each curve represents the normal distribution of the threshold voltage (Vt) of the phase change memory after a different number of cycle operations.
[0028] From Figure 1 it can be seen that as the number of cycle operations increases, the Set tail deviates, and Tail is the region where the normal distribution of Set vt is greater than 3.5σ. Wherein, σ refers to standard deviation. Set refers to set operation, that is, changing the data in the storage module from 0 to 1.
[0029] Figure 2 Change diagram between cycle number and error bit number in related art. In Figure 2 , the horizontal axis represents the number of cycles, that is, the number of cycle operations, and the vertical axis represents the bit error rate (RBER).
[0030] From Figure 2 it can be seen that as the number of cycles increases, the RBER gradually increases.
[0031] From Figure 1 and Figure 2 It can be seen that after multiple cycles, the elements in the phase change memory are enriched under the action of the electric field, resulting in poor set tail and small RWM, and the poor cycle performance of PCM hinders the further application of phase change memory.
[0032] The embodiment provides a phase change memory 100, please refer to Figures 3 to 6 As Figure 3 shown, the phase change memory 100 includes a word line WL, a bit line BL and a storage module 10, the storage module 10 is connected with the word line WL and the bit line BL.
[0033] In some embodiments, the storage module 10 includes a series of gating tube OTS and storage unit PCM1, the storage unit PCM1 is connected with the word line WL, and the gating tube OTS is connected with the bit line BL.
[0034] In some embodiments, as Figure 4 shown, the storage module 10 is connected with the word line WL and the bit line BL to which the reverse voltage difference is applied in the set operation (SET) for reducing the threshold voltage of the set state of the storage module 10.
[0035] It can be understood that the phase change memory 100 provided by the application can reduce the threshold voltage of the storage module 10 by connecting the word line WL and the bit line BL to which the reverse voltage difference is applied in the set operation, so as to increase the difference between the threshold voltage of the storage module 10 after the reset operation and the threshold voltage of the storage module 10 after the set operation while keeping the threshold voltage of the storage module 10 after the reset operation unchanged, and further improve the read window margin.
[0036] In addition, compared with the longer application cycle required by developing new materials to improve the read window margin, the above-mentioned method of applying the reverse voltage difference to the word line WL and the bit line BL in the set operation can improve the read window margin with a shorter application cycle.
[0037] It should be noted that the threshold voltage of the storage module 10 is the sum of the threshold voltage of the gating tube OTS and the threshold voltage of the storage unit PCM1. The word line WL and the bit line BL to which the reverse voltage difference is applied means that the difference between the word line voltage (VWL) and the bit line voltage (VBL) is negative.
[0038] In some embodiments, in the set operation of the storage module 10, the storage module 10 is connected with the word line WL to which the negative voltage is applied and the bit line BL to which the positive voltage is applied.
[0039] It should be noted that, compared with the set operation and the reset operation, the word line WL is applied with a positive voltage and the bit line BL is applied with a negative voltage, the embodiment overcomes the technical prejudice in the art, and can not only realize the normal set operation, but also reduce the threshold voltage of the storage module 10, which improves the read window margin.
[0040] In some embodiments, as shown in Figure 4 , in the set operation of the storage module 10, the positive voltage of the bit line BL, i.e. VBL, is applied for a period of time and then is decreased according to a preset negative slope.
[0041] It should be noted that this is conducive to further obtaining a better set effect.
[0042] In some embodiments, as shown in Figure 4 , in the reset operation (RESET) of the storage module 10, the word line WL and the bit line BL to which a positive voltage difference is applied are connected, so as to increase the threshold voltage of the reset state of the storage module 10.
[0043] It should be noted that the word line WL and the bit line BL to which a positive voltage difference is applied refer to the difference between the word line voltage (VWL) and the bit line voltage (VBL) being positive. This increases the threshold voltage of the storage module 10, so as to further increase the difference between the threshold voltage of the storage module 10 after the reset operation and the threshold voltage of the storage module 10 after the set operation, and thus improve the read window margin. The reset operation refers to changing the data in the storage module 10 from 1 to 0.
[0044] Optionally, as shown in Figure 4 , in the reset operation of the storage module 10, the storage module 10 is connected with the word line WL to which a positive voltage is applied and the bit line BL to which a negative voltage is applied. It should be noted that this is conducive to further increasing the threshold voltage of the storage module 10. The absolute value of the word line voltage can be greater than the absolute value of the bit line voltage.
[0045] For example, the negative voltage is less than or equal to -3V and greater than or equal to -5V, and the positive voltage is greater than or equal to 3V and less than or equal to 6V. Such a range of the positive voltage and the negative voltage can make the word line voltage and the bit line voltage interchangeable in the set operation and the reset operation, so as to reduce the use of hardware circuits and reduce the cost and area.
[0046] Please refer to Figure 5 and Figure 6 , in Figure 5 and Figure 6In the diagram, the vertical axis represents the threshold voltage (Vt) of the storage module 10, SET(P) indicates that a positive voltage difference or positive voltage is applied between the word line WL and the bit line BL, SET(N) indicates that a reverse voltage difference or reverse voltage is applied between the word line WL and the bit line BL, RESET(P) indicates that a positive voltage difference or positive voltage is applied between the word line WL and the bit line BL, and RESET(N) indicates that a reverse voltage difference or reverse voltage is applied between the word line WL and the bit line BL.
[0047] from Figure 5 It can be seen that when a reverse voltage difference or reverse voltage is applied between word line WL and bit line BL, SET(N) reduces the threshold voltage Vt of memory module 10 after the set operation compared to SET(P) when a positive voltage difference or positive voltage is applied between word line WL and bit line BL.
[0048] from Figure 6 It can be seen that when a positive voltage difference or a positive voltage is applied between word line WL and bit line BL, RESET(P) results in an increase in the threshold voltage Vt of memory module 10 after the reset operation, compared to RESET(N) when a reverse voltage difference or a reverse voltage is applied between word line WL and bit line BL.
[0049] Since the read window margin (RWM) is positively correlated with the difference in threshold voltage ΔVt, the larger ΔVt is, the larger the RWM is. ΔVt is equal to the difference between Reset Vt and Set Vt, where Reset Vt represents the threshold voltage of storage module 10 after the reset operation and Set Vt represents the threshold voltage of storage module 10 after the set operation.
[0050] Set Vt is smaller under reverse voltage than under forward voltage, and Reset Vt is larger under forward voltage than under reverse voltage. This increases ΔVt, thereby increasing RWM.
[0051] In some embodiments, the storage cell PCM1 includes tellurium, germanium, and antimony; during a set operation, the tellurium element migrates to the bit line BL, and the germanium and antimony elements migrate to the word line WL; during a reset operation of the storage module 10, the tellurium element migrates to the word line WL, and the germanium and antimony elements migrate to the bit line BL.
[0052] It should be noted that in the phase-change memory 100 (PCM), germanium (Ge) and antimony (Sb) carry positive charges, while tellurium (Te) carries a negative charge. Under a forward voltage, Ge and Sb drift towards the negative electrode, while Te drifts towards the positive electrode. Forward set and reset operations both amplify this process. After multiple set and reset operations, the elements accumulate at the positive and negative electrodes, respectively, leading to material failure.
[0053] Wherein, the positive electrode refers to the word line WL or the bit line BL to which a positive voltage is applied. The negative electrode refers to the word line WL or the bit line BL to which a negative voltage is applied.
[0054] And the selected storage module 10 is applied with a forward voltage through the word line WL and the bit line BL for Reset, and the selected storage module 10 is applied with a reverse voltage through the word line WL and the bit line BL for Set. The Set under the reverse voltage can restore the Ge and Sb drifted to the negative electrode to the previous position, and the drift of Te to the positive electrode is also weakened. The same elements no longer form a cluster, thereby enhancing the cycle performance of the PCM.
[0055] In some embodiments, the application provides an operation method applied to the above-mentioned phase change memory 100, which includes applying a reverse voltage difference between the word line WL and the bit line BL connected to the selected storage module 10 for the Set operation of the storage module 10; and applying a forward voltage difference between the word line WL and the bit line BL connected to the selected storage module 10 for the Reset operation of the storage module 10.
[0056] It can be understood that, since the operation method provided by the application is applied to the above-mentioned phase change memory 100, the difference between the threshold voltage of the storage module 10 after the Reset operation and the threshold voltage of the storage module 10 after the Set operation can be increased while keeping the threshold voltage of the storage module 10 unchanged after the Reset operation, by connecting the word line WL and the bit line BL to which the reverse voltage difference is applied in the Set operation of the storage module 10, thereby improving the read window margin.
[0057] In addition, compared with a longer application cycle required for improving the read window margin by developing new materials, the above-mentioned method of applying a reverse voltage difference between the word line WL and the bit line BL in the Set operation can improve the read window margin with a shorter application cycle.
[0058] Moreover, the Set operation and the Reset operation adopt opposite voltage directions, which helps to reduce element diffusion and increase the cycle performance of the phase change memory 100.
[0059] In the above-mentioned embodiments, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.
[0060] The phase change memory and the operating method provided by the embodiments of the present application are described in detail above, and the principles and implementation manners of the present application are described by applying specific examples. The above description of the embodiments is only used to help understand the technical solutions of the present application and the core ideas thereof; those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features thereof can be replaced equivalently; and the modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A phase change memory, characterized by, The phase change memory comprises: a word line and a bit line; a storage module, which is connected with the word line and the bit line to which a reverse voltage difference is applied in a set operation for reducing threshold voltage of a set state of the storage module, the reverse voltage difference being a negative voltage difference between the word line voltage and the bit line voltage; and which is connected with the word line and the bit line to which a forward voltage difference is applied in a reset operation for increasing threshold voltage of a reset state of the storage module, the forward voltage difference being a positive voltage difference between the word line voltage and the bit line voltage.
2. The phase change memory of claim 1, wherein, In the set operation of the storage module, the storage module is connected with the word line to which a negative voltage is applied and the bit line to which a positive voltage is applied.
3. The phase change memory of claim 2, wherein, In the set operation of the storage module, the positive voltage of the bit line is decreased according to a preset negative slope after a period of time.
4. The phase change memory of claim 1, wherein, In the reset operation of the storage module, the storage module is connected with the word line to which a positive voltage is applied and the bit line to which a negative voltage is applied.
5. The phase change memory of claim 2 or 4, wherein, The negative voltage is less than or equal to -3V and greater than or equal to -5V, and the positive voltage is greater than or equal to 3V and less than or equal to 6V.
6. The phase change memory of any of claims 1-4, wherein, The storage module comprises a selection tube and a storage unit connected in series, the storage unit is connected with the word line, and the selection tube is connected with the bit line. The threshold voltage of the storage module is the sum of the threshold voltage of the selection tube and the threshold voltage of the storage unit.
7. The phase change memory of claim 6, wherein, The storage unit comprises tellurium, germanium and antimony. In the set operation, the tellurium migrates to the bit line, and the germanium and the antimony migrate to the word line. In the reset operation of the storage module, the tellurium migrates to the word line, and the germanium and the antimony migrate to the bit line.
8. An operating method, characterized in that The operation method is applied to the phase change memory according to any one of claims 1-7, and the operation method comprises: If the set operation of the storage module is performed, a reverse voltage difference is applied between the word line and the bit line connected with the storage module selected to perform the set operation, the reverse voltage difference being a negative voltage difference between the word line voltage and the bit line voltage; If the reset operation of the storage module is performed, a forward voltage difference is applied between the word line and the bit line connected with the storage module selected to perform the reset operation, the forward voltage difference being a positive voltage difference between the word line voltage and the bit line voltage.
9. The method of claim 8, wherein, The operation method is applied to the phase change memory according to any one of claims 1-7, and the operation method comprises: If the set operation of the storage module is performed, a reverse voltage difference is applied between the word line and the bit line connected with the storage module selected to perform the set operation, the reverse voltage difference being a negative voltage difference between the word line voltage and the bit line voltage; If the reset operation of the storage module is performed, a forward voltage difference is applied between the word line and the bit line connected with the storage module selected to perform the reset operation, the forward voltage difference being a positive voltage difference between the word line voltage and the bit line voltage. The operation method is applied to the phase change memory according to any one of claims 1-7, and the operation method comprises: If the set operation of the storage module is performed, a reverse voltage difference is applied between the word line and the bit line connected with the storage module selected to perform the set operation, the reverse voltage difference being a negative voltage difference between the word line voltage and the bit line voltage; If the reset operation of the storage module is performed, a forward voltage difference is applied between the word line and the bit line connected with the storage module selected to perform the reset operation, the forward voltage difference being a positive voltage difference between the word line voltage and the bit line voltage.
Citation Information
Patent Citations
Phase change resistor cell and nonvolatile memory device using the same
US20050128798A1