Imaging element and electronic device

Abstract

According to the present invention, crosstalk is reduced in an imaging element sharing a charge storage portion. The imaging element includes a plurality of pixel blocks and a shielding portion. The pixel block includes: a semiconductor substrate on which a plurality of pixels are disposed, each pixel having a photoelectric conversion portion that performs photoelectric conversion of incident light and a charge storage portion that stores charges generated via the photoelectric conversion, and a separation portion that separates the pixels; a common electrode disposed adjacent to the semiconductor substrate, configured to straddle the separation portion, and connected to the charge storage portion of each of the plurality of pixels; a wiring region provided adjacent to the front surface side of the semiconductor substrate; and a signal generation unit that generates a pixel signal corresponding to the voltage of the common electrode. A shield portion is disposed between the shared electrodes of the plurality of pixel blocks, and a voltage different from a voltage of the shared electrodes is applied to the shield portion.

Description

Technical Field

[0001] The present disclosure relates to an imaging element and an electronic device. Background Art

[0002] For an imaging element, an imaging element including a stack of multiple semiconductor substrates is used. For example, an imaging element is proposed in which a first semiconductor substrate and a second semiconductor substrate are stacked, in the first semiconductor substrate, pixels including a photoelectric conversion unit that performs photoelectric conversion of incident light and a charge holding unit that holds a charge generated by the photoelectric conversion are arranged, and in the second semiconductor substrate, a signal generating circuit that generates a signal according to the charge of the charge holding unit is arranged. Note that a floating diffusion region including a semiconductor region having a relatively high impurity concentration can be applied to the charge holding unit. In such a stacked imaging element, an imaging element is used in which the charge holding unit of the first semiconductor substrate and the signal generating circuit of the second semiconductor substrate are connected by a through wiring formed in a shape that penetrates the second semiconductor substrate.

[0003] Among these stacked imaging elements, an imaging element that shares a signal generating circuit through multiple pixels is proposed. In this imaging element, a shared electrode formed in the shape of an isolation portion that spans across the isolation pixel and is commonly connected to the charge holding portion of the corresponding pixel is provided in a first semiconductor substrate. The shared electrode allows the charge holding portion to be shared by multiple pixels. The shared electrode is connected to the signal generating circuit through a through electrode (for example, see patent document 1).

[0004] Reference List

[0005] Patent Literature

[0006] Patent Document 1: WO 2020 / 262643 A Summary of the invention

[0007] Technical issues

[0008] However, in the prior art, there is a disadvantage that crosstalk occurs, in which the potential of the charge retention portion changes due to interference from pixels that do not share the charge retention portion. This crosstalk is mainly caused by electrostatic coupling of shared electrodes or other electrodes. In particular, there is a significant impact when the pixel size is reduced. This is because the capacitance of the shared electrode or other electrodes increases.

[0009] Therefore, the present disclosure proposes an imaging element and an electronic device that reduce crosstalk in imaging elements that share a charge holding portion.

[0010] Solution to the problem

[0011] The imaging element according to the present disclosure includes a plurality of pixel blocks and a shielding portion. The pixel block includes: a semiconductor substrate in which a plurality of pixels and an isolation portion is arranged to isolate the pixels, each of the plurality of pixels including: a photoelectric conversion portion that performs photoelectric conversion of incident light; and a charge holding portion that holds the charge generated by the photoelectric conversion; a shared electrode that is arranged adjacent to the semiconductor substrate and has a shape that spans the isolation portion, the shared electrode being connected to the charge holding portion of each of the plurality of pixels; a wiring area that is set adjacent to the front surface side of the semiconductor substrate; and a signal generating portion that generates a pixel signal that is a signal corresponding to the voltage of the shared electrode. The shielding portion is arranged between the respective shared electrodes of the plurality of pixel blocks, and a voltage different from the voltage of the shared electrode is applied to the shielding portion.

[0012] An electronic device according to the present disclosure includes a plurality of pixel blocks, a shielding portion, and a processing circuit. The pixel block includes: a semiconductor substrate, in which a plurality of pixels and an isolation portion is arranged to isolate the pixels, each of the plurality of pixels including: a photoelectric conversion portion, which performs photoelectric conversion of incident light; and a charge holding portion, which holds the charge generated by the photoelectric conversion; a shared electrode, which is arranged adjacent to the semiconductor substrate and has a shape spanning the isolation portion, and the shared electrode is connected to the charge holding portion of each of the plurality of pixels; a wiring area, which is set adjacent to the front surface side of the semiconductor substrate; and a signal generating portion, which generates a pixel signal, which is a signal corresponding to the voltage of the shared electrode. The shielding portion is arranged between the shared electrodes of the plurality of pixel blocks, and a voltage different from the voltage of the shared electrode is applied to the shielding portion. The processing circuit processes the pixel signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a diagram illustrating a configuration example of an imaging element according to an embodiment of the present disclosure.

[0014] Figure 2 is a circuit diagram showing a configuration example of a pixel block according to the first embodiment of the present disclosure.

[0015] Figure 3 is a diagram showing a structural example of a pixel according to the first embodiment of the present disclosure.

[0016] Figure 4 : is a diagram showing a structural example of a pixel block according to the first embodiment of the present disclosure.

[0017] Figure 5 : is a diagram showing a structural example of a pixel block according to the second embodiment of the present disclosure.

[0018] Figure 6 is a diagram showing a structural example of a pixel according to a third embodiment of the present disclosure.

[0019] Figure 7 : is a diagram showing a structural example of a pixel block according to the third embodiment of the present disclosure.

[0020] Figure 8 is a diagram showing a structural example of a pixel according to a fourth embodiment of the present disclosure.

[0021] Fig. 9 : is a diagram showing a structural example of a pixel block according to the fourth embodiment of the present disclosure.

[0022] Fig.10 is a diagram showing a structural example of a pixel according to a fifth embodiment of the present disclosure.

[0023] Fig.11 : is a diagram showing a structural example of a pixel block according to a fifth embodiment of the present disclosure.

[0024] Fig.12 is a diagram showing a structural example of a pixel according to a sixth embodiment of the present disclosure.

[0025] Fig.13 : is a diagram showing a structural example of a pixel block according to a sixth embodiment of the present disclosure.

[0026] Fig.14 is a diagram showing a structural example of a pixel according to a seventh embodiment of the present disclosure.

[0027] Fig.15 : is a diagram showing a structural example of a pixel block according to a seventh embodiment of the present disclosure.

[0028] Fig.16 : is a diagram showing a structural example of a pixel block according to an eighth embodiment of the present disclosure.

[0029] Fig.17A is a diagram showing a structural example of a pixel according to a first modification example of an embodiment of the present disclosure.

[0030] Fig. 17B is a diagram showing a structural example of a pixel according to a first modification example of an embodiment of the present disclosure.

[0031] Fig.18 is a diagram showing a structural example of a pixel according to a second modification example of the embodiment of the present disclosure.

[0032] Fig.19 is a diagram showing a structural example of a pixel according to a third modification example of the embodiment of the present disclosure.

[0033] Fig. 20 : is a diagram showing a structural example of a pixel according to a fourth modification example of the embodiment of the present disclosure.

[0034] Fig.21 : is a diagram showing a structural example of a pixel block according to a fourth modification example of the embodiment of the present disclosure.

[0035] Fig. 22 is a diagram illustrating another configuration example of an imaging element.

[0036] Fig.23 is a cross-sectional view showing another structural example of the imaging element.

[0037] Fig.24 : is a diagram illustrating an example of a schematic configuration of an imaging system including an imaging device according to one of the embodiment and its modified examples.

[0038] Fig.25 It is shown in Fig.24 Schematic diagram of an example of an imaging process of an imaging system shown in FIG.

[0039] Fig.26 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0040] Fig. 27 1 is a diagram of assistance in explaining an example of the installation positions of the vehicle exterior information detection portion and the imaging portion.

[0041] Fig.28 is a diagram showing an example of a schematic configuration of an endoscopic surgery system.

[0042] Fig.29 is a block diagram describing an example of the functional configuration of a camera head and a camera control unit (CCU). DETAILED DESCRIPTION

[0043] Hereinafter, embodiments of the present disclosure will be described in detail based on the accompanying drawings. Description will be given in the following order. Note that in each of the following embodiments, the same components are represented by the same symbols, and redundant descriptions will be omitted.

[0044] 1. First Implementation

[0045] 2. Second Implementation

[0046] 3. Third Implementation

[0047] 4. Fourth Implementation

[0048] 5. Fifth Implementation

[0049] 6. Sixth Implementation

[0050] 7. Seventh Implementation Method

[0051] 8. Eighth Implementation

[0052] 9. Modifications

[0053] 10. Application examples

[0054] 11. Application examples for mobile objects

[0055] 12. Application examples of endoscopic surgery systems

[0056] (1. First Embodiment)

[0057] [Configuration of imaging element]

[0058] Figure 1 1 is a diagram showing a configuration example of an imaging element according to an embodiment of the present disclosure. The accompanying figure is a block diagram showing a configuration example of an imaging element 1. An electronic device according to an embodiment of the present disclosure is described by taking the imaging element 1 as an example. The imaging element 1 is a semiconductor element that generates image data of a subject. The imaging element 1 includes a pixel array section 90, a vertical drive section 93, a column signal processing section 94, and a control unit 95.

[0059] The pixel array section 90 includes a plurality of pixel blocks 100 arranged therein. In the pixel array section 90, the plurality of pixel blocks 100 are arranged in the shape of a two-dimensional matrix. In this example, the pixel block 100 includes: a plurality of pixels, a photoelectric conversion section having a photoelectric conversion section that performs photoelectric conversion of incident light; and a charge holding section (charge holding section 103a to 103d to be described later) that holds a charge generated by the photoelectric conversion. For example, a photodiode can be used for the photoelectric conversion section. In addition, a signal generating section (a signal generating section 120 to be described later) is provided for each pixel block 100. The signal generating section 120 generates a pixel signal based on the charge held in the charge holding sections 103a to 103d of the pixel block 100.

[0060] The signal line 91 is wired to each pixel block 100. The pixel block 100 is controlled by a control signal transmitted by the signal line 91. In addition, a signal line 92 is wired in the pixel block 100. A pixel signal is output from the pixel block 100 to the signal line 92. It should be noted that the signal line 91 is provided for each row in a row forming a two-dimensional matrix and is wired to a plurality of pixel blocks 100 arranged in a row in a shared manner. The signal line 92 is arranged in the column direction of the two-dimensional matrix and is wired to a plurality of pixel blocks 100 arranged in one column in a shared manner.

[0061] The vertical drive section 93 generates a control signal for the above-described pixel block 100. The vertical drive section 93 in the drawing generates a control signal for each row of the two-dimensional matrix of the pixel array section 90, and sequentially outputs the control signal via the signal line 91.

[0062] The column signal processing section 94 processes the pixel signals generated by the pixel blocks 100. The column signal processing section 94 in the drawing simultaneously processes the pixel signals transmitted via the signal line 92 from the plurality of pixel blocks 100 arranged in one row of the pixel array section 90. As the processing, for example, analog-to-digital conversion for converting the analog pixel signals generated by the pixel blocks 100 into digital pixel signals or correlated double sampling (CDS) for removing offset errors of the pixel signals may be performed. The processed pixel signals are output to a circuit or the like outside the imaging element 1.

[0063] The control unit 95 controls the vertical drive section 93 and the column signal processing section 94. The control unit 95 in the figure outputs a control signal to control the vertical drive section 93 and the column signal processing section 94 via each of the signal lines 96 and 97. It should be noted that the pixel array section 90 in the figure is an example of an imaging element. The column signal processing section 94 is an example of a processing circuit.

[0064] [Pixel configuration]

[0065] Figure 2 1 is a circuit diagram showing a configuration example of a pixel block according to the first embodiment of the present disclosure. 1 is a circuit diagram showing a configuration example of a pixel block 100 . The pixel block 100 in the figure includes pixels 110 a to 110 d and a signal generating section 120 .

[0066] Pixel 110a includes a photoelectric conversion unit 101a, a charge transfer unit 102a, and a charge retention unit 103a. Pixel 110b includes a photoelectric conversion unit 101b, a charge transfer unit 102b, and a charge retention unit 103b. Pixel 110c includes a photoelectric conversion unit 101c, a charge transfer unit 102c, and a charge retention unit 103c. Pixel 110d includes a photoelectric conversion unit 101d, a charge conversion unit 102d, and a charge retention unit 103d. Photodiodes can be used for the photoelectric conversion units 101a to 101d. N-channel MOS transistors can be used for the charge transfer units 102a to 102d.

[0067] The signal generating section 120 includes a reset transistor 123, a coupling transistor 124, an amplifier transistor 121, and a selection transistor 122. N-channel MOS transistors can be used for the reset transistor 123, the coupling transistor 124, the amplifier transistor 121, and the selection transistor 122.

[0068] As described above, the signal line 91 and the signal line 92 are wired in the pixel block 100. The signal line 91 in the figure includes signal lines TG1 to TG4, a signal line FDG, a signal line RST, and a signal line SEL. In addition, the power line Vdd is wired in the pixel block 100. The power line Vdd supplies power to the pixel block 100.

[0069] The anode of the photoelectric conversion unit 101a is grounded, and the cathode is connected to the source of the charge transfer unit 102a. The anode of the photoelectric conversion unit 101b is grounded, and the cathode is connected to the source of the charge transfer unit 102b. The anode of the photoelectric conversion unit 101c is grounded, and the cathode is connected to the source of the charge transfer unit 102c. The anode of the photoelectric conversion unit 101d is grounded, and the cathode is connected to the source of the charge transfer unit 102d.

[0070] The drains of the charge transfer sections 102a to 102d are connected to the source of the coupling transistor 124, the gate of the amplifier transistor 121, and the first ends of the charge holding sections 103a to 103d. The second ends of the charge holding sections 103a to 103d are grounded. The drain of the coupling transistor 124 is connected to the source of the reset transistor 123. The drain of the reset transistor 123 and the drain of the amplifier transistor 121 are connected to the power supply line Vdd. The source of the amplifier transistor 121 is connected to the drain of the selection transistor 122, and the source of the selection transistor 122 is connected to the signal line 92.

[0071] The gates of the charge transfer sections 102a to 102d are connected to the signal lines TG1 to TG4, respectively. The gate of the coupling transistor 124 is connected to the signal line FDG, the gate of the reset transistor 123 is connected to the signal line RST, and the gate of the selection transistor 122 is connected to the signal line SEL.

[0072] The photoelectric conversion units 101a to 101d perform photoelectric conversion on incident light. The photoelectric conversion units 101a to 101d may include photodiodes formed on a semiconductor substrate 130 described later. The photoelectric conversion units 101a to 101d perform photoelectric conversion of incident light in an exposure period and hold charges generated by the photoelectric conversion.

[0073] The charge holding portions 103a to 103d hold the charges generated by the photoelectric conversion portions 101a to 101d, respectively. The charge holding portions 103a to 103d may include a floating diffusion (FD) region as a semiconductor region formed in the semiconductor substrate 130.

[0074] The charge transfer units 102a to 102d transfer charges. The charge conversion units 102a to 102d transfer charges generated by the photoelectric conversion units 101a to 101d to the charge holding units 103a to 103d, respectively. The charge conversion units 102a and others transfer charges by electrically connecting the photoelectric conversion units 101a and others to the charge holding units 103 and others, respectively. Control signals for the charge transfer units 102a to 102d are respectively sent through signal lines TG1 to TG4.

[0075] The signal generating section 120 generates a pixel signal based on the charges held by the charge holding sections 103a to 103d. As described above, the signal generating section 120 includes the coupling transistor 124, the reset transistor 123, the amplifying transistor 121, and the selecting transistor 122.

[0076] The coupling transistor 124 couples the capacitance connected to its drain to the charge holding portions 103a to 103d. By coupling of this capacitance, the holding capacitance of the charge holding portion 103a etc. can be increased, and the sensitivity of the pixel 110a etc. can be switched. The control signal of the coupling transistor 124 is transmitted by the signal line FDG.

[0077] The reset transistor 123 resets the charge holding portions 103a to 103d. This reset can be performed by electrically connecting the charge holding portions 103a to 103d and the power supply line Vdd to release the charges of the charge holding portions 103a to 103d. At the time of this reset, the coupling transistor 124 is turned on. The control signal of the reset transistor 123 is transmitted through the signal line RST.

[0078] The amplifier transistor 121 amplifies the voltage of the charge holding portions 103a to 103d. The gate of the amplifier transistor 121 is connected to the charge holding portions 103a to 103d. Therefore, a pixel signal having a voltage corresponding to the charge held in the charge holding portions 103a to 103d is generated at the source of the amplifier transistor 121. In addition, the pixel signal can be output to the signal line 92 by turning on the selection transistor 122. The control signal for selecting the transistor 122 is transmitted by the signal line SEL.

[0079] The photoelectric conversion units 101a to 101d perform photoelectric conversion on incident light during the exposure period to generate electric charge and accumulate the electric charge in themselves. After the exposure period, the charge conversion units 102a to 102d transfer the electric charge of the photoelectric conversion units 101a to 101d to the charge holding units 103a to 103d to hold them in the charge holding units 103a to 103d. Based on the held electric charge, the pixel signal is generated by the signal generation unit 120.

[0080] [Pixel configuration]

[0081] Figure 3 is a diagram showing a structural example of a pixel according to a first embodiment of the present disclosure. The accompanying drawing is a plan view showing a structural example of pixels 110a to 110d in a pixel block 100. The pixels 110a to 110d are formed on a semiconductor substrate 130. The pixels 110a to 110d are configured to have a rectangular shape in a plan view. As shown in the figure, the pixels 110a and 110b form a square shape in a plan view, and an on-chip lens 192 described later is generally provided. The dotted circle in the figure represents the outer shape of the on-chip lens 192.

[0082] Pixels 110a and 110b have the function of phase difference pixels. Phase difference pixels detect the image plane phase difference obtained by pupil segmentation of the object image. In this case, pixel signals are generated in pixels 110a and 110b, respectively. Image plane phase difference is detected based on the pixel signals. A slit-shaped opening 138 is formed in an isolation portion 139 between pixels 110a and 110b. The opening 138 constitutes an overflow path between the photoelectric conversion portions 101a and 101b, respectively included in pixels 110a and 110b. The overflow path can reduce errors in image plane phase difference detection.

[0083] It should be noted that when the pixels 110 a and 110 b function as normal pixels, for example, the charges of the photoelectric conversion portions 101 a and 101 b are simultaneously transferred to the charge holding portions 103 a and 103 b , and pixel signals are generated.

[0084] The charge transfer portions 102a and 102b are arranged in the lower part of the pixels 110a and 110b in the drawings. In the drawings, the gate electrodes 143 of the charge transfer portions 102a and 102b are shown. The charge holding portions 103a and 103b are arranged adjacent to the charge transfer portions 102a and 102b, respectively. In the drawings, the shared electrode 142 connected to the charge holding portions 103a and 103b and the charge holding portions 103c and 103d in common is shown.

[0085] The pixels 110c and 110d are configured to have a shape symmetrical to that of the pixels 110a and 110b. The charge holding portions 103a to 103d are respectively arranged at corner portions close to the pixels 110a to 110d, and are commonly connected to the shared electrode 142. In the pixel 110a, etc., the second shared electrode 149 is arranged at a corner portion facing the charge holding portion 103a, etc. The second shared electrode 149 supplies a reference potential to the semiconductor substrate 130 in the pixel 110a, etc.

[0086] The through wiring 260 is provided for each of the common electrode 142, the second common electrode 149, and the gate electrode 143. The through wiring 260 is connected to wiring of the semiconductor substrate 230 described later.

[0087] It is to be noted that the signal generating section 120 of the pixel block 100 is formed in a semiconductor substrate 230 described later. The semiconductor substrate 230 is stacked on the semiconductor substrate 130 .

[0088] The pixel blocks 100, each including pixels 110a to 110d having such a planar shape, are arranged in a two-dimensional matrix shape. The shared electrodes 142 arranged adjacent to each other are capacitively coupled to each other. Through this capacitive coupling, the potentials of the shared electrodes 142 affect each other, thereby changing the potential of the shared electrodes 142. For example, in the case where the pixel block 100 on the left side of the figure captures the image of a high-brightness object and the pixel block 100 on the right side of the figure captures the image of a low-brightness object, the charge holding unit 103 of the left pixel block 100 has a high potential, while the charge holding unit 103 of the right pixel block 100 has a low potential. In this case, due to the influence of the potential rise of the charge holding unit 103 of the left pixel block 100, the charge holding unit 103 of the right pixel block 100 rises above the original potential. This phenomenon is called crosstalk. In the case where the wavelength (color) of the incident light corresponding to each adjacent pixel block 100 is different from each other, color mixing as crosstalk of different tones occurs. The appearance of this crosstalk deteriorates image quality.

[0089] Therefore, the shielding portion 160 is disposed between the shared electrodes 142 of adjacent pixel blocks 100. The shielding portion 160 shields the shared electrodes 142 from each other. A potential different from the potential of the common electrode 142, for example, a reference potential is applied to the shielding portion 160. By providing the shielding portion 160, the capacitive coupling between the shared electrodes 142 can be reduced, and crosstalk can be reduced. The shielding portion 160 in the accompanying drawings is connected to the second shared electrode 149 and is supplied with a reference potential. Note that the shielding portion 160 and the second shared electrode 149 can be formed by the same member. In this case, the shielding portion 160 and the second shared electrode 149 can be formed integrally.

[0090] The shielding section 160 is preferably disposed between the pixel blocks 100 arranged in the same row of the pixel array section 90. Because the pixel blocks 100 of the pixel array section 90 generate pixel signals row by row, and therefore the influence of crosstalk is large. By providing the shielding section 160, the crosstalk reduction effect can be improved. The shielding section 160 in the accompanying drawings shows an example of being arranged in the same row. It should be noted that the shielding section 160 may also be disposed between the shared electrodes 142 vertically adjacent to each other.

[0091] [Structure of a cross section of a pixel block]

[0092] Figure 41 is a diagram showing a structural example of a pixel block according to the first embodiment of the present disclosure. The accompanying drawing is a cross-sectional view showing a structural example of a pixel block 100 in a pixel array section 90. The pixel block 100 in the accompanying drawing includes a semiconductor substrate 130, a wiring region 150, a semiconductor substrate 230, a wiring region 250, a color filter 191, and an on-chip lens 192. Note that pixels 110a and 110b are shown in the accompanying drawing. The structure of the pixel block 100 will be described by taking a portion of the pixel 110a as an example. Note that the figure schematically shows the structure of the pixel block 100 along Figure 3 The shape of the cross section taken by line AB in .

[0093] The semiconductor substrate 130 is a semiconductor substrate provided with the photoelectric conversion unit 101a and the like. The charge transfer unit 102a and the charge holding unit 103a are further arranged in the semiconductor substrate 130 in the drawing. The semiconductor substrate 130 may be made of silicon (Si), for example. The photoelectric conversion unit 101a is arranged in a well region formed in the semiconductor substrate 130. For convenience, based on the premise that the semiconductor substrate 130 in the drawing includes a p-type well region. An element (its diffusion layer) may be formed by arranging n-type and p-type semiconductor regions in the p-type well region.

[0094] The rectangle shown in the semiconductor substrate 130 in the drawing represents an n-type semiconductor region. The photoelectric conversion portion 101a includes an n-type semiconductor region 131. Specifically, a photodiode including a pn junction formed at an interface between the n-type semiconductor region 131 and a surrounding p-type well region corresponds to the photoelectric conversion portion 101a.

[0095] The charge holding portion 103a includes an n-type semiconductor region 132 having a relatively high impurity concentration. The n-type semiconductor region 132 is included in the above-mentioned FD. In addition, a common electrode 142 is arranged adjacent to the charge holding portion 103a. The common electrode 142 can be made of polysilicon doped with impurities. As described above, the common electrode 142 is formed in a shape spanning the isolation portion 139 and is arranged adjacent to the semiconductor region 132 of the charge holding portions 103a to 103d. Therefore, the charge holding portions 103a to 103d are connected to the common electrode 142 in common.

[0096] Note that the charge transfer portion 102a includes semiconductor regions 131 and 132 and a gate electrode 143 (not shown). The n-type semiconductor regions 131 and 132 correspond to the source region and the drain region of the charge transfer portion 102a, respectively. The gate electrode 143 is arranged on the front surface side of the semiconductor substrate 130 and includes a columnar portion having a depth reaching the n-type semiconductor region 131. When a conduction voltage is applied to the gate electrode 143, a channel is formed in a well region adjacent to the gate electrode 143, and the n-type semiconductor regions 131 and 132 are brought into a conduction state. That is, conduction is established between the photoelectric conversion portion 101a and the charge holding portion 103a, and the charge of the photoelectric conversion portion 101a is transferred to the charge holding portion 103a. As described above, the charge transfer portion 102a includes a vertical transistor that transfers charge in the thickness direction of the semiconductor substrate. Note that the gate electrode 143 can be made of polysilicon doped with impurities.

[0097] Insulating films 140 and 141 are respectively arranged on the front side and the back side of the semiconductor substrate 130. The insulating films 140 and 141 can be made of, for example, silicon oxide (SiO 2 ), silicon nitride (SiN). Note that an insulating film is also provided between the gate electrode 143 and the semiconductor substrate 130. The insulating film corresponds to a gate insulating film.

[0098] The isolation part 139 is provided at the boundary of the pixel block 100 to separate the pixels 110. The isolation part 139 can be formed by coating a material such as SiO 2 The insulator is embedded in a groove penetrating from the front surface side to the rear surface side of the semiconductor substrate 130.

[0099] The wiring region 150 is provided on the front surface side of the semiconductor substrate 130, and is a region in which wiring of signals of transmission elements and the like is provided. The wiring region 150 in the figure includes an insulating layer 151. The insulating layer 151 insulates the common electrode 142, wiring and the like arranged on the front surface side of the semiconductor substrate 130. The insulating layer 151 may be made of, for example, SiO 2 Made.

[0100] The semiconductor substrate 230 is a substrate made of a semiconductor in which the signal generating section 120 is arranged. The semiconductor substrate 230 is stacked on the semiconductor substrate 130. The back surface of the semiconductor substrate 230 is bonded to the front side of the wiring region 150 of the semiconductor substrate 130, thereby stacking the semiconductor substrates 130 and 230. Similar to the semiconductor substrate 130, the semiconductor substrate 230 can be made of Si. As described above, the reset transistor 123, the coupling transistor 124, the amplifier transistor 121, and the selection transistor 122 constituting the signal generating section 120 are arranged in the semiconductor substrate 230. In the drawings, the amplifier transistor 121 is shown. The gate electrode 242 of the amplifier transistor 121 is arranged on the semiconductor substrate 230 in the drawings. In addition, the semiconductor region 231 constituting the source and drain of the amplifier transistor 121 is arranged in the semiconductor substrate 230. In addition, the insulating film 240 is provided on the front surface of the semiconductor substrate 230.

[0101] The wiring region 250 is provided on the front surface side of the semiconductor substrate 230. The wiring region 250 includes wirings 252, contact plugs 253, and an insulating layer 251.

[0102] The insulating layer 251 insulates wiring and the like similarly to the insulating layer 151. The insulating layer 251 may be made of, for example, SiO 2 Made.

[0103] The wiring 252 transmits a signal or the like to an element in the pixel block 100. The wiring 252 may be made of a metal such as copper (Cu) or W. The contact plug 253 electrically connects the wiring and the semiconductor substrate. The contact plug 253 may be made of, for example, W or the like in a columnar shape.

[0104] In addition, the wiring 252 in the figure represents an example of connecting the through wiring 260. As described above, the through wiring 260 connects the common electrode 142 of the semiconductor substrate 130 and other wirings with the semiconductor substrate 230. The through wiring 260 is formed in a shape that penetrates the semiconductor substrate 230. Specifically, the through wiring 260 is provided in an opening that penetrates the semiconductor substrate 230 and is insulated from the semiconductor substrate 230 by the insulating layer 251.

[0105] The color filter 191 is an optical filter that transmits light having a predetermined wavelength among incident light. As the color filter 191, a color filter that transmits red light, green light, or blue light can be used.

[0106] The on-chip lens 192 collects incident light. The on-chip lens 192 is formed in, for example, a hemispherical shape and collects incident light on the photoelectric conversion unit 101a, etc. The on-chip lens 192 in the drawing shows an example in which it is provided in common for the pixels 110a and 110b.

[0107] The shielding portion 160 may be disposed adjacent to the isolation portion 139 between the common electrodes 142. Thus, it is possible to reduce the area occupied by the isolation portion 139 in the pixel 110. In addition, the shielding portion 160 in the figure may be formed simultaneously with the common electrode 142.

[0108] As described above, the imaging element 1 according to the first embodiment of the present disclosure can reduce the capacitive coupling of the shared electrode 142 by providing the shielding portion 160 between adjacent shared electrodes 142 in the pixel block 100. This can reduce crosstalk. Even in the case where the size of the pixel 110 is reduced in order to reduce the size of the imaging element 1, it is possible to prevent image quality degradation caused by crosstalk.

[0109] (2. Second Embodiment)

[0110] In the imaging element 1 of the first embodiment described above, the shielding portion 160 having the same height as the common electrode 142 is provided. Meanwhile, the imaging element 1 according to the second embodiment of the present disclosure is different from the first embodiment described above in that the shielding portion 160 having a height different from the common electrode 142 is provided.

[0111] [Structure of a cross section of a pixel block]

[0112] Figure 5 1 is a diagram showing a structural example of a pixel block according to a second embodiment of the present disclosure. Figure 4 Schematic cross-sectional view of a structural example of a pixel block 100. It should be noted that in the figure, the cross-sectional view of the pixel block 100 is simplified. Figure 4 The imaging element 1 in FIG. 1 is different in that a shielding portion 161 is included instead of the shielding portion 160 .

[0113] The shielding portion 161 is formed in a shape whose height from the semiconductor substrate 130 is higher than that of the common electrode 142. Therefore, the shielding effect of the capacitive coupling can be improved. Note that the common electrode 142 and the shielding portion 161 may be formed separately.

[0114] The configuration of the imaging element 1 other than the above is similar to that of the imaging element 1 in the first embodiment of the present disclosure, and therefore, a description thereof is omitted.

[0115] As described above, in the imaging element 1 according to the second embodiment of the present disclosure, the shielding effect of the capacitive coupling can be improved by using the shield portion 161 having a shape whose upper surface is higher than the upper surface of the common electrode 142 , thereby further reducing crosstalk.

[0116] (3. Third Embodiment)

[0117] In the imaging element 1 of the above-described first embodiment, the shielding section 160 is provided between the common electrodes 142. Meanwhile, the imaging element 1 according to the third embodiment of the present disclosure is different from the above-described first embodiment in that the through wiring 260 is provided in the shielding section 160.

[0118] [Pixel configuration]

[0119] Figure 6 1 is a diagram showing a structural example of a pixel according to a third embodiment of the present disclosure. Figure 3 1 is a plan view of a structural example of pixels 110a to 110d in a similar pixel block 100. Note that in the drawings, the illustration of the pixel 110a and the like is simplified. Figure 3 The pixel block 100 in FIG. 1 is different in that it also includes a through wiring 162 .

[0120] The through-hole wiring 162 has the same shape as the through-hole wiring 260 , and is connected to the shield portion 160 . The through-hole wiring 162 is arranged between the common electrodes 142 .

[0121] [Structure of a cross section of a pixel block]

[0122] Figure 7 1 is a diagram showing a structural example of a pixel block according to a third embodiment of the present disclosure. Figure 4 Schematic cross-sectional view of a structural example of a pixel block 100. Note that in the figure, the cross-sectional view of the pixel block 100 is simplified. Figure 4 The pixel array section 90 in FIG. 1 is different in that the through wiring 162 is provided in the shield section 160 .

[0123] A through wiring 260 is arranged in each common electrode 142. A coupling capacitance also exists between the through wirings 260. Therefore, the through wirings 162 are arranged so as to shield between the through wirings 260.

[0124] The configuration of the imaging element 1 other than the above is similar to that of the imaging element 1 in the first embodiment of the present disclosure, and therefore, a description thereof is omitted.

[0125] As described above, in the imaging element 1 according to the third embodiment of the present disclosure, the through wiring 162 is further provided in the shielding portion 160. Therefore, the shielding effect of the capacitive coupling can be further improved.

[0126] (4. Fourth Embodiment)

[0127] In the imaging element 1 of the first embodiment described above, the shield portion 160 is provided between the common electrodes 142. Meanwhile, the imaging element 1 according to the fourth embodiment of the present disclosure is different from the first embodiment described above in that the charge transfer portion 102a and other gate electrodes are used as shields.

[0128] [Pixel configuration]

[0129] Figure 8 1 is a diagram showing a structural example of a pixel according to a fourth embodiment of the present disclosure. Figure 3 1 is a plan view of a structural example of pixels 110a to 110d in a similar pixel block 100. Note that in the drawings, the illustration of the pixel 110a and the like is simplified. Figure 3 The pixel block 100 in FIG. 1 is different in that the shielding portion 160 is omitted and a gate electrode 145 is provided instead of the gate electrode 143 of the charge transfer portion 102 a and the like.

[0130] The gate electrode 145 has a shape in which its end protrudes to the area between the common electrodes 142. Since the gate electrode 145 has a potential different from that of the common electrode 142, an effect similar to that of the shielding portion 160 can be obtained. Note that the gate electrode 145 can be arranged at a distance that prevents interference due to its own capacitive coupling. The gate electrodes 145 in the drawings show an example in which they are arranged at the same interval as the width of the isolation portion 139.

[0131] [Structure of a cross section of a pixel block]

[0132] Fig. 9 1 is a diagram showing a structural example of a pixel block according to a fourth embodiment of the present disclosure. Figure 4 Schematic cross-sectional view of a structural example of a pixel block 100. Note that in the figure, the cross-sectional view of the pixel block 100 is simplified. Figure 4 The pixel array section 90 in FIG. 1 is different in that the shielding section 160 is omitted and two gate electrodes 145 are arranged between the common electrodes 142 .

[0133] The configuration of the imaging element 1 other than the above is similar to that of the imaging element 1 in the first embodiment of the present disclosure, and therefore, a description thereof is omitted.

[0134] As described above, the imaging element 1 according to the fourth embodiment of the present disclosure uses the gate electrode 145 and others of the charge transfer portion 102a as a shield portion. Therefore, the capacitive coupling of the common electrode 142 can be reduced, thereby reducing crosstalk.

[0135] (5. Fifth Embodiment)

[0136] The imaging element 1 of the fourth embodiment described above uses the gate electrode 145 as a shielding portion. Meanwhile, the imaging element 1 according to the fifth embodiment of the present disclosure is different from the first embodiment described above in that a shielding portion 160 is further included.

[0137] [Pixel configuration]

[0138] Fig.10 1 is a diagram showing a structural example of a pixel according to a fifth embodiment of the present disclosure. Figure 8 FIG. 1 is a plan view of a structural example of pixels 110 a to 110 d in a similar pixel block 100. The pixel block 100 in the figure is similar to the pixel block 100 in the figure. Figure 8 The pixel block 100 in FIG. 1 is different in that it further includes a shielding portion 163 and a through wiring 162 .

[0139] The shielding portion 163 is formed near the common electrode 142. Figure 3 Unlike the shielding portion 160 in the figure, the shielding portion 163 has a shape that is not connected to the second common electrode 149. A through wiring 162 is connected to the shielding portion 163. A reference potential is provided to the shielding portion 163 via the through wiring 162. As shown in the figure, the shielding portion 163 can be arranged at a position to close the space between the gate electrodes 145. The capacitive coupling of the common electrode 142 can be shielded by the gate electrode 145 and the shielding portion 163.

[0140] [Structure of a cross section of a pixel block]

[0141] Fig.11 1 is a diagram showing a structural example of a pixel block according to a fifth embodiment of the present disclosure. Fig. 9 Schematic cross-sectional view of a structural example of a pixel block 100. The pixel array section 90 and Figure 4 The pixel array unit 90 in FIG. 1 is different in that a shielding unit 163 is provided between two gate electrodes 145. A through wiring 162 is arranged in the shielding unit 163.

[0142] The configuration of the imaging element 1 other than the above is similar to that of the imaging element 1 in the fourth embodiment of the present disclosure, and therefore, description thereof is omitted.

[0143] As described above, in the imaging element 1 according to the fifth embodiment of the present disclosure, the gate electrode 145 and the shielding section 163 are provided between the common electrodes 142. Therefore, the shielding effect of the capacitive coupling of the common electrode 142 can be further improved.

[0144] (6. Sixth Implementation Method)

[0145] The imaging element 1 of the fifth embodiment includes the gate electrode 145 and the shielding portion 163. Meanwhile, the imaging element 1 of the sixth embodiment of the present invention is different from the fifth embodiment in that the through wiring 260 of the gate electrode 145 is provided between the common electrodes 142.

[0146] [Pixel configuration]

[0147] Fig.12 1 is a diagram showing a structural example of a pixel according to a sixth embodiment of the present disclosure. Fig.10 FIG. 1 is a plan view of a structural example of pixels 110 a to 110 d in a similar pixel block 100. The pixel block 100 in the figure is similar to the pixel block 100 in the figure. Fig.10 The pixel block 100 in FIG. 1 is different in that the through wiring 260 of the gate electrode 145 is provided at a position between the common electrodes 142. Incidentally, the shapes of the gate electrode 145 and the common electrode 142 are adjusted so that the through wiring 260 can be arranged.

[0148] As shown in the figure, the through wiring 260 connected to the gate electrode 145 and the through wiring 162 connected to the shielding portion 163 may be shielded between the through wiring 260 connected to the common electrode 142 .

[0149] [Structure of a cross section of a pixel block]

[0150] Fig.13 1 is a diagram showing a structural example of a pixel block according to a sixth embodiment of the present disclosure. Fig.11 Schematic cross-sectional view of a structural example of a similar pixel block 100. The pixel array section 90 in the figure is similar to Fig.11 The pixel array section 90 in FIG. 1 is different in that a through wiring 260 connected to the gate electrode 145 is provided between the common electrodes 142. The dashed rectangle in the figure represents the through wiring 260 connected to the gate electrode 145.

[0151] The configuration of the imaging element 1 other than the above is similar to that of the imaging element 1 in the fifth embodiment of the present disclosure, and therefore, description thereof is omitted.

[0152] As described above, in the imaging element 1 according to the sixth embodiment of the present disclosure, the through wiring 260 of the gate electrode 145 is further provided between the common electrodes 142. Therefore, the shielding effect of the capacitive coupling of the common electrode 142 can be further improved.

[0153] (7. Seventh Implementation Method)

[0154] In the imaging element 1 of the sixth embodiment described above, the reference potential is supplied to the shield portion 163 via the through wiring 162. Meanwhile, the imaging element 1 according to the seventh embodiment of the present disclosure is different from the sixth embodiment described above in that the reference potential is supplied to the shield portion 163 through the wiring provided in the wiring region 150.

[0155] [Pixel configuration]

[0156] Fig.14 2 is a diagram showing a structural example of a pixel according to a seventh embodiment of the present disclosure. Fig.12 FIG. 1 is a plan view of an example of a structure of pixels 110a to 110d in a similar pixel block 100. The pixel block 100 in FIG. Fig.12 The pixel block 100 in FIG. 1 is different in that a through wiring 162 of the wiring 152 instead of the shielding portion 163 is arranged.

[0157] The wiring 152 is provided in the wiring region 150. The wiring 152 has a shape covering the shield 163 and is connected to the shield 163. In addition, the wiring 152 is connected to the second common electrode 149. A reference potential is supplied to the shield 163 via the wiring 152. The wiring 152 may be made of, for example, polysilicon doped with impurities.

[0158] [Structure of a cross section of a pixel block]

[0159] Fig.15 1 is a diagram showing a structural example of a pixel block according to a seventh embodiment of the present disclosure. Fig.13 1 is a schematic cross-sectional view of a similar structure example of a pixel block 100. The pixel array section 90 in the figure is similar to Fig.13 The pixel array section 90 in FIG. 1 is different in that a wiring 152 is arranged instead of the through wiring 162 . The wiring 152 is stacked on the shield section 163 .

[0160] The configuration of the imaging element 1 other than the above is similar to that of the imaging element 1 of the sixth embodiment of the present disclosure, and therefore, a description thereof is omitted.

[0161] As described above, in the imaging element 1 according to the seventh embodiment of the present disclosure, the wiring 152 is provided between the common electrodes 142. Therefore, the shielding effect of the capacitive coupling of the common electrode 142 can be improved.

[0162] (8. Eighth Implementation Method)

[0163] In the imaging element 1 of the sixth embodiment described above, the semiconductor substrate 230 including the signal generating section 120 is stacked on the semiconductor substrate 130. On the other hand, the imaging element 1 according to the eighth embodiment of the present disclosure is different from the sixth embodiment described above in that the semiconductor substrate 230 is omitted.

[0164] [Structure of a cross section of a pixel block]

[0165] Fig.16 1 is a diagram showing a structural example of a pixel block according to an eighth embodiment of the present disclosure. Fig.13 1 is a schematic cross-sectional view of a similar structure example of a pixel block 100. The pixel array section 90 in the figure is similar to Fig.13 The pixel array section 90 in FIG. 1 is different in that the semiconductor substrate 230 is omitted.

[0166] The signal generating section 120 (not shown) is arranged in the semiconductor substrate 130 in the drawing. In the common electrode 142 and other electrodes in the drawing, a columnar wiring 155 is arranged instead of the through wiring 260 and connected to the wiring 154.

[0167] The configuration of the imaging element 1 other than the above is similar to that of the imaging element 1 of the sixth embodiment of the present disclosure, and therefore, a description thereof is omitted.

[0168] As described above, in the imaging element 1 according to the eighth embodiment of the present disclosure, the shielding section 163 is provided between the common electrodes 142 in the pixel block 100 formed in the semiconductor substrate 130. Therefore, the shielding effect of the capacitive coupling of the common electrode 142 can be improved.

[0169] (9.Modification)

[0170] A modified example of the pixel block 100 will be described.

[0171] [First Modification]

[0172] Fig.17A and Fig. 17B 1 is a diagram showing a structural example of a pixel according to a first modification example of an embodiment of the present disclosure. Figure 3 FIG. 1 is a plan view of a structural example of pixels 110 a to 110 d in a similar pixel block 100. In the pixel block 100 in the figure, the position of the opening 138 of the isolation portion 139 is different from that of the pixel block 100 in the figure. Figure 3 The position of the opening 138 in FIG. Fig.17A The opening 138 in FIG. 1 shows an example in which the opening is arranged at a position close to one end of the pixel 110 a or the like. Fig. 17B The opening 138 in FIG. 1 shows an example in which the opening is provided at the end of the pixel 110 a or the like. Fig.17A and Fig. 17B In the pixel block 100 , the shielding part 160 may be arranged between the common electrodes 142 .

[0173] [Second Modification]

[0174] Fig.18 is a diagram showing a structural example of a pixel according to a second modification example of an embodiment of the present disclosure. Figure 3 A plan view of a structural example of pixels 110a to 110d in a similar pixel block 100. In the figure, an isolation portion 137 is provided between pixels 110a and 110b instead of isolation portion 139. Isolation portion 137 is formed of a semiconductor region having a relatively high impurity concentration. Isolation portion 137 can be formed by, for example, ion implantation. Insulation portion 137 is also provided between pixels 110c and 110d. Furthermore, in Fig.18 In the pixel block 100 , the shielding portion 160 may be disposed between the common electrodes 142 .

[0175] [Third Modification]

[0176] Fig.19 1 is a diagram showing a structural example of a pixel according to a third modification example of an embodiment of the present disclosure. Figure 3 1 is a plan view of an example of a structure of pixels 110a to 110d in a similar pixel block 100. The pixels 110a to 110d in the figure are similar to those in FIG. Figure 3 The difference between the pixels 110a to 110d in FIG. 1 is that the pixels have a square shape. Fig.19 In the pixel block 100 , the shielding portion 163 may be disposed between the common electrodes 142 .

[0177] [Fourth Modification]

[0178] Fig. 20 is a diagram showing a structural example of a pixel according to a fourth variant of an embodiment of the present disclosure. The figure shows an example of a pixel block 100 including eight pixels 110 (pixels 110a to 110h). The charge holding portions 103a to 103d of the pixels 110a to 110d are commonly connected to a shared electrode 142, and the charge holding portions 103e to 103h of the pixels 110e to 110h are commonly connected to a shared electrode 148. As described later, the shared electrode 142 and the shared electrode 148 are connected by wiring in a through-wiring area 250. The shielding portion 160 in the accompanying drawings may be arranged between the shared electrode 142 and the shared electrode 148 included in different pixel blocks 100.

[0179] Fig.21 1 is a diagram showing a structural example of a pixel block according to a fourth modification example of the present disclosure. Fig. 20Schematic cross-sectional view of a structural example of the pixel block 100 shown in FIG. A through wiring 260 is provided in each of the common electrodes 142 and 148. These through wirings 260 are generally connected by a wiring 254. The amplifier transistor 121 of the signal generating section 120 and others (not shown) are connected to the wiring 252.

[0180] The shielding part 160 is disposed at a position to shield the common electrodes 142 and 148 of different pixel blocks 100 .

[0181] Fig. 22 1 is a diagram showing another configuration example of an imaging element. The imaging element 1 includes three substrates (a first substrate 10, a second substrate 20, and a third substrate 30). The imaging element 1 has a three-dimensional structure formed by bonding the three substrates (the first substrate 10, the second substrate 20, and the third substrate 30). The first substrate 10, the second substrate 20, and the third substrate 30 are stacked in this order.

[0182] The first substrate 10 includes a plurality of sensor pixels 12 that perform photoelectric conversion in a semiconductor substrate 11. The semiconductor substrate 11 corresponds to a specific example of the “first semiconductor substrate” of the present disclosure. The plurality of sensor pixels 12 are arranged in a matrix shape in a pixel region 13 of the first substrate 10. The second substrate 20 includes a readout circuit 22 that outputs a pixel signal based on the charge output from the sensor pixel 12 in a semiconductor substrate 21, each of the readout circuits 22 being provided for every four sensor pixels 12. The semiconductor substrate 21 corresponds to a specific example of the “second semiconductor substrate” of the present disclosure. The second substrate 20 includes a plurality of pixel drive lines 23 extending in the row direction and a plurality of vertical signal lines 24 extending in the column direction. The third substrate 30 includes a logic circuit 32 that processes a pixel signal in a semiconductor substrate 31. The semiconductor substrate 31 corresponds to a specific example of the “third semiconductor substrate” of the present disclosure. The logic circuit 32 includes, for example, a vertical drive circuit 33, a column signal processing circuit 34, a horizontal drive circuit 35, and a system control circuit 36. The logic circuit 32 (specifically, the horizontal drive circuit 35) outputs to the outside the output voltage Vout of each sensor pixel 12. In the logic circuit 32, for example, a low resistance region made of silicide formed using a self-aligned silicide process such as CoSi2 or NiSi may be formed on the surface of the impurity diffusion region in contact with the source electrode and the drain electrode.

[0183] For example, the vertical drive circuit 33 sequentially selects a plurality of sensor pixels 12 row by row. The column signal processing circuit 34 performs, for example, correlated double sampling (CDS) processing on the pixel signal output from each sensor pixel 12 of the row selected by the vertical drive circuit 33. The column signal processing circuit 34 extracts the signal level of the pixel signal by performing, for example, CDS processing, and holds pixel data corresponding to the amount of light received by each sensor pixel 12. For example, the horizontal drive circuit 35 sequentially outputs the pixel data held in the column signal processing circuit 34 to the outside. For example, the system control circuit 36 ​​controls the driving of each block (the vertical drive circuit 33, the column signal processing circuit 34, and the horizontal drive circuit 35) in the logic circuit 32.

[0184] Fig.23 is a cross-sectional view showing another configuration example of an imaging element. Fig. 22 An example of a cross-sectional structure in the vertical direction of the imaging element 1 in FIG. Fig.23 An example of a cross-sectional structure of a portion facing the sensor pixel 12 in the imaging element 1 is shown. The imaging element 1 is configured by stacking a first substrate 10, a second substrate 20, and a third substrate 30 in this order, and further has a color filter 40 and a light receiving lens 50 on the back side (light incident side) of the first substrate 10. For example, one color filter 40 and one light receiving lens 50 are provided for each sensor pixel 12. That is, the imaging element 1 is a back-illuminated type.

[0185] The first substrate 10 is formed by stacking an insulating layer 46 on a semiconductor substrate 11. The first substrate 10 includes the insulating layer 46 as a part of the interlayer insulating film 51. The insulating layer 46 is included in a gap between the semiconductor substrate 11 and a semiconductor substrate 21 to be described later. The semiconductor substrate 11 is formed of a silicon substrate. For example, the semiconductor substrate 11 has a p-well layer 42 in a part of the front surface and its vicinity and a PD 41 having a conductivity type different from that of the p-well layer 42 in other regions (regions deeper than the p-well layer 42). The p-well layer 42 is formed of a P-type semiconductor region. The PD 41 is formed of a semiconductor region of a conductivity type different from that of the p-well layer 42 (specifically, n-type). The semiconductor substrate 11 has a floating diffusion FD as a semiconductor region of a conductivity type different from that of the p-well layer 42 (specifically, n-type) in the p-well layer 42.

[0186] The first substrate 10 includes a photodiode PD, a transfer transistor TR, and a floating diffusion FD for each sensor pixel 12. The first substrate 10 has a structure in which the transfer transistor TR and the floating diffusion FD are included in a portion on the front surface side (the side opposite to the light incident surface side, the second substrate 20 side) of the semiconductor substrate 11. The first substrate 10 includes an element isolation portion 43 that isolates each sensor pixel 12. The element isolation portion 43 is formed to extend in the normal direction of the semiconductor substrate 11 (the direction perpendicular to the surface of the semiconductor substrate 11). The element isolation portion 43 is included between two sensor pixels 12 adjacent to each other. The element isolation portion 43 electrically isolates the sensor pixels 12 adjacent to each other from each other. The element isolation portion 43 is made of, for example, silicon oxide. The element isolation portion 43 penetrates the semiconductor substrate 11, for example. For example, the first substrate 10 also includes a p-well layer 44, that is, a side surface of the element isolation portion 43 and in contact with the surface on the photodiode PD side. The p-well layer 44 is formed by a semiconductor region of a conductivity type different from that of the photodiode PD (specifically, a P-type). For example, the first substrate 10 further includes a fixed charge film 45 in contact with the back surface of the semiconductor substrate 11. In order to suppress the generation of dark current caused by the interface state on the light receiving surface side of the semiconductor substrate 11, the fixed charge film 45 is negatively charged. The fixed charge film 45 is formed of, for example, an insulating film having a negative fixed charge. Examples of the material of such an insulating film include hafnium oxide, zirconium oxide, aluminum oxide, titanium oxide, and tantalum oxide. A hole accumulation layer is formed at the interface on the light receiving surface side of the semiconductor substrate 11 by the electric field induced by the fixed charge film 45. The hole accumulation layer suppresses the generation of electrons from the interface. The color filter 40 is provided on the rear surface side of the semiconductor substrate 11. The color filter 40 is in contact with the fixed charge film 45, for example, and is included at a position facing the sensor pixel 12 via the fixed charge film 45. The light receiving lens 50 is in contact with the color filter 40, for example, and is included at a position facing the sensor pixel 12 via the color filter 40 and the fixed charge film 45.

[0187] The second substrate 20 is formed by stacking an insulating layer 52 on a semiconductor substrate 21. The second substrate 20 includes the insulating layer 52 as a part of the interlayer insulating film 51. The insulating layer 52 is included in the gap between the semiconductor substrate 21 and the semiconductor substrate 31. The semiconductor substrate 21 is formed of a silicon substrate. The second substrate 20 includes one readout circuit 22 for every four sensor pixels 12. The second substrate 20 has a structure in which the readout circuit 22 is included in a portion on the front surface side (third substrate 30 side) of the semiconductor substrate 21. The second substrate 20 is bonded to the first substrate 10 in a manner that the back surface of the semiconductor substrate 11 faces the front surface side of the semiconductor substrate 21. That is, the second substrate 20 is bonded to the first substrate 10 in a face-to-back manner. The second substrate 20 also includes an insulating layer 53 that penetrates the semiconductor substrate 21 in the same layer as the semiconductor substrate 21. The second substrate 20 includes the insulating layer 53 as a part of the interlayer insulating film 51. The insulating layer 53 is included in a manner that covers the side of the through wiring 54 described later.

[0188] The stacked body including the first substrate 10 and the second substrate 20 includes an interlayer insulating film 51 and a through wiring 54 included in the interlayer insulating film 51. The stacked body has one through wiring 54 for each sensor pixel 12. The through wiring 54 extends in the normal direction of the semiconductor substrate 21, penetrating a portion of the interlayer insulating film 51 including the insulating layer 53. The first substrate 10 and the second substrate 20 are electrically connected to each other through the through wiring 54. Specifically, the through wiring 54 is electrically connected to the floating diffusion FD and the connection wiring 55 described later.

[0189] The stacked body including the first substrate 10 and the second substrate 20 further includes through wirings 47 and 48 included in the interlayer insulating film 51. The stacked body has one through wiring 47 and one through wiring 48 for each sensor pixel 12. The through wirings 47, 48 extend in the normal direction of the semiconductor substrate 21, penetrating a portion of the interlayer insulating film 51 including the insulating layer 53. The first substrate 10 and the second substrate 20 are electrically connected to each other through the through wirings 47 and 48. Specifically, the through wiring 47 is electrically connected to the p-well layer 42 of the semiconductor substrate 11 and the wiring of the second substrate 20. The through wiring 48 is electrically connected to the transfer gate TG and the pixel drive line 23.

[0190] For example, the second substrate 20 includes a plurality of connection portions 59 electrically connected to the readout circuit 22 and the semiconductor substrate 21 in the insulating layer 52. For example, the second substrate 20 further includes a wiring layer 56 on the insulating layer 52. The wiring layer 56 includes, for example, an insulating layer 57 and a plurality of pixel drive lines 23 and a plurality of vertical signal lines 24 included in the insulating layer 57. The wiring layer 56 further includes, for example, a plurality of connection lines 55 in the insulating layer 57, wherein one connection line is provided for every four sensor pixels 12. The connection lines 55 are electrically connected to each other through the wiring 54, and the wiring 54 is electrically connected to the floating diffusion FD in the four sensor pixels 12 included in the shared readout circuit 22. Here, the total number of the through wirings 54 and 48 is greater than the total number of the sensor pixels 12 included in the first substrate 10 and is twice the total number of the sensor pixels 12 included in the first substrate 10. In addition, the total number of the through wirings 54, 48, and 47 is greater than the total number of the sensor pixels 12 included in the first substrate 10 and is three times the total number of the sensor pixels 12 included in the first substrate 10.

[0191] The wiring layer 56 also includes, for example, a plurality of pad electrodes 58 in the insulating layer 57. Each of the pad electrodes 58 is formed of a metal such as copper (Cu) or aluminum (Al). Each of the pad electrodes 58 is exposed on the front surface of the wiring layer 56. Each of the pad electrodes 58 is used for electrical connection between the second substrate 20 and the third substrate 30 and for bonding between the second substrate 20 and the third substrate 30. For example, one pad electrode 58 is provided for each pair of pixel drive lines 23 and vertical signal lines 24. Here, the total number of pad electrodes 58 (or the total number of nodes between the pad electrodes 58 and the pad electrodes 64 (described later)) is less than the total number of sensor pixels 12 included in the first substrate 10.

[0192] For example, the third substrate 30 is formed by stacking an interlayer insulating film 61 on a semiconductor substrate 31. As will be described later, since the third substrate 30 is bonded to the second substrate 20 in a manner that its front surfaces face each other, when describing the structure in the third substrate 30, the description in the vertical direction is opposite to the vertical direction in the drawings. The semiconductor substrate 31 is formed of a silicon substrate. The third substrate 30 has a structure in which the logic circuit 32 is included in a portion on the front surface side of the semiconductor substrate 31. For example, the third substrate 30 also includes a wiring layer 62 located on the interlayer insulating film 61. The wiring layer 62 includes, for example, an insulating layer 63 and a plurality of pad electrodes 64 included in the insulating layer 63. The plurality of pad electrodes 64 are electrically connected to the logic circuit 32. Each of the pad electrodes 64 is formed of, for example, Cu (copper). Each of the pad electrodes 64 is exposed on the front surface of the wiring layer 62. Each pad electrode 64 is used for electrical connection between the second substrate 20 and the third substrate 30 and bonding between the second substrate 20 and the third substrate 30. In addition, the number of pad electrodes 64 is not necessarily plural, and even one pad electrode can realize electrical connection with the logic circuit 32. The second substrate 20 and the third substrate 30 are electrically connected to each other through the bonding between the pad electrodes 58 and 64. That is, the gate (transfer gate TG) of the transfer transistor TR is electrically connected to the logic circuit 32 via the through wiring 54 and the pad electrodes 58 and 64. The third substrate 30 is bonded to the second substrate 20 in such a manner that the front surface of the semiconductor substrate 31 faces the front surface side of the semiconductor substrate 21. That is, the third substrate 30 is bonded to the second substrate 20 in a face-to-face manner.

[0193] Fig. 22 and Fig.23 The first substrate 10 and the second substrate 20 in the embodiment correspond to the semiconductor substrate 130 and the semiconductor substrate 230 of the first embodiment, respectively. A semiconductor substrate corresponding to the third substrate 30 described above may also be stacked on the semiconductor substrate 230. In addition, four or more semiconductor substrates may be stacked. Such a configuration in which three or more layers of semiconductor substrates are stacked may be applied to each embodiment of the present disclosure.

[0194] It should be noted that the arrangement of the circuit elements constituting the pixel block 100 is not limited to Figure 5 For example, all elements of the signal generating unit 120 may be included in the semiconductor substrate 130. A pixel circuit, a signal processing circuit, a memory circuit, a logic circuit, etc. formed of an analog circuit or a digital circuit can be ideally provided in the semiconductor substrate 230 or in a semiconductor substrate that is ideally further increased.

[0195] (10. Application examples)

[0196] Fig.24is a diagram showing an example of a schematic configuration of an imaging system 7 including an imaging device 1 according to one embodiment thereof and a modified example thereof.

[0197] The imaging system 7 is an electronic device such as an imaging device (such as a digital still camera or a camera) or a portable terminal device such as a smartphone or a tablet terminal. The imaging system 7 includes, for example, the imaging device 1 according to one of the above-mentioned embodiments and modifications thereof, a DSP circuit 743, a frame memory 744, a display section 745, a storage section 746, an operation section 747, and a power supply section 748. In the imaging system 7, according to the imaging device of one of the embodiments and modifications thereof, the DSP circuit 743, the frame memory 744, the display section 745, the storage section 746, the operation section 747, and the power supply section 748 are connected to each other via a bus 749.

[0198] The imaging device 1 according to one of the embodiments and its modified examples outputs image data corresponding to incident light. The DSP circuit 743 is a signal processing circuit that processes a signal (image data) output from the imaging device 1 according to one of the embodiments and its modified examples. The frame memory 744 temporarily holds the image data processed by the DSP circuit 743 for each frame. The display section 745 includes a panel-type display device such as a liquid crystal panel or an organic electroluminescent (EL) panel, and displays a moving image or a still image captured by the imaging device 1 according to one of the embodiments and its modified examples. The storage section 746 records the image data of the moving image or the still image captured by the imaging device 1 according to the embodiment and its modified examples in a recording medium such as a semiconductor memory or a hard disk. The operation section 747 issues operation commands for various functions of the imaging system 7 based on the operation of the user. The power supply section 748 appropriately supplies various power supplies, which are the operating power supplies of the imaging device 1 according to one embodiment and its modified examples, the DSP circuit 743, the frame memory 744, the display section 745, the storage section 746, and the operation section 747 to these supply targets.

[0199] Next, the imaging process in the imaging system 7 will be described.

[0200] Fig.25 7 is a diagram showing an example of a flowchart of an imaging operation in the imaging system 7. The user instructs to start imaging by operating the operating section 747 (step S101). Then, the operating section 747 sends an imaging command to the imaging device 1 (step S102). Upon receiving the imaging command, the imaging device 1 (specifically, the system control circuit 36) performs imaging according to a predetermined imaging scheme (step S103).

[0201] The imaging device 1 outputs the image data obtained by imaging to the DSP circuit 743. Incidentally, the image data refers to data of pixel signals generated based on the charge temporarily held in the floating diffusion FD based on all pixels. The DSP circuit 743 performs predetermined signal processing (for example, noise reduction processing) based on the image data input from the imaging device 1 (step S104). The DSP circuit 743 causes the frame memory 744 to hold the image data that has been subjected to the predetermined signal processing, and the frame memory 744 causes the storage section 746 to record the image data (step S105). In this way, imaging in the imaging system 7 is performed.

[0202] In this application example, the imaging device 1 according to one of the above-described embodiments and their modified examples is applied to an imaging system 7. Therefore, the imaging device 1 can be downsized or have high definition, and thus, a downsized or high definition imaging system 7 can be provided.

[0203] (11. Application example of mobile object)

[0204] The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented as a device to be installed on any type of mobile body, such as a car, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot.

[0205] Fig.26 : is a block diagram showing an example of a schematic configuration of a vehicle control system as an example of a moving body control system to which the technology according to the embodiment of the present disclosure can be applied.

[0206] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Fig.26 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, as a functional structure of the integrated control unit 12050, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are exemplified.

[0207] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 is used as a control device for generating a driving force generating device (such as an internal combustion engine, a drive motor, etc.) for the vehicle, a driving force transmitting mechanism for transmitting the driving force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating a braking force of the vehicle, etc.

[0208] The body system control unit 12020 controls the operation of various devices provided on the vehicle body according to various programs. For example, the body system control unit 12020 is used as a control device for a keyless entry system, a smart key system, a power window device, or various lights such as a headlight, a backup light, a brake light, a turn signal, a fog light, etc. In this case, a radio wave or a signal of various switches transmitted from a mobile device as a substitute for a key may be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls the door lock device, the power window device, the lights, etc. of the vehicle.

[0209] The vehicle exterior information detection unit 12030 detects information outside the vehicle including the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to an imaging unit 12031. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receive the captured image. In addition, the vehicle exterior information detection unit 12030 may also detect objects such as people, vehicles, obstacles, signs, and text on the road surface, or detect their distances, based on the received image.

[0210] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 may output the electrical signal as an image, or may output the electrical signal as information about the measured distance. In addition, the light received by the imaging unit 12031 may be visible light, or may be invisible light such as infrared rays.

[0211] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver state detection unit 12041 that detects the state of the driver. The driver state detection unit 12041 includes, for example, a camera that photographs the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue or the driver's concentration, or can determine whether the driver is dozing off.

[0212] The microcomputer 12051 can calculate the control target value of the driving force generation device, the steering mechanism, or the braking device based on the information about the inside or outside of the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an advanced driver assistance system (ADAS), including collision prevention or shock absorption for the vehicle, follow-up driving based on a following distance, maintaining the vehicle speed for driving, warning of vehicle collision, warning of vehicle deviation from a lane, etc.

[0213] In addition, the microcomputer 12051 can perform collaborative control for automatic driving by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about outside or inside the vehicle obtained by the outside information detection unit 12030 or the inside information detection unit 12040, thereby enabling the vehicle to travel automatically without relying on the driver's operation, etc.

[0214] In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information about the outside of the vehicle obtained by the vehicle outside information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control aimed at preventing glare by controlling the headlights to change from high beam to low beam according to the position of the front vehicle or the oncoming vehicle detected by the vehicle outside information detection unit 12030.

[0215] The sound / image output unit 12052 sends an output signal of at least one of sound and image to an output device that can visually or auditorily notify the occupants of the vehicle or the outside of the vehicle of information. Fig.26 In the example of FIG. 1 , an audio speaker 12061, a display portion 12062, and a dashboard 12063 are shown as output devices. For example, the display portion 12062 may include at least one of an on-board display and a head-up display.

[0216] Fig. 27 is a schematic diagram depicting an example of the installation position of the imaging unit 12031.

[0217] exist Fig. 27 In the figure, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104 and 12105.

[0218] The imaging units 12101, 12102, 12103, 12104 and 12105 are, for example, disposed at positions on the front nose, side mirrors, rear bumper and rear door of the vehicle 12100 and at positions on the upper portion of the windshield inside the vehicle. The imaging unit 12101 disposed at the front nose inside the vehicle and the imaging unit 12105 disposed at the upper portion of the windshield mainly obtain images in front of the vehicle 12100. The imaging units 12102 and 12103 disposed to the side mirrors mainly obtain images on the sides of the vehicle 12100. The imaging unit 12104 disposed to the rear bumper or rear door mainly obtains images of the rear of the vehicle 12100. The imaging unit 12105 disposed at the upper portion of the windshield inside the vehicle is mainly used to detect vehicles ahead, pedestrians, obstacles, signals, traffic signs, lanes, etc.

[0219] By the way, Fig. 27An example of the shooting range of the imaging units 12101 to 12104 is described. The imaging range 12111 represents the imaging range of the imaging unit 12101 set to the front nose. The imaging ranges 12112 and 12113 respectively represent the imaging ranges of the imaging units 12102 and 12103 set to the side mirrors. The imaging range 12114 represents the imaging range of the imaging unit 12104 set to the rear bumper or the rear door. For example, a bird's-eye view image of the vehicle 12100 viewed from above is obtained by superimposing the image data imaged by the imaging units 12101 to 12104.

[0220] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0221] For example, the microcomputer 12051 can determine the distance to each three-dimensional object within the imaging range 12111 to 12114 and the time change of the distance (relative speed relative to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, thereby extracting objects that exist on the driving path of the vehicle 12100 and are traveling in the same direction as the vehicle 12100 at a prescribed speed (e.g., equal to or greater than 0 km / hour). In addition, the microcomputer 12051 can pre-set the following distance to keep ahead of the leading vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. As a result, coordinated control for automatic driving that allows the vehicle to travel automatically without relying on the driver's operation, etc., can be performed.

[0222] For example, the microcomputer 12051 can classify the three-dimensional object data related to the three-dimensional object into three-dimensional object data of a two-wheeled vehicle, a standard vehicle, a large vehicle, a pedestrian, a utility pole, and other three-dimensional objects based on the distance information obtained from the imaging units 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that can be visually recognized by the driver of the vehicle 12100 and obstacles that are difficult for the driver of the vehicle 12100 to visually recognize. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle. In the case where the collision risk is equal to or higher than the set value and therefore there is a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display unit 12062, and performs forced deceleration or evasive steering via the drive system control unit 12010. The microcomputer 12051 can thereby assist driving to avoid collisions.

[0223] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 may, for example, identify a pedestrian by determining whether a pedestrian exists in the captured images of the imaging units 12101 to 12104. This identification of a pedestrian is performed, for example, by a process of extracting feature points in the imaged images of the imaging units 12101 to 12104 as infrared cameras and a process of determining whether it is a pedestrian by performing pattern matching processing on a series of feature points representing the outline of an object. When the microcomputer 12051 determines that a pedestrian exists in the imaged images of the imaging units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 so that a square outline for emphasis is displayed as superimposed on the identified pedestrian. The sound / image output unit 12052 may also control the display unit 12062 so that an icon representing a pedestrian or the like is displayed at a desired position.

[0224] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 12031 in the above configuration. Specifically, Figure 1 The imaging element 1 in can be applied to the imaging section 12031. By applying the technology according to the present disclosure to the imaging section 12031, degradation of the image quality of the imaging section 12031 can be prevented.

[0225] (12. Application examples of endoscopic surgery systems)

[0226] The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can be applied to an endoscopic surgery system.

[0227] Fig.28 : is a diagram describing an example of a schematic configuration of an endoscopic surgery system to which the technology according to an embodiment of the present disclosure (the present technology) can be applied.

[0228] exist Fig.28 , a surgeon (doctor) 11131 is shown performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 includes an endoscope 11100, a pneumoperitoneum tube 11111, other surgical tools 11110 such as an energy treatment device 11112, a support arm device 11120 supporting the endoscope 11100, and a trolley 11200 carrying various endoscopic surgery equipment.

[0229] The endoscope 11100 includes a lens barrel 11101 and a camera 11102 connected to the proximal end of the lens barrel 11101, the lens barrel 11101 having a region of a predetermined length from its distal end to be inserted into a body cavity of a patient 11132. In the depicted example, the endoscope 11100 is depicted as including a hard scope having a hard type lens barrel 11101. However, the endoscope 11100 may additionally be included as a soft scope having a soft type lens barrel 11101.

[0230] The lens barrel 11101 has an opening at its distal end, and the objective lens is mounted in the opening. The light source device 11203 is connected to the endoscope 11100, so that the light generated by the light source device 11203 is introduced into the front end of the lens barrel 11101 by the light guide extending inside the lens barrel 11101, and irradiated toward the observation object in the body cavity of the patient 11132 via the objective lens. In addition, the endoscope 11100 can be either a direct-view mirror, a stereoscopic mirror, or a side-view mirror.

[0231] The optical system and the image pickup element are arranged inside the camera 11102, so that the reflected light (observation light) from the observation target is focused on the image pickup element through the optical system. The observation light is photoelectrically converted by the imaging element to generate an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observation image. The image signal is transmitted to the CCU 11201 as RAW data.

[0232] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), etc., and integrally controls the operations of the endoscope 11100 and the display device 11202. In addition, the CCU 11201 receives an image signal from the camera 11102 and performs various image processing for displaying an image based on the image signal, such as, for example, development processing (demosaic processing), on the image signal.

[0233] The display device 11202 displays an image thereon based on an image signal on which image processing has been performed under the control of the CCU 11201 .

[0234] The light source device 11203 is composed of a light source such as a light emitting diode (LED), and supplies irradiation light for imaging the surgical area to the endoscope 11100 .

[0235] The input device 11204 is an input interface of the endoscopic surgery system 11000. The user can input various information or instructions to the endoscopic surgery system 11000 through the input device 11204. For example, the user inputs instructions to change the imaging conditions of the endoscope 11100 (type of irradiation light, magnification, focal length, etc.).

[0236] The treatment tool control device 11205 controls the drive of the energy treatment tool 11112 to perform cauterization, incision, blood vessel sealing, etc. of the tissue. In order to ensure the field of view of the endoscope 11100 and the operating space of the surgeon, the pneumoperitoneum device 11206 supplies gas to the body cavity of the patient 11132 through the pneumoperitoneum tube 11111 to expand the body cavity. The recorder 11207 is a device capable of recording various information related to the operation. The printer 11208 is a device capable of printing various information related to the operation in various forms (such as text, images, or graphics).

[0237] In addition, the light source device 11203 that supplies irradiation light when the surgical area is photographed to the endoscope 11100 may also include a white light source, which is composed of, for example, an LED, a laser light source, or a combination thereof. In the case where the white light source includes a combination of red, green, and blue (RGB) laser light sources, since the output intensity and output timing can be controlled with high precision for each color (each wavelength), the white balance of the captured image can be adjusted by the light source device 11203. In addition, in this case, if the laser beams from the respective RGB laser light sources are irradiated on the observation target in a time-sharing manner and the drive of the image pickup element of the camera 11102 is controlled synchronously with the irradiation timing. Then, images corresponding to the R, G, and B colors, respectively, can also be captured in a time-sharing manner. According to this method, a color image can be obtained even if a color filter is not provided for the imaging element.

[0238] In addition, the light source device 11203 can be controlled so that the intensity of the light to be output is changed every predetermined time. By controlling the drive of the image pickup element of the camera 11102 in synchronization with the timing of the light intensity change to acquire images in time division and synthesize the images, a high dynamic range image without underexposed shadows and overexposed highlights can be generated.

[0239] In addition, the light source device 11203 can be configured to provide light of a predetermined wavelength band prepared for special light observation. In special light observation, by utilizing the wavelength dependence of light absorption of biological tissue to irradiate light of a narrower band than the irradiation light (i.e., white light) during normal observation, narrow-band light observation (narrow-band light observation) is performed to image a predetermined tissue such as blood vessels in the surface layer of the mucosa with high contrast. Alternatively, in special light observation, fluorescence observation in which an image is obtained from fluorescence generated by irradiation of excitation light can also be performed. In fluorescence observation, it is possible to observe fluorescence from biological tissue by irradiating excitation light to biological tissue (autofluorescence observation), or to obtain a fluorescence image by locally injecting a reagent such as indocyanine green (ICG) into the biological tissue and irradiating the biological tissue with excitation light corresponding to the fluorescence wavelength of the reagent. The light source device 11203 can be configured to provide narrow-band light and / or excitation light suitable for special light observation as described above.

[0240] Fig.29 It is a depiction Fig.28 A block diagram of an example of a functional configuration of the camera 11102 and the CCU 11201 is depicted.

[0241] The camera 11102 includes a lens unit 11401, an image pickup unit 11402, a driving unit 11403, a communication unit 11404, and a camera control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera 11102 and the CCU 11201 are connected via a transmission cable 11400 for communication with each other.

[0242] The lens unit 11401 is an optical system, and is provided at a connection position with the lens barrel 11101. Observation light acquired from the distal end of the lens barrel 11101 is guided to the camera 11102 and introduced into the lens unit 11401. The lens unit 11401 includes a combination of a plurality of lenses including a zoom lens and a focus lens.

[0243] The number of image pickup elements included in the image pickup unit 11402 may be one (single-board type) or multiple (multi-board type). In the case where the image pickup unit 11402 is configured as a multi-board type image pickup unit, for example, image signals corresponding to each R, G, and B are generated by the image pickup element, and the image signals can be synthesized to obtain a color image. The image pickup unit 11402 may also be configured to have a pair of image pickup elements for acquiring corresponding image signals of the right eye and the left eye prepared for three-dimensional (3D) display. In the case of performing 3D display, the surgical operator 11131 can more accurately grasp the depth of the biological tissue in the surgical area. It should be noted that in the case where the image pickup unit 11402 is configured as a stereoscopic type image pickup unit, a plurality of systems of lens units 11401 are set corresponding to a single image pickup element.

[0244] In addition, the image pickup unit 11402 is not necessarily provided on the camera head 11102. For example, the image pickup unit 11402 may be provided inside the lens barrel 11101 just behind the objective lens.

[0245] The driving unit 11403 includes an actuator, and moves the zoom lens and the focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera control unit 11405. As a result, the magnification and focus of the image picked up by the image pickup unit 11402 can be appropriately adjusted.

[0246] The communication unit 11404 includes a communication device for sending and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal acquired from the image pickup unit 11402 to the CCU 11201 through the transmission cable 11400 as RAW data.

[0247] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera 11102 from the CCU 11201, and supplies the control signal to the camera control unit 11405. The control signal includes information related to image pickup conditions, such as information specifying a frame rate of a picked-up image, information specifying an exposure value at the time of image pickup, and / or information specifying a magnification and a focus of a picked-up image.

[0248] It should be noted that image pickup conditions such as frame rate, exposure value, magnification, or focus may be specified by a user or may be automatically set based on an acquired image signal by the control unit 11413 of the CCU 11201. In the latter case, an automatic exposure (AE) function, an automatic focus (AF) function, and an automatic white balance (AWB) function are incorporated in the endoscope 11100.

[0249] The camera control unit 11405 controls the driving of the camera 11102 based on the control signal from the CCU 11201 received through the communication unit 11404 .

[0250] The communication unit 11411 includes a communication device for transmitting and receiving various information to and from the camera 11102. The communication unit 11411 receives an image signal transmitted thereto from the camera 11102 through the transmission cable 11400.

[0251] In addition, the communication unit 11411 sends a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal can be transmitted through electrical communication, optical communication, etc.

[0252] The image processing unit 11412 performs various image processing on the image signal in the form of RAW data sent thereto from the camera 11102 .

[0253] The control unit 11413 performs various controls related to the imaging of the operation area, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the operation area, etc. For example, the control unit 11413 creates a control signal for controlling the driving of the camera head 11102 .

[0254] In addition, the control unit 11413 controls the display device 11202 to display a picked-up image of the surgical area, etc., based on the image signal processed by the image processing unit 11412. Thus, the control unit 11413 can use various image recognition technologies to recognize various objects in the picked-up image. For example, the control unit 11413 can recognize surgical instruments such as forceps, specific living body areas, bleeding, and mist when the energy treatment instrument 11112 is used by detecting the shape, color, etc. of the edge of the subject contained in the imaging image. When the control unit 11413 controls the display device 11202 to display the captured image, the control unit 11413 can use the recognition result to display various surgical support information in a manner overlapping with the image of the surgical area. When the surgical support information is displayed in an overlapping manner and prompted to the surgical operator 11131, the burden of the surgical operator 11131 can be reduced, and the surgical operator 11131 can reliably perform the operation.

[0255] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 to each other is an electric signal cable prepared for communication of electric signals, an optical fiber prepared for optical communication, or a composite cable prepared for both electric communication and optical communication.

[0256] Here, although in the depicted example, communication is performed by wired communication using the transmission cable 11400, communication between the camera 11102 and the CCU 11201 may be performed by wireless communication.

[0257] An example of an endoscopic surgery system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the image pickup unit 11402 of the endoscope 11100 or the camera 11102 in the above-mentioned components. Specifically, Figure 1 The imaging element 1 in can be applied to the image pickup unit 11402. By applying the technology according to the present disclosure to the image pickup unit 11402, it is possible to prevent the image quality of the image pickup unit 11402 from being deteriorated.

[0258] It should be noted that in this example, an endoscopic surgical system has been described as an example, however, the technology according to the present disclosure may be applied to other systems, such as a microsurgery system.

[0259] It should be noted that the configuration of the second embodiment of the present disclosure can be applied to other embodiments. Specifically, Figure 5 The shielding portion 161 in FIG. 1 may be applied to the fourth to sixth and eighth embodiments of the present disclosure.

[0260] It should be noted that the effects described herein are merely examples and are not limiting, and other effects may also be achieved.

[0261] It should be noted that the present technology can also have the following configurations. (1)

[0263] An imaging element, comprising:

[0264] A plurality of pixel blocks, comprising: a semiconductor substrate in which a plurality of pixels and an isolation portion is arranged to isolate the pixels, each of the plurality of pixels comprising: a photoelectric conversion portion that performs photoelectric conversion of incident light; and a charge holding portion that holds charges generated by the photoelectric conversion; a shared electrode that is arranged adjacent to the semiconductor substrate and has a shape that straddles the isolation portion, the shared electrode being connected to the charge holding portion of each of the plurality of pixels; a wiring region that is provided adjacent to the front surface side of the semiconductor substrate; and a signal generating portion that generates a pixel signal that is a signal corresponding to a voltage of the shared electrode; and

[0265] The shielding part is arranged between the common electrodes of the plurality of pixel blocks, and a voltage different from that of the common electrode is applied to the shielding part. (2)

[0267] An imaging element according to (1) above, wherein the shielding portion includes an electrode provided adjacent to the semiconductor substrate. (3)

[0269] An imaging element according to the above (2), wherein the shield portion has a height different from a height of the common electrode. (4)

[0271] The imaging element according to the above (2), further comprising a columnar wiring arranged in the wiring region, the columnar wiring being connected to the shielding portion. (5)

[0273] The imaging device according to any one of (1) to (4) above, further comprising:

[0274] a second common electrode providing a reference potential, the second common electrode being connected to a well region of the semiconductor substrate,

[0275] Wherein, the shielding part is connected to the second common electrode. (6)

[0277] An imaging element according to any one of (1) to (4) above, wherein the shielding portion is connected to a wiring formed in the wiring region. (7)

[0279] The imaging device according to any one of (1) to (4) above, further comprising:

[0280] a charge transfer section that transfers the charge of the photoelectric conversion section to the charge holding section, the charge transfer section including a MOS transistor formed in a semiconductor substrate,

[0281] The shielding part includes a gate electrode of the charge transfer part. (8)

[0283] The imaging device according to any one of (1) to (7) above, further comprising:

[0284] a second semiconductor substrate stacked on the wiring region of the semiconductor substrate; and

[0285] The second wiring region is provided on a surface side of the second semiconductor substrate that is different from a surface adjacent to the wiring region.

[0286] Wherein, the signal generating unit is arranged on the second semiconductor substrate. (9)

[0288] The imaging element according to (8), further comprising:

[0289] a through wiring connected between the common electrode and the wiring formed in the second wiring region; and

[0290] The through wiring is connected between the shield portion and the wiring formed in the second wiring region. (10)

[0292] An imaging element according to any one of (1) to (9) above, wherein the shielding portion includes the same member as that of the shared electrode. (11)

[0294] An electronic device, comprising:

[0295] A plurality of pixel blocks, comprising: a semiconductor substrate in which a plurality of pixels and an isolation portion is arranged to isolate the pixels, each of the plurality of pixels comprising: a photoelectric conversion portion that performs photoelectric conversion of incident light; and a charge holding portion that holds charges generated by the photoelectric conversion; a shared electrode that is arranged adjacent to the semiconductor substrate and has a shape that straddles the isolation portion, the shared electrode being connected to the charge holding portion of each of the plurality of pixels; a wiring region that is provided adjacent to the front surface side of the semiconductor substrate; and a signal generating portion that generates a pixel signal that is a signal corresponding to a voltage of the shared electrode;

[0296] a shielding portion disposed between the common electrodes of the plurality of pixel blocks, the shielding portion being applied with a voltage different from that of the common electrodes; and

[0297] A processing circuit processes pixel signals.

[0298] Reference Numbers List

[0299] 1 Imaging element

[0300] 90 Pixel array section

[0301] 94 columns signal processing unit

[0302] 100 pixel blocks

[0303] 101a, 101b, 101c, 101d photoelectric conversion unit

[0304] 103, 103a, 103b, 103c, 103d, 103e, 103f, 103g, 103h charge holding unit

[0305] 110a, 110b, 110c, 110d, 110e, 110f, 110g, 110h pixels

[0306] 120 Signal Generation Department

[0307] 130, 230 semiconductor substrate

[0308] 137, 139 Isolation Department

[0309] 142, 148 Shared Electrode

[0310] 143, 145, 242 gate electrode

[0311] 149: Second shared electrode

[0312] 150, 250 wiring area

[0313] 152, 154, 252, 254 wiring

[0314] 155 Columnar Wiring

[0315] 160, 161, 163 shielding part

[0316] 162, 260 through wiring

[0317] 11402, 12031, 12101 to 12105 Image pickup unit / imaging unit

Claims

1. An imaging element, comprising: A plurality of pixel blocks, comprising: a semiconductor substrate in which a plurality of pixels and an isolation portion is arranged to isolate the pixels, each of the plurality of pixels comprising: a photoelectric conversion portion that performs photoelectric conversion of incident light; and a charge holding portion that holds charges generated by the photoelectric conversion; a shared electrode that is disposed adjacent to the semiconductor substrate and has a shape that straddles the isolation portion, the shared electrode being connected to the charge holding portion of each of the plurality of pixels; a wiring region that is disposed adjacent to the front surface side of the semiconductor substrate; and a signal generating portion that generates a pixel signal that is a signal corresponding to a voltage of the shared electrode; and The shielding part is provided between the common electrodes of the plurality of pixel blocks, and a voltage different from a voltage of the common electrode is applied to the shielding part.

2. The imaging element according to claim 1, wherein The shielding portion includes an electrode disposed adjacent to the semiconductor substrate.

3. The imaging element according to claim 2, wherein: The shielding portion has a height different from that of the common electrode.

4. The imaging element according to claim 2, further comprising: A columnar wiring is provided in the wiring region, and the columnar wiring is connected to the shielding portion.

5. The imaging element according to claim 1, further comprising: a second common electrode, providing a reference potential, wherein the second common electrode is connected to a well region of the semiconductor substrate, Wherein, the shielding portion is connected to the second common electrode.

6. The imaging element according to claim 1, wherein The shield portion is connected to wiring formed in the wiring region.

7. The imaging element according to claim 1, further comprising: a charge transfer section that transfers the charge of the photoelectric conversion section to the charge holding section, the charge transfer section including a MOS transistor formed in the semiconductor substrate, Wherein, the shielding part includes a gate electrode of the charge transfer part.

8. The imaging element according to claim 1, further comprising: a second semiconductor substrate stacked on the wiring region of the semiconductor substrate; as well as a second wiring region provided on a front surface side which is a surface of the second semiconductor substrate different from a surface adjacent to the wiring region, Wherein, the signal generating unit is arranged on the second semiconductor substrate.

9. The imaging element according to claim 8, further comprising: a through wiring connected between the common electrode and the wiring formed in the second wiring region; as well as The through wiring is connected between the shield portion and the wiring formed in the second wiring region.

10. The imaging element according to claim 1, wherein The shielding portion includes the same member as that of the common electrode.

11. An electronic device comprising: A plurality of pixel blocks, comprising: a semiconductor substrate in which a plurality of pixels and an isolation portion is arranged to isolate the pixels, each of the plurality of pixels comprising: a photoelectric conversion portion that performs photoelectric conversion of incident light; and a charge holding portion that holds charges generated by the photoelectric conversion; a shared electrode that is disposed adjacent to the semiconductor substrate and has a shape that straddles the isolation portion, the shared electrode being connected to the charge holding portion of each of the plurality of pixels; a wiring region that is disposed adjacent to the front surface side of the semiconductor substrate; and a signal generating portion that generates a pixel signal that is a signal corresponding to a voltage of the shared electrode; a shielding portion provided between the common electrodes of the plurality of pixel blocks, the shielding portion being applied with a voltage different from a voltage of the common electrode; and The processing circuit processes the pixel signal.

Images