A server backplane, a communication system and a control method of a communication system

Abstract

The application relates to the field of communication technology and discloses a server backboard, a communication system and a control method of the communication system, which are applied to a bus communication system. The server backboard comprises a first interface unit, a switch unit and an editable logic device. The first interface unit is used for information transmission between the editable logic device and external equipment. The editable logic device is used for outputting a control signal based on the power-on state of a first power supply and the external equipment. The switch unit is used for switching a switch state based on the control signal, so that when the external equipment is not powered on or the first power supply is not powered on, the first power supply and the external equipment are disconnected. The application can isolate the power supply of the backboard from the power supply of the external equipment, avoid damaging the server backboard due to the leakage through the bus when the backboard and the external equipment are not powered on synchronously, and improve the safety of the server backboard.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication technology, in particular to a server backboard, a communication system and a control method of the communication system. BACKGROUND

[0002] The SGPIO protocol is a protocol for serial communication, mainly used for input and output control between a system mainboard and an external device backboard. The SGPIO protocol uses a serial communication mode for data transmission, which completes communication by using clock, data and control signals. The CLK signal is used for synchronizing data transmission, the DATA signal is used for transmitting actual data, and the CTRL signal is used for transmitting control information, such as transmission start and end marks.

[0003] In a communication system, a controller and a hard disk are respectively arranged on a mainboard and a backboard, and the mainboard and the backboard communicate through a cable by using the SGPIO protocol. Since the mainboard and the backboard are respectively provided with a pull-up power supply, when the two pull-up power supplies POWER_1 and POWER_2 are not synchronized, the pull-up power supply that is turned on first will leak current to the other pull-up power supply side through the SGPIO bus between the mainboard and the backboard, damaging the device connected to the latter power-on side. SUMMARY

[0004] Therefore, the present application provides a server backboard, a communication system and a control method of the communication system, to solve the problem that the power supplies of the backboard and the external device will leak current to each other when they are not synchronized.

[0005] In a first aspect, the present application provides a server backboard applied to a bus communication system, comprising: a first interface unit, a switch unit and an editable logic device, wherein a first end of the first interface unit is connected with a communication end of the editable logic device and a first end of the switch unit, a second end of the first interface unit is connected with an external device through a bus, a third end of the first interface unit is grounded, and the first interface unit is used for transmitting information between the editable logic device and the external device; a power supply end of the editable logic device is connected with a second end of the switch unit and a first power supply, an output end of the editable logic device is connected with a control end of the switch unit, and the editable logic device is used for outputting a control signal based on the power-on state of the first power supply and the external device; and the switch unit is used for switching a switch state based on the control signal, so that when the external device is not powered on or the first power supply is not powered on, the first power supply and the external device are disconnected.

[0006] The server backboard provided by the application sets a switch unit between the bus and the first power supply, and when the editable logic device determines that one of the first power supply and the external device is not powered on, the switch unit is controlled to be disconnected to cut off the path between the first power supply and the power supply of the external device, thereby avoiding the situation that when the first power supply and the external device are not powered on synchronously, the power supply of the device powered on first leaks to the power supply of the device powered on later through the bus, and the reliability of the backboard server is improved.

[0007] In an alternative embodiment, the server backboard further comprises a first pull-up circuit, wherein the first end of the first pull-up circuit is connected with the first end of the switch unit, and the second end of the first pull-up circuit is connected with the communication end of the editable logic device, and the first pull-up circuit is used to improve the driving capability of the editable logic device.

[0008] The server backboard provided by the application adds a first pull-up circuit to the communication end of the editable logic device to improve the signal quality, which is used to limit the current and avoid the damage of the editable logic device caused by the large current of the first power supply, and is also used to clamp the level of the communication end under the action of the first power supply to provide current when the driving capability of the bus is insufficient, thereby improving the driving capability of the editable logic device.

[0009] In an alternative embodiment, the communication end of the editable logic device comprises a clock interface, a reset interface, an output interface and an input interface, the clock interface is used to receive a clock signal, the reset interface is used to receive a clock reset signal, the output interface is used to output configuration data, and the input interface is used to receive configuration data; the first pull-up circuit comprises a first pull-up resistor, a second pull-up resistor, a third pull-up resistor and a fourth pull-up resistor, wherein the first end of the first pull-up resistor is connected with the first end of the switch unit, and the second end of the first pull-up resistor is connected with the clock interface of the editable logic device; the first end of the second pull-up resistor is connected with the first end of the switch unit, and the second end of the second pull-up resistor is connected with the reset interface of the editable logic device; the first end of the third pull-up resistor is connected with the first end of the switch unit, and the second end of the third pull-up resistor is connected with the output interface of the editable logic device; and the first end of the fourth pull-up resistor is connected with the first end of the switch unit, and the second end of the fourth pull-up resistor is connected with the input interface of the editable logic device.

[0010] In an alternative embodiment, the switch unit comprises a MOS switch, wherein the control end of the MOS switch is connected with the output end of the editable logic device, the first end of the MOS switch is connected with the first end of the first interface unit, and the second end of the MOS switch is connected with the power supply end of the editable logic device; the MOS switch is used to switch the switch state based on the control signal, so that the first power supply and the external device are disconnected when the external device is not powered on or the first power supply is not powered on.

[0011] In an alternative embodiment, the server backplane further comprises a grounding resistor connected to the control end of the switch unit.

[0012] The server backplane provided by the application can keep the MOS switch in an open state when the first power supply is not powered on, i.e., when the editable logic device is not working, so as to avoid the control end of the MOS switch floating and thus being turned on, which causes the power supply of the external device to leak to the first power supply.

[0013] In a second aspect, the application provides a communication system, comprising: a server mainboard and the server backplane of the first aspect, wherein the power supply end of the server mainboard is connected to a second power supply, the communication end of the server mainboard is connected to the second end of the first interface unit through a bus, and the server mainboard is used to control the editable logic device to work after being powered on; when the second power supply is not powered on or the first power supply is not powered on, the switch unit switches the switch state based on the control signal, so as to disconnect the first power supply from the external device.

[0014] The communication system provided by the application has the following advantages: the server mainboard is connected to the server backplane through a bus, the server mainboard and the server backplane are respectively powered by the second power supply and the first power supply, a switch unit is arranged between the second power supply and the first power supply, when the editable logic device determines that one of the first power supply and the second power supply is not powered on, the switch unit is controlled to be disconnected, so as to cut off the path between the first power supply and the second power supply, thus avoiding the situation that when the first power supply and the second power supply are powered asynchronously, the power supply of the device powered first leaks to the power supply of the device powered later through the bus, avoiding the device powered later from being abnormal due to the leakage, and improving the reliability of the backplane server.

[0015] In an alternative embodiment, the server mainboard comprises: a controller, a second interface unit and a second pull-up circuit, wherein the power supply end of the controller is connected to the second power supply, the communication end of the controller is connected to the first end of the second interface unit and the first end of the second pull-up circuit, the controller is used to control the editable logic device to work after being powered on; the second end of the second pull-up circuit is connected to the second power supply, and the second pull-up circuit is used to improve the driving capability of the controller; the second end of the second interface unit is connected to the second end of the first interface unit through a bus, and the third end of the second interface unit is grounded, and the second interface unit is used to transmit information between the controller and the editable logic device.

[0016] In an alternative embodiment, the communication end of the controller comprises a clock interface, a reset interface, an output interface and an input interface; the second pull-up circuit comprises a fifth pull-up resistor, a sixth pull-up resistor, a seventh pull-up resistor and an eighth pull-up resistor, wherein the first end of the fifth pull-up resistor is connected with the second power supply, and the second end of the fifth pull-up resistor is connected with the clock interface of the controller; the first end of the sixth pull-up resistor is connected with the second power supply, and the second end of the sixth pull-up resistor is connected with the reset interface of the controller; the first end of the seventh pull-up resistor is connected with the second power supply, and the second end of the seventh pull-up resistor is connected with the output interface of the controller; the first end of the eighth pull-up resistor is connected with the second power supply, and the second end of the eighth pull-up resistor is connected with the input interface of the controller.

[0017] In a third aspect, the application provides a control method of a communication system, which is applied to the editable logic device of the first aspect, and the method comprises the following steps: detecting whether the voltage of the first power supply exists; when the voltage of the first power supply is not detected, controlling the switch unit to be off, so that the first power supply is disconnected from the second power supply; when the voltage of the first power supply is detected and no voltage signal exists in the communication end, controlling the switch unit to be off; and when it is detected that the voltage signal exists in the communication end, indicating that the voltage of the second power supply is detected, controlling the switch unit to be on.

[0018] The control method of the communication system provided by the application can make the switch unit off after the first power supply is powered on, so as to avoid the leakage of the first power supply to the second power supply through the bus; and the switch unit is only turned on after the second power supply is also powered on, so as to avoid the situation that the power supply of the device powered on first leaks to the power supply of the device powered on later through the bus when the first power supply and the second power supply are not powered on synchronously, and to avoid the functional abnormality of the device powered on later due to the leakage, thereby improving the reliability of the backplane server.

[0019] In an alternative embodiment, the process of controlling the switch unit to be off when the voltage of the first power supply is detected and no voltage signal exists in the communication end comprises the following steps: controlling the switch unit to be off so that the bus is discharged, and setting the communication end to be in a floating state, and then detecting whether the voltage signal exists in the communication end in real time. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the description of the embodiments or the prior art. Obviously, the drawings described below are some embodiments of the application, and other drawings can also be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0021] Figure 1is a schematic diagram of an SGPIO communication line in the related art;

[0022] Figure 2 is a schematic diagram of a voltage waveform when power timing is synchronized in the related art;

[0023] Figure 3 is a schematic diagram of a voltage waveform when power timing is not synchronized in the related art;

[0024] Figure 4 is a component diagram of a server backplane according to an embodiment of the present application;

[0025] Figure 5 is another component diagram of a server backplane according to an embodiment of the present application;

[0026] Figure 6 is a specific circuit structure diagram of a server backplane according to an embodiment of the present application;

[0027] Figure 7 is a component diagram of a communication system according to an embodiment of the present application;

[0028] Figure 8 is a specific circuit structure diagram of a communication system according to an embodiment of the present application;

[0029] Figure 9 is a flowchart of a control method of a communication system according to an embodiment of the present application. DETAILED DESCRIPTION

[0030] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0031] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application. In addition, the terms "first", "second", "third" are only for the purpose of description and cannot be understood as indicating or implying relative importance.

[0032] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connecting" should be understood in a broad sense, for example, can be fixed connection, can also be detachable connection, or integral connection; can be mechanical connection, can also be electrical connection; can be direct connection, can also be indirect connection through an intermediate medium, can also be the internal communication of two elements, can be wireless connection, or wired connection. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0033] In addition, the technical features involved in the different embodiments of the application described below can be combined with each other as long as there is no conflict between them.

[0034] In a server bus communication system, as shown in Figure 1 IC1 is a server mainboard, IC4 is a server backplane, and the two transmit SGPIO signals through two connectors and a bus CABLE. Since IC1 and IC4 are distributed on different boards, in order to ensure signal quality, pull-up resistors are arranged at the positions of IC1 and IC4 close to the connectors, and the pull-up power sources are respectively powered by the power sources POWER_1 and POWER_2 on the respective boards.

[0035] Ideally, as shown in Figure 2 The timing of the two pull-up power sources POWER_1 and POWER_2 is synchronized, and there is no leakage problem between the server mainboard and the server backplane through the bus.

[0036] But usually, as shown in Figure 3 The two pull-up power sources POWER_1 and POWER_2 are not synchronized, and when one group of power sources is output and the other group of power sources is not output, the power source at one end will leak to the other end through the SGPIO bus. When POWER_2 is later than POWER_1, there will be a leakage from POWER_1 through R1 / R2 / R3 / R4, bus, R5 / R6 / R7 / R8 to POWER_2, which causes a "step" of POWER_2' as shown in Figure 3 Although POWER_1 and POWER_2 cannot be completely synchronized, as long as the time t2-t3 can be ignored (ms level and below), the leakage will not have an impact. But when the length of t2-t3 is several seconds or longer, the leakage will cause functional impact on the devices on the server mainboard and the server backplane.

[0037] In order to solve the above problems, the embodiment provides a server backplane applied to a bus communication system, as shown in Figure 4As shown, the server backplane 1 includes: a first interface unit 11 , a switch unit 12 and an editable logic device 13 .

[0038] like Figure 4 As shown, the first end of the first interface unit 11 is connected to the communication end of the editable logic device 13 and the first end of the switch unit 12, the second end of the first interface unit 11 is connected to the external device through a bus, and the third end of the first interface unit 11 is grounded. The first interface unit 11 is used to transmit information between the editable logic device 13 and the external device.

[0039] Optionally, the switch unit 12 and the editable logic device 13 may also be directly connected to an external device without being connected to the external device through the first interface unit 11 .

[0040] Optionally, the external device may be a controller.

[0041] Optionally, the editable logic device 13 is integrated on the hard disk, which also includes multiple functional chips such as Flash, EEPROM, sensor, etc. Each chip exchanges information with external devices through the first interface unit 11, transmits control signals through the SGPIO bus, and reads and writes hard disk data.

[0042] like Figure 4 As shown, the power supply end of the editable logic device 13 is connected to the second end of the switch unit 12 and the first power supply, the output end of the editable logic device 13 is connected to the control end of the switch unit 12, and the editable logic device 13 is used to output a control signal based on the first power supply and the power-on status of the external device.

[0043] Figure 4 In the embodiment, the switch unit 12 is used to switch the switch state based on the control signal, so that when the external device is not powered on or the first power supply is not powered on, the circuit between the first power supply and the external device is disconnected.

[0044] Specifically, Figure 4 In the example, the editable logic device 13 applies the following control method to implement power-on detection and server backplane control:

[0045] (1) Detecting whether there is a voltage of the first power supply; (2) When the voltage of the first power supply is not detected, controlling the switch unit to disconnect, thereby disconnecting the circuit between the first power supply and the external device; (3) When the voltage of the first power supply is detected and there is no voltage signal at the communication end, controlling the switch unit to disconnect; when a voltage signal is detected at the communication end, indicating that the voltage of the external device has been detected, controlling the switch unit to conduct.

[0046] Specifically, Figure 4When the first power supply is powered on first and the external device is powered on later, the editable logic device 13 detects the voltage of the first power supply and disconnects the switch unit 12 first, so that the voltage of the first power supply cannot be input to the external device through the first interface unit 11 and the bus, and the voltage on the bus is discharged through the first interface unit 11. Since the external device has not been powered on at this time, the external device cannot output a voltage signal, and the first end of the first interface unit 11 has no voltage signal. When the external device is powered on, the voltage of the external device is transmitted to the communication end of the editable logic device 13 through the bus and the first interface unit in turn, and the editable logic device 13 determines that the external device is powered on after reading the voltage signal, and controls the switch unit 12 to be turned on, so that the external device and the editable logic device 13 normally perform data transmission.

[0047] Specifically, Figure 5 When the external device is powered on first and the first power supply is powered on later, the editable logic device 13 does not output a control signal because it has no power supply voltage, so the switch unit 12 is disconnected, and the leakage current of the external device cannot be transmitted to the first power supply through the bus. When the first power supply is powered on, the editable logic device 13 is powered on and controls the switch unit 12 to be turned on based on the voltage signal of the communication end, so that the external device and the editable logic device 13 normally perform data transmission.

[0048] Optionally, the switch unit 12 can be a controllable switch such as a MOS switch, a transistor, or an integrated switch.

[0049] The server backboard provided in the embodiment is provided with a switch unit between the bus and the first power supply. When the editable logic device determines that one of the first power supply and the external device is not powered on, the switch unit is controlled to be disconnected, so as to cut off the path between the power supply of the first power supply and the power supply of the external device, thereby avoiding the situation that when the first power supply and the external device are not powered on synchronously, the power supply of the device powered on first leaks to the power supply of the device powered on later through the bus, and improving the reliability of the backboard server.

[0050] In some optional embodiments, as shown in Figure 5 The server backboard further includes a first pull-up circuit 14, wherein the first end of the first pull-up circuit 14 is connected with the first end of the switch unit 12, and the second end of the first pull-up circuit 14 is connected with the communication end of the editable logic device 13.

[0051] Specifically, Figure 6In the embodiment, the first pull-up circuit 14 is used to limit the current of the communication terminal of the editable logic device 13, and is also used to pull up the communication terminal to the first power supply voltage when the switch unit 12 is turned on, so as to improve the driving capability of the editable logic device 13 and ensure the quality of signal transmission.

[0052] Optionally, the first pull-up circuit can be a plurality of resistors connected in series, in parallel or in series-parallel.

[0053] In some optional embodiments, as shown in Figure 6 The communication terminal of the editable logic device 13 includes a clock interface SGPIO_DEVICE_SCLK, a reset interface SGPIO_DEVICE_SLOAD, an output interface SGPIO_DEVICE_SDOUT and an input interface SGPIO_DEVICE_SDIN. The clock interface SGPIO_DEVICE_SCLK is used to receive a clock signal, the reset interface SGPIO_DEVICE_SLOAD is used to receive a clock reset signal, the output interface SGPIO_DEVICE_SDOUT is used to output configuration data, and the input interface SGPIO_DEVICE_SDIN is used to receive configuration data.

[0054] Optionally, the communication terminal of the editable logic device 13 is connected with the switch unit 12 through the first pull-up circuit 14. For example, as shown in Figure 6 The first pull-up circuit 14 includes a first pull-up resistor R1, a second pull-up resistor R2, a third pull-up resistor R3 and a fourth pull-up resistor R4. The first end of the first pull-up resistor R1 is connected with the first end of the switch unit 12, and the second end of the first pull-up resistor R1 is connected with the clock interface SGPIO_DEVICE_SCLK of the editable logic device 13. The first end of the second pull-up resistor R2 is connected with the first end of the switch unit 12, and the second end of the second pull-up resistor R2 is connected with the reset interface SGPIO_DEVICE_SLOAD of the editable logic device 13. The first end of the third pull-up resistor R3 is connected with the first end of the switch unit 12, and the second end of the third pull-up resistor R3 is connected with the output interface SGPIO_DEVICE_SDOUT of the editable logic device 13. The first end of the fourth pull-up resistor R4 is connected with the first end of the switch unit 12, and the second end of the fourth pull-up resistor R4 is connected with the input interface SGPIO_DEVICE_SDIN of the editable logic device 13.

[0055] Specifically, Figure 6When the switch unit 12 is turned on, the first pull-up resistor R1, the second pull-up resistor R2, the third pull-up resistor R3 and the fourth pull-up resistor R4 are respectively used to pull up the clock interface SGPIO_DEVICE_SCLK, the reset interface SGPIO_DEVICE_SLOAD, the output interface SGPIO_DEVICE_SDOUT and the input interface SGPIO_DEVICE_SDIN of the editable logic device 13 to high level, improve the driving capability of the editable logic device 13, ensure the stability of the signal line, prevent the signal line from being suspended, limit the current size of each interface at the same time, and protect the editable logic device 13 from being damaged by large current impact.

[0056] Optionally, Figure 6 In the embodiment, the switch unit 12 includes a MOS switch, wherein the control end of the MOS switch is connected with the output end of the editable logic device 13, the first end of the MOS switch is connected with the first end of the first interface unit 11, and the second end of the MOS switch is connected with the power supply end of the editable logic device 13. The control end of the MOS switch is also connected with a grounding resistor R5. The grounding resistor R5 is used to ensure that when the POWER_1 is not powered on, i.e., the editable logic device 13 is not working, the control end of the MOS switch is maintained at low level, so that the MOS switch is kept in the off state. If there is no grounding resistor R5, the control end of the MOS switch is floating, and the MOS switch may be turned on, which causes the power supply of the external device to leak to the POWER_1.

[0057] Optionally, Figure 7 In the embodiment, the MOS switch is used to switch the switch state based on the control signal. When the MOS switch is turned on, the first power supply POWER_1 and the POWER_1' have the same voltage. When the MOS switch is turned off, the POWER_1' has no voltage. Therefore, when the external device is not powered on or the first power supply POWER_1 is not powered on, the MOS switch is turned off, the circuit between the POWER_1' and the external device is disconnected, and no leakage current flows between the first power supply POWER_1 and the external device.

[0058] It should be noted that the resistance value and the number of the pull-up resistors in the first pull-up circuit can be set as required by those skilled in the art.

[0059] The embodiment provides a communication system, which includes the above-mentioned editable logic device 13 and the first interface unit 11. Figure 7As shown, the server backplane 1 comprises the server mainboard 2 and the server backplane 1 of any of the above embodiments and any optional implementation thereof, wherein the power supply end of the server mainboard 2 is connected with the second power supply, the communication end of the server mainboard 2 is connected with the second end of the first interface unit 11 through the bus, and the server mainboard 2 is used to control the editable logic device 13 to work after power-on; when the second power supply is not powered on or the first power supply is not powered on, the switch unit 12 switches the switch state based on the control signal, so that the first power supply is disconnected with the external device.

[0060] Specifically, Figure 7 In the above embodiments and any optional implementation thereof, the editable logic device 13 applies the following control method to realize the power-on detection and the communication system control:

[0061] (1) detecting whether there is a voltage of the first power supply; (2) when the voltage of the first power supply is not detected, controlling the switch unit to be disconnected, so that the first power supply is disconnected with the second power supply; (3) when the voltage of the first power supply is detected and there is no voltage signal on the communication end, controlling the switch unit to be disconnected; when it is detected that there is a voltage signal on the communication end, indicating that the voltage of the second power supply is detected, controlling the switch unit to be turned on.

[0062] Specifically, Figure 7 In the above embodiments and any optional implementation thereof, when the first power supply is powered on first and the second power supply is powered on later, the editable logic device 13 disconnects the switch unit 12 first after detecting the voltage of the first power supply, so that the voltage of the first power supply will not be leaked to the second power supply through the first interface unit 11 and the bus, and the voltage on the bus is discharged through the first interface unit 11; since the second power supply is not powered on at this time, the server mainboard 2 will not output a voltage signal, and there is no voltage signal on the first end of the first interface unit 11. When the second power supply is powered on, the voltage of the second power supply is transmitted to the communication end of the editable logic device 13 through the bus and the first interface unit 11 in turn, and the editable logic device 13 reads the voltage signal to determine that the second power supply is powered on and controls the switch unit 12 to be turned on, so that the second power supply and the editable logic device 13 normally perform data transmission.

[0063] Specifically, Figure 8 In the above embodiments and any optional implementation thereof, when the second power supply is powered on first and the first power supply is powered on later, since the editable logic device 13 has no power supply voltage and does not output a control signal, the switch unit 12 is disconnected, and the leakage of the second power supply cannot be transmitted to the first power supply through the bus; when the first power supply is powered on, the editable logic device 13 is powered on and controls the switch unit 12 to be turned on based on the voltage signal of the communication end, so that the server mainboard 2 and the editable logic device 13 normally perform data transmission.

[0064] The communication system provided by the embodiment is characterized in that the server mainboard is connected with the server backboard through a bus, the server mainboard and the server backboard are powered by a second power supply and a first power supply respectively, a switch unit is arranged between the second power supply and the first power supply, when the editable logic device determines that one of the first power supply and the second power supply is not powered, the switch unit is controlled to be disconnected, and the path between the first power supply and the second power supply is cut off, thereby avoiding the situation that when the first power supply and the second power supply are powered asynchronously, the power supply of the device powered first leaks to the power supply of the device powered later through the bus, avoiding the functional abnormality of the device powered later due to the leakage, and improving the reliability of the backboard server.

[0065] In some optional embodiments, as shown in Figure 8 The server mainboard 2 comprises a controller 21, a second interface unit 23 and a second pull-up circuit 22, wherein the power supply end of the controller 21 is connected with the second power supply POWER_2, the communication end of the controller 21 is connected with the first end of the second interface unit 23 and the first end of the second pull-up circuit 22, the second end of the second pull-up circuit 22 is connected with the second power supply POWER_2, the second end of the second interface unit 23 is connected with the second end of the first interface unit 11 through a bus CABLE, and the third end of the second interface unit 23 is grounded.

[0066] Specifically, Figure 8 The controller 21 is used to control the editable logic device 13 to work after being powered, the second pull-up circuit 22 is used to improve the driving capability of the controller 21, and the second interface unit 23 is used to transmit information between the controller 21 and the editable logic device 13.

[0067] Optionally, the second pull-up circuit can be a plurality of resistors connected in series, in parallel or in series-parallel.

[0068] Optionally, the server mainboard can also comprise a controllable switch, the output end of the controller is connected with the control end of the controllable switch, the first end and the second end of the controllable switch are respectively connected with the second power supply and the second end of the second pull-up circuit, and the controller can control the controllable switch to be conductive by monitoring the power-on sequence of the first power supply and the second power supply: when the first power supply is powered on first and the second power supply is powered on later, the controller controls the controllable switch to be disconnected until the second power supply is powered on, and then controls the controllable switch to be conductive; when the second power supply is powered on first and the first power supply is powered on later, the controller first disconnects the controllable switch after detecting the voltage of the second power supply, and then controls the controllable switch to be conductive after the controller reads the voltage signal of the communication end, so that the mainboard and the backboard can normally transmit data.

[0069] In some optional embodiments, as shown in Figure 8As shown, the communication end of the controller 21 includes a clock interface SGPIO_HOST_SCLK, a reset interface SGPIO_HOST_SLOAD, an output interface SGPIO_HOST_SDOUT, and an input interface SGPIO_HOST_SDIN.

[0070] Optionally, the communication end of the controller 21 is connected with the second power supply POWER_2 through the second pull-up circuit 22. As an example, the second pull-up circuit 22 includes a fifth pull-up resistor R6, a sixth pull-up resistor R7, a seventh pull-up resistor R8, and an eighth pull-up resistor R9. Figure 8 In the embodiment, the first end of the fifth pull-up resistor R6 is connected with the second power supply POWER_2, and the second end of the fifth pull-up resistor R6 is connected with the clock interface SGPIO_HOST_SCLK of the controller 21; the first end of the sixth pull-up resistor R7 is connected with the second power supply POWER_2, and the second end of the sixth pull-up resistor R7 is connected with the reset interface SGPIO_HOST_SLOAD of the controller 21; the first end of the seventh pull-up resistor R8 is connected with the second power supply POWER_2, and the second end of the seventh pull-up resistor R8 is connected with the output interface SGPIO_HOST_SDOUT of the controller 21; the first end of the eighth pull-up resistor R9 is connected with the second power supply POWER_2, and the second end of the eighth pull-up resistor R9 is connected with the input interface SGPIO_HOST_SDIN of the controller 21.

[0071] Specifically, Figure 9 In the embodiment, when the second power supply POWER_2 is powered on, the fifth pull-up resistor R6, the sixth pull-up resistor R7, the seventh pull-up resistor R8, and the eighth pull-up resistor R9 are used to pull up the clock interface SGPIO_HOST_SCLK, the reset interface SGPIO_HOST_SLOAD, the output interface SGPIO_HOST_SDOUT, and the input interface SGPIO_HOST_SDIN of the controller 21 to high level respectively, to ensure the stability of the signal lines, prevent the signal lines from being suspended, and limit the current size of each interface at the same time, thereby protecting the controller 21 from being damaged by large current impact.

[0072] It should be noted that the person skilled in the art can set the types and quantities of the interfaces of the communication end of the controller as needed, and the quantities and connection modes of the corresponding pull-up resistors are not limited, and the functions of the controller include but are not limited to the contents described in the above embodiments.

[0073] The embodiment provides a control method of a communication system, which is applied to the editable logic device in the above embodiment and any optional implementation manner thereof, such as Figure 8 As shown, the method comprises the following steps.

[0074] Step S1: detecting whether there is a voltage of the first power supply.

[0075] In detail, referring to Figure 8 The editable logic device 13 judges the power-on sequence of the first power supply POWER_1 and the second power supply POWER_2 by detecting whether there is voltage of the first power supply POWER_1.

[0076] Step S2: When no voltage of the first power supply is detected, the control switch unit is controlled to be off, so that the first power supply and the second power supply are disconnected.

[0077] In detail, referring to Figure 8 When there is no voltage of the first power supply POWER_1, it indicates that the editable logic device 13 has no power supply, so the output end control_pin of the editable logic device 13 does not output a control signal to maintain a low level, so that the switch unit 12 is in a default off state. At this time, even if the second power supply POWER_2 is powered on, the current of the second power supply POWER_2 will not leak to the first power supply POWER_1 through the bus.

[0078] Step S3: When the voltage of the first power supply is detected and there is no voltage signal on the communication end, the switch unit is controlled to be off; when it is detected that there is a voltage signal on the communication end, it indicates that the voltage of the second power supply is detected, and the switch unit is controlled to be on.

[0079] When the voltage of the first power supply is detected and there is no voltage signal on the communication end, the process of controlling the switch unit to be off includes: controlling the switch unit to be off so that the bus is discharged, and setting the communication end to be in a floating state, and then detecting whether there is a voltage signal on the communication end in real time.

[0080] In detail, referring to Figure 8 When the voltage of the first power supply POWER_1 is detected and there is no voltage signal on the communication end, it indicates that the first power supply POWER_1 is powered on at this time, but the second power supply POWER_2 has not been powered on, so the controller 21 does not output a voltage, and each interface of the communication end of the editable logic device 13 does not detect the output voltage signal of the controller 21, that is, the first power supply POWER_1 is powered on before the second power supply POWER_2. At this time, the output end control_pin of the editable logic device 13 does not output a control signal to maintain a low level, so that the switch unit 12 continues to maintain an off state, and there is no voltage at POWER_1'. The editable logic device 13 first sets each interface of the communication end to be in a low level, so that the residual charge on the bus is discharged to the ground, and then sets the interface of the communication end to be in a floating input, and reads the value of each interface of the communication end in real time, to detect whether there is a voltage signal sent by the controller 21 on the communication end.

[0081] Specifically, referring to ​ When the communication end of the editable logic device 13 detects a voltage signal, indicating that the second power supply POWER_2 is powered on at this time, the controller 21 starts to work and output a voltage, and the output voltage is sequentially input to the communication end of the editable logic device 13 through the second interface unit 23, the bus CABLE and the first interface unit 11, so that the communication end interface is converted to high level, and the editable logic device 13 sets the level of the output end control_pin to high to output a control signal, so that the switch unit 12 is turned on, and the first power supply POWER_1 and the second power supply POWER_2 form a path with the bus, restoring the normal SGPIO function of the communication system.

[0082] The control method of the communication system provided in the embodiment detects that the first power supply is powered on, and the switch unit is disconnected, avoiding the first power supply from leaking to the second power supply through the bus; only when the second power supply is also powered on, the switch unit will be turned on, avoiding the situation that when the first power supply and the second power supply are powered on asynchronously, the power supply of the device powered on first will leak to the power supply of the device powered on later through the bus, avoiding the function abnormality of the device powered on later due to the leakage, and improving the reliability of the backplane server.

[0083] Although the embodiments of the present application are described in conjunction with the drawings, various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present application, and such modifications and changes fall within the scope defined by the appended claims.

Claims

1. A server backplane, characterized in that: Applied to a bus communication system, the server backplane includes: a first interface unit, a switch unit and an editable logic device, wherein: A first end of the first interface unit is connected to a communication end of the editable logic device and a first end of the switch unit, a second end of the first interface unit is connected to an external device via a bus, and a third end of the first interface unit is grounded. The first interface unit is used to transmit information between the editable logic device and the external device. The power supply end of the editable logic device is connected to the second end of the switch unit and the first power supply, the output end of the editable logic device is connected to the control end of the switch unit, and the editable logic device is used to output a control signal based on the first power supply and the power-on status of the external device; The switch unit is configured to switch a switch state based on the control signal, so that when the external device is not powered on or the first power supply is not powered on, a circuit is disconnected between the first power supply and the external device; The server backplane further includes: a first pull-up circuit, wherein: A first end of the first pull-up circuit is connected to a first end of the switch unit, a second end of the first pull-up circuit is connected to a communication end of the editable logic device, and the first pull-up circuit is used to improve a driving capability of the editable logic device; The communication end of the editable logic device includes: a clock interface, a reset interface, an output interface and an input interface; The clock interface is used to receive a clock signal, the reset interface is used to receive a clock reset signal, the output interface is used to output configuration data, and the input interface is used to receive configuration data; The first pull-up circuit includes: a first pull-up resistor, a second pull-up resistor, a third pull-up resistor and a fourth pull-up resistor, wherein: A first end of the first pull-up resistor is connected to a first end of the switch unit, and a second end of the first pull-up resistor is connected to a clock interface of the editable logic device; A first end of the second pull-up resistor is connected to the first end of the switch unit, and a second end of the second pull-up resistor is connected to the reset interface of the editable logic device; A first end of the third pull-up resistor is connected to the first end of the switch unit, and a second end of the third pull-up resistor is connected to the output interface of the editable logic device; A first end of the fourth pull-up resistor is connected to the first end of the switch unit, and a second end of the fourth pull-up resistor is connected to the input interface of the editable logic device.

2. The server backplane according to claim 1, wherein: The switch unit includes: a MOS switch, wherein: The control end of the MOS switch is connected to the output end of the editable logic device, the first end of the MOS switch is connected to the first end of the first interface unit, and the second end of the MOS switch is connected to the power supply end of the editable logic device; The MOS switch is used to switch the switch state based on the control signal, so that when the external device is not powered on or the first power supply is not powered on, the circuit between the first power supply and the external device is disconnected.

3. The server backplane according to any one of claims 1 to 2, characterized in that: Also includes: A grounding resistor connected to the control terminal of the switch unit.

4. A communication system, characterized in that: include: A server motherboard and a server backplane according to any one of claims 1 to 3, wherein: The power supply end of the server mainboard is connected to the second power supply, the communication end of the server mainboard is connected to the second end of the first interface unit via a bus, and the server mainboard is used to control the operation of the editable logic device after power-on; When the second power supply is not powered on, or the first power supply is not powered on, the switch unit switches the switch state based on the control signal, so that the circuit between the first power supply and the external device is disconnected.

5. The communication system according to claim 4, wherein: The server mainboard includes: a controller, a second interface unit and a second pull-up circuit, wherein: The power supply end of the controller is connected to the second power supply, the communication end of the controller is connected to the first end of the second interface unit and the first end of the second pull-up circuit, and the controller is used to control the operation of the editable logic device after power-on; The second end of the second pull-up circuit is connected to the second power supply, and the second pull-up circuit is used to improve the driving capability of the controller; The second end of the second interface unit is connected to the second end of the first interface unit through a bus, the third end of the second interface unit is grounded, and the second interface unit is used to transmit information between the controller and the editable logic device.

6. The communication system according to claim 5, wherein: The communication end of the controller includes: a clock interface, a reset interface, an output interface and an input interface; The second pull-up circuit includes: a fifth pull-up resistor, a sixth pull-up resistor, a seventh pull-up resistor and an eighth pull-up resistor, wherein: A first end of the fifth pull-up resistor is connected to the second power supply, and a second end of the fifth pull-up resistor is connected to the clock interface of the controller; A first end of the sixth pull-up resistor is connected to the second power supply, and a second end of the sixth pull-up resistor is connected to the reset interface of the controller; A first end of the seventh pull-up resistor is connected to the second power supply, and a second end of the seventh pull-up resistor is connected to the output interface of the controller; A first end of the eighth pull-up resistor is connected to the second power supply, and a second end of the eighth pull-up resistor is connected to the input interface of the controller.

7. A method for controlling a communication system, characterized in that: Applied to the communication system according to any one of claims 4 to 6, the method comprising: Detecting whether there is a voltage of the first power supply; When the voltage of the first power supply is not detected, the switch unit is controlled to be disconnected, so that the circuit between the first power supply and the second power supply is disconnected; When the voltage of the first power supply is detected and there is no voltage signal at the communication end, the switch unit is controlled to be disconnected; when a voltage signal is detected at the communication end, indicating that the voltage of the second power supply is detected, the switch unit is controlled to be connected.

8. The method according to claim 7, characterized in that The process of controlling the switch unit to disconnect when the voltage of the first power supply is detected and there is no voltage signal at the communication end includes: The switch unit is controlled to be disconnected to discharge the bus, and after the communication terminal is set to a floating state, whether there is a voltage signal at the communication terminal is detected in real time.

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