MOS tube driving circuit

By using a series-connected transformer module and current limiting resistor in the MOS tube drive circuit, the splitting and adjustment of PWM signals is achieved, and the problems of circuit failure and excessive component losses at high power and high switching frequency are solved, and flexible PWM signal adjustment and efficient driving circuit design are realized.

CN119519683APending Publication Date: 2025-02-25CHENGDU DIYUE ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202411502470.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-25
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

The existing MOS tube driving circuits are prone to circuit failure and excessive component loss at high power and high switching frequency, and it is difficult to adjust the rising and falling edge slopes.

Method used

A MOS tube driving circuit is adopted to realize the splitting and adjustment of the PWM signal by connecting the first MOS tube, the transformer module, the resistor and the diode in series in sequence. The Cgs charge and discharge time and current are adjusted by adjusting the PWM_ON and PWM_OFF pulse widths and the current limiting resistance values, thereby adjusting the high level amplitude, low level amplitude, rising edge and falling edge slope of the PWM.

Benefits of technology

It effectively prevents circuit failure and excessive component loss, realizes flexible adjustment of PWM signals, avoids overshoot and ringing, reduces the heat generation of the driving elements, and improves driving efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides an MOS (Metal Oxide Semiconductor) tube driving circuit, which belongs to the technical field of driving circuits and comprises a first MOS tube, a transformer module, a first resistor, a first diode and a fifth MOS tube which are sequentially connected in series, a second MOS tube, the transformer module, a second resistor, a second diode and the fifth MOS tube which are sequentially connected in series, one end of a third MOS tube is connected with the transformer module, and the other end of the third MOS tube is connected with the transformer module. The other end of the third MOS tube intersects with the first resistor and the first diode at one point, the third end of the third MOS tube intersects with the second diode and the fifth MOS tube at one point, one end of the fourth MOS tube is connected with the transformer module, and the other end of the fourth MOS tube intersects with the second resistor and the second diode at one point. The third end of the fourth MOS tube is intersected with the second diode and the fifth MOS tube at one point, the other end of the first MOS tube is connected with a first input signal module, and the other end of the second MOS tube is connected with a second input signal module.
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Description

Technical Field

[0001] The present invention relates to the technical field of drive circuits, and in particular to a MOS tube drive circuit. Background Art

[0002] As the power of modern power supplies increases, the parasitic capacitance of MOS tube gates increases. At the same time, in order to improve the power density of power supplies, the switching frequency of MOS tubes increases. For example, in a certain application, the MOS tube parameter Qg is 500nC, two MOS tubes are connected in parallel, the switching frequency is 500KHz, and the driving voltage is +12V for on and -5V for off. The MOS tube driving power is 6.8W. Such a large driving power consumption brings great challenges to the design of driving circuits. Traditional driving solutions will produce large driving losses that are consumed in the form of heat. Excessive temperature may even burn out the driving device.

[0003] Secondly, in order to solve the overshoot and ringing caused by the parasitic parameters of the MOS driver, the traditional solution generally connects a resistor in series with the gate. As the driving power increases, the loss on the resistor and the loss of the driver will become greater, and the resulting heat may cause the risk of circuit failure. As the frequency increases, the rising and falling edges of the MOS tube are required to become steeper and steeper, and the traditional solution becomes more difficult to implement. Therefore, there are technical problems of circuit failure and excessive component loss in the existing technology. Summary of the invention

[0004] In view of this, it is necessary to provide a MOS tube driving circuit to solve the technical problems of circuit failure and excessive component loss in the prior art.

[0005] In order to solve the above technical problems, on the one hand, the present invention provides a MOS tube driving circuit, comprising: The first MOS tube, the transformer module, the first resistor, the first diode and the fifth MOS tube are connected in series in sequence; The second MOS tube, the transformer module, the second resistor, the second diode and the fifth MOS tube are connected in series in sequence; One end of the third MOS tube is connected to the transformer module, the other end of the third MOS tube intersects with the first resistor and the first diode at one point, and the third end of the third MOS tube intersects with the second diode and the fifth MOS tube at one point; One end of the fourth MOS tube is connected to the transformer module, the other end of the fourth MOS tube intersects with the second resistor and the second diode at one point, and the third end of the fourth MOS tube intersects with the second diode and the fifth MOS tube at one point; The other end of the first MOS tube is connected to the first input signal module; The other end of the second MOS tube is connected to the second input signal module.

[0006] In a possible implementation, the transformer module includes: a first transformer and a second transformer; The second end of the first transformer is connected to the first MOS transistor, the third end of the first transformer is connected to the first resistor, and the fourth end of the first transformer is connected to the third MOS transistor; Two ends of the second transformer are connected to the second MOS tube, a third end of the second transformer is connected to the second resistor, and a fourth end of the second transformer is connected to the fourth MOS tube.

[0007] In one possible implementation, The first end of the first transformer, the second end of the first transformer, the first end of the second transformer, the first MOS transistor and VCC intersect at one point.

[0008] In a possible implementation, the fifth MOS transistor includes: a first capacitor and a second capacitor; The first capacitor, the second capacitor and the first diode intersect at one point.

[0009] In one possible implementation, The first capacitor and the second capacitor are both internal parasitic capacitors of the fifth MOS tube.

[0010] In one possible implementation, One end of the second capacitor is also connected to the second diode.

[0011] In one possible implementation, The third end of the fifth MOS tube intersects with the second capacitor and the second diode at one point.

[0012] In one possible implementation, The third end of the fifth MOS tube intersects with the second capacitor and the second diode at one point and is grounded.

[0013] In one possible implementation, The third terminal of the first MOS tube is grounded.

[0014] In one possible implementation, The third terminal of the first MOS tube is grounded.

[0015] The beneficial effects of the present invention are as follows: the MOS tube driving circuit provided by the present invention comprises: a first MOS tube, a transformer module, a first resistor, a first diode and a fifth MOS tube are connected in series in sequence; a second MOS tube, a transformer module, a second resistor, a second diode and a fifth MOS tube are connected in series in sequence; one end of a third MOS tube is connected to the transformer module, the other end of the third MOS tube intersects with the first resistor and the first diode at a point, and the third end of the third MOS tube intersects with the second diode and the fifth MOS tube at a point; one end of a fourth MOS tube is connected to the transformer module, the other end of the fourth MOS tube intersects with the second resistor and the second diode at a point, and the third end of the fourth MOS tube intersects with the second diode and the fifth MOS tube at a point; the other end of the first MOS tube is connected to the first input signal module; the other end of the second MOS tube is connected to the second input signal module. The present invention connects the other end of the first MOS tube to the first input signal module and connects the other end of the second MOS tube to the second input signal module, so that the input signal is split into PWM_ON and PWM_OFF signals, so that the high level amplitude and the low level amplitude of PWM are adjustable, and the Cgs charging and discharging time can be conveniently adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively. At the same time, the rising edge and falling edge slopes of PWM are adjustable, and the slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively to change the Cgs charging and discharging current, so that the problem of circuit failure and excessive component loss can be effectively prevented. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A MOS tube driving circuit diagram provided by the present invention; Figure 2 A MOS tube driving timing diagram of an embodiment of a MOS tube driving circuit provided by the present invention; Figure 3 A conventional non-isolated driving circuit diagram of an embodiment of a MOS tube driving circuit provided by the present invention; Figure 4 A conventional isolation driving circuit diagram of an embodiment of the MOS tube driving circuit provided by the present invention. DETAILED DESCRIPTION

[0018] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0019] In the description of the embodiments of the present application, unless otherwise specified, “plurality” means two or more than two.

[0020] The terms "including" and "having" and any variations thereof in the embodiments of the present invention are intended to cover non-exclusive inclusions. For example, a process, method, apparatus, product or equipment comprising a series of steps or modules is not necessarily limited to those steps or modules clearly listed, but may include other steps or modules not clearly listed or inherent to these processes, methods, products or equipment.

[0021] The naming or numbering of the steps in the embodiments of the present invention does not mean that the steps in the method flow must be executed in the time / logical sequence indicated by the naming or numbering. The execution order of the named or numbered process steps can be changed according to the technical purpose to be achieved, as long as the same or similar technical effects can be achieved.

[0022] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0023] The present invention provides a MOS tube driving circuit, which is described below.

[0024] Figure 1 The MOS tube driving circuit diagram provided by the present invention and Figure 2 A MOS tube driving timing diagram of an embodiment of a MOS tube driving circuit provided by the present invention includes: The first MOS transistor 101, the transformer module 105, the first resistor 106, the first diode 108 and the fifth MOS transistor 110 are connected in series in sequence; The second MOS transistor 102, the transformer module 105, the second resistor 107, the second diode 109 and the fifth MOS transistor 110 are connected in series in sequence; One end of the third MOS transistor 103 is connected to the transformer module 105, the other end of the third MOS transistor 103 intersects with the first resistor 106 and the first diode 108 at one point, and the third end of the third MOS transistor 103 intersects with the second diode 109 and the fifth MOS transistor 110 at one point; One end of the fourth MOS transistor 104 is connected to the transformer module 105, the other end of the fourth MOS transistor 104 intersects with the second resistor 107 and the second diode 109 at one point, and the third end of the fourth MOS transistor 104 intersects with the second diode 109 and the fifth MOS transistor 110 at one point; The other end of the first MOS tube 101 is connected to the first input signal module; The other end of the second MOS transistor 102 is connected to the second input signal module.

[0025] It is understandable that the advantages of traditional non-isolated drivers are high driving power, high frequency, and convenient adjustment of the rising and falling slopes. The disadvantages are that when the slope requirement is too high, it is difficult to solve the overshoot and ringing of the rising and falling edges, and non-isolated drivers need to add isolated power supplies in bridge topology applications. The advantage of traditional isolated drivers is that they are suitable for various topological applications including bridge applications that do not share a common ground. The disadvantage is that due to the use of transformer isolation drivers, which also include DC blocking capacitors, the power is relatively small, and the rising and falling edges are relatively slow. Figure 1 The present invention combines the advantages of traditional non-isolated drive and isolated drive: isolation is applicable to various applications, the driving power is large, the rising and falling edges are conveniently adjustable, and there is no overshoot and ringing.

[0026] It can be further understood that, compared with the traditional technical solution, the present invention needs to add a level of PWM splitting circuit to split the PWM input signal into PWM_ON and PWM_OFF signals, or directly generate PWM_ON and PWM_OFF signals through FPGA, DSP, etc., and then drive the MOS tube through the driving circuit.

[0027] It can be further understood that the drive transformer of the present invention adopts a transmission line transformer solution and is driven by independent rising and falling edges, which has greatly improved performance and effect compared with the traditional solution. The present invention is mainly used in high-power and high-switching frequency power supply projects to solve the problem of excessive power consumption of MOS tube drive and improve drive efficiency.

[0028] It should be further explained that the present invention uses two transmission line transformers as power transmission devices, which are highly efficient and have low heat dissipation. Since the transmission power is transmitted through the transmission line transformer, it is a current-type drive. Compared with the traditional voltage-type drive solution, it solves the overshoot and ringing, prevents the breakdown and misconduction risks of the MOS tube, and since there is no large pulse current, the loss on the current limiting resistor will be much smaller. Compared with the traditional drive solution, the present invention can easily adjust the slope of the rising and falling edges by modifying the current limiting resistor value.

[0029] like Figure 1 As shown, the PWM signal is input from the PWM_ON and PWM_OFF terminals. When the rising edge comes, the input port PWM_ON inputs a high-level pulse signal of a fixed time to turn on the first MOS tube 101. The current flows through the primary of the transformer to the first MOS tube 101 to PGND through VCC. The voltage induced by the secondary turns on the third MOS tube 103. The current charges the gate capacitor Cgs of the MOS tube through the first resistor 106 and the second diode 109. At this time, the fourth MOS tube 104 is cut off to prevent the current from flowing back to SGND through the second resistor 107 and the second diode 109. By setting the pulse width, Cgs can be adjusted to charge to +12V. The falling edge When the voltage rises, a high-level pulse signal of a fixed time is input to the input port PWM_OFF to turn on the second MOS tube 102, and the current flows through the transformer primary to the second MOS tube 102 to PGND through VCC. The voltage induced by the secondary turns on the fourth MOS tube 104, and the current discharges to the gate capacitor Cgs of the MOS tube through the second resistor 107 and the second diode 109. At this time, the third MOS tube 103 is cut off to prevent the current from flowing back to the gate through the first resistor 106 and the first MOS tube 101. By setting the pulse width, Cgs can be adjusted to discharge to -5V. This process is repeated when the next rising edge comes, thereby periodically sending out PWM signals to drive the MOS tube; Output end: The high level amplitude and low level amplitude of PWM are adjustable, and the Cgs charge and discharge time can be easily adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively; Output end: The rising and falling slopes of PWM are adjustable. The slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively and changing the Cgs charge and discharge current.

[0030] In some embodiments of the present invention, the transformer module 105 includes: a first transformer and a second transformer; The second end of the first transformer is connected to the first MOS transistor 101, the third end of the first transformer is connected to the first resistor 106, and the fourth end of the first transformer is connected to the third MOS transistor 103; Two ends of the second transformer are connected to the second MOS transistor 102 , a third end of the second transformer is connected to the second resistor 107 , and a fourth end of the second transformer is connected to the fourth MOS transistor 104 .

[0031] It can be understood that the present invention uses two transmission line transformers as power transmission devices, which are highly efficient, and the heat generation is very low. Since the transmission power is transmitted through the transmission line transformer, it is a current-type drive. Compared with the traditional voltage-type drive solution, it solves the overshoot and ringing, and prevents the breakdown and misconduction risks of the MOS tube. Since there is no large pulse current, the loss on the current limiting resistor will be much smaller. Compared with the traditional drive solution, the present invention can easily adjust the slope of the rising and falling edges by modifying the current limiting resistor value; like Figure 1 As shown, the PWM signal is input from the PWM_ON and PWM_OFF terminals. When the rising edge comes, the input port PWM_ON inputs a high-level pulse signal of a fixed time to turn on the first MOS tube 101, and the current flows through the primary of the transformer to the first MOS tube 101 to PGND through VCC. The voltage induced by the secondary turns on the third MOS tube 103, and the current charges the gate capacitor Cgs of the MOS tube through the first resistor 106 and the second diode 109. At this time, the fourth MOS tube 104 is cut off to prevent the current from flowing back to SGND through the second resistor 107 and the second diode 109. By setting the pulse width, Cgs can be adjusted to charge to +12V. When the falling edge comes, the input port PWM_OFF inputs a high-level pulse signal of a fixed time to turn on the second MOS tube 103. The OS transistor 102 is turned on, and the current flows through the primary of the transformer to the second MOS transistor 102 to PGND through VCC. The voltage induced by the secondary turns on the fourth MOS transistor 104, and the current discharges to the gate capacitor Cgs of the MOS transistor through the second resistor 107 and the second diode 109. At this time, the third MOS transistor 103 is cut off to prevent the current from flowing back to the gate through the first resistor 106 and the first MOS transistor 101. By setting the pulse width, Cgs can be adjusted to discharge to -5V. This process is repeated when the next rising edge comes, so as to periodically send out a PWM signal to drive the MOS transistor; Output end: The high level amplitude and low level amplitude of PWM are adjustable, and the Cgs charging and discharging time can be conveniently adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively; Output end: The rising and falling slopes of PWM are adjustable. The slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively and changing the Cgs charge and discharge current.

[0032] In some embodiments of the present invention, the first end of the first transformer, the second end of the first transformer, the first end of the second transformer, the first MOS transistor 101 and VCC intersect at one point.

[0033] It can be understood that the present invention uses two transmission line transformers as power transmission devices, which are highly efficient and have low heat dissipation. Since the transmission power is transmitted through the transmission line transformer, it is a current-type drive. Compared with the traditional voltage-type drive solution, it solves the overshoot and ringing, prevents the breakdown and misconduction risks of the MOS tube, and since there is no large pulse current, the loss on the current limiting resistor will be much smaller. Compared with the traditional drive solution, the present invention can easily adjust the slope of the rising and falling edges by modifying the current limiting resistor value.

[0034] like Figure 1 As shown, the PWM signal is input from the PWM_ON and PWM_OFF terminals. When the rising edge comes, the input port PWM_ON inputs a high-level pulse signal of a fixed time to turn on the first MOS tube 101, and the current flows through the primary of the transformer to the first MOS tube 101 to PGND through VCC. The voltage induced by the secondary turns on the third MOS tube 103, and the current charges the gate capacitor Cgs of the MOS tube through the first resistor 106 and the second diode 109. At this time, the fourth MOS tube 104 is cut off to prevent the current from flowing back to SGND through the second resistor 107 and the second diode 109. By setting the pulse width, Cgs can be adjusted to charge to +12V. When the falling edge comes, the input port PWM_OFF inputs a high-level pulse signal of a fixed time to turn on the second MOS tube 103. The OS transistor 102 is turned on, and the current flows through the primary of the transformer to the second MOS transistor 102 to PGND through VCC. The voltage induced by the secondary turns on the fourth MOS transistor 104, and the current discharges to the gate capacitor Cgs of the MOS transistor through the second resistor 107 and the second diode 109. At this time, the third MOS transistor 103 is cut off to prevent the current from flowing back to the gate through the first resistor 106 and the first MOS transistor 101. By setting the pulse width, Cgs can be adjusted to discharge to -5V, and this process is repeated when the next rising edge comes, so as to periodically send out a PWM signal to drive the MOS transistor; output end: the high level amplitude and low level amplitude of PWM are adjustable, and the Cgs charging and discharging time can be easily adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively.

[0035] Output end: The rising and falling slopes of PWM are adjustable. The slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively and changing the Cgs charge and discharge current.

[0036] In some embodiments of the present invention, the fifth MOS transistor 110 includes: a first capacitor and a second capacitor; The first capacitor, the second capacitor and the first diode 108 intersect at one point.

[0037] In some embodiments of the present invention, both the first capacitor and the second capacitor are internal parasitic capacitors of the fifth MOS transistor 110 .

[0038] It can be understood that the present invention uses two transmission line transformers as power transmission devices, which are highly efficient and have low heat dissipation. Since the transmission power is transmitted through the transmission line transformer, it is a current-type drive. Compared with the traditional voltage-type drive solution, it solves the overshoot and ringing, prevents the breakdown and misconduction risks of the MOS tube, and since there is no large pulse current, the loss on the current limiting resistor will be much smaller. Compared with the traditional drive solution, the present invention can easily adjust the slope of the rising and falling edges by modifying the current limiting resistor value.

[0039] like Figure 1 As shown, the PWM signal is input from the PWM_ON and PWM_OFF terminals. When the rising edge comes, the input port PWM_ON inputs a high-level pulse signal of a fixed time to turn on the first MOS tube 101, and the current flows through the primary of the transformer to the first MOS tube 101 to PGND through VCC. The voltage induced by the secondary turns on the third MOS tube 103, and the current charges the gate capacitor Cgs of the MOS tube through the first resistor 106 and the second diode 109. At this time, the fourth MOS tube 104 is cut off to prevent the current from flowing back to SGND through the second resistor 107 and the second diode 109. By setting the pulse width, Cgs can be adjusted to charge to +12V. When the falling edge comes, the input port PWM_OFF inputs a high-level pulse signal of a fixed time to turn on the second MOS tube 103. The OS transistor 102 is turned on, and the current flows through the primary of the transformer to the second MOS transistor 102 to PGND through VCC. The voltage induced by the secondary turns on the fourth MOS transistor 104, and the current discharges to the gate capacitor Cgs of the MOS transistor through the second resistor 107 and the second diode 109. At this time, the third MOS transistor 103 is cut off to prevent the current from flowing back to the gate through the first resistor 106 and the first MOS transistor 101. By setting the pulse width, Cgs can be adjusted to discharge to -5V, and this process is repeated when the next rising edge comes, so as to periodically send out a PWM signal to drive the MOS transistor; output end: the high level amplitude and low level amplitude of PWM are adjustable, and the Cgs charging and discharging time can be easily adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively.

[0040] Output end: The rising and falling slopes of PWM are adjustable. The slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively and changing the Cgs charge and discharge current.

[0041] In some embodiments of the present invention, one end of the second capacitor is further connected to the second diode 109 .

[0042] It can be understood that the present invention uses two transmission line transformers as power transmission devices, which are highly efficient and have low heat dissipation. Since the transmission power is transmitted through the transmission line transformer, it is a current-type drive. Compared with the traditional voltage-type drive solution, it solves the overshoot and ringing, prevents the breakdown and misconduction risks of the MOS tube, and since there is no large pulse current, the loss on the current limiting resistor will be much smaller. Compared with the traditional drive solution, the present invention can easily adjust the slope of the rising and falling edges by modifying the current limiting resistor value.

[0043] like Figure 1 As shown, the PWM signal is input from the PWM_ON and PWM_OFF terminals. When the rising edge comes, the input port PWM_ON inputs a high-level pulse signal of a fixed time to turn on the first MOS tube 101, and the current flows through the primary of the transformer to the first MOS tube 101 to PGND through VCC. The voltage induced by the secondary turns on the third MOS tube 103, and the current charges the gate capacitor Cgs of the MOS tube through the first resistor 106 and the second diode 109. At this time, the fourth MOS tube 104 is cut off to prevent the current from flowing back to SGND through the second resistor 107 and the second diode 109. By setting the pulse width, Cgs can be adjusted to charge to +12V. When the falling edge comes, the input port PWM_OFF inputs a high-level pulse signal of a fixed time to turn on the second MOS tube 103. The OS transistor 102 is turned on, and the current flows through the primary of the transformer to the second MOS transistor 102 to PGND through VCC. The voltage induced by the secondary turns on the fourth MOS transistor 104, and the current discharges to the gate capacitor Cgs of the MOS transistor through the second resistor 107 and the second diode 109. At this time, the third MOS transistor 103 is cut off to prevent the current from flowing back to the gate through the first resistor 106 and the first MOS transistor 101. By setting the pulse width, Cgs can be adjusted to discharge to -5V, and this process is repeated when the next rising edge comes, so as to periodically send out a PWM signal to drive the MOS transistor; output end: the high level amplitude and low level amplitude of PWM are adjustable, and the Cgs charging and discharging time can be easily adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively.

[0044] Output end: The rising and falling slopes of PWM are adjustable. The slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively and changing the Cgs charge and discharge current.

[0045] In some embodiments of the present invention, the third end of the fifth MOS transistor intersects with the second capacitor and the second diode 109 at a point.

[0046] It can be understood that the present invention uses two transmission line transformers as power transmission devices, which are highly efficient and have low heat dissipation. Since the transmission power is transmitted through the transmission line transformer, it is a current-type drive. Compared with the traditional voltage-type drive solution, it solves the overshoot and ringing, prevents the breakdown and misconduction risks of the MOS tube, and since there is no large pulse current, the loss on the current limiting resistor will be much smaller. Compared with the traditional drive solution, the present invention can easily adjust the slope of the rising and falling edges by modifying the current limiting resistor value.

[0047] like Figure 1 As shown, the PWM signal is input from the PWM_ON and PWM_OFF terminals. When the rising edge comes, the input port PWM_ON inputs a high-level pulse signal of a fixed time to turn on the first MOS tube 101, and the current flows through the primary of the transformer to the first MOS tube 101 to PGND through VCC. The voltage induced by the secondary turns on the third MOS tube 103, and the current charges the gate capacitor Cgs of the MOS tube through the first resistor 106 and the second diode 109. At this time, the fourth MOS tube 104 is cut off to prevent the current from flowing back to SGND through the second resistor 107 and the second diode 109. By setting the pulse width, Cgs can be adjusted to charge to +12V. When the falling edge comes, the input port PWM_OFF inputs a high-level pulse signal of a fixed time to turn on the second MOS tube 103. The OS transistor 102 is turned on, and the current flows through the primary of the transformer to the second MOS transistor 102 to PGND through VCC. The voltage induced by the secondary turns on the fourth MOS transistor 104, and the current discharges to the gate capacitor Cgs of the MOS transistor through the second resistor 107 and the second diode 109. At this time, the third MOS transistor 103 is cut off to prevent the current from flowing back to the gate through the first resistor 106 and the first MOS transistor 101. By setting the pulse width, Cgs can be adjusted to discharge to -5V, and this process is repeated when the next rising edge comes, so as to periodically send out a PWM signal to drive the MOS transistor; output end: the high level amplitude and low level amplitude of PWM are adjustable, and the Cgs charging and discharging time can be easily adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively.

[0048] Output end: The rising and falling slopes of PWM are adjustable. The slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively and changing the Cgs charge and discharge current.

[0049] In some embodiments of the present invention, the third end of the fifth MOS transistor intersects with the second capacitor and the second diode at one point and is grounded.

[0050] It can be understood that the present invention uses two transmission line transformers as power transmission devices, which are highly efficient and have low heat dissipation. Since the transmission power is transmitted through the transmission line transformer, it is a current-type drive. Compared with the traditional voltage-type drive solution, it solves the overshoot and ringing, prevents the breakdown and misconduction risks of the MOS tube, and since there is no large pulse current, the loss on the current limiting resistor will be much smaller. Compared with the traditional drive solution, the present invention can easily adjust the slope of the rising and falling edges by modifying the current limiting resistor value.

[0051] like Figure 1 As shown, the PWM signal is input from the PWM_ON and PWM_OFF terminals. When the rising edge comes, the input port PWM_ON inputs a high-level pulse signal of a fixed time to turn on the first MOS tube 101, and the current flows through the primary of the transformer to the first MOS tube 101 to PGND through VCC. The voltage induced by the secondary turns on the third MOS tube 103, and the current charges the gate capacitor Cgs of the MOS tube through the first resistor 106 and the second diode 109. At this time, the fourth MOS tube 104 is cut off to prevent the current from flowing back to SGND through the second resistor 107 and the second diode 109. By setting the pulse width, Cgs can be adjusted to charge to +12V. When the falling edge comes, the input port PWM_OFF inputs a high-level pulse signal of a fixed time to turn on the second MOS tube 103. The OS transistor 102 is turned on, and the current flows through the primary of the transformer to the second MOS transistor 102 to PGND through VCC. The voltage induced by the secondary turns on the fourth MOS transistor 104, and the current discharges to the gate capacitor Cgs of the MOS transistor through the second resistor 107 and the second diode 109. At this time, the third MOS transistor 103 is cut off to prevent the current from flowing back to the gate through the first resistor 106 and the first MOS transistor 101. By setting the pulse width, Cgs can be adjusted to discharge to -5V, and this process is repeated when the next rising edge comes, so as to periodically send out a PWM signal to drive the MOS transistor; output end: the high level amplitude and low level amplitude of PWM are adjustable, and the Cgs charging and discharging time can be easily adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively.

[0052] Output end: The rising and falling slopes of PWM are adjustable. The slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively and changing the Cgs charge and discharge current.

[0053] In some embodiments of the present invention, the third terminal of the first MOS transistor 101 is grounded.

[0054] It can be understood that the present invention uses two transmission line transformers as power transmission devices, which are highly efficient and have low heat dissipation. Since the transmission power is transmitted through the transmission line transformer, it is a current-type drive. Compared with the traditional voltage-type drive solution, it solves the overshoot and ringing, prevents the breakdown and misconduction risks of the MOS tube, and since there is no large pulse current, the loss on the current limiting resistor will be much smaller. Compared with the traditional drive solution, the present invention can easily adjust the slope of the rising and falling edges by modifying the current limiting resistor value.

[0055] like Figure 1 As shown, the PWM signal is input from the PWM_ON and PWM_OFF terminals. When the rising edge comes, the input port PWM_ON inputs a high-level pulse signal of a fixed time to turn on the first MOS tube 101, and the current flows through the primary of the transformer to the first MOS tube 101 to PGND through VCC. The voltage induced by the secondary turns on the third MOS tube 103, and the current charges the gate capacitor Cgs of the MOS tube through the first resistor 106 and the second diode 109. At this time, the fourth MOS tube 104 is cut off to prevent the current from flowing back to SGND through the second resistor 107 and the second diode 109. By setting the pulse width, Cgs can be adjusted to charge to +12V. When the falling edge comes, the input port PWM_OFF inputs a high-level pulse signal of a fixed time to turn on the second MOS tube 103. The OS transistor 102 is turned on, and the current flows through the primary of the transformer to the second MOS transistor 102 to PGND through VCC. The voltage induced by the secondary turns on the fourth MOS transistor 104, and the current discharges to the gate capacitor Cgs of the MOS transistor through the second resistor 107 and the second diode 109. At this time, the third MOS transistor 103 is cut off to prevent the current from flowing back to the gate through the first resistor 106 and the first MOS transistor 101. By setting the pulse width, Cgs can be adjusted to discharge to -5V, and this process is repeated when the next rising edge comes, so as to periodically send out a PWM signal to drive the MOS transistor; output end: the high level amplitude and low level amplitude of PWM are adjustable, and the Cgs charging and discharging time can be easily adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively.

[0056] Output end: The rising and falling slopes of PWM are adjustable. The slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively and changing the Cgs charge and discharge current.

[0057] In some embodiments of the present invention, the third terminal of the second MOS transistor 102 is grounded.

[0058] It can be understood that the present invention uses two transmission line transformers as power transmission devices, which are highly efficient and have low heat dissipation. Since the transmission power is transmitted through the transmission line transformer, it is a current-type drive. Compared with the traditional voltage-type drive solution, it solves the overshoot and ringing, prevents the breakdown and misconduction risks of the MOS tube, and because there is no large pulse current, the loss on the current limiting resistor will be much smaller. Compared with the traditional drive solution, the present invention can easily adjust the slope of the rising and falling edges by modifying the current limiting resistor value.

[0059] like Figure 1 As shown, the PWM signal is input from the PWM_ON and PWM_OFF terminals. When the rising edge comes, the input port PWM_ON inputs a high-level pulse signal of a fixed time to turn on the first MOS tube 101, and the current flows through the primary of the transformer to the first MOS tube 101 to PGND through VCC. The voltage induced by the secondary turns on the third MOS tube 103, and the current charges the gate capacitor Cgs of the MOS tube through the first resistor 106 and the second diode 109. At this time, the fourth MOS tube 104 is cut off to prevent the current from flowing back to SGND through the second resistor 107 and the second diode 109. By setting the pulse width, Cgs can be adjusted to charge to +12V. When the falling edge comes, the input port PWM_OFF inputs a high-level pulse signal of a fixed time to turn on the second MOS tube 103. The OS transistor 102 is turned on, and the current flows through the primary of the transformer to the second MOS transistor 102 to PGND through VCC. The voltage induced by the secondary turns on the fourth MOS transistor 104, and the current discharges to the gate capacitor Cgs of the MOS transistor through the second resistor 107 and the second diode 109. At this time, the third MOS transistor 103 is cut off to prevent the current from flowing back to the gate through the first resistor 106 and the first MOS transistor 101. By setting the pulse width, Cgs can be adjusted to discharge to -5V, and this process is repeated when the next rising edge comes, so as to periodically send out a PWM signal to drive the MOS transistor; output end: the high level amplitude and low level amplitude of PWM are adjustable, and the Cgs charging and discharging time can be easily adjusted by adjusting the PWM_ON and PWM_OFF pulse widths respectively.

[0060] Output end: The rising and falling slopes of PWM are adjustable. The slope can be adjusted by adjusting the current limiting resistors R1 and R2 respectively and changing the Cgs charge and discharge current.

[0061] Figure 3 A conventional non-isolated driving circuit diagram of an embodiment of the MOS tube driving circuit provided by the present invention and Figure 4 A conventional isolation driving circuit diagram of an embodiment of a MOS tube driving circuit provided by the present invention includes: It is understandable that the advantages of traditional non-isolated drivers are high driving power, high frequency, and convenient adjustment of the rising and falling slopes. The disadvantages are that when the slope requirement is too high, it is difficult to solve the overshoot and ringing of the rising and falling edges, and non-isolated drivers need to add isolated power supplies in bridge topology applications. The advantages of traditional isolated drivers are that they are suitable for various topological applications, including bridge applications and other applications that do not share a common ground. The disadvantages are that due to the use of transformer isolation drive, there are also DC blocking capacitors, etc., the power is relatively small, and the rising and falling edges are relatively slow. High-power MOS tubes require large driving power due to large gate capacitance and high switching frequency. Since the traditional driving scheme uses voltage-type drive, in order to increase the rising and falling slopes, the gate current limiting resistor value needs to be reduced. In order to reduce the overshoot voltage and ringing, the gate current limiting resistor value needs to be increased. This brings about design contradictions. Compromises and balances need to be made in actual designs. At the same time, due to large losses, the driving components are seriously heated, and there is a risk of failure under poor heat dissipation conditions. The present invention perfectly solves the above problems: the current-type drive of the transmission line transformer can conveniently adjust the rising and falling slopes without generating overshoot and ringing. Due to the high driving efficiency and the heat sharing between the two transformers, the heat generated by the components is very low and there is no risk of failure.

[0062] The MOS tube driving circuit provided by the present invention is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A MOS tube driving circuit, characterized in that: include: The first MOS tube, the transformer module, the first resistor, the first diode and the fifth MOS tube are connected in series in sequence; The second MOS tube, the transformer module, the second resistor, the second diode and the fifth MOS tube are connected in series in sequence; One end of the third MOS tube is connected to the transformer module, the other end of the third MOS tube intersects with the first resistor and the first diode at one point, and the third end of the third MOS tube intersects with the second diode and the fifth MOS tube at one point; One end of the fourth MOS tube is connected to the transformer module, the other end of the fourth MOS tube intersects with the second resistor and the second diode at one point, and the third end of the fourth MOS tube intersects with the second diode and the fifth MOS tube at one point; The other end of the first MOS tube is connected to the first input signal module; The other end of the second MOS tube is connected to the second input signal module.

2. The MOS tube driving circuit according to claim 1, characterized in that: The transformer module comprises: a first transformer and a second transformer; The second end of the first transformer is connected to the first MOS transistor, the third end of the first transformer is connected to the first resistor, and the fourth end of the first transformer is connected to the third MOS transistor; Two ends of the second transformer are connected to the second MOS tube, a third end of the second transformer is connected to the second resistor, and a fourth end of the second transformer is connected to the fourth MOS tube.

3. The MOS tube driving circuit according to claim 2, characterized in that: The first end of the first transformer, the second end of the first transformer, the first end of the second transformer, the first MOS transistor and VCC intersect at one point.

4. The MOS tube driving circuit according to claim 1, characterized in that: The fifth MOS tube comprises: a first capacitor and a second capacitor; The first capacitor, the second capacitor and the first diode intersect at one point.

5. The MOS tube driving circuit according to claim 4, characterized in that: The first capacitor and the second capacitor are both internal parasitic capacitors of the fifth MOS tube.

6. The MOS tube driving circuit according to claim 4, characterized in that: One end of the second capacitor is also connected to the second diode.

7. The MOS tube driving circuit according to claim 4 or 5, characterized in that: The third end of the fifth MOS tube intersects with the second capacitor and the second diode at one point.

8. The MOS tube driving circuit according to claim 7, characterized in that: The third end of the fifth MOS tube intersects with the second capacitor and the second diode at one point and is grounded.

9. The MOS tube driving circuit according to claim 1, characterized in that: The third terminal of the first MOS tube is grounded.

10. The MOS tube driving circuit according to claim 1, characterized in that: The third terminal of the second MOS tube is grounded.