A channelization processing IP core applicable to spectrum sensing

Abstract

The present application provides a channelization processing IP core applicable to spectrum sensing, including a data preprocessing module for receiving wideband spectrum data and generating a high-speed serial data stream to be sent to a serial-to-parallel conversion module; a serial-to-parallel conversion module for dividing the high-speed serial data stream into multiple parallel signals to achieve multi-channel output with a specific number of bits; a sub-band analysis filter for performing narrow-band division on multi-channel data to divide a high-speed wideband signal into narrow-band low-speed signals; a constant false alarm detection module for detecting signals in the narrow-band low-speed channels to determine whether there are signals in the channels; and a sub-band synthesis filter for combining the data of the sub-channels with signals. The advantages of the present application are as follows: it can solve the problems of lack of prior information, large data transmission volume, high resource occupancy rate, difficult real-time processing, and wideband signal cross-channel in current actual spectrum monitoring; it has the advantages of high operation efficiency, good portability effect, and strong reliability.

Description

Technical Field

[0001] This application belongs to the field of electromagnetic signal processing, and particularly relates to a channelization processing IP core applicable to spectrum sensing. Background Art

[0002] With the continuous improvement of the informatization level of modern warfare, a large number of communication electronic devices have been widely used in the military field, making modern military communication show the development trends of softwareization, intelligence, broadbandization and networking. As a result, communication systems and communication standards have become diverse, the transmission rate has become high-speed, and communication technologies with anti-interference and low intercept probability characteristics have emerged in an endless stream.

[0003] With the increase in various communication and radar electronic devices, the modern electromagnetic space environment has become increasingly complex. Spectrum sensing scenarios need to face various adverse situations such as large instantaneous bandwidth, different carrier frequencies, and low signal-to-noise ratio (SNR). In the actual battlefield environment, more and more military radios and detection devices using different modulation methods and communication protocols are being used, which makes the electromagnetic environment increasingly complex. Therefore, the requirements for spectrum sensing have become more stringent. In the complex electromagnetic environment of the modern battlefield, higher requirements are put forward for the performance of spectrum sensing. The radio frequency receiver must have large instantaneous bandwidth, real-time signal reception, large dynamic range, high sensitivity, and strong signal resolution and processing capabilities.

[0004] Digital channelization technology has important research significance in spectrum sensing. Spectrum sensing refers to the real-time full-band scanning and monitoring of the radio spectrum to effectively manage and allocate radio spectrum resources, which is crucial for the optimization of radio communication systems, the improvement of spectrum utilization rate, and the fair allocation of spectrum resources. Digital channelization technology can perform multi-channel processing on the received signal to improve the quality and stability of the signal. Its advantages lie in its high precision, high sensitivity, reconfigurability, and easy implementation. These characteristics make it have great potential in spectrum sensing. Its parallel processing method also improves the efficiency of spectrum sensing. In addition, digital channelization technology can also achieve adaptive frequency selection and adaptive gain control, so as to better adapt to the signal characteristics of different frequency bands and improve the accuracy and stability of spectrum sensing.

[0005] In terms of implementation, programmable logic devices FPGA or other dedicated computing devices are used to meet the requirements of real-time processing, and can reduce the cost, volume and power consumption of the system to a certain extent. Among them, FPGA has greater advantages in terms of development cycle, development difficulty, flexibility, real-time operation, etc.

[0006] FPGA enables the parallel processing of high-speed data streams, and digital channelization technology is the key to resolving the contradiction between input bandwidth and signal real-time processing. The essence of digital channelization is to separate signals in different frequency bands using a filter bank in the frequency domain and then independently complete signal processing algorithms within each channel.

[0007] Since spectrum sensing is a non-cooperative signal and needs to be monitored across the entire frequency domain, this poses a huge pressure on subsequent hardware processing. The high data rate will inevitably impose higher requirements on the caching and real-time processing capabilities of the hardware, and also brings challenges to chip clock domain design and hardware interface management. Digital channelization technology divides the received broadband signal into multiple sub-bands and processes each sub-band separately. In this way, the broadband signal can be divided into narrowband signals, reducing the signal rate, alleviating the subsequent hardware processing pressure, and achieving higher reception accuracy and real-time performance.

[0008] In current actual channelization projects, for broadband sparse signals, directly processing the data involves a huge amount of data and consumes a high level of hardware resources; while uniform channelization is prone to cross-channel problems, resulting in signal loss. In the absence of prior information in the spectrum sensing scenario, directly dividing channels is likely to cause cross-channel problems. Summary of the Invention

[0009] The purpose of this application is to overcome the defects of the prior art, which consume a high level of hardware resources or are prone to cross-channel problems, resulting in signal loss.

[0010] To achieve the above purpose, this application proposes a channelization IP core applicable to spectrum sensing. The IP core includes a data preprocessing module 1, a serial-to-parallel conversion module 2, a sub-band analysis filter 3, a constant false alarm detection module 4, and a sub-band synthesis filter 5 that are connected in sequence; where:

[0011] The data preprocessing module 1 is used to receive broadband spectrum data, achieve data cross-clock domain transmission through FIFO caching, perform low-speed clock processing of high-speed data between different clock frequencies, and then send the high-speed serial data stream to the serial-to-parallel conversion module 2;

[0012] The serial-to-parallel conversion module 2 is used to divide the high-speed serial data stream into parallel multi-channel signals and use the LUT lookup table unit inside the FPGA to achieve multi-channel output with a specific number of bits;

[0013] The sub-band analysis filter 3 is used to perform narrowband division on the multi-channel data output by the serial-to-parallel conversion module 2, and achieve the division of high-speed broadband signals into narrowband low-speed signals;

[0014] The constant false alarm detection module 4 is used to detect signals in the narrowband low-speed channels, determine whether there are signals in the channels, and if so, output "yes" and send the data of the sub-channel to the sub-band synthesis filter 5.

[0015] The sub-band synthesis filter 5 is used to merge the data of the sub-channels with signals. If a broadband signal is divided into two adjacent sub-channels, that is, there is cross-channel data, then these two channels are merged and output.

[0016] As an improvement of the above IP core, the processing process of the sub-band analysis filter 3 is as follows: determine the number of sub-channels to be divided for the input data, arrange the coefficients according to the coefficients of the FIR prototype filter into a two-dimensional structure of polyphase filtering, and the number of rows in the two dimensions corresponds to the number of sub-channels to be divided; then perform an inverse discrete Fourier transform on the output of the polyphase filtering structure, convolve the signal with the coefficients, and output multiple narrowband sub-channels.

[0017] As an improvement of the above IP core, the process of the constant false alarm detection module 4 detecting signals in the sub-channel includes: first calculating the signal amplitude through square detection, then selecting 2N data points, selecting a detection unit D in the middle of the data points, and the left and right sides of the detection unit are protection units respectively; then calculate the sum average of the N points Xn on the left side of the detection unit and the sum average of the N points Yn on the right side of the detection unit to be detected, use the average value as the background noise in the sub-channel to obtain the noise level nt, and then multiply by the set detection factor a to obtain the detection threshold, and judge whether there is a signal in the sub-channel by comparing the detection threshold with the detection unit.

[0018] As an improvement of the above IP core, the processing process of the sub-band synthesis filter 5 is as follows: according to the operation result of the constant false alarm detection module 4, obtain the sub-channels with signals, perform comprehensive filtering on all sub-channels with signals, and the comprehensive filtering and the analysis filtering are inverse to each other in structure, and merge the divided multiple sub-channels into a complete broadband signal.

[0019] Compared with the prior art, the advantages of this application are as follows:

[0020] 1. A channelization processing IP core applicable to spectrum sensing of the present invention is implemented based on FPGA, and spectrum sensing can be performed without prior information.

[0021] 2. A channelization processing IP core applicable to spectrum sensing of the present invention performs spectrum splicing according to the sensing result, and solves the problem of cross-channel in uniform division.

[0022] 3. A channelization processing IP core applicable to spectrum sensing of the present invention is implemented based on modularization, and the constant false alarm detection realizes a low false alarm probability. Brief Description of the Drawings

[0023] Figure 1 The figure shows a schematic structural diagram of a channelization processing IP core applicable to spectrum sensing;

[0024] Figure 2 The figure shows a functional diagram of the sub-band analysis filter of the channelization processing IP core applicable to spectrum sensing;

[0025] Figure 3 The figure shows a functional diagram of the constant false alarm detection of the channelization processing IP core applicable to spectrum sensing;

[0026] Figure 4 The figure shows a functional diagram of the sub-band synthesis filter of the channelization processing IP core applicable to spectrum sensing. Detailed Description of the Preferred Embodiment

[0027] The technical solution of the present application will be described in detail below with reference to the accompanying drawings.

[0028] The present application provides a channelization IP core applicable to spectrum sensing. In the case of no prior information, preliminary uniform channel division is first performed, and then the constant false alarm threshold is calculated according to the signal amplitude within the sub-channel. The signal across channels is obtained through threshold detection, and then the complete reconstructed signal is obtained by the sub-band synthesis filter for the sub-signals across channels, realizing the channelization processing of spectrum sensing without prior information.

[0029] The channelization IP core applicable to spectrum sensing provided by the present application includes, connected in sequence: a data preprocessing module 1, a serial-to-parallel conversion module 2, a sub-band analysis filter 3, a constant false alarm detection module 4, and a sub-band synthesis filter 5; where:

[0030] The data preprocessing module 1 is configured to receive broadband spectrum data from an ADC, implement data cross-clock domain transmission through FIFO buffering, perform low-speed clock processing of high-speed data between different clock frequencies, and then send it to the serial-to-parallel conversion module 2.

[0031] The serial-to-parallel conversion module 2 is configured to divide the high-speed serial data stream output by the data preprocessing module 1 into multiple parallel signals, and use the LUT lookup table unit inside the FPGA to implement multi-channel output of a specific number of bits.

[0032] The sub-band analysis filter 3 is configured to perform narrow-band division on the multi-channel data output by the serial-to-parallel conversion module 2, and implement the division of high-speed broadband signals into narrow-band low-speed signals.

[0033] The subband analysis filter 3 needs to determine the number of subchannels into which the input data needs to be divided. According to the coefficients of the designed FIR prototype filter, the coefficients are arranged into a two-dimensional structure for polyphase filtering. The number of rows in the two dimensions corresponds to the number of subchannels to be divided. Then, the output of the polyphase filtering structure is subjected to an inverse discrete Fourier transform, the signal is convolved with the coefficients, and multiple narrowband subchannels are output.

[0034] The constant false alarm detection module 4 is used to perform signal detection on the subchannels output by the subband analysis filter 3, determine whether there is a signal in the channel. If there is, it outputs "yes" and sends the data of the subchannel to the subband synthesis filter 5.

[0035] The constant false alarm detection module 4 needs to detect the signal in the subchannel. First, it calculates the signal amplitude through square detection. Then, it selects 2N data points, and selects a detection unit D in the middle of the data points. The protection units are respectively on the left and right of the detection unit D. Then, it calculates the sum average of the N points Xn on the left of the detection unit and the sum average of the N points Yn on the right of the detection unit to be detected. The average value is used as the background noise in the subchannel to obtain the noise level nt. Then, according to the set detection factor a, the two are multiplied to obtain the detection threshold. By comparing the detection threshold with the detection unit, it is judged whether there is a signal in the subchannel.

[0036] The subband synthesis filter 5 is used to merge the data of the subchannels where signals exist output by the constant false alarm detection module 4. If a broadband signal is divided into two adjacent subchannels, that is, there is cross-channel data, then these two channels are merged and output.

[0037] The subband synthesis filter 5 obtains the subchannels where signals exist according to the operation result of the constant false alarm detection, and performs comprehensive filtering on all the subchannels where signals exist. The comprehensive filtering and the analysis filtering are inverse to each other in structure, so that the multiple divided subchannels can be merged into a complete broadband signal.

[0038] As Figure 1 shown, the sampled spectral data first enters the data preprocessing module 1. After data transmission across clock domains, it enters the serial-to-parallel conversion module 2, converts the data into multiple parallel channels and sends them to the subband analysis filter 3. Then, the subchannels output by the analysis filtering are sent to the constant false alarm detection module 4, and the cross-channel data obtained after the constant false alarm detection is sent to the subband synthesis filter 5.

[0039] As Figure 2As shown in the figure, the sub-band analysis filter 3 of the channelization processing IP core applicable to spectrum sensing divides the data into K sub-channels. First, the signal x(n) after serial-to-parallel conversion passes through the delay unit Z to obtain the signals x(n-k) at each moment. Here, n represents the sampling points of the input signal, and its value ranges from 0, 1, …, N; k represents the number of divided channels, and its value ranges from 0, 1, …, K. Then, through the decimation unit, every M points are decimated. Then, according to the required narrowband bandwidth, the prototype low-pass FIR filter h(n) is designed, and the coefficients of the filter are converted into the structure of polyphase filtering. The polyphase structure is to rearrange the filter coefficients from 1 to n, arranging the coefficients of the FIR filter from a one-dimensional form into a two-dimensional form. The number of rows of the two-dimensional filter coefficients is equal to the number of divided sub-channels. The operation between the filter coefficients and the input signal is essentially a convolution operation. The convolution operation is to perform weighted summation of the data at each moment with the coefficients. Through formula derivation, in mathematical operations, this weighted summation operation can be quickly implemented through the IFFT operation. Through the above operations of the sub-band analysis filter 3, the wideband signal can be divided into multiple narrowband sub-channels.

[0040] As Figure 3 shown, after being analyzed by the sub-band analysis filter 3, Vk[n] is output, and the output signal is sent to the constant false alarm detection module 4. The constant false alarm detection module 4 first obtains the amplitude value through square detection, obtaining a data sequence of length 2n + 3. The middle data point is selected as the detection unit D, and the left and right sides of the detection unit are used as protection units. Then, n data are respectively selected from the left and right of the detection unit, and xn and yn are respectively summed and averaged to obtain X and Y (X = (x0 + x1 + … + xn) / n; Y = (y0 + y1 + … + yn) / n). Then, the sum of the means of X and Y is used as the background noise to obtain the noise level nt. According to the required constant false alarm detection probability, the detection factor a is designed, and then the noise level is multiplied by the detection factor a to obtain the detection threshold Th. The detection threshold Th and the detection unit D are sent to a comparator for comparison to determine whether there is a signal in this sub-channel, and the judgment result is output.

[0041] As Figure 4 shown, from a structural perspective, the sub-band synthesis filter 5 and the sub-band analysis filter 3 are in an inverse relationship, mainly completing the reconstruction and output of the sub-channels with signals to ensure the integrity of the wideband signal and avoid the situation of cross-channels. After constant false alarm detection, the sub-channels with signals in the result are input into the sub-band synthesis filter 5. First, the convolution operation between the signal and the filter coefficients is realized through DFT, and then the result is sent to the FIR filter of the K-channel polyphase filtering structure. After passing through the filter, the data is interpolated by M times, and finally, through the delay unit Z, all the data is added to output the result of the combined signal.

[0042] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and not to limit them. Although the present application has been described in detail with reference to the embodiments, those of ordinary skill in the art should understand that any modification or equivalent replacement of the technical solutions of the present application does not depart from the spirit and scope of the technical solutions of the present application, and they should all be covered within the scope of the claims of the present application.

Claims

1. A channelized IP core applicable to spectrum sensing, characterized in that, The IP core includes a data preprocessing module (1), a serial-to-parallel conversion module (2), a sub-band analysis filter (3), a constant false alarm detection module (4), and a sub-band synthesis filter (5) connected in sequence; where: The data preprocessing module (1) is used to receive broadband spectrum data, achieve data cross-clock domain transmission through FIFO caching, perform low-speed clock processing of high-speed data between different clock frequencies, and then send the high-speed serial data stream to the serial-to-parallel conversion module (2); The serial-to-parallel conversion module (2) is used to divide the high-speed serial data stream into multiple parallel signals and implement multi-channel output of a specific number of bits by using the LUT lookup table unit inside the FPGA; The sub-band analysis filter (3) is used to perform narrow-band division on the multi-channel data output by the serial-to-parallel conversion module (2), and achieve dividing the broadband high-speed signal into narrow-band low-speed signals; The constant false alarm detection module (4) is used to detect signals in the narrow-band low-speed channel, judge whether there is a signal in the channel, if there is, output yes, and send the data of the narrow-band low-speed sub-channel to the sub-band synthesis filter (5); The sub-band synthesis filter (5) is used to merge the data of the sub-channels with signals. If a broadband signal is divided into two adjacent sub-channels, that is, there is cross-channel data, then these two channels are merged and output; The processing process of the sub-band analysis filter (3) is as follows: determine the number of sub-channels to be divided for the input data, arrange the coefficients according to the coefficients of the FIR prototype filter into a two-dimensional structure of polyphase filtering, and the number of rows of the two dimensions corresponds to the number of sub-channels to be divided; then perform an inverse discrete Fourier transform on the output of the polyphase filtering structure, convolve the signal with the coefficients, and output multiple narrow-band sub-channels; The process of the constant false alarm detection module (4) detecting signals in the sub-channel includes: first calculating the signal amplitude through square detection, then selecting 2N data points, selecting a detection unit D in the middle of the data points, and the protection units are respectively on the left and right of the detection unit; then calculate the sum average of the N points Xn on the left of the detection unit and the sum average of the N points Yn on the right of the detection unit, use the average value as the background noise in this sub-channel to obtain the noise level nt, and then multiply it by the set detection factor a to obtain the detection threshold, and judge whether there is a signal in the sub-channel by comparing the detection threshold with the detection unit; The processing process of the sub-band synthesis filter (5) is as follows: according to the operation result of the constant false alarm detection module (4), obtain the sub-channels with signals, perform synthesis filtering on all sub-channels with signals, and the synthesis filtering and analysis filtering are inverse to each other in structure, and merge the divided multiple sub-channels into a complete broadband signal.

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