Electrode structure of solar cell, manufacturing method thereof, and solar cell

Abstract

The application provides an electrode structure of a solar cell, a manufacturing method and the solar cell. The electrode structure comprises a plurality of auxiliary grid lines, the plurality of auxiliary grid lines comprises a plurality of first grid lines, the plurality of first grid lines are intersected two by two to form a plurality of regular polygons, each regular polygon has a center, and the vertex of each regular polygon is a first connection point of at least two first grid lines; any two first grid lines having the same first connection point in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°; the plurality of auxiliary grid lines further comprises a plurality of second grid lines, any two second grid lines have a second connection point, the projection of each second connection point in the regular polygon overlaps with the center, the first grid line and the second grid line are electrically insulated, the plurality of first grid lines are arranged on one side of the plurality of second grid lines, and in the case that the first grid line is a positive grid line, the second grid line is a negative grid line; in the case that the first grid line is a negative grid line, the second grid line is a positive grid line. Through the application, the photoelectric conversion capability of the solar cell is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of photovoltaic cells, in particular to an electrode structure of a solar cell, a manufacturing method of the electrode structure of the solar cell and the solar cell. BACKGROUND

[0002] The most prominent feature of the IBC solar cell is that the PN junction and the metal contact are both located at the back of the solar cell, and the front surface is completely free from the shading of the metal grid electrode, which, in combination with the light trapping structure composed of the pyramidal texturing structure and the anti-reflection layer on the front surface, can maximize the use of incident light and reduce optical loss, and has a higher short-circuit current. At the same time, the optimized metal grid electrode is used on the back to reduce the series resistance.

[0003] Although the IBC cell technology has many advantages, it also faces some challenges. First, since the IBC cell belongs to a back junction cell, in order to minimize the recombination of photo-generated carriers before they reach the back p-n junction, a higher minority carrier diffusion length is required, so the minority carrier lifetime of the substrate material is required to be higher. Second, the IBC cell has a higher requirement for the passivation of the front surface, and the photo-generated carriers need to reach the back p-n junction area as much as possible to improve the cell conversion efficiency. At the same time, when the IBC cell is made into a back p+ region and n+ region in a interdigital distribution, it needs to be made step by step through multiple masks, which undoubtedly increases the process difficulty and the process is relatively complex, so the manufacturing cost of the IBC cell is higher than that of the traditional crystalline silicon cell.

[0004] Therefore, the IBC cell is one of the most complex processes and the most difficult structure design among the commercialized crystalline silicon cells, and still needs to be improved in terms of improving the conversion efficiency of the cell. SUMMARY

[0005] The main purpose of the present application is to provide an electrode structure of a solar cell, a manufacturing method of the electrode structure of the solar cell and the solar cell, to solve the problem of low photoelectric conversion efficiency in the prior art.

[0006] In order to achieve the above object, according to one aspect of the present application, there is provided an electrode structure of a solar cell, the electrode structure being composed of a plurality of sub-grids, the plurality of sub-grids comprising: a plurality of first grid lines, the plurality of first grid lines intersecting with each other to enclose a plurality of regular polygons, each of the regular polygons having a center, the vertices of each of the regular polygons being first connection points of at least two of the first grid lines, and any two of the first grid lines having the same first connection point in the regular polygon having a first included angle, the first included angle being greater than 0° and less than 180°; a plurality of second grid lines, any two of the second grid lines having a second connection point, the projection of each of the second connection points in the regular polygon overlapping with the center, the first grid lines and the second grid lines being electrically insulated, wherein the plurality of first grid lines are arranged on one side of the plurality of second grid lines, and in the case that the first grid lines are positive grid lines, the second grid lines are negative grid lines, and in the case that the first grid lines are negative grid lines, the second grid lines are positive grid lines.

[0007] Further, the electrode structure comprises a first part and a second part which are electrically connected, the first part comprising the plurality of first grid lines and the plurality of second grid lines, and the second part comprising the plurality of first grid lines and the plurality of second grid lines, wherein in the case that the first grid lines of the first part are positive grid lines, the first grid lines of the second part are negative grid lines, and in the case that the first grid lines of the first part are negative grid lines, the first grid lines of the second part are positive grid lines.

[0008] Further, the plurality of regular polygons have the same shape.

[0009] Further, the regular polygons are regular hexagons.

[0010] Further, the electrode structure further comprises: an insulating medium layer between the plurality of first grid lines and the plurality of second grid lines, the insulating medium layer being used to electrically insulate the first grid lines and the second grid lines.

[0011] Further, the electrode structure further comprises: a first conductive part connected with the first connection points, the first conductive part having a first extension direction which is perpendicular to any one of the first grid lines; and a second conductive part connected with the second connection points, the second conductive part having the same extension direction as the first conductive part.

[0012] Further, the first conductive part has a first length in a second extension direction, the second conductive part has a second length in the second extension direction, the first length is greater than the second length, and the second extension direction is perpendicular to the first extension direction.

[0013] In order to achieve the above object, according to one aspect of the present application, there is provided a method for manufacturing an electrode structure of a solar cell, the electrode structure being composed of a plurality of sub-grids, the method comprising: providing a semiconductor substrate, the semiconductor substrate having a first surface; forming a plurality of first grid lines on the first surface, the plurality of first grid lines intersecting with each other to enclose a plurality of regular polygons, each regular polygon having a center, the vertices of each regular polygon being first connection points of at least two first grid lines, and any two first grid lines having the same first connection point in the regular polygon having a first included angle, the first included angle being greater than 0° and less than 180°; forming a plurality of second grid lines on a side of the first grid lines away from the first surface, any two second grid lines having a second connection point, a projection of each second connection point in the regular polygon overlapping with the center, the first grid lines and the second grid lines being electrically insulated, wherein the plurality of first grid lines are arranged on one side of the plurality of second grid lines, and in a case where the first grid lines are positive grid lines, the second grid lines are negative grid lines, and in a case where the first grid lines are negative grid lines, the second grid lines are positive grid lines.

[0014] According to another aspect of the present application, there is provided a solar cell, comprising: a semiconductor substrate, the semiconductor substrate comprising a substrate and a doped layer arranged in layers, wherein the doped layer and the substrate have opposite doping types to form a PN junction; and an electrode structure, the electrode structure being arranged on a side of the doped layer away from the substrate, and a first grid line in the electrode structure being arranged in contact with the substrate, and a second grid line in the electrode structure being arranged in contact with the doped layer.

[0015] Further, the silicon substrate comprises a first silicon wafer and a second silicon wafer arranged in abutment, and the first silicon wafer and the second silicon wafer have opposite doping types; the doped layer comprises a first doped layer and a second doped layer, the first doped layer being arranged in contact with the first silicon wafer, and the second doped layer being arranged in contact with the second silicon wafer, and the first doped layer and the first silicon wafer have opposite doping types, and the second doped layer and the second silicon wafer have opposite doping types; the electrode structure comprises a first part and a second part, the first part comprising a plurality of first grid lines and a plurality of second grid lines, and the second part comprising a plurality of first grid lines and a plurality of second grid lines, wherein in a case where the first grid lines in the first part are positive grid lines, the first grid lines in the second part are negative grid lines, and in a case where the first grid lines in the first part are negative grid lines, the first grid lines in the second part are positive grid lines.

[0016] The technical scheme of the present application provides an electrode structure of a solar cell, which is composed of a plurality of sub-grids, and the plurality of sub-grids include a plurality of first grid lines and a plurality of second grid lines, wherein the plurality of first grid lines intersect with each other to form a plurality of regular polygons, the vertexes of each of the regular polygons are first connection points of at least two of the first grid lines, and any two of the first grid lines having the same first connection point in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°; any two of the second grid lines have a second connection point, since the plurality of first grid lines intersect with each other to form a plurality of regular polygons, each of the regular polygons has a center, and by making the projection of each second connection point in the regular polygon overlap with the center, the distance from each second connection point to the first grid line is equal, so that when the solar cell with the electrode structure is subjected to an electric field, the carriers collected at each second connection point can be collected by the first grid line in the shortest path, and similarly, the carriers collected at each first connection point can be collected by the second grid line in the shortest path, thereby fully utilizing the distribution characteristics of the electric field in space, improving the separation ability of the photo-generated carrier pairs, reducing the carrier recombination probability, and further improving the photoelectric conversion effect of the solar cell. BRIEF DESCRIPTION OF DRAWINGS

[0017] The drawings accompanying the specification of the present application form a part thereof, serve to provide further understanding of the present application, and together with the specification explain the exemplary embodiments of the present application, and do not constitute an improper limitation on the present application. In the drawings:

[0018] Figure 1 A schematic diagram of an electrode structure of a solar cell according to an embodiment of the present application is shown;

[0019] Figure 2 A connection diagram of a first part and a second part of an electrode structure according to an embodiment of the present application is shown;

[0020] Figure 3 A cross-sectional structure schematic diagram of a solar cell according to an embodiment of the present application is shown.

[0021] Among them, the above drawings include the following reference signs:

[0022] 10, first grid line; 20, first connection point; 30, second grid line; 40, second connection point; 50, substrate; 60, tunneling layer; 70, doped layer; 80, passivation film; 90, insulating dielectric layer; 201, first conductive part; 401, second conductive part; 100, first part; 200, second part. DETAILED DESCRIPTION

[0023] It should be noted that the embodiments and features of the present application can be combined if there is no conflict. The present application will be described in detail below with reference to the accompanying drawings and embodiments.

[0024] In order to enable persons skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the accompanying drawings and embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all. Based on the embodiments of the present application, all other embodiments obtained by persons skilled in the art without creative labor should fall within the scope of protection of the present application.

[0025] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a series of steps or units does not necessarily limit to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0026] As mentioned in the background, since the IBC cell belongs to a back junction cell, in order to minimize the recombination of photo-generated carriers before reaching the back p-n junction, a higher minority carrier diffusion length is required, so the minority carrier lifetime of the substrate material is higher. Secondly, the IBC cell has a higher passivation requirement for the front surface, and the photo-generated carriers need to reach the back p-n junction area as much as possible, so as to improve the conversion efficiency of the cell. Therefore, the current IBC cell is one of the most complex processes and the most difficult structure design among commercial crystalline silicon cells, and still needs to be improved in terms of improving the conversion efficiency of the cell. In order to solve the problem of low photoelectric conversion efficiency of the current solar cell, the present application proposes an electrode structure of a solar cell, a manufacturing method of the electrode structure of the solar cell, and a solar cell.

[0027] According to one aspect of the present application, an electrode structure of a solar cell is provided, as shown in Figure 1As shown, the electrode structure is composed of a plurality of sub-grids, and the plurality of sub-grids comprises: a plurality of first grid lines 10, the plurality of first grid lines 10 intersect with each other to form a plurality of regular polygons, each of the regular polygons has an incenter, and the vertex of each of the regular polygons is a first connection point 20 of at least two of the first grid lines 10, and any two of the first grid lines 10 having the same first connection point 20 in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°; a plurality of second grid lines 30, any two of the second grid lines 30 have a second connection point 40, and the projection of each of the second connection points 40 in the regular polygon overlaps with the incenter, and the first grid lines 10 and the second grid lines 30 are electrically insulated, wherein the plurality of first grid lines 10 are arranged on one side of the plurality of second grid lines 30, and in the case that the first grid lines 10 are positive grid lines, the second grid lines 30 are negative grid lines, and in the case that the first grid lines 10 are negative grid lines, the second grid lines 30 are positive grid lines.

[0028] Specifically, the plurality of first grid lines 10 can intersect with each other to form a regular polygon, so that the length of each of the first grid lines 10 in the electrode structure is equal, and since the regular polygon has an inscribed circle, the plurality of regular polygons formed by the plurality of first grid lines 10 all have an incenter, wherein the incenter is the center of the inscribed circle of the regular polygon. For example, since the fixed point of the regular polygon is the first connection point 20 of at least two of the first grid lines 10, and any two of the first grid lines 10 having the same first connection point 20 in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°, so that the regular polygon can be a regular triangle, a regular pentagon, a regular hexagon, a regular heptagon, a regular octagon, and the like, and a person skilled in the art can reasonably select the number of sides of the regular polygon according to actual needs.

[0029] Specifically, since any two of the second grid lines 30 have a second connection point 40, and the projection of each of the second connection points 40 in the regular polygon formed by the plurality of first grid lines 10 overlaps with the incenter, so that in the plurality of second connection points 40, any two of the second connection points 40 overlapping with the incenter of any two adjacent regular polygons are the two end points of any one of the second grid lines 30, and similarly, the plurality of second grid lines 30 intersect with each other to form a plurality of regular polygons. It is worth noting that when any two regular polygons share a side, the two regular polygons can be considered as adjacent regular polygons.

[0030] In addition, since the plurality of first gate lines 10 are positive gate lines (negative gate lines) and the plurality of second gate lines 30 are negative gate lines (positive gate lines), and the plurality of first gate lines 10 are arranged on one side of the plurality of second gate lines 30, and any one of the first gate lines 10 and any one of the second gate lines 30 are electrically insulated, the electrode structure can be applied to a back junction solar cell in which the positive electrode and the negative electrode are both located on the back of the back junction solar cell. It can be understood that, in the case that the first gate line 10 described above can be a positive gate line, the first gate line 10 can serve as the positive electrode of the back junction solar cell, and the second gate line 30 described above can serve as the negative electrode of the back junction solar cell; in the case that the first gate line 10 described above is a negative gate line, the first gate line 10 can serve as the negative electrode of the back junction solar cell, and the second gate line 30 described above can serve as the positive electrode of the back junction solar cell.

[0031] In the above embodiments, the electrode structure can be composed of a plurality of sub-gates, and the plurality of sub-gates include the plurality of first gate lines 10 and the plurality of second gate lines 30. The plurality of first gate lines 10 intersect with each other to form a plurality of regular polygons, and each of the regular polygons has at least two first connection points 20 of the first gate lines 10 as vertices. Any two of the first gate lines 10 having the same first connection point 20 in the regular polygon have a first included angle, and the first included angle is greater than 0° and less than 180°. Any two of the second gate lines 30 have a second connection point 40. Since the plurality of first gate lines 10 intersect with each other to form a plurality of regular polygons, each regular polygon has a center, and by making the projection of each second connection point 40 in the regular polygon overlap with the center, the distance from each second connection point 40 to the first gate lines 10 is equal. Therefore, when the solar cell with the electrode structure is subjected to an electric field, the carriers collected at each second connection point 40 can be collected by the first gate lines 10 in the shortest path, and similarly, the carriers collected at each first connection point 20 can be collected by the second gate lines 30 in the shortest path. Therefore, the distribution characteristics of the electric field in space are fully utilized, the separation ability of the photo-generated carrier pairs is improved, the probability of carrier recombination is lower, and thus the photoelectric conversion effect of the solar cell is improved.

[0032] In some optional embodiments, as Figure 1As shown, the electrode structure includes a first part 100 and a second part 200 electrically connected, the first part 100 includes a plurality of first gate lines 10 and a plurality of second gate lines 30, the second part 200 includes a plurality of first gate lines 10 and a plurality of second gate lines 30, wherein, in the case that the first gate lines 10 of the first part 100 are the positive gate lines, the first gate lines 10 of the second part 200 are the negative gate lines, and the first gate lines 10 of the first part 100 and the second gate lines 30 of the second part 200 are electrically connected, the second gate lines 30 of the first part 100 and the first gate lines 10 of the second part 200 are electrically connected, as shown in FIG. 1. Figure 2 As shown, in the case that the first gate lines 10 of the first part 100 are the negative gate lines, the first gate lines 10 of the second part 200 are the positive gate lines, and the first gate lines 10 of the first part 100 and the second gate lines 30 of the second part 200 are electrically connected, the second gate lines 30 of the first part 100 and the first gate lines 10 of the second part 200 are electrically connected, as shown in FIG. 2. Figure 2 As shown.

[0033] Specifically, since there is only one first second gate line 30 between two second connection points 40 overlapping with the incenter of two adjacent regular polygons, the number of second gate lines 30 is much less than the number of first gate lines 10, in order to make the number of first gate lines 10 and second gate lines 30 close to each other, the electrode structure in the embodiment includes a first part 100 and a second part 200.

[0034] The first part 100 can include a plurality of first gate lines 10 and a plurality of second gate lines 30, and the plurality of first gate lines 10 in the first part 100 intersect with each other to form a plurality of regular polygons, each regular polygon has an incenter, and the vertices of each regular polygon are first connection points 20 of at least two first gate lines 10, and any two first gate lines 10 having the same first connection point 20 in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°; the first part 100 can also include a plurality of second gate lines 30, any two of the second gate lines 30 have a second connection point 40, the projection of each second connection point 40 in the regular polygon overlaps with the incenter, and the first gate lines 10 and the second gate lines 30 are electrically insulated, wherein the plurality of first gate lines 10 are arranged on one side of the plurality of second gate lines 30, and in the case that the first gate lines 10 are positive gate lines, the second gate lines 30 are negative gate lines, and in the case that the first gate lines 10 are negative gate lines, the second gate lines 30 are positive gate lines.

[0035] The second part 200 can include a plurality of first gate lines 10 and a plurality of second gate lines 30, and the plurality of first gate lines 10 in the second part 200 intersect with each other to form a plurality of regular polygons, each of which has a center, and the vertices of each regular polygon are first connection points 20 of at least two first gate lines 10, and any two first gate lines 10 having the same first connection point 20 in the regular polygon have a first included angle, which is greater than 0° and less than 180°. The second part 200 can also include a plurality of second gate lines 30, and any two of the second gate lines 30 have a second connection point 40, and the projection of each second connection point 40 in the regular polygon overlaps with the center. The first gate line 10 and the second gate line 30 are electrically insulated, wherein the plurality of first gate lines 10 are arranged on one side of the plurality of second gate lines 30, and in the case that the first gate line 10 is a negative gate line, the second gate line 30 is a positive gate line, and in the case that the first gate line 10 is a positive gate line, the second gate line 30 is a negative gate line.

[0036] It should be noted that in the case that the first gate line 10 of the first part 100 in the embodiment is a positive gate line, the first gate line 10 of the second part 200 in the embodiment is a negative gate line, and accordingly, at this time, the second gate line 30 of the first part 100 is a negative gate line, and the second gate line 30 of the second part 200 is a positive gate line; in the case that the first gate line 10 of the first part 100 in the embodiment is a negative gate line, the first gate line 10 of the second part 200 in the embodiment is a positive gate line, and accordingly, at this time, the second gate line 30 of the first part 100 is a positive gate line, and the second gate line 30 of the second part 200 is a negative gate line.

[0037] In some optional embodiments, the plurality of regular polygons have the same shape.

[0038] Specifically, the plurality of first gate lines 10 intersect with each other to form a plurality of regular polygons, and the plurality of regular polygons have the same shape. In the above embodiment, by arranging the plurality of regular polygons to have the same shape, the lengths of any two first gate lines 10 are equal, and the lengths of any two second gate lines 30 are also equal, so that the current arrangement inside the battery is more orderly, which can enhance the light absorption capacity of the surface of the battery, and further improve the photoelectric conversion efficiency of the battery.

[0039] In some optional embodiments, the regular polygon is a regular hexagon.

[0040] Specifically, the plurality of first gate lines 10 intersect with each other to form a plurality of regular polygons, and each of the regular polygons is a regular hexagon. Since the distance between each second connection point 40 and each first connection point 20 of the corresponding regular hexagon is equal, and any two of the plurality of regular hexagons are adjacent, the collection of carriers can be more efficient.

[0041] In some optional embodiments, the electrode structure further comprises an insulating medium layer between the plurality of first gate lines 10 and the plurality of second gate lines 30, and the insulating medium layer is used to electrically insulate the first gate lines 10 and the second gate lines 30.

[0042] In some optional embodiments, since the first gate line 10 is a positive gate line and the second gate line 30 is a negative gate line, in order to prevent the first gate line 10 and the second gate line 30 from being electrically connected, an insulating medium layer is arranged between the first gate line 10 and the second gate line 30, so that the insulating medium layer can be used to isolate the first gate line 10 and the second gate line 30, thereby avoiding any one of the first gate lines 10 and any one of the second gate lines 30 from being electrically connected.

[0043] In some optional embodiments, the electrode structure further comprises a first conductive part connected to the first connection point, and the first conductive part has a first extension direction perpendicular to any one of the first gate lines 10; and a second conductive part connected to the second connection point, and the second conductive part has the same extension direction as the first conductive part.

[0044] In the above embodiments, in order to make the first gate line 10 in the electrode structure used to collect the first carrier and the second gate line 30 used to collect the second carrier, a first conductive part having a first extension direction is connected at the first connection point of the first gate line 10, so that the first gate line 10 guides and collects the first carrier through the first conductive part. Similarly, a second conductive part also having the first extension direction is connected at the second connection point of the second gate line 30, so that the second gate line 30 guides and collects the second carrier through the second conductive part. When the first carrier is a hole, the second carrier is an electron, and vice versa.

[0045] In some optional embodiments, since the first conductive part usually carries a larger current, it needs to have a larger conductive capacity. The first conductive part has a first length in a second extension direction, the second conductive part has a second length in the second extension direction, the first length is greater than the second length, and the second extension direction is perpendicular to the first extension direction.

[0046] According to another aspect of the present application, the applicant of the present application also provides a method for manufacturing an electrode structure of a solar cell, the electrode structure being composed of a plurality of sub-grids, the method comprising: providing a semiconductor substrate, the semiconductor substrate having a first surface; forming a plurality of first grid lines on the first surface, the plurality of first grid lines intersecting with each other to enclose a plurality of regular polygons, each of the regular polygons having an incenter, vertices of each of the regular polygons being first connection points of at least two of the first grid lines, and any two of the first grid lines having a same first connection point in the regular polygon having a first included angle, the first included angle being greater than 0° and less than 180°; and forming a plurality of second grid lines on a side of the first grid lines away from the first surface, any two of the second grid lines having a second connection point, a projection of each of the second connection points in the regular polygon overlapping with the incenter, the first grid lines and the second grid lines being electrically insulated, wherein the plurality of first grid lines are disposed on a side of the plurality of second grid lines, and in a case where the first grid lines are positive grid lines, the second grid lines are negative grid lines, and in a case where the first grid lines are negative grid lines, the second grid lines are positive grid lines.

[0047] Specifically, a first printing plate can be disposed on the first surface of the semiconductor substrate, the first printing plate having a plurality of first hollow regions for forming the plurality of first grid lines;

[0048] A first conductive paste is coated on the first printing plate to form the plurality of first grid lines in the plurality of first hollow regions, wherein the plurality of first grid lines intersect with each other to enclose a plurality of regular polygons, each of the regular polygons having an incenter, vertices of each of the regular polygons being first connection points of at least two of the first grid lines, and any two of the first grid lines having a same first connection point in the regular polygon having a first included angle, the first included angle being greater than 0° and less than 180°;

[0049] A second printing plate is disposed on a side of the first grid lines away from the first surface, the second printing plate having a plurality of second hollow regions for forming the plurality of second grid lines;

[0050] A second conductive paste is applied to the second printing plate to form multiple first grid lines in multiple second cutout areas. Any two second grid lines have a second connection point. The projection of each second connection point in the regular polygon overlaps with the center. The first grid lines and the second grid lines are electrically insulated. The multiple first grid lines are disposed on one side of the multiple second grid lines. When the first grid line is a positive grid line, the second grid line is a negative grid line, and when the first grid line is a negative grid line, the second grid line is a positive grid line.

[0051] According to another aspect of the present invention, the applicant of this application also provides a solar cell, such as... Figure 3 As shown, the solar cell includes: a semiconductor substrate, the semiconductor substrate including a substrate 50 and a doped layer 70 stacked thereon, wherein the doping types of the doped layer 70 and the substrate 50 are opposite to form a PN junction; an electrode structure, the electrode structure being located on the side of the doped layer 70 away from the substrate 50, and a first gate line 10 in the electrode structure being in contact with the substrate 50, and a second gate line 30 in the electrode structure being in contact with the doped layer 70.

[0052] Specifically, the electrode structure of the solar cell consists of multiple sub-grids, each sub-grid including multiple first grid lines 10 and multiple second grid lines 30. The multiple first grid lines 10 intersect each other to form multiple regular polygons, each regular polygon having an incenter. The vertices of each regular polygon are first connection points of at least two of the first grid lines 10. Any two first grid lines 10 with the same first connection point in the regular polygon have a first included angle greater than 0° and less than 180°. Any two second grid lines 30 have a second connection point, and the projection of each second connection point in the regular polygon overlaps with the incenter. The first grid lines 10 and the second grid lines 30 are electrically insulated. The multiple first grid lines 10 are disposed on one side of the multiple second grid lines 30. When the first grid line 10 is a positive grid line, the second grid line 30 is a negative grid line; when the first grid line 10 is a negative grid line, the second grid line 30 is a positive grid line.

[0053] In the above embodiment, the first gate line 10 in the electrode structure is arranged in contact with the substrate 50, the second gate line 30 is arranged in contact with the doped layer 70, and since the substrate 50 and the doped layer 70 are of opposite doping types, the first carrier can be collected through the first gate line 10, and the second carrier can be collected through the second gate line 30, where the first carrier is a hole and the second carrier is an electron, or the first carrier is an electron and the second carrier is a hole. Therefore, the solar cell can make full use of the distribution characteristics of the electric field in space, improve the separation ability of the photo-generated carrier pairs, and thus reduce the recombination probability of the carriers, so as to improve the photoelectric conversion ability of the solar cell.

[0054] In some optional embodiments, the substrate 50 can include a first silicon wafer and a second silicon wafer arranged adjacently, and the first silicon wafer and the second silicon wafer are of opposite doping types; the doped layer 70 includes a first doped layer and a second doped layer, the first doped layer is arranged in contact with the first silicon wafer, the second doped layer is arranged in contact with the second silicon wafer, and the first doped layer and the first silicon wafer are of opposite doping types, and the second doped layer and the second silicon wafer are of opposite doping types; the electrode structure includes a first part and a second part, the first part includes a plurality of first gate lines 10 and a plurality of second gate lines 30, and the second part includes a plurality of first gate lines 10 and a plurality of second gate lines 30, where in the case that the first gate line 10 in the first part is the positive gate line, the first gate line 10 in the second part is the negative gate line, and in the case that the first gate line 10 in the first part is the negative gate line, the first gate line 10 in the second part is the positive gate line.

[0055] Specifically, the first silicon wafer can be a P-type single crystal silicon, the second silicon wafer can be an N-type single crystal silicon, the first doped layer can be an N-type phosphorus-doped polycrystalline silicon, the second doped layer can be a P-type boron-doped polycrystalline silicon, the first part of the electrode structure is located on the side of the N-type phosphorus-doped polycrystalline silicon away from the P-type single crystal silicon, and the second part of the electrode structure is located on the side of the P-type boron-doped polycrystalline silicon away from the N-type single crystal silicon.

[0056] The first part includes a plurality of first gate lines 10 and a plurality of second gate lines 30, and the plurality of first gate lines 10 of the first part intersect with each other to form a plurality of regular polygons, each of the regular polygons has a center, the vertices of each of the regular polygons are first connection points of at least two of the first gate lines 10, and any two of the first gate lines 10 having the same first connection point in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°, any two of the second gate lines 30 have a second connection point, the projection of each of the second connection points in the regular polygon overlaps with the center, and the first gate lines 10 and the second gate lines 30 are electrically insulated, wherein the plurality of first gate lines 10 are arranged on one side of the plurality of second gate lines 30; the second part includes a plurality of first gate lines 10 and a plurality of second gate lines 30, and the plurality of first gate lines 10 of the second part intersect with each other to form a plurality of regular polygons, each of the regular polygons has a center, the vertices of each of the regular polygons are first connection points of at least two of the first gate lines 10, and any two of the first gate lines 10 having the same first connection point in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°, any two of the second gate lines 30 have a second connection point, the projection of each of the second connection points in the regular polygon overlaps with the center, and the first gate lines 10 and the second gate lines 30 are electrically insulated, wherein the plurality of first gate lines 10 are arranged on one side of the plurality of second gate lines 30.

[0057] Further, in the case that the first gate lines 10 in the first part are positive gate lines, the second gate lines 30 in the first part are negative gate lines, in the case that the first gate lines 10 in the first part are negative gate lines, the second gate lines 30 in the first part are positive gate lines, and in the case that the first gate lines 10 in the first part are positive gate lines, the first gate lines 10 in the second part are negative gate lines, in the case that the first gate lines 10 in the first part are negative gate lines, the first gate lines 10 in the second part are positive gate lines.

[0058] In some optional embodiments, as shown in FIG. 1A, Figure 3 The solar cell can further include a tunneling layer 60, which can include a first tunneling layer and a second tunneling layer, wherein the first tunneling layer is located between the P-type single crystal silicon and the N-type phosphorus-doped polycrystalline silicon, and the second tunneling layer is located between the N-type single crystal silicon and the P-type boron-doped polycrystalline silicon. Further, as shown in FIG. 1A, Figure 3As shown, the solar cell can further include a passivation film 80, which can include a first passivation film and a second passivation film. The first passivation film is located on the side of the N-type phosphorus-doped polysilicon away from the first tunneling layer, and the second passivation film is located on the side of the P-type boron-doped polysilicon away from the second tunneling layer. The electrode structure further includes a first conductive portion 201 and a second conductive portion 401. The first conductive portion 201 is connected to the first connection point, and the first conductive portion 201 in the first portion penetrates the first passivation film, the N-type phosphorus-doped polysilicon, and the first tunneling layer to the P-type monocrystalline silicon. The second conductive portion 401 in the first portion penetrates the first passivation film to the N-type phosphorus-doped polysilicon. The first conductive portion 201 in the second portion penetrates the second passivation film, the P-type phosphorus-doped polysilicon, and the first tunneling layer to the N-type monocrystalline silicon. The second conductive portion 401 in the second portion penetrates the second passivation film to the P-type phosphorus-doped polysilicon.

[0059] Further, the solar cell can further include a front passivation film, an anti-reflection film, and a low-transmission film. The front passivation film is located on the side of the monocrystalline silicon away from the tunneling layer 60. The anti-reflection film is located on the side of the front passivation film away from the monocrystalline silicon. The low-transmission film is located on the side of the anti-reflection film away from the front passivation film. Illustratively, the steps of forming the solar cell can include first cleaning the P-type monocrystalline silicon and the N-type monocrystalline silicon, and forming the first tunneling layer and the second tunneling layer, so that the first tunneling layer covers the side surface of the P-type monocrystalline silicon, and the second tunneling layer covers the side surface of the N-type monocrystalline silicon. Then, polysilicon is deposited on the side of the first tunneling layer away from the P-type monocrystalline silicon and on the side of the second tunneling layer away from the N-type monocrystalline silicon by chemical vapor deposition. Then, a first mask is provided to cover the polysilicon on the N-type monocrystalline silicon, and boron is doped in the polysilicon on the P-type monocrystalline silicon to form N-type boron-doped polysilicon. Then, a second mask is provided to cover the polysilicon on the P-type monocrystalline silicon, and phosphorus is doped in the polysilicon on the N-type monocrystalline silicon to form P-type phosphorus-doped polysilicon.

[0060] Further, the P-type phosphorus-doped polysilicon and the N-type boron-doped polysilicon can be respectively subjected to laser drilling by using a large light spot, then the other side of the P-type monocrystalline silicon and the N-type monocrystalline silicon is subjected to front etching, and then polishing and texturing are performed, and then a front passivation film, an anti-reflection film and a transmittance-reducing film are sequentially formed, and optionally, a first passivation film can be formed on the side of the P-type phosphorus-doped polysilicon away from the first tunneling layer, and a second passivation film can be formed on the side of the N-type boron-doped polysilicon away from the second tunneling layer, and then sintering is performed. Further, in order to form the electrode structure, the P-type phosphorus-doped polysilicon and the N-type boron-doped polysilicon are subjected to laser drilling again to form a first via hole penetrating through the first passivation film, the P-type phosphorus-doped polysilicon and the first tunneling layer to the N-type monocrystalline silicon, or a first via hole penetrating through the second passivation film, the N-type phosphorus-doped polysilicon and the second tunneling layer to the P-type monocrystalline silicon, and a second via hole penetrating through the first passivation film to the P-type phosphorus-doped polysilicon, or a second via hole penetrating through the second passivation film to the N-type boron-doped polysilicon, and then a first gate line 10 is formed by screen printing, so that a plurality of first gate lines 10 intersect with each other to form a plurality of regular polygons, each of the regular polygons has a center, and the vertices of each of the regular polygons are first connection points of at least two first gate lines 10, and any two first gate lines 10 having the same first connection point in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°, then in order to electrically insulate the first gate line 10 and the second gate line 30, an insulating resin is formed by screen printing to form an insulating medium layer 90, and then a second gate line 30 is formed by screen printing, any two second gate lines 30 have a second connection point, the projection of each second connection point in the regular polygon overlaps with the center, and the first gate line 10 and the second gate line 30 are electrically insulated, wherein the plurality of first gate lines 10 are arranged on one side of the plurality of second gate lines 30, and in the case that the first gate line 10 is a positive gate line, the second gate line 30 is a negative gate line, and in the case that the first gate line 10 is a negative gate line, the second gate line 30 is a positive gate line.

[0061] From the above description, it can be seen that the above-mentioned embodiments of the present application achieve the following technical effects:

[0062] Since the electrode structure can be composed of a plurality of sub-grids, and the plurality of sub-grids include a plurality of first grid lines and a plurality of second grid lines, wherein the plurality of first grid lines intersect with each other to form a plurality of regular polygons, the vertexes of each of the regular polygons are first connection points of at least two of the first grid lines, and any two of the first grid lines having the same first connection point in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°; any two of the second grid lines have a second connection point, since the plurality of first grid lines intersect with each other to form a plurality of regular polygons, each of the regular polygons has a center, and by making the projection of each of the second connection points in the regular polygon overlap with the center, the purpose of equalizing the distance from each of the second connection points to the first grid line is achieved, so that when the solar cell with the electrode structure is subjected to an electric field, the carriers collected at each of the second connection points can be collected by the first grid line in the shortest path, and similarly, the carriers collected at each of the first connection points can be collected by the second grid line in the shortest path, so that the distribution characteristics of the electric field in space are fully utilized, the separation ability of the photo-generated carrier pairs is improved, the probability of carrier recombination is lower, and thus the photoelectric conversion effect of the solar cell can be improved.

[0063] The above only describes the preferred embodiments of the present application and is not used to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. An electrode structure of a solar cell, the electrode structure being composed of a plurality of sub- busbars, characterized by, The plurality of auxiliary grids comprises: a plurality of first grid lines, the plurality of first grid lines intersecting with each other to form a plurality of regular polygons, each of the regular polygons has a center, and a vertex of each of the regular polygons is a first connection point of at least two of the first grid lines, and any two of the first grid lines having the same first connection point in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°; a plurality of second grid lines, any two of the second grid lines have a second connection point, a projection of each of the second connection points in the regular polygon overlaps with the center, and the first grid lines and the second grid lines are electrically insulated, wherein the plurality of first grid lines is arranged on one side of the plurality of second grid lines, and in a case where the first grid line is a positive grid line, the second grid line is a negative grid line, and in a case where the first grid line is a negative grid line, the second grid line is a positive grid line.

2. The electrode structure of claim 1, wherein The electrode structure comprises a first part and a second part electrically connected, the first part comprises the plurality of first grid lines and the plurality of second grid lines, and the second part comprises the plurality of first grid lines and the plurality of second grid lines, wherein in a case where the first grid line of the first part is the positive grid line, the first grid line of the second part is the negative grid line, and in a case where the first grid line of the first part is the negative grid line, the first grid line of the second part is the positive grid line.

3. The electrode structure of claim 1, wherein The plurality of regular polygons have the same shape.

4. The electrode structure of claim 1, wherein The regular polygon is a regular hexagon.

5. The electrode structure according to any one of claims 1 to 4, characterized in that The electrode structure further comprises: an insulating medium layer between the plurality of first grid lines and the plurality of second grid lines, the insulating medium layer is used to electrically insulate the first grid lines and the second grid lines.

6. The electrode structure according to any one of claims 1 to 4, characterized in that The electrode structure further comprises: a first conductive part connected with the first connection point, and the first conductive part has a first extension direction perpendicular to any one of the first grid lines; a second conductive part connected with the second connection point, and the second conductive part has the same extension direction as the first conductive part.

7. The electrode structure of claim 6, wherein The first conductive part has a first length in a second extension direction, the second conductive part has a second length in the second extension direction, the first length is greater than the second length, and the second extension direction is perpendicular to the first extension direction.

8. A method for manufacturing an electrode structure of a solar cell according to any one of claims 1 to 7, the electrode structure being composed of a plurality of sub- grids, characterized by, The method for forming the plurality of auxiliary grids comprises: providing a semiconductor substrate having a first surface; forming the plurality of first grid lines on the first surface, the plurality of first grid lines intersecting with each other to form a plurality of regular polygons, each of the regular polygons has a center, and a vertex of each of the regular polygons is a first connection point of at least two of the first grid lines, and any two of the first grid lines having the same first connection point in the regular polygon have a first included angle, the first included angle is greater than 0° and less than 180°; The plurality of second grid lines are formed on the side of the first grid lines away from the first surface, and any two of the second grid lines have a second connecting point, a projection of each of the second connecting points in the regular polygon overlaps with the incenter, and the first grid lines and the second grid lines are electrically insulated, wherein the plurality of first grid lines are arranged on one side of the plurality of second grid lines, and in the case that the first grid lines are positive grid lines, the second grid lines are negative grid lines, and in the case that the first grid lines are negative grid lines, the second grid lines are positive grid lines.

9. A solar cell, characterized by Comprise: a semiconductor substrate comprising a substrate and a doped layer arranged in layers, wherein the doped layer and the substrate are of opposite doping types to form a PN junction; the electrode structure according to any one of claims 1 to 7, the electrode structure being located on the side of the doped layer away from the substrate, and a first grid line in the electrode structure being arranged in contact with the substrate, and a second grid line in the electrode structure being arranged in contact with the doped layer.

10. The solar cell according to claim 9, wherein the substrate comprises a first silicon wafer and a second silicon wafer arranged in abutment, and the first silicon wafer and the second silicon wafer are of opposite doping types; the doped layer comprises a first doped layer and a second doped layer, the first doped layer being arranged in contact with the first silicon wafer, and the second doped layer being arranged in contact with the second silicon wafer, and the first doped layer and the first silicon wafer are of opposite doping types, and the second doped layer and the second silicon wafer are of opposite doping types; the electrode structure comprises a first part and a second part, the first part comprising a plurality of the first grid lines and a plurality of the second grid lines, and the second part comprising a plurality of the first grid lines and a plurality of the second grid lines, wherein in the case that the first grid lines in the first part are the positive grid lines, the first grid lines in the second part are the negative grid lines, and in the case that the first grid lines in the first part are the negative grid lines, the first grid lines in the second part are the positive grid lines.

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