Method and device for quickly updating array beam direction

Abstract

The invention discloses a method and device for rapidly updating array beam pointing, and the method comprises the steps: obtaining one or more groups of beam pointing data packets and a CPI pulse trigger signal, and writing the one or more groups of beam pointing data packets into an RAM storage area based on the CPI pulse trigger signal; obtaining a PRI pulse trigger signal, and based on the PRI pulse trigger signal, each group of beam pointing major cycle configuration times and each group of beam pointing minor cycle configuration times, sequentially reading the written beam pointing data packets from the RAM storage area according to a preset configuration parameter data packet, and the amplitude and the phase of the TR channel corresponding to the array plane are synchronously updated based on the beam pointing data packet so as to realize rapid updating of the beam pointing. According to the method and the device for quickly updating the array beam pointing, a traditional single-group beam pointing real-time updating switching mode can be considered at the same time under the condition that the hardware cost is not increased. And the LVDS wave control code transmission time with relatively long phase distribution time is saved.

Description

Technical Field

[0001] The present invention relates to the field of electronic information technology, and in particular to a method and a device for quickly updating the direction of a front beam. Background Art

[0002] With the rapid development of radar electronic information technology, digital active array systems have been widely used in the engineering field with their flexible digital beam space vector synthesis technology. The active array system is composed of different numbers of TR transceiver channels according to application requirements. The total number of TR transceiver channels ranges from dozens to hundreds, hundreds to thousands, or even tens of thousands. The amplitude and phase of each TR channel's transmission or reception can be controlled individually. All TR channels together build a complete RF antenna active array. By controlling the amplitude and phase parameters of each transceiver channel, the system can achieve precise control of the microwave system's active array transmission beam pointing and receiving DBF synthesis, thereby achieving the radar system's electronic beam scanning mode with different directions such as horizontal or pitch.

[0003] The phase time of the wave control parameters of a group of 64 TR channel RF front-ends includes from the LVDS interface to the SPI interface. For a single group of LVDS data lines, it is 60 to 70uS. For four groups of LVDS data lines transmitting data simultaneously, the phase time is about 30 to 35uS. If the system requires the application of a single group of LVDS data interfaces and a fast beam pointing update with a phase time of less than 20uS, the traditional design method is difficult to meet the demand for a phase time of less than 20uS. The research content and goal of this invention is to solve this technical problem. Summary of the invention

[0004] In order to solve the technical problems existing in the background technology, the present invention proposes a method and device for quickly updating the front beam pointing.

[0005] The present invention provides a method for quickly updating the beam pointing of a front surface, comprising:

[0006] Acquire one or more groups of beam pointing data packets and a CPI pulse trigger signal, and write one or more groups of beam pointing data packets into a RAM storage area based on the CPI pulse trigger signal;

[0007] Obtain the PRI pulse trigger signal, and based on the PRI pulse trigger signal, the number of large-cycle configurations of each group of beam pointing, and the number of small-cycle configurations of each group of beam pointing, read the written beam pointing data packets from the RAM storage area in sequence according to the preset configuration parameter data packets, and synchronously update the amplitude and phase of the TR channel corresponding to the array based on the beam pointing data packets to achieve rapid update of the beam pointing.

[0008] Preferably, the formation process of the configuration parameter data packet is as follows:

[0009] Obtain the total number of beams that need to be configured, the beam working order, the specific beam control code corresponding to each group of beams, the number of cycles of repeated configuration of each group of beams, and the number of cycles of repeated configuration of all beam groupings, so as to form a configuration parameter data packet corresponding to each beam pointing.

[0010] Preferably, the RAM storage area includes a RAMA storage area and a RAMB storage area; and writing one or more groups of beam pointing data packets into the RAM storage area based on the CPI pulse trigger signal specifically includes:

[0011] When powered on for the first time, the RAMA storage area is in data writing state. The RAMA storage area starts to write one or more groups of beam pointing data packets to complete the writing of all grouped beam pointing data. After receiving the write end mark in the beam pointing data packet, it waits for the CPI pulse trigger;

[0012] When the CPI pulse trigger signal is received, the RAMA storage area switches from the data writing state to the data reading state, and the RAMB storage area is in the data writing state, waiting to receive the next one or more groups of beam pointing data packets.

[0013] Preferably, it also includes: when the RAMA storage area or the RAMB storage area is read with beam pointing data, the RAMB storage area or the RAMA storage area is simultaneously written with the next group or groups of beam pointing data packets.

[0014] Preferably, the step of sequentially reading the written beam pointing data packets from the RAM storage area according to the preset configuration parameter data packets specifically includes:

[0015] Based on the sequential triggering of the PRI pulse trigger signal, the reading of the written beam pointing data packet is gradually completed according to the beam control coding configured in the configuration parameter data packet and its corresponding large cycle number and small cycle number.

[0016] Preferably, the beam pointing data packet contains a header, a command parameter control word, amplitude and phase control parameters of all TR channels of the array, and a checksum; the command parameter control word includes the total number of beam pointing groups, the current transmission group sequence number of each beam pointing group, the end marker of all beam pointing transmissions, the number of small cycles of the currently numbered beam pointing, and the number of large cycles of all beam pointings.

[0017] Preferably, the synchronously updating the amplitude and phase of the TR channel corresponding to the array surface based on the beam pointing data packet specifically includes:

[0018] With the PRI pulse timing as the trigger condition, the relevant beam control codes are read in sequence according to the beam working order in the configuration parameter data packet, and the amplitude and phase of the TR channel corresponding to the array are synchronously updated according to the beam control codes to achieve rapid update of the beam pointing.

[0019] The present invention provides a device for quickly updating the beam pointing of a front surface, comprising:

[0020] A data processing module, used for acquiring one or more groups of beam pointing data packets and a CPI pulse trigger signal, and writing one or more groups of beam pointing data packets into a RAM storage area based on the CPI pulse trigger signal;

[0021] The update module is used to obtain the PRI pulse trigger signal, and based on the PRI pulse trigger signal, the number of large-cycle configurations of each group of beam pointing, and the number of small-cycle configurations of each group of beam pointing, read the written beam pointing data packets from the RAM storage area in sequence according to the preset configuration parameter data packets, and synchronously update the amplitude and phase of the TR channel corresponding to the array based on the beam pointing data packets to achieve rapid update of the beam pointing.

[0022] In the present invention, the proposed method and device for rapid updating of the array beam pointing, by setting multiple groups of wave control parameters and working timing requirements in advance, store these independent beam pointing parameters in advance in the internal storage area of ​​FPGA, use the PRI pulse timing as the trigger condition, read the relevant wave control parameters in quick sequence according to the configuration parameter requirements, and synchronously update the corresponding amplitude and phase parameters of the array TR channel. By arranging the phases in advance, the LVDS phase data transmission time is saved, and the rapid update of the beam pointing is achieved. Without increasing the hardware cost, the traditional single-group beam pointing real-time update switching mode can be taken into account at the same time, and the working mode of pre-storing multiple groups of wave control codes in advance and quickly retrieving the updated beam pointing can also be achieved. The transmission time of the LVDS wave control code with a long phase time is saved. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic diagram of the work flow structure of a method for quickly updating the front beam pointing proposed by the present invention;

[0024] Figure 2 A schematic diagram of the working sequence of a method for quickly updating the beam pointing of a front face proposed by the present invention;

[0025] Figure 3 A schematic diagram of specific contents of an LVDS data packet of a method for quickly updating the beam pointing of a front face proposed by the present invention;

[0026] Figure 4 A schematic diagram of a ping-pong operation of dual RAM data read and write in a method for rapid updating of the beam pointing of a front face proposed by the present invention;

[0027] Figure 5 This is a timing diagram of the SPI interface of a method for quickly updating the front beam pointing proposed by the present invention;

[0028] Figure 6 A schematic diagram of the device architecture of a device for rapidly updating the front beam pointing proposed by the present invention. DETAILED DESCRIPTION

[0029] Reference Figure 1-5 The present invention proposes a method for quickly updating the beam pointing of a front surface, comprising the following steps:

[0030] S1. Obtain one or more groups of beam pointing data packets and a CPI pulse trigger signal, and write one or more groups of beam pointing data packets into a RAM storage area based on the CPI pulse trigger signal.

[0031] In this embodiment, the RAM storage area includes a RAMA storage area and a RAMB storage area; writing one or more groups of beam pointing data packets into the RAM storage area based on the CPI pulse trigger signal specifically includes:

[0032] When powered on for the first time, the RAMA storage area is in data writing state. The RAMA storage area starts to write one or more groups of beam pointing data packets to complete the writing of all grouped beam pointing data. After receiving the write end mark in the beam pointing data packet, it waits for the CPI pulse trigger;

[0033] When the CPI pulse trigger signal is received, the RAMA storage area switches from the data writing state to the data reading state, and the RAMB storage area is in the data writing state, waiting to receive the next one or more groups of beam pointing data packets.

[0034] In this embodiment, when the RAMA storage area or the RAMB storage area is read with beam pointing data, the RAMB storage area or the RAMA storage area is simultaneously written with the next one or more groups of beam pointing data packets.

[0035] It should be noted that CPI (Coherent Processing Interval) represents the coherent processing interval, which is an important time parameter in the radar system. It is used to process the echo duration of the target of coherent processing. It involves the processing of multiple pulses and the accumulation of signals. PRI (Pulse Repetition Interval) represents the pulse repetition interval. PRI is usually related to CPI. It is used to ensure the stability of the phase relationship between multiple pulses and is the system's minimum operating cycle timing signal. Usually, a beam pointing time window will contain multiple sets of CPI timing cycles, and a CPI timing cycle will contain multiple sets of PRI timings. In the timing cycle of the same beam pointing, the corresponding wave control parameters of the TR channel of the array remain unchanged. In some cases, a CPI timing cycle may contain multiple sets of beam pointing, and each set of beam pointing corresponds to multiple sets of PRI timings. Similarly, the wave control parameters in these multiple sets of PRI timings remain unchanged within the beam time.

[0036] In this embodiment, the data read and write of the two memories RAMA and RAMB are switched in a ping-pong manner. The working diagram is shown in FIG. Figure 4 As shown, when the whole multiple groups of beam pointing coded data are written to RAMB, the previous multiple groups of beam pointing coded data written in RAMA are read and called. When all the data of RAMA are read and the number of large and small cycles are completed as required, RAMA switches to the write operation state; and the writing of all data groups of RAMB should have been completed before the reading of RAMA is completed. When RAMA switches to the write state, RAMB switches to the read state. The writing and reading roles of RAMA and RAMB are always interchanged, so it is a ping-pong operation of data reading and writing. This RAM data reading and writing operation can be performed simultaneously. When one RAM is reading data, another RAM can be written with data at the same time. After writing all data groups, the RAM waits for the CPI timing trigger to meet the conditions before reading data.

[0037] S2. Obtain the PRI pulse trigger signal, and based on the PRI pulse trigger signal, the number of large-cycle configurations of each group of beam pointing, and the number of small-cycle configurations of each group of beam pointing, read the written beam pointing data packets from the RAM storage area in sequence according to the preset configuration parameter data packets, and synchronously update the amplitude and phase of the TR channel corresponding to the array based on the beam pointing data packets to achieve rapid update of the beam pointing.

[0038] In this embodiment, the formation process of the configuration parameter data packet is as follows:

[0039] Obtain the total number of beams that need to be configured, the beam working order, the specific beam control code corresponding to each group of beams, the number of cycles of repeated configuration of each group of beams, and the number of cycles of repeated configuration of all beam groupings, so as to form a configuration parameter data packet corresponding to each beam pointing.

[0040] It should be noted that the number of cycles for each set of beam pointing reconfiguration can be called the number of "small cycles", and the number of cycles for all beam grouping reconfiguration can be called the number of "large cycles". The two are used to describe and define the timing relationship between beam pointing, CPI, and PRI. The cyclic process of completing all PRI timings within a CPI timing, or the cyclic process of completing all PRI timings by a group of beam pointing, can be defined as a small cycle; the process of all CPI timings or beam pointing groups (usually the number of all beam pointing groups does not exceed 16) completing a cyclic work in turn can be defined as a large cycle. The number of small cycles and large cycles can be set freely and flexibly, such as Figure 2 shown. Figure 2 (a) defines that in the normal mode, a group of BW (Bandwidth Direction) timings contains multiple CPI timings, and each CPI timing corresponds to a different number of PRI timings. Figure 2 (b) defines a fast update beam pointing working mode, in which a CPI timing contains multiple groups of BW (beam pointing), and each BW timing contains multiple PRI timings. Corresponding to the number of small and large cycles, different bit counters can be used to define different number of cycles according to design requirements. For example, a 16-bit counter can be defined to achieve a cycle count setting of 0 to 65535, which can meet most design requirements.

[0041] Therefore, in order to realize the nested inclusion relationship between beam pointing, CPI, and PRI to meet the specific applications in various product designs, we define CPI as a large cycle timing. A CPI timing can contain multiple groups of beam control pointing, and a beam pointing cycle can contain multiple PRI cycle timings. Multiple groups of beam pointing are calculated and prepared by the system in advance. All the beam pointing groups that have been set up correspond to their small cycle timings and work once to form a large cycle timing. After a large cycle ends, the next large cycle starts immediately. The repeated work of all large cycles constitutes a complete working cycle of multiple groups of beam pointing groups.

[0042] Figure 2 In (b), if the different beam pointing BWs contained in a CPI sequence have the same BW code value, the effect is equivalent to Figure 2(a). If the number of PRI small cycles is set to 1, the number of large cycles is also set to 1, and there is only one set of beam pointing BW, then the requirements are the same as those for traditional beam pointing switching. Therefore, in the embodiment of the present invention, by flexibly configuring parameters such as BW coding value, large and small cycles, the traditional beam pointing switching mode and the fast switching mode can be taken into account.

[0043] Under certain special application requirements, there will be a requirement for fast switching of beam pointing, that is, a set of beam pointing corresponds to only one PRI timing within a CPI cycle, and up to a dozen sets of beam pointing can be set. For the special case where a set of beam pointing control parameters corresponds to only one PRI, the small cycle setting value is 1.

[0044] Based on the system's known multiple groups of beam pointing control parameters that will be implemented in the future, as well as clear timing relationships between beam pointing grouping and its corresponding CPI and PRI, and clear large and small cycle times corresponding to each group of beam pointing, multiple groups of beam pointing data packets and corresponding large and small cycle times can be pre-stored in advance through the LVDS communication interface. The beam control circuit writes the multiple groups of beam pointing data packets and setting parameter caches received in sequence into the FPGA internal memory (DPRAM or FIFO), and then waits for the external input CPI and PRI trigger pulse signals to read the corresponding data parameters and update the beam pointing operation.

[0045] Specifically, according to the requirements of system beam grouping, pre-setting several to more than ten groups of beam pointing codes in one CPI timing cycle can meet the design requirements. A group of beam pointing codes corresponds to a group of beam control data parameters. A group of beam control parameters includes the beam control parameters of all TR channels corresponding to the RF basic module. The RF front-end basic module of the embodiment of the present invention corresponds to 64 TR channels, then a group of beam control data parameters includes 64 independent TR channel amplitude and phase parameters, and each channel amplitude and phase control parameter is uniformly allocated to the transmission data bit according to 32 bits.

[0046] The wave control coded data of the embodiment of the present invention is transmitted serially through the LVDS communication interface. The communication interface cannot select an optical module with a faster transmission speed for high-speed transmission through optical fiber. This is because the RF front-end module is limited by the small size, compact and integrated design. There are specific conditions for the size and height of the packaging of components. Selecting a small-size surface-mount packaged LVDS interface chip is a reasonable choice for the current design. The serial wave control data is transmitted in the underlying protocol encoded in 8b / 10b. The communication protocol at the software level must also be designed according to the internal agreement of the product design. The data frame structure of this communication protocol includes: data packet header, command parameter control word, independent amplitude and phase control words of all 64 TR channels (corresponding to a group of beam pointing), data packet end mark (data checksum), etc.

[0047] 8b / 10b encoding is a commonly used encoding method in high-speed serial communication. It was invented and applied by IBM in 1983. In the embodiment of the present invention, 8b / 10b encoding is implemented in the hardware programming design inside the FPGA. The serial data of 8b / 10b encoding is converted into 10 bits according to 8 bits per byte, and is sent in order from low to high bits. In the embodiment of the present invention, the working clock for receiving 8b / 10b encoded data is 180MHz, which can realize the correct analysis of 8b / 10b encoded data with a data rate of 60MHz. In FPGA programming, the working clock frequency of 8b / 10b encoding is three times the transmission rate.

[0048] In this embodiment, the LVDS serial interface only needs a single set of data lines to meet the design requirements, thereby reducing the complexity of the hardware interface. Serial data transmission uses 8b / 10b encoding, which can effectively improve the data transmission rate. Because its encoding technology is scientific, data transmission has strong anti-interference ability. In a complex environment with strong electromagnetic interference, for radar equipment, 8b / 10b encoding can significantly reduce the probability of data transmission errors while increasing the data transmission rate.

[0049] A prerequisite for implementing the present invention is that the system is aware of the beam pointing grouping work requirements that will be configured and implemented in the future, including the number of beam pointing groupings and the specific data parameters of each beam pointing grouping, the order in which the beam pointing groupings are configured in sequence, and the number of cycles (small number of cycles) of repeated configuration of each group of beam pointing and other parameter configurations, and should also include the number of cycles (large number of cycles) of repeated configuration of all beam groupings.

[0050] In this embodiment, the beam pointing data packets that have been written are read sequentially from the RAM storage area according to the preset configuration parameter data packets, specifically including:

[0051] Based on the sequential triggering of the PRI pulse trigger signal, the reading of the written beam pointing data packet is gradually completed according to the beam control coding configured in the configuration parameter data packet and its corresponding large cycle number and small cycle number.

[0052] In this embodiment, the beam pointing data packet includes a header, a command parameter control word, amplitude and phase control parameters of all TR channels of the array, and a checksum; the command parameter control word includes the total number of beam pointing groups, the current transmission group number of each beam pointing group, the end marker of all beam pointing transmissions, the number of small cycles of the currently numbered beam pointing, and the number of large cycles of all beam pointings.

[0053] In this embodiment, the amplitude and phase of the TR channel corresponding to the array surface are synchronously updated based on the beam pointing data packet, specifically including:

[0054] With the PRI pulse timing as the trigger condition, the relevant beam control codes are read in sequence according to the beam working order in the configuration parameter data packet, and the amplitude and phase of the TR channel corresponding to the array are synchronously updated according to the beam control codes to achieve rapid update of the beam pointing.

[0055] In this embodiment, since multiple groups of beam pointing codes are pre-stored as a whole and input into the RF front-end wave control circuit, each group of beam pointing codes needs to be independently transmitted in the format of an LVDS data packet. Each LVDS data packet includes the data packet header, command parameter control word, 64 TR channel amplitude and phase control parameters, check core (suffix), etc. Figure 3 The specific content of an LVDS data packet is shown in the figure. The number of such LVDS data packets is the same as the number of beam pointing groups. The command parameter control word can specifically define the total number of beam pointing groups, the current transmission group number of each beam pointing group, the end mark of all beam pointing transmissions, the number of small cycles required for the current numbered beam pointing to be called in a loop, and the number of large cycles required for the overall loop call of all beam pointing, such as Figure 3 The contents of the "command parameter control word" are included in the command parameter control word.

[0056] All the amplitude and phase control parameters of the 64 TR channels contained in all these beam pointing groups need to be pre-stored as a whole data in the RAM memory inside the FPGA of the RF front-end wave control circuit. The RAM memory to which the data cache is written for the first time when the circuit is powered on is defined as RAMA memory. RAMA stores multiple groups of beam pointing data parameters that will be configured and implemented in the future, as well as the order and size cycle times of each group of beam pointing. The extraction and update of data are synchronously controlled by the PRI timing trigger. After completing the overall data writing to the RAMA memory, wait for a CPI input pulse trigger signal, RAMA will switch from the data writing state to the data reading state, and another newly defined memory RAMB will serve as the next data storage waiting to be written. With the sequential triggering of the PRI pulse timing, the beam pointing coding groups configured in RAMA and their corresponding size cycles are gradually completed. During this time, the writing of the next overall multiple groups of beam pointing grouping wave control parameters to RAMB begins, and the process is the same as the previous writing process to RAMA. In the mode of fast updating of multiple beam pointing, the LVDS wave control code transmission time with a long phase-setting time is saved, and its effective phase-setting time is only the phase-setting time for the SPI interface of the multi-function amplitude and phase control chip, which can achieve the requirement of fast switching of beam pointing below 20uS.

[0057] Reference Figure 1-6 The present invention provides a device for quickly updating the beam pointing of a front surface, comprising:

[0058] A data processing module, used for acquiring one or more groups of beam pointing data packets and a CPI pulse trigger signal, and writing one or more groups of beam pointing data packets into a RAM storage area based on the CPI pulse trigger signal;

[0059] The update module is used to obtain the PRI pulse trigger signal, and based on the PRI pulse trigger signal, the number of large-cycle configurations of each group of beam pointing, and the number of small-cycle configurations of each group of beam pointing, read the written beam pointing data packets from the RAM storage area in sequence according to the preset configuration parameter data packets, and synchronously update the amplitude and phase of the TR channel corresponding to the array based on the beam pointing data packets to achieve rapid update of the beam pointing.

[0060] In the specific working process of the method and device for fast updating of the array beam pointing of this embodiment, by setting multiple groups of beam control parameters and working timing requirements in advance, these independent beam pointing parameters are stored in advance in the internal storage area of ​​FPGA, and the PRI pulse timing is used as the trigger condition. The relevant beam control parameters are read in sequence in a fast manner according to the configuration parameter requirements and the corresponding amplitude and phase parameters of the array TR channel are updated synchronously. By arranging the entire phase in advance, the LVDS phase data transmission time is saved, and the fast update of the beam pointing is achieved.

[0061] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for quickly updating a beam pointing direction, characterized in that: include: Acquire one or more groups of beam pointing data packets and a CPI pulse trigger signal, and write one or more groups of beam pointing data packets into a RAM storage area based on the CPI pulse trigger signal; Obtain the PRI pulse trigger signal, and based on the PRI pulse trigger signal, the number of large-cycle configurations of each group of beam pointing, and the number of small-cycle configurations of each group of beam pointing, read the written beam pointing data packets from the RAM storage area in sequence according to the preset configuration parameter data packets, and synchronously update the amplitude and phase of the TR channel corresponding to the array based on the beam pointing data packets to achieve rapid update of the beam pointing.

2. The method for rapidly updating the beam pointing direction of a front beam according to claim 1, characterized in that: The formation process of the configuration parameter data packet is as follows: Obtain the total number of beams that need to be configured, the beam working order, the specific beam control code corresponding to each group of beams, the number of cycles of repeated configuration of each group of beams, and the number of cycles of repeated configuration of all beam groupings, so as to form a configuration parameter data packet corresponding to each beam pointing.

3. The method for rapidly updating the beam pointing direction of a front beam according to claim 1, characterized in that: The RAM storage area includes a RAMA storage area and a RAMB storage area; The step of writing one or more groups of beam pointing data packets into a RAM storage area based on a CPI pulse trigger signal specifically includes: When powered on for the first time, the RAMA storage area is in data writing state. The RAMA storage area starts to write one or more groups of beam pointing data packets to complete the writing of all grouped beam pointing data. After receiving the write end mark in the beam pointing data packet, it waits for the CPI pulse trigger; When the CPI pulse trigger signal is received, the RAMA storage area switches from the data writing state to the data reading state, and the RAMB storage area is in the data writing state, waiting to receive the next one or more groups of beam pointing data packets.

4. The method for rapidly updating the beam pointing direction of a front beam according to claim 3, characterized in that: Also includes: When the RAMA storage area or the RAMB storage area is read with beam pointing data, the RAMB storage area or the RAMA storage area is simultaneously written with the next one or more groups of beam pointing data packets.

5. The method for rapidly updating the beam pointing direction of a front beam according to claim 2, characterized in that: The step of sequentially reading the written beam pointing data packets from the RAM storage area according to the preset configuration parameter data packets specifically includes: Based on the sequential triggering of the PRI pulse trigger signal, the reading of the written beam pointing data packet is gradually completed according to the beam control coding configured in the configuration parameter data packet and its corresponding large cycle number and small cycle number.

6. The method for rapidly updating the beam pointing direction of a front beam according to claim 1, characterized in that: The beam pointing data packet includes a header, a command parameter control word, amplitude and phase control parameters of all TR channels of the array, and a checksum; the command parameter control word includes the total number of beam pointing groups, the current transmission group sequence number of each beam pointing group, the end marker of all beam pointing transmissions, the number of small cycles of the currently numbered beam pointing, and the number of large cycles of all beam pointings.

7. The method for rapidly updating the beam pointing direction of a front beam according to claim 2, characterized in that: The synchronous updating of the amplitude and phase of the TR channel corresponding to the array surface based on the beam pointing data packet specifically includes: With the PRI pulse timing as the trigger condition, the relevant beam control codes are read in sequence according to the beam working order in the configuration parameter data packet, and the amplitude and phase of the TR channel corresponding to the array are synchronously updated according to the beam control codes to achieve rapid update of the beam pointing.

8. A device for rapidly updating the beam pointing direction of a front face, characterized in that: include: A data processing module, used for acquiring one or more groups of beam pointing data packets and a CPI pulse trigger signal, and writing one or more groups of beam pointing data packets into a RAM storage area based on the CPI pulse trigger signal; The update module is used to obtain the PRI pulse trigger signal, and based on the PRI pulse trigger signal, the number of large-cycle configurations of each group of beam pointing, and the number of small-cycle configurations of each group of beam pointing, read the written beam pointing data packets from the RAM storage area in sequence according to the preset configuration parameter data packets, and synchronously update the amplitude and phase of the TR channel corresponding to the array based on the beam pointing data packets to achieve rapid update of the beam pointing.

Images