A height measuring instrument

Abstract

The present application provides an altimeter, which includes: a direct antenna, an upper cover, a first radio frequency layer structure, a radio frequency board, a second radio frequency layer structure, a first baseband layer structure, a baseband board, a second baseband layer structure, a first power supply layer structure, a power supply board, a second power supply layer structure, a lower cover, a reflective antenna, a first connector, a second connector, a first inter-board connector and a second inter-board connector; the direct antenna, the upper cover, the first radio frequency layer structure, the radio frequency board, the second radio frequency layer structure, the first baseband layer structure, the baseband board, the second baseband layer structure, the first power supply layer structure, the power supply board, the second power supply layer structure, the lower cover and the reflective antenna are connected in sequence; the first connector is communicatively connected to the direct antenna and the radio frequency board; the second connector is communicatively connected to the reflective antenna and the radio frequency board; the second inter-board connector is communicatively connected to the baseband board and the power supply board; the first inter-board connector is communicatively connected to the radio frequency board and the baseband board.

Description

Technical Field

[0001] The present application relates to the technical field of altimeters, and in particular to an altimeter. Background Art

[0002] GNSS-R (Global Navigation Satellite Systems Reflectometry) sea surface height inversion platform includes shore-based platform, ship-borne platform, airborne platform and satellite-borne platform. Compared with shore-based platform, airborne platform has the characteristics of wide monitoring range. At the same time, the technology of airborne platform provides a lot of technical support for satellite-borne platform. The rapid development of drones also gives GNSS-R airborne observation platform more room for development.

[0003] The development of the BeiDou Navigation Satellite System (BDS) in recent years has provided more possibilities for the application of GNSS-R technology. BDS is an important national space-time infrastructure that can provide global users with all-weather, all-day, high-precision positioning, navigation and timing services, and is one of the important signal sources of GNSS-R.

[0004] Traditional airborne altimeters mainly use independent design methods for antennas and altimeter hosts. The antenna adopts a passive antenna design method and is arranged outside the cabin, while the altimeter host uses traditional processes and structural design methods and is arranged in the payload cabin. This cannot meet the technical requirements for miniaturization of the payload put forward by unmanned aerial platforms. Summary of the invention

[0005] The embodiment of the present application provides an altimeter to meet the technical requirements for miniaturization of the payload posed by an unmanned aerial vehicle platform.

[0006] In order to solve the above technical problems, the embodiments of the present application are implemented as follows:

[0007] The embodiment of the present application provides an altimeter, the altimeter comprising: a direct antenna, an upper cover, a first radio frequency layer structure, a radio frequency board, a second radio frequency layer structure, a first baseband layer structure, a baseband board, a second baseband layer structure, a first power layer structure, a power board, a second power layer structure, a lower cover, a reflective antenna, a first connector, a second connector, a first inter-board connector, and a second inter-board connector, wherein:

[0008] The direct antenna, the upper cover plate, the first RF layer structure, the RF board, the second RF layer structure, the first baseband layer structure, the baseband board, the second baseband layer structure, the first power layer structure, the power board, the second power layer structure, the lower cover plate and the reflective antenna are sequentially connected to form an integrated altimeter. The upper cover plate seals the first RF layer structure, and the lower cover plate seals the second power layer structure.

[0009] The first connector passes through the first RF layer structure and the upper cover plate, and is communicatively connected with the direct antenna and the RF board, so as to send the direct signal received by the direct antenna to the RF board;

[0010] The second connector passes through the lower cover plate, the second power layer structure, the power board, the first power layer structure, the second baseband layer structure, the baseband board, the first baseband layer structure and the second radio frequency layer structure, and is communicatively connected with the reflection antenna and the radio frequency board to send the reflection signal received by the reflection antenna to the radio frequency board;

[0011] The second inter-board connector passes through the second baseband layer structure and the first power layer structure, and is communicatively connected with the baseband board and the power board to transmit the power signal of the power board to the baseband board;

[0012] The first inter-board connector passes through the second RF layer structure and the first baseband layer structure, and is communicatively connected with the RF board and the baseband board to transmit the control signal of the baseband board and the power signal of the power board to the RF board, and transmits the digital intermediate frequency signal output by the RF board to the baseband board, so that the baseband board can complete the height measurement.

[0013] Optionally, the radio frequency board is a printed circuit board, and a direct radio frequency channel, a reflected radio frequency channel and a radio frequency processing unit are provided on the radio frequency board, wherein:

[0014] The direct radio frequency channel is connected to the direct antenna to receive the direct signal transmitted by the direct antenna and process the direct signal;

[0015] The reflection radio frequency channel is connected to the reflection antenna to receive the reflection signal transmitted by the reflection antenna and process the reflection signal;

[0016] The radio frequency processing unit is connected to the direct radio frequency channel and the reflected radio frequency channel to process the radio frequency signals processed by the direct radio frequency channel and the reflected radio frequency channel.

[0017] Optionally, the direct radio frequency channel includes: a first power divider, a first high frequency filter and a first low frequency filter,

[0018] The first power divider is communicatively connected to the direct antenna to equally divide the direct signal transmitted by the direct antenna into a first direct signal and a second direct signal;

[0019] The first high-frequency filter is communicatively connected with the first power divider and the radio frequency processing unit to filter out the low-frequency signal in the first direct signal to obtain a high-frequency direct signal, and transmit the high-frequency direct signal to the radio frequency processing unit;

[0020] The first low-frequency filter is communicatively connected with the first power divider and the RF processing unit to filter out the high-frequency signal in the second direct signal to obtain a low-frequency direct signal, and transmit the low-frequency direct signal to the RF processing unit.

[0021] Optionally, the reflected radio frequency channel includes: a second power divider, a second high frequency filter and a second low frequency filter.

[0022] The second power divider is communicatively connected to the reflection antenna to equally divide the reflection signal transmitted by the reflection antenna into a first reflection signal and a second reflection signal;

[0023] The second high-frequency filter is communicatively connected with the second power divider and the radio frequency processing unit to filter out the low-frequency signal in the first reflected signal to obtain a high-frequency reflected signal, and transmit the high-frequency reflected signal to the radio frequency processing unit;

[0024] The second low-frequency filter is communicatively connected with the second power divider and the radio frequency processing unit to filter out the high-frequency signal in the second reflected signal to obtain a low-frequency reflected signal, and transmit the low-frequency reflected signal to the radio frequency processing unit.

[0025] Optionally, the radio frequency processing unit includes four radio frequency processing channels, namely a direct high frequency processing channel, a direct low frequency processing channel, a reflected high frequency processing channel and a reflected low frequency processing channel.

[0026] The direct high-frequency processing channel is communicatively connected with the direct radio frequency channel and the baseband board to process the high-frequency direct signal transmitted by the direct radio frequency channel to obtain a first direct digital intermediate frequency signal, and transmit the first direct digital intermediate frequency signal to the baseband board;

[0027] The direct low-frequency processing channel is communicatively connected with the direct radio frequency channel and the baseband board to process the low-frequency direct signal transmitted by the direct radio frequency channel to obtain a second direct digital intermediate frequency signal, and transmit the second direct digital intermediate frequency signal to the baseband board;

[0028] The reflected high-frequency processing channel is communicatively connected with the reflected radio frequency channel and the baseband board to process the high-frequency reflected signal transmitted by the reflected radio frequency channel to obtain a first reflected digital intermediate frequency signal, and transmit the first reflected digital intermediate frequency signal to the baseband board;

[0029] The reflected low-frequency processing channel is communicatively connected to the reflected radio frequency channel and the baseband board to process the low-frequency reflected signal transmitted by the reflected radio frequency channel to obtain a second reflected digital intermediate frequency signal, and transmit the second reflected digital intermediate frequency signal to the baseband board.

[0030] Optionally, the direct high-frequency processing channel includes: a first low-noise amplifier, a first down-converter, a second down-converter, a first local oscillator phase-locked loop circuit, a first intermediate frequency filter, a second intermediate frequency filter, a first variable gain amplifier, a second variable gain amplifier, a first AD converter, a second AD converter, a first analog output buffer, a second analog output buffer and a first output interface.

[0031] The first low noise amplifier is respectively connected to the first down converter and the second down converter for receiving the high frequency direct signal transmitted by the direct radio frequency channel, amplifying the high frequency direct signal to obtain a high frequency amplified direct signal, and transmitting the high frequency amplified direct signal to the first down converter and the second down converter respectively;

[0032] The first down-converter is communicatively connected with the first local oscillator phase-locked loop circuit and the first intermediate frequency filter to perform down-conversion processing on the high-frequency amplified direct signal according to the first radio frequency signal transmitted by the first local oscillator phase-locked loop circuit to obtain first I intermediate frequency signals, and transmit the first I intermediate frequency signals to the first intermediate frequency filter;

[0033] The second down-converter is communicatively connected with the first local oscillator phase-locked loop circuit and the second intermediate frequency filter to perform down-conversion processing on the high-frequency amplified direct signal according to the second radio frequency signal transmitted by the first local oscillator phase-locked loop circuit to obtain a first Q-channel intermediate frequency signal, and transmit the first Q-channel intermediate frequency signal to the second intermediate frequency filter;

[0034] The first intermediate frequency filter is communicatively connected to the first variable gain amplifier to perform intermediate frequency filtering on the first I intermediate frequency signals to obtain first I intermediate frequency filtered signals, and transmit the first I intermediate frequency filtered signals to the first variable gain amplifier;

[0035] The second intermediate frequency filter is communicatively connected to the second variable gain amplifier to perform intermediate frequency filtering on the first Q intermediate frequency signal to obtain a first Q intermediate frequency filtered signal, and transmit the first Q intermediate frequency filtered signal to the second variable gain amplifier;

[0036] The first variable gain amplifier is communicatively connected with the first AD converter and the first analog output buffer to perform intermediate frequency amplification processing on the first I intermediate frequency filtered signals to obtain first I intermediate frequency amplified signals, and transmit the first I intermediate frequency amplified signals to the first AD converter and the first analog output buffer;

[0037] The second variable gain amplifier is communicatively connected with the second AD converter and the second analog output buffer to perform intermediate frequency amplification processing on the first Q-channel intermediate frequency filtered signal to obtain a first Q-channel intermediate frequency amplified signal, and transmit the first Q-channel intermediate frequency amplified signal to the second AD converter and the second analog output buffer;

[0038] The first AD converter is communicatively connected to the first output interface to perform AD conversion processing on the first I-channel intermediate frequency amplified signals to obtain a first converted digital intermediate frequency signal, and transmit the first converted digital intermediate frequency signal to the baseband board through the first output interface;

[0039] The first analog output buffer is communicatively connected to the first output interface to perform signal amplification processing on the first I-channel intermediate frequency amplified signals to obtain a first amplified digital intermediate frequency signal, and transmit the first amplified digital intermediate frequency signal to the baseband board through the first output interface;

[0040] The second AD converter is communicatively connected to the first output interface to perform AD conversion processing on the first Q-channel intermediate frequency amplified signal to obtain a second converted digital intermediate frequency signal, and transmit the second converted digital intermediate frequency signal to the baseband board through the first output interface;

[0041] The second analog output buffer is communicatively connected to the first output interface to perform signal amplification processing on the first Q-channel intermediate frequency amplified signal to obtain a second amplified digital intermediate frequency signal, and transmit the second amplified digital intermediate frequency signal to the baseband board through the first output interface;

[0042] The first direct digital intermediate frequency signal includes: the first converted digital intermediate frequency signal, the first amplified digital intermediate frequency signal, the second converted digital intermediate frequency signal and the second amplified digital intermediate frequency signal.

[0043] Optionally, the direct low-frequency processing channel includes: a second low-noise amplifier, a third down-converter, a fourth down-converter, a second local oscillator phase-locked loop circuit, a third intermediate frequency filter, a fourth intermediate frequency filter, a third variable gain amplifier, a fourth variable gain amplifier, a third AD converter, a fourth AD converter, a third analog output buffer, a fourth analog output buffer and a second output interface.

[0044] The second low noise amplifier is respectively connected to the third down converter and the fourth down converter for receiving the low frequency direct signal transmitted by the direct radio frequency channel, amplifying the low frequency direct signal to obtain a low frequency amplified direct signal, and transmitting the low frequency amplified direct signal to the third down converter and the fourth down converter respectively;

[0045] The third down-converter is communicatively connected with the second local oscillator phase-locked loop circuit and the third intermediate frequency filter to perform down-conversion processing on the low-frequency amplified direct signal according to the third radio frequency signal transmitted by the second local oscillator phase-locked loop circuit to obtain a second I-channel intermediate frequency signal, and transmit the second I-channel intermediate frequency signal to the third intermediate frequency filter;

[0046] The fourth down-converter is communicatively connected with the second local oscillator phase-locked loop circuit and the fourth intermediate frequency filter to perform down-conversion processing on the low-frequency amplified direct signal according to the fourth radio frequency signal transmitted by the second local oscillator phase-locked loop circuit to obtain a second Q-path intermediate frequency signal, and transmit the second Q-path intermediate frequency signal to the fourth intermediate frequency filter;

[0047] The third intermediate frequency filter is communicatively connected to the third variable gain amplifier to perform intermediate frequency filtering on the second I intermediate frequency signals to obtain second I intermediate frequency filtered signals, and transmit the second I intermediate frequency filtered signals to the third variable gain amplifier;

[0048] The fourth intermediate frequency filter is communicatively connected to the fourth variable gain amplifier to perform intermediate frequency filtering on the second Q intermediate frequency signal to obtain a second Q intermediate frequency filtered signal, and transmit the second Q intermediate frequency filtered signal to the fourth variable gain amplifier;

[0049] The third variable gain amplifier is communicatively connected with the third AD converter and the third analog output buffer to perform intermediate frequency amplification processing on the second I intermediate frequency filtered signals to obtain second I intermediate frequency amplified signals, and transmit the second I intermediate frequency amplified signals to the third AD converter and the third analog output buffer;

[0050] The fourth variable gain amplifier is communicatively connected with the fourth AD converter and the fourth analog output buffer to perform intermediate frequency amplification processing on the second Q-channel intermediate frequency filtered signal to obtain a second Q-channel intermediate frequency amplified signal, and transmit the second Q-channel intermediate frequency amplified signal to the fourth AD converter and the fourth analog output buffer;

[0051] The third AD converter is communicatively connected to the second output interface to perform AD conversion processing on the second I-channel intermediate frequency amplified signal to obtain a third converted digital intermediate frequency signal, and transmit the third converted digital intermediate frequency signal to the baseband board through the second output interface;

[0052] The third analog output buffer is communicatively connected with the second output interface to perform signal amplification processing on the second I-channel intermediate frequency amplified signals to obtain a third amplified digital intermediate frequency signal, and transmit the third amplified digital intermediate frequency signal to the baseband board through the second output interface;

[0053] The fourth AD converter is communicatively connected to the second output interface to perform AD conversion processing on the second Q-channel intermediate frequency amplified signal to obtain a fourth converted digital intermediate frequency signal, and transmit the fourth converted digital intermediate frequency signal to the baseband board through the second output interface;

[0054] The fourth analog output buffer is communicatively connected with the second output interface to perform signal amplification processing on the second Q-channel intermediate frequency amplified signal to obtain a fourth amplified digital intermediate frequency signal, and transmit the fourth amplified digital intermediate frequency signal to the baseband board through the second output interface;

[0055] The second direct digital intermediate frequency signal includes: the third converted digital intermediate frequency signal, the third amplified digital intermediate frequency signal, the fourth converted digital intermediate frequency signal and the fourth amplified digital intermediate frequency signal.

[0056] Optionally, the reflected high-frequency processing channel includes: a third low-noise amplifier, a fifth down-converter, a sixth down-converter, a third local oscillator phase-locked loop circuit, a fifth intermediate frequency filter, a sixth intermediate frequency filter, a fifth variable gain amplifier, a sixth variable gain amplifier, a fifth AD converter, a sixth AD converter, a fifth analog output buffer, a sixth analog output buffer and a third output interface,

[0057] The third low noise amplifier is respectively connected to the fifth down converter and the sixth down converter for receiving the high frequency reflected signal transmitted by the reflected radio frequency channel, amplifying the high frequency reflected signal to obtain a high frequency amplified reflected signal, and transmitting the high frequency amplified reflected signal to the fifth down converter and the sixth down converter respectively;

[0058] The fifth down-converter is communicatively connected with the third local oscillator phase-locked loop circuit and the fifth intermediate frequency filter to perform down-conversion processing on the high-frequency amplified reflected signal according to the fifth radio frequency signal transmitted by the third local oscillator phase-locked loop circuit to obtain a third I intermediate frequency signal, and transmit the third I intermediate frequency signal to the fifth intermediate frequency filter;

[0059] The sixth down-converter is communicatively connected with the third local oscillator phase-locked loop circuit and the sixth intermediate frequency filter to perform down-conversion processing on the high-frequency amplified reflected signal according to the sixth radio frequency signal transmitted by the third local oscillator phase-locked loop circuit to obtain a third Q-path intermediate frequency signal, and transmit the third Q-path intermediate frequency signal to the sixth intermediate frequency filter;

[0060] The fifth intermediate frequency filter is communicatively connected with the fifth variable gain amplifier to perform intermediate frequency filtering on the third I intermediate frequency signals to obtain third I intermediate frequency filtered signals, and transmit the third I intermediate frequency filtered signals to the fifth variable gain amplifier;

[0061] The sixth intermediate frequency filter is communicatively connected with the sixth variable gain amplifier to perform intermediate frequency filtering on the third Q intermediate frequency signal to obtain a third Q intermediate frequency filtered signal, and transmit the third Q intermediate frequency filtered signal to the sixth variable gain amplifier;

[0062] The fifth variable gain amplifier is communicatively connected with the fifth AD converter and the fifth analog output buffer to perform intermediate frequency amplification processing on the third I-channel intermediate frequency filtered signals to obtain third I-channel intermediate frequency amplified signals, and transmit the third I-channel intermediate frequency amplified signals to the fifth AD converter and the fifth analog output buffer;

[0063] The sixth variable gain amplifier is communicatively connected with the sixth AD converter and the sixth analog output buffer to perform intermediate frequency amplification processing on the third Q-channel intermediate frequency filtered signal to obtain a third Q-channel intermediate frequency amplified signal, and transmit the third Q-channel intermediate frequency amplified signal to the sixth AD converter and the sixth analog output buffer;

[0064] The fifth AD converter is communicatively connected to the third output interface to perform AD conversion processing on the third I-channel intermediate frequency amplified signal to obtain a fifth converted digital intermediate frequency signal, and transmit the fifth converted digital intermediate frequency signal to the baseband board through the third output interface;

[0065] The fifth analog output buffer is communicatively connected to the third output interface to perform signal amplification processing on the third I-channel intermediate frequency amplified signal to obtain a fifth amplified digital intermediate frequency signal, and transmit the fifth amplified digital intermediate frequency signal to the baseband board through the third output interface;

[0066] The sixth AD converter is communicatively connected to the third output interface to perform AD conversion processing on the third Q-channel intermediate frequency amplified signal to obtain a sixth converted digital intermediate frequency signal, and transmit the sixth converted digital intermediate frequency signal to the baseband board through the third output interface;

[0067] The sixth analog output buffer is communicatively connected to the third output interface to perform signal amplification processing on the third Q-channel intermediate frequency amplified signal to obtain a sixth amplified digital intermediate frequency signal, and transmit the sixth amplified digital intermediate frequency signal to the baseband board through the third output interface;

[0068] The first reflected digital intermediate frequency signal includes: the fifth converted digital intermediate frequency signal, the fifth amplified digital intermediate frequency signal, the sixth converted digital intermediate frequency signal and the sixth amplified digital intermediate frequency signal.

[0069] Optionally, the reflected low-frequency processing channel includes: a fourth low-noise amplifier, a seventh down-converter, an eighth down-converter, a fourth local oscillator phase-locked loop circuit, a seventh intermediate frequency filter, an eighth intermediate frequency filter, a seventh variable gain amplifier, an eighth variable gain amplifier, a seventh AD converter, an eighth AD converter, a seventh analog output buffer, an eighth analog output buffer and a fourth output interface.

[0070] The fourth low noise amplifier is respectively connected to the seventh down converter and the eighth down converter for receiving the low frequency reflection signal transmitted by the reflection radio frequency channel, amplifying the low frequency reflection signal to obtain a low frequency amplified reflection signal, and transmitting the low frequency amplified reflection signal to the seventh down converter and the sixth down converter respectively;

[0071] The seventh down-converter is communicatively connected with the fourth local oscillator phase-locked loop circuit and the seventh intermediate frequency filter to perform down-conversion processing on the low-frequency amplified reflected signal according to the seventh radio frequency signal transmitted by the fourth local oscillator phase-locked loop circuit to obtain a fourth I intermediate frequency signal, and transmit the fourth I intermediate frequency signal to the seventh intermediate frequency filter;

[0072] The eighth down-converter is communicatively connected with the fourth local oscillator phase-locked loop circuit and the eighth intermediate frequency filter to perform down-conversion processing on the low-frequency amplified reflected signal according to the eighth radio frequency signal transmitted by the fourth local oscillator phase-locked loop circuit to obtain a fourth Q-channel intermediate frequency signal, and transmit the fourth Q-channel intermediate frequency signal to the eighth intermediate frequency filter;

[0073] The seventh intermediate frequency filter is communicatively connected to the seventh variable gain amplifier to perform intermediate frequency filtering on the fourth I intermediate frequency signals to obtain fourth I intermediate frequency filtered signals, and transmit the fourth I intermediate frequency filtered signals to the seventh variable gain amplifier;

[0074] The eighth intermediate frequency filter is communicatively connected with the eighth variable gain amplifier to perform intermediate frequency filtering on the fourth Q intermediate frequency signal to obtain a fourth Q intermediate frequency filtered signal, and transmit the fourth Q intermediate frequency filtered signal to the eighth variable gain amplifier;

[0075] The seventh variable gain amplifier is communicatively connected with the seventh AD converter and the seventh analog output buffer to perform intermediate frequency amplification processing on the fourth I-channel intermediate frequency filtered signals to obtain fourth I-channel intermediate frequency amplified signals, and transmit the fourth I-channel intermediate frequency amplified signals to the seventh AD converter and the seventh analog output buffer;

[0076] The eighth variable gain amplifier is communicatively connected with the eighth AD converter and the eighth analog output buffer to perform intermediate frequency amplification processing on the fourth Q-channel intermediate frequency filtered signal to obtain a fourth Q-channel intermediate frequency amplified signal, and transmit the fourth Q-channel intermediate frequency amplified signal to the eighth AD converter and the eighth analog output buffer;

[0077] The seventh AD converter is communicatively connected to the fourth output interface to perform AD conversion processing on the fourth I-channel intermediate frequency amplified signal to obtain a seventh converted digital intermediate frequency signal, and transmit the seventh converted digital intermediate frequency signal to the baseband board through the fourth output interface;

[0078] The seventh analog output buffer is communicatively connected with the fourth output interface to perform signal amplification processing on the fourth I-channel intermediate frequency amplified signal to obtain a seventh amplified digital intermediate frequency signal, and transmit the seventh amplified digital intermediate frequency signal to the baseband board through the fourth output interface;

[0079] The eighth AD converter is communicatively connected to the fourth output interface to perform AD conversion processing on the fourth Q-channel intermediate frequency amplified signal to obtain an eighth converted digital intermediate frequency signal, and transmit the eighth converted digital intermediate frequency signal to the baseband board through the fourth output interface;

[0080] The eighth analog output buffer is communicatively connected to the fourth output interface to perform signal amplification processing on the fourth Q-channel intermediate frequency amplified signal to obtain an eighth amplified digital intermediate frequency signal, and transmit the eighth amplified digital intermediate frequency signal to the baseband board through the fourth output interface;

[0081] The second reflected digital intermediate frequency signal includes: the seventh converted digital intermediate frequency signal, the seventh amplified digital intermediate frequency signal, the eighth converted digital intermediate frequency signal and the eighth amplified digital intermediate frequency signal.

[0082] Optionally, the baseband board is a printed circuit board, and a baseband signal processing unit is provided on the baseband board, and the baseband signal processing unit includes: programmable logic and a processing system.

[0083] Optionally, the direct antenna comprises: a direct antenna radiation unit and a direct front radio frequency unit,

[0084] The direct antenna radiation unit is used to receive the GNSS direct signal and transmit the GNSS direct signal to the direct front radio frequency unit;

[0085] The direct front radio frequency unit is used to process the GNSS direct signal to obtain the direct signal and transmit the direct signal to the radio frequency board.

[0086] Optionally, the direct front radio frequency unit includes: a first-stage amplifier, a first-stage attenuator, a first-stage duplex filter, a second-stage amplifier, a second-stage attenuator, and a second-stage duplex filter, which are sequentially connected in communication.

[0087] The first-stage amplifier is used to receive the GNSS direct signal and perform radio frequency amplification processing on the GNSS direct signal to obtain a first direct amplified signal;

[0088] The first-stage attenuator is used to perform signal attenuation processing on the first direct amplified signal to obtain a first direct attenuated signal;

[0089] The first-stage duplex filter is used to perform out-of-band interference filtering on the first direct attenuated signal to obtain a first direct filtered signal;

[0090] The second-stage amplifier is used to perform radio frequency amplification processing on the first direct filtered signal to obtain a second direct amplified signal;

[0091] The second-stage attenuator is used to perform signal attenuation processing on the second direct amplified signal to obtain a second direct attenuated signal;

[0092] The second-stage duplex filter is used to perform out-of-band interference filtering on the second direct attenuated signal to obtain the direct signal, and transmit the direct signal to the radio frequency board.

[0093] Optionally, the reflective antenna includes: a reflective antenna radiation unit and a reflective front radio frequency unit,

[0094] The reflective antenna radiation unit is used to receive the GNSS reflected signal and transmit the GNSS reflected signal to the reflective front radio frequency unit;

[0095] The reflection front RF unit is used to perform signal processing on the GNSS reflection signal to obtain the reflection signal, and transmit the reflection signal to the RF board.

[0096] Optionally, the reflective front radio frequency unit includes: a third-stage amplifier, a third-stage attenuator, a third-stage duplex filter, a fourth-stage amplifier, a fourth-stage attenuator and a fourth-stage duplex filter, which are sequentially connected in communication.

[0097] The third-stage amplifier is used to receive the GNSS reflected signal and perform radio frequency amplification processing on the GNSS reflected signal to obtain a first reflected amplified signal;

[0098] The third-stage attenuator is used to perform signal attenuation processing on the first reflected amplified signal to obtain a first reflected attenuated signal;

[0099] The third-stage duplex filter is used to perform out-of-band interference filtering on the first reflection attenuation signal to obtain a first reflection filtering signal;

[0100] The fourth-stage amplifier is used to perform radio frequency amplification processing on the first reflected filtered signal to obtain a second reflected amplified signal;

[0101] The fourth-stage attenuator is used to perform signal attenuation processing on the second reflected amplified signal to obtain a second reflected attenuated signal;

[0102] The fourth-stage duplex filter is used to perform out-of-band interference filtering on the second reflection attenuation signal to obtain the reflection signal, and transmit the reflection signal to the radio frequency board.

[0103] Optionally, the altimeter further comprises: an upper supporting structure and a lower supporting structure,

[0104] The direct-radiation antenna is connected to the upper cover plate through the upper supporting structure;

[0105] The reflective antenna is connected to the lower cover plate through the lower supporting structure.

[0106] Optionally, both the direct antenna and the reflective antenna are active antennas.

[0107] In the embodiment of the present application, the antenna and the altimeter host are designed in an integrated manner, the direct antenna is conformally located directly above the altimeter host and points to the zenith when working. The reflective antenna is conformally located directly below the altimeter host and points to the ground when working, thereby achieving miniaturization and low power consumption of the system and meeting the technical requirements of the unmanned aerial vehicle platform for miniaturization of the payload.

[0108] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0109] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0110] Figure 1 A schematic diagram of the structure of a height measuring instrument provided in an embodiment of the present application;

[0111] Figure 2 A schematic diagram of a system architecture of an altimeter provided in an embodiment of the present application;

[0112] Figure 3 A schematic diagram of a system architecture of another altimeter provided in an embodiment of the present application;

[0113] Figure 4 A schematic diagram of an antenna structure provided in an embodiment of the present application;

[0114] Figure 5 A schematic diagram of the structure of a front radio frequency unit provided in an embodiment of the present application;

[0115] Figure 6 A schematic diagram of the structure of a radio frequency processing unit provided in an embodiment of the present application;

[0116] Figure 7 A schematic diagram of the structure of a power processing unit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0117] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0118] Reference Figure 1 , shows a schematic diagram of the structure of a height measuring instrument provided in an embodiment of the present application. Figure 1 As shown, the altimeter may include: a direct antenna 101, an upper cover plate 109, a first RF layer structure 110, an RF board 103, a second RF layer structure 111, a first baseband layer structure 114, a baseband board 104, a second baseband layer structure 115, a first power layer structure 116, a power board 105, a second power layer structure 117, a lower cover plate 118, a reflective antenna 107, a first connector 102, a second connector 106, a first inter-board connector 112 and a second inter-board connector 113.

[0119] Among them, the direct antenna 101, the upper cover plate 109, the first RF layer structure 110, the RF board 103, the second RF layer structure 111, the first baseband layer structure 114, the baseband board 104, the second baseband layer structure 115, the first power supply layer structure 116, the power supply board 105, the second power supply layer structure 117, the lower cover plate 118 and the reflective antenna 107 are connected in sequence to form an integrated altimeter. The upper cover plate 109 can seal the first RF layer structure 110, and the lower cover plate 118 can seal the second power supply layer structure 117. Furthermore, the upper cover plate 109 and the lower cover plate 118 and the devices between the two cover plates can constitute the altimeter host.

[0120] In this embodiment, an upper support structure 108 is further provided between the upper cover plate 109 and the direct-radiation antenna 101 , and the direct-radiation antenna 101 can be connected to the upper cover plate 109 via the upper support structure 108 . The upper support structure 108 is used to support the direct-radiation antenna 101 .

[0121] A lower support structure 119 is also provided between the lower cover plate 118 and the reflective antenna 107, and the reflective antenna 107 can be connected to the lower cover plate 118 through the lower support structure 119. The lower support structure 119 is used to support the reflective antenna 107. Among them, the upper and lower support structures mainly play the role of supporting and fixing the antenna and the circuit board, so they need to have certain strength and stability. The upper and lower support structures can be made of materials such as aluminum alloy, stainless steel, plastic, and composite materials.

[0122] The direct antenna 101 is conformally located above the altimeter mainframe and points to the zenith direction when in operation, for receiving GNSS (Global Navigation Satellite System) direct signals. The reflector antenna 107 is conformally located below the altimeter mainframe and points to the ground direction when in operation, for receiving GNSS reflected signals.

[0123] The first connector 102 may pass through the first RF layer structure 110 and the upper cover plate 109 , and be communicatively connected with the direct antenna 101 and the RF board 103 , so as to send the direct signal received by the direct antenna 101 to the RF board 103 .

[0124] The second connector 106 can pass through the lower cover plate 118, the second power layer structure 117, the power board 105, the first power layer structure 116, the second baseband layer structure 115, the baseband board 104, the first baseband layer structure 114 and the second RF layer structure 111, and communicate with the reflection antenna 107 and the RF board 103 to send the reflected signal received by the reflection antenna 107 to the RF board 103.

[0125] The second inter-board connector 113 can pass through the second baseband layer structure 115 and the first power layer structure 116 to be communicatively connected with the baseband board 104 and the power board 105 to transmit the power signal of the power board 105 to the baseband board 104 .

[0126] The first inter-board connector 112 can pass through the second RF layer structure 111 and the first baseband layer structure 114, and be communicatively connected with the RF board 103 and the baseband board 104, so as to transmit the control signal of the baseband board 104 and the power signal of the power board 105 to the RF board 103, and transmit the digital intermediate frequency signal output by the RF board 103 to the baseband board 104, so that the baseband board 104 can complete the height measurement.

[0127] In this embodiment, the first connector 102 and the second connector 106 may be SMP (Subminiature Push-On) connectors. The SMP connector is a highly shielded and very small interconnect device with excellent shielding performance and can effectively reduce electromagnetic interference and radio frequency leakage.

[0128] The inter-board connector is used to connect the RF board, baseband board and power board, and needs to have good conductivity and stability. The inter-board connector can be made of copper, gold-plated copper alloy, tin-plated copper alloy and other materials. These materials can provide good conductivity and ensure the stability and reliability of the inter-board connector in long-term use.

[0129] The RF layer structure, baseband layer structure and power layer structure mainly support and fix the RF board, baseband board and power board, and need to have certain electromagnetic shielding performance. These structures can be made of aluminum alloy, stainless steel, plastic and composite materials. These materials can be selected according to specific design requirements to ensure the stability of the layer structure and electromagnetic shielding performance.

[0130] The above-mentioned design of the embodiment of the present application realizes the miniaturization and low power consumption of the system by adopting an integrated design of the antenna and the altimeter host, and meets the technical requirements of the unmanned aerial vehicle platform for the miniaturization of the carried payload.

[0131] The system structure of the altimeter provided in this embodiment can be as follows Figure 2 As shown, the altimeter may include: a direct antenna, a reflective antenna, a radio frequency board, a baseband board and a power supply board, wherein the radio frequency board consists of three parts: a direct radio frequency channel, a reflective radio frequency channel and a radio frequency processing unit, a baseband signal processing unit is arranged on the baseband board, and a power supply module is arranged on the power supply board.

[0132] When entering the altimetry work, the direct antenna points to the zenith and can be used to receive the GNSS direct signal to provide the system with a positioning signal. The reflector antenna points to the ground and can be used to receive the GNSS reflected signal to provide the system with the reflected signal required for altimetry.

[0133] The direct RF channel can be used to perform power division and RF filtering on the GNSS direct signal received by the direct antenna. The reflected RF channel can be used to perform power division and RF filtering on the GNSS reflected signal received by the reflective antenna. The RF processing unit can be used to perform down-conversion, intermediate frequency filtering and AD conversion on the RF signal processed by the RF channel into a digital intermediate frequency signal.

[0134] The baseband signal processing unit is used to capture, track and solve the digital intermediate frequency signal after being processed by the radio frequency processing unit and then transmit the solved information to the UAV platform.

[0135] The power module can be used to supply power to the RF channel, the RF processing unit, and the baseband processing unit.

[0136] Next, combine Figure 3 The internal structures of the antenna unit, RF channel, RF processing unit and baseband processing unit are described in detail.

[0137] like Figure 3 As shown, the altimeter may include: an antenna unit, a radio frequency channel, a radio frequency processing unit and a baseband processing unit.

[0138] The antenna unit may include: a direct antenna and a reflective antenna, wherein the direct antenna is composed of a direct antenna radiation unit and a direct front radio frequency unit, and the reflective antenna is composed of a reflective antenna radiation unit and a reflective front radio frequency unit.

[0139] The direct antenna radiation unit can be used to receive the GNSS direct signal and transmit the GNSS direct signal to the direct front RF unit. The direct front RF unit can be used to process the GNSS direct signal to obtain the direct signal and transmit the direct signal to the RF board.

[0140] The reflection antenna radiation unit can be used to receive the GNSS reflection signal and transmit the GNSS reflection signal to the reflection front RF unit. The reflection front RF unit can be used to process the GNSS reflection signal to obtain the reflection signal and transmit the reflection signal to the RF board.

[0141] The structure of the direct antenna / reflector antenna can be as follows Figure 4 As shown, the direct antenna / reflection antenna structure includes: a first layer of radiation plate 41, a first layer of filling medium 42, a second layer of radiation plate 43, a second layer of filling medium 44, a third layer of radiation plate 45 and a front radio frequency unit 46.

[0142] The direct antenna can include a direct antenna radiation unit and a direct front RF unit. In the specific implementation, taking the Beidou altimeter as an example, it is necessary to cover two Beidou frequency points B1C (center frequency: 1575.42MHz) and B2a (center frequency: 1176.45MHz). In order to miniaturize the design, the direct antenna can adopt coupled feeding and use single-point feeding to widen the circular polarization bandwidth.

[0143] When designing the direct-radiation antenna radiation unit, in addition to the perturbation unit used in the feed part, the perturbation unit (a structure or method for introducing small perturbations that can affect the radiation characteristics and polarization mode of the antenna) is also introduced in the radiation piece part to achieve degenerate separation at different frequency points and widen the circular polarization bandwidth. The direct-radiation antenna adopts a microstrip laminated structure, and the radiation piece plate can be made of high-performance high-frequency circuit materials. The laminated structure filling medium uses a non-metallic material of polyimide, which ensures the structural strength and does not affect the performance of the antenna.

[0144] The radiator can adopt a slotted structure to lower the resonant frequency and reduce the volume of the antenna. The first layer of radiators mainly resonates in the low frequency band, the second layer of radiators mainly resonates in the high frequency band, and the third layer of radiators is fed through cross-slot coupling. In order to achieve right-hand circular polarization, a diamond clockwise slotted structure is designed on the surface of the second and third layers of radiators to introduce a perturbation unit.

[0145] The filling medium may be a non-metallic material such as polyimide. The first layer of the filling medium 42 may be used to support the first layer of radiation sheets 41 , and the second layer of the filling medium 44 may be used to support the second layer of radiation sheets 43 .

[0146] The reflective antenna radiating unit is fed through the cross-slot coupling of the third-layer radiating plate. In order to achieve left-hand circular polarization, a diamond-shaped counterclockwise slot structure is designed on the surface of the second and third-layer radiating plates to introduce a perturbation unit. Other design schemes are consistent with the direct antenna radiating unit.

[0147] In this embodiment, both the direct antenna and the reflective antenna can be active antennas. The embodiment of the present application adopts the design of anti-interference active antenna to effectively filter out external interference and effectively reduce the interference of the RF part of the altimeter host, thereby achieving high-precision detection of the system.

[0148] Next, combine Figure 5 The internal structure of the direct / reflective front RF unit is described in detail.

[0149] like Figure 5 As shown, the direct front radio frequency unit includes: a first-stage amplifier, a first-stage attenuator, a first-stage duplex filter, a second-stage amplifier, a second-stage attenuator and a second-stage duplex filter which are sequentially connected in communication.

[0150] The first-stage amplifier can be used to perform a first-stage radio frequency amplification on the GNSS direct signal received by the direct antenna radiation unit to obtain a first direct amplified signal.

[0151] The first-stage attenuator can be used to adaptively attenuate the first direct amplified signal amplified by the first-stage amplifier to obtain a first direct attenuated signal.

[0152] The first-stage duplex filter can be used to perform out-of-band interference filtering on the signal attenuated by the first-stage attenuator to filter out out-of-band interference signals of 1565.42MHz~1585.42MHz and 1166.45MHz~1186.45MHz, thereby obtaining a first direct-line filtered signal.

[0153] The second-stage amplifier can be used to perform second-stage radio frequency amplification on the first direct-filtered signal filtered by the first-stage duplex filter to obtain a second direct-amplified signal.

[0154] The second-stage attenuator can be used to adaptively attenuate the second direct amplified signal amplified by the second-stage amplifier to obtain a second direct attenuated signal.

[0155] The second-stage duplex filter can be used to perform out-of-band interference filtering on the second direct attenuated signal after attenuation by the second-stage attenuator, and further filter out the out-of-band interference signals of 1565.42MHz~1585.42MHz and 1166.45MHz~1186.45MHz to obtain the final direct signal, and transmit the final direct signal to the RF board.

[0156] like Figure 5 As shown, the reflective front-end radio frequency unit may include: a third-stage amplifier, a third-stage attenuator, a third-stage duplex filter, a fourth-stage amplifier, a fourth-stage attenuator and a fourth-stage duplex filter which are communicatively connected in sequence.

[0157] The third-stage amplifier can be used to perform a first-stage radio frequency amplification on the GNSS signal received by the reflective antenna radiation unit to obtain a first reflected amplified signal.

[0158] The third-stage attenuator can be used to adaptively attenuate the first reflection amplified signal amplified by the third-stage amplifier to obtain a first reflection attenuated signal.

[0159] The third-stage duplex filter can be used to perform out-of-band interference filtering on the first reflection attenuated signal after attenuation by the third-stage attenuator, and filter out the out-of-band interference signals of 1565.42MHz~1585.42MHz and 1166.45MHz~1186.45MHz to obtain the first reflection filtered signal.

[0160] The fourth-stage amplifier can be used to perform a second-stage radio frequency amplification on the first reflection filter signal filtered by the third-stage duplex filter to obtain a second reflection amplified signal.

[0161] The fourth-stage attenuator can be used to adaptively attenuate the second reflected amplified signal amplified by the fourth-stage amplifier to obtain a second reflected attenuated signal.

[0162] The fourth-stage duplex filter can be used to perform out-of-band interference filtering on the second reflected attenuated signal after attenuation by the fourth-stage attenuator, and further filter out the out-of-band interference signals of 1565.42MHz~1585.42MHz and 1166.45MHz~1186.45MHz to obtain the final reflected signal, and transmit the final reflected signal to the RF board.

[0163] like Figure 3 As shown, the RF channel includes a direct RF channel and a reflected RF channel. The direct RF channel can be connected to a direct antenna to receive a direct signal transmitted by the direct antenna and process the direct signal. The reflected RF channel can be connected to a reflective antenna to receive a reflected signal transmitted by the reflective antenna and process the reflected signal.

[0164] In a specific implementation of the present application, the direct RF channel includes: a first power divider, a first high-frequency filter and a first low-frequency filter. The first power divider can be communicatively connected to the direct antenna to divide the direct signal transmitted by the direct antenna into a first direct signal and a second direct signal. The first high-frequency filter can be communicatively connected to the first power divider and the RF processing unit to filter out the low-frequency signal in the first direct signal, obtain a high-frequency direct signal, and transmit the high-frequency direct signal to the RF processing unit. The first low-frequency filter can be communicatively connected to the first power divider and the RF processing unit to filter out the high-frequency signal in the second direct signal, obtain a low-frequency direct signal, and transmit the low-frequency direct signal to the RF processing unit.

[0165] like Figure 3 As shown, the direct RF channel may include a power divider, a high frequency filter and a low frequency filter (corresponding to the above-mentioned first power divider, first high frequency filter and first low frequency filter, respectively). The power divider may be used to evenly distribute the signal received and processed by the direct antenna into two paths, one path entering the high frequency filter and the other path entering the low frequency filter. The high frequency filter may be used to filter out the low frequency signal and transmit the high frequency signal to the RF processing unit. The low frequency filter may be used to filter out the high frequency signal and transmit the low frequency signal to the RF processing unit.

[0166] In another specific implementation of the present application, the reflected RF channel includes: a second power divider, a second high-frequency filter, and a second low-frequency filter. The second power divider can be communicatively connected to the reflecting antenna to divide the reflected signal transmitted by the reflecting antenna into a first reflected signal and a second reflected signal. The second high-frequency filter can be communicatively connected to the second power divider and the RF processing unit to filter out the low-frequency signal in the first reflected signal, obtain the high-frequency reflected signal, and transmit the high-frequency reflected signal to the RF processing unit. The second low-frequency filter can be communicatively connected to the second power divider and the RF processing unit to filter out the high-frequency signal in the second reflected signal, obtain the low-frequency reflected signal, and transmit the low-frequency reflected signal to the RF processing unit.

[0167] like Figure 3 As shown, the reflected RF channel may also include a power divider, a high-frequency filter and a low-pass filter (corresponding to the above-mentioned second power divider, second high-frequency filter and second low-frequency filter, respectively). The power divider can be used to evenly distribute the signal received and processed by the reflected antenna into two paths, one path entering the high-frequency filter and the other path entering the low-frequency filter. The high-frequency filter can be used to filter out the low-frequency signal and transmit the high-frequency signal to the RF processing unit. The low-frequency filter can be used to filter out the high-frequency signal and transmit the low-frequency signal to the RF processing unit.

[0168] In this embodiment, in order to achieve the design goals of miniaturization and lightness, the RF processing unit is implemented by integrating a RF IC (RF integrated circuit), and the RF IC contains four RF processing channels (the structure of the four RF processing channels can be as follows Figure 6 As shown in the figure, each RF processing channel is mainly composed of a low noise amplifier, a down converter, an intermediate frequency filter, a variable gain amplifier, an AD converter (Analog-to-Digital Conversion), an analog output buffer and a local oscillator phase-locked loop circuit, where the local oscillator is independently configurable. Among them, the low noise amplifier is an amplifier with a low noise figure, which is used to amplify weak signals and suppress its own and external noise to obtain a higher signal-to-noise ratio. The down converter is a device that reduces the signal frequency from a higher frequency band to a lower frequency band, and is usually used in the signal processing process of the receiver. The intermediate frequency filter is an electronic device used to filter out specific frequency signals. The variable gain amplifier is an amplifier with adjustable gain, which is used to amplify the signal to different degrees in different situations. The AD converter is a device that converts analog signals into digital signals. The analog output buffer is a circuit used to improve the output stability and driving capability of analog signals. The local oscillator phase-locked loop circuit (Local Oscillator Phase-Locked Loop, LOPLL) is a circuit used to generate a stable frequency signal, which can be used to generate a local oscillator signal in a communication system.

[0169] The RF IC can receive four signals simultaneously, and the bandwidth of the four RF processing channels can be configured to meet the reception of Beidou dual-frequency signals. The built-in PLL supports integer and fractional division, and the gain control supports two modes: MGC (Manual Gain Control) and AGC (Automatic Gain Control).

[0170] The radio frequency processing unit may include: a direct high frequency processing channel, a direct low frequency processing channel, a reflected high frequency processing channel and a reflected low frequency processing channel.

[0171] The direct high-frequency processing channel can be communicatively connected with the direct radio frequency channel and the baseband board to process the high-frequency direct signal transmitted by the direct radio frequency channel to obtain a first direct digital intermediate frequency signal, and transmit the first direct digital intermediate frequency signal to the baseband board.

[0172] The direct low-frequency processing channel can be communicatively connected with the direct radio frequency channel and the baseband board to process the low-frequency direct signal transmitted by the direct radio frequency channel to obtain a second direct digital intermediate frequency signal, and transmit the second direct digital intermediate frequency signal to the baseband board.

[0173] The reflected high-frequency processing channel can be communicatively connected with the reflected radio frequency channel and the baseband board to process the high-frequency reflected signal transmitted by the reflected radio frequency channel to obtain a first reflected digital intermediate frequency signal, and transmit the first reflected digital intermediate frequency signal to the baseband board.

[0174] The reflected low-frequency processing channel can be communicatively connected with the reflected radio frequency channel and the baseband board to process the low-frequency reflected signal transmitted by the reflected radio frequency channel to obtain a second reflected digital intermediate frequency signal, and transmit the second reflected digital intermediate frequency signal to the baseband board.

[0175] Next, the signal processing process of the four RF processing channels is described in detail in conjunction with a specific embodiment.

[0176] In a specific implementation of the present application, the direct high-frequency processing channel may include: a first low-noise amplifier, a first down-converter, a second down-converter, a first local oscillator phase-locked loop circuit, a first intermediate frequency filter, a second intermediate frequency filter, a first variable gain amplifier, a second variable gain amplifier, a first AD converter, a second AD converter, a first analog output buffer, a second analog output buffer and a first output interface.

[0177] The first low noise amplifier is communicatively connected to the first down converter and the second down converter respectively, and is used for receiving the high-frequency direct signal transmitted by the direct RF channel, and performing signal amplification processing on the high-frequency direct signal to obtain a high-frequency amplified direct signal, and transmitting the high-frequency amplified direct signal to the first down converter and the second down converter respectively.

[0178] The first down-converter is communicatively connected with the first local oscillator phase-locked loop circuit and the first intermediate frequency filter to down-convert the high-frequency amplified direct signal according to the first radio frequency signal transmitted by the first local oscillator phase-locked loop circuit to obtain the first I intermediate frequency signals, and transmit the first I intermediate frequency signals to the first intermediate frequency filter.

[0179] The second down-converter is communicatively connected with the first local oscillator phase-locked loop circuit and the second intermediate frequency filter to down-convert the high-frequency amplified direct signal according to the second RF signal transmitted by the first local oscillator phase-locked loop circuit to obtain a first Q-channel intermediate frequency signal, and transmit the first Q-channel intermediate frequency signal to the second intermediate frequency filter.

[0180] In a specific implementation, the signal output by the first local oscillator phase-locked loop circuit can be converted into an I-channel local oscillator signal and a Q-channel local oscillator signal (i.e., a first RF signal and a second RF signal) through a phase shifter. The I-channel and Q-channel local oscillator signals differ in phase by 90°, and then are down-converted with the high-frequency amplified direct signal respectively.

[0181] The first intermediate frequency filter is communicatively connected to the first variable gain amplifier to perform intermediate frequency filtering on the first I intermediate frequency signals to obtain the first I intermediate frequency filtered signals, and transmit the first I intermediate frequency filtered signals to the first variable gain amplifier.

[0182] The second intermediate frequency filter is communicatively connected to the second variable gain amplifier to perform intermediate frequency filtering on the first Q intermediate frequency signal to obtain a first Q intermediate frequency filtered signal, and transmit the first Q intermediate frequency filtered signal to the second variable gain amplifier.

[0183] The first variable gain amplifier is communicatively connected to the first AD converter and the first analog output buffer to perform intermediate frequency amplification processing on the first I intermediate frequency filtered signals to obtain the first I intermediate frequency amplified signals, and transmit the first I intermediate frequency amplified signals to the first AD converter and the first analog output buffer.

[0184] The second variable gain amplifier is communicatively connected to the second AD converter and the second analog output buffer to perform intermediate frequency amplification processing on the first Q intermediate frequency filtered signal to obtain a first Q intermediate frequency amplified signal, and transmit the first Q intermediate frequency amplified signal to the second AD converter and the second analog output buffer.

[0185] The first AD converter is communicatively connected to the first output interface to perform AD conversion processing on the first I-channel intermediate frequency amplified signal to obtain a first converted digital intermediate frequency signal, and transmit the first converted digital intermediate frequency signal to the baseband board through the first output interface.

[0186] The first analog output buffer is communicatively connected to the first output interface to perform signal amplification processing on the first I-channel intermediate frequency amplified signals to obtain a first amplified digital intermediate frequency signal, and transmit the first amplified digital intermediate frequency signal to the baseband board through the first output interface.

[0187] The second AD converter is communicatively connected to the first output interface to perform AD conversion processing on the first Q-channel intermediate frequency amplified signal to obtain a second converted digital intermediate frequency signal, and transmits the second converted digital intermediate frequency signal to the baseband board through the first output interface.

[0188] The second analog output buffer is communicatively connected to the first output interface to perform signal amplification processing on the first Q-channel intermediate frequency amplified signal to obtain a second amplified digital intermediate frequency signal, and transmit the second amplified digital intermediate frequency signal to the baseband board through the first output interface;

[0189] Among them, the first direct digital intermediate frequency signal includes: a first converted digital intermediate frequency signal, a first amplified digital intermediate frequency signal, a second converted digital intermediate frequency signal and a second amplified digital intermediate frequency signal, that is, the first converted digital intermediate frequency signal, the first amplified digital intermediate frequency signal, the second converted digital intermediate frequency signal and the second amplified digital intermediate frequency signal together constitute the first direct digital intermediate frequency signal.

[0190] In another specific implementation of the present application, the direct low-frequency processing channel may include: a second low-noise amplifier, a third down-converter, a fourth down-converter, a second local oscillator phase-locked loop circuit, a third intermediate frequency filter, a fourth intermediate frequency filter, a third variable gain amplifier, a fourth variable gain amplifier, a third AD converter, a fourth AD converter, a third analog output buffer, a fourth analog output buffer and a second output interface.

[0191] The second low noise amplifier is respectively connected to the third down converter and the fourth down converter for receiving the low frequency direct signal transmitted by the direct RF channel, performing signal amplification processing on the low frequency direct signal to obtain a low frequency amplified direct signal, and transmitting the low frequency amplified direct signal to the third down converter and the fourth down converter respectively.

[0192] The third down-converter is communicatively connected with the second local oscillator phase-locked loop circuit and the third intermediate frequency filter to down-convert the low-frequency amplified direct signal according to the third RF signal transmitted by the second local oscillator phase-locked loop circuit to obtain a second I-channel intermediate frequency signal, and transmit the second I-channel intermediate frequency signal to the third intermediate frequency filter.

[0193] The fourth down-converter is communicatively connected with the second local oscillator phase-locked loop circuit and the fourth intermediate frequency filter to down-convert the low-frequency amplified direct signal according to the fourth radio frequency signal transmitted by the second local oscillator phase-locked loop circuit to obtain a second Q-path intermediate frequency signal, and transmit the second Q-path intermediate frequency signal to the fourth intermediate frequency filter.

[0194] In a specific implementation, the signal output by the second local oscillator phase-locked loop circuit can be converted into an I-channel local oscillator signal and a Q-channel local oscillator signal (i.e., a third RF signal and a fourth RF signal) through a phase shifter. The I-channel and Q-channel local oscillator signals differ in phase by 90°, and then are down-converted with the high-frequency amplified direct signal respectively.

[0195] The third intermediate frequency filter is communicatively connected to the third variable gain amplifier to perform intermediate frequency filtering on the second I intermediate frequency signals to obtain second I intermediate frequency filtered signals, and transmit the second I intermediate frequency filtered signals to the third variable gain amplifier.

[0196] The fourth intermediate frequency filter is communicatively connected to the fourth variable gain amplifier to perform intermediate frequency filtering on the second Q intermediate frequency signal to obtain a second Q intermediate frequency filtered signal, and transmit the second Q intermediate frequency filtered signal to the fourth variable gain amplifier.

[0197] The third variable gain amplifier is communicatively connected to the third AD converter and the third analog output buffer to perform intermediate frequency amplification processing on the second I intermediate frequency filtered signals to obtain the second I intermediate frequency amplified signals, and transmit the second I intermediate frequency amplified signals to the third AD converter and the third analog output buffer.

[0198] The fourth variable gain amplifier is communicatively connected to the fourth AD converter and the fourth analog output buffer to perform intermediate frequency amplification processing on the second Q intermediate frequency filtered signal to obtain a second Q intermediate frequency amplified signal, and transmit the second Q intermediate frequency amplified signal to the fourth AD converter and the fourth analog output buffer.

[0199] The third AD converter is communicatively connected to the second output interface to perform AD conversion processing on the second I-channel intermediate frequency amplified signal to obtain a third converted digital intermediate frequency signal, and transmits the third converted digital intermediate frequency signal to the baseband board through the second output interface.

[0200] The third analog output buffer is communicatively connected to the second output interface to perform signal amplification processing on the second I-channel intermediate frequency amplified signal to obtain a third amplified digital intermediate frequency signal, and transmit the third amplified digital intermediate frequency signal to the baseband board through the second output interface.

[0201] The fourth AD converter is communicatively connected to the second output interface to perform AD conversion processing on the second Q-channel intermediate frequency amplified signal to obtain a fourth converted digital intermediate frequency signal, and transmits the fourth converted digital intermediate frequency signal to the baseband board through the second output interface.

[0202] The fourth analog output buffer is communicatively connected to the second output interface to perform signal amplification processing on the second Q-channel intermediate frequency amplified signal to obtain a fourth amplified digital intermediate frequency signal, and transmit the fourth amplified digital intermediate frequency signal to the baseband board through the second output interface.

[0203] Among them, the second direct digital intermediate frequency signal may include: a third converted digital intermediate frequency signal, a third amplified digital intermediate frequency signal, a fourth converted digital intermediate frequency signal and a fourth amplified digital intermediate frequency signal, that is, the third converted digital intermediate frequency signal, the third amplified digital intermediate frequency signal, the fourth converted digital intermediate frequency signal and the fourth amplified digital intermediate frequency signal together constitute the second direct digital intermediate frequency signal.

[0204] In another specific implementation of the present application, the reflected high-frequency processing channel may include: a third low-noise amplifier, a fifth down-converter, a sixth down-converter, a third local oscillator phase-locked loop circuit, a fifth intermediate frequency filter, a sixth intermediate frequency filter, a fifth variable gain amplifier, a sixth variable gain amplifier, a fifth AD converter, a sixth AD converter, a fifth analog output buffer, a sixth analog output buffer and a third output interface.

[0205] The third low noise amplifier is respectively connected to the fifth down converter and the sixth down converter for receiving the high frequency reflected signal transmitted by the reflected radio frequency channel, amplifying the high frequency reflected signal to obtain the high frequency amplified reflected signal, and transmitting the high frequency amplified reflected signal to the fifth down converter and the sixth down converter respectively.

[0206] The fifth down-converter is communicatively connected with the third local oscillator phase-locked loop circuit and the fifth intermediate frequency filter to down-convert the high-frequency amplified reflected signal according to the fifth radio frequency signal transmitted by the third local oscillator phase-locked loop circuit to obtain a third I intermediate frequency signal, and transmit the third I intermediate frequency signal to the fifth intermediate frequency filter.

[0207] The sixth down-converter is communicatively connected with the third local oscillator phase-locked loop circuit and the sixth intermediate frequency filter to down-convert the high-frequency amplified reflected signal according to the sixth radio frequency signal transmitted by the third local oscillator phase-locked loop circuit to obtain a third Q-path intermediate frequency signal, and transmit the third Q-path intermediate frequency signal to the sixth intermediate frequency filter.

[0208] In a specific implementation, the signal output by the third local oscillator phase-locked loop circuit can be converted into an I-channel local oscillator signal and a Q-channel local oscillator signal (i.e., the fifth RF signal and the sixth RF signal) through a phase shifter. The I-channel and Q-channel local oscillator signals have a phase difference of 90°, and then are down-converted with the high-frequency amplified direct signal respectively.

[0209] The fifth intermediate frequency filter is communicatively connected to the fifth variable gain amplifier to perform intermediate frequency filtering on the third I intermediate frequency signals to obtain third I intermediate frequency filtered signals, and transmit the third I intermediate frequency filtered signals to the fifth variable gain amplifier.

[0210] The sixth intermediate frequency filter is communicatively connected to the sixth variable gain amplifier to perform intermediate frequency filtering on the third Q intermediate frequency signal to obtain a third Q intermediate frequency filtered signal, and transmit the third Q intermediate frequency filtered signal to the sixth variable gain amplifier.

[0211] The fifth variable gain amplifier is communicatively connected to the fifth AD converter and the fifth analog output buffer to perform intermediate frequency amplification processing on the third I intermediate frequency filtered signals to obtain the third I intermediate frequency amplified signals, and transmit the third I intermediate frequency amplified signals to the fifth AD converter and the fifth analog output buffer.

[0212] The sixth variable gain amplifier is communicatively connected to the sixth AD converter and the sixth analog output buffer to perform intermediate frequency amplification processing on the third Q intermediate frequency filtered signal to obtain a third Q intermediate frequency amplified signal, and transmit the third Q intermediate frequency amplified signal to the sixth AD converter and the sixth analog output buffer.

[0213] The fifth AD converter is communicatively connected to the third output interface to perform AD conversion processing on the third I-channel intermediate frequency amplified signal to obtain a fifth converted digital intermediate frequency signal, and transmits the fifth converted digital intermediate frequency signal to the baseband board through the third output interface.

[0214] The fifth analog output buffer is communicatively connected to the third output interface to perform signal amplification processing on the third I-channel intermediate frequency amplified signal to obtain a fifth amplified digital intermediate frequency signal, and transmit the fifth amplified digital intermediate frequency signal to the baseband board through the third output interface.

[0215] The sixth AD converter is communicatively connected to the third output interface to perform AD conversion processing on the third Q-channel intermediate frequency amplified signal to obtain a sixth converted digital intermediate frequency signal, and transmits the sixth converted digital intermediate frequency signal to the baseband board through the third output interface.

[0216] The sixth analog output buffer is communicatively connected to the third output interface to perform signal amplification processing on the third Q-channel intermediate frequency amplified signal to obtain a sixth amplified digital intermediate frequency signal, and transmit the sixth amplified digital intermediate frequency signal to the baseband board through the third output interface.

[0217] Among them, the first reflected digital intermediate frequency signal may include: a fifth converted digital intermediate frequency signal, a fifth amplified digital intermediate frequency signal, a sixth converted digital intermediate frequency signal and a sixth amplified digital intermediate frequency signal, that is, the fifth converted digital intermediate frequency signal, the fifth amplified digital intermediate frequency signal, the sixth converted digital intermediate frequency signal and the sixth amplified digital intermediate frequency signal together constitute the first reflected digital intermediate frequency signal.

[0218] In another specific implementation of the present application, the reflected low-frequency processing channel may include: a fourth low-noise amplifier, a seventh down-converter, an eighth down-converter, a fourth local oscillator phase-locked loop circuit, a seventh intermediate frequency filter, an eighth intermediate frequency filter, a seventh variable gain amplifier, an eighth variable gain amplifier, a seventh AD converter, an eighth AD converter, a seventh analog output buffer, an eighth analog output buffer and a fourth output interface.

[0219] The fourth low noise amplifier is respectively connected to the seventh down converter and the eighth down converter for communication, and is used for receiving the low-frequency reflected signal transmitted by the reflected radio frequency channel, amplifying the low-frequency reflected signal, obtaining a low-frequency amplified reflected signal, and transmitting the low-frequency amplified reflected signal to the seventh down converter and the eighth down converter, respectively.

[0220] The seventh down-converter is communicatively connected with the fourth local oscillator phase-locked loop circuit and the seventh intermediate frequency filter to down-convert the low-frequency amplified reflected signal according to the seventh radio frequency signal transmitted by the fourth local oscillator phase-locked loop circuit to obtain a fourth I-channel intermediate frequency signal, and transmit the fourth I-channel intermediate frequency signal to the seventh intermediate frequency filter.

[0221] The eighth down-converter is communicatively connected with the fourth local oscillator phase-locked loop circuit and the eighth intermediate frequency filter to down-convert the low-frequency amplified reflected signal according to the eighth radio frequency signal transmitted by the fourth local oscillator phase-locked loop circuit to obtain a fourth Q-path intermediate frequency signal, and transmit the fourth Q-path intermediate frequency signal to the eighth intermediate frequency filter.

[0222] In a specific implementation, the signal output by the fourth local oscillator phase-locked loop circuit can be converted into an I-channel local oscillator signal and a Q-channel local oscillator signal (i.e., the fifth RF signal and the sixth RF signal) through a phase shifter. The I-channel and Q-channel local oscillator signals have a phase difference of 90°, and then are down-converted with the high-frequency amplified direct signal respectively.

[0223] The seventh intermediate frequency filter is communicatively connected to the seventh variable gain amplifier to perform intermediate frequency filtering on the fourth I intermediate frequency signals to obtain fourth I intermediate frequency filtered signals, and transmit the fourth I intermediate frequency filtered signals to the seventh variable gain amplifier.

[0224] The eighth intermediate frequency filter is communicatively connected to the eighth variable gain amplifier to perform intermediate frequency filtering on the fourth Q intermediate frequency signal to obtain a fourth Q intermediate frequency filtered signal, and transmit the fourth Q intermediate frequency filtered signal to the eighth variable gain amplifier.

[0225] The seventh variable gain amplifier is communicatively connected to the seventh AD converter and the seventh analog output buffer to perform intermediate frequency amplification processing on the fourth I intermediate frequency filtered signal to obtain the fourth I intermediate frequency amplified signal, and transmit the fourth I intermediate frequency amplified signal to the seventh AD converter and the seventh analog output buffer.

[0226] The eighth variable gain amplifier is communicatively connected with the eighth AD converter and the eighth analog output buffer to perform intermediate frequency amplification processing on the fourth Q intermediate frequency filtered signal to obtain a fourth Q intermediate frequency amplified signal, and transmit the fourth Q intermediate frequency amplified signal to the eighth AD converter and the eighth analog output buffer.

[0227] The seventh AD converter is communicatively connected to the fourth output interface to perform AD conversion processing on the fourth I-channel intermediate frequency amplified signal to obtain a seventh converted digital intermediate frequency signal, and transmits the seventh converted digital intermediate frequency signal to the baseband board through the fourth output interface.

[0228] The seventh analog output buffer is communicatively connected to the fourth output interface to perform signal amplification processing on the fourth I-channel intermediate frequency amplified signal to obtain a seventh amplified digital intermediate frequency signal, and transmit the seventh amplified digital intermediate frequency signal to the baseband board through the fourth output interface.

[0229] The eighth AD converter is communicatively connected to the fourth output interface to perform AD conversion processing on the fourth Q-channel intermediate frequency amplified signal to obtain an eighth converted digital intermediate frequency signal, and transmits the eighth converted digital intermediate frequency signal to the baseband board through the fourth output interface.

[0230] The eighth analog output buffer is communicatively connected to the fourth output interface to perform signal amplification processing on the fourth Q-channel intermediate frequency amplified signal to obtain an eighth amplified digital intermediate frequency signal, and transmit the eighth amplified digital intermediate frequency signal to the baseband board through the fourth output interface.

[0231] Among them, the second reflected digital intermediate frequency signal may include: the seventh converted digital intermediate frequency signal, the seventh amplified digital intermediate frequency signal, the eighth converted digital intermediate frequency signal and the eighth amplified digital intermediate frequency signal, that is, the seventh converted digital intermediate frequency signal, the seventh amplified digital intermediate frequency signal, the eighth converted digital intermediate frequency signal and the eighth amplified digital intermediate frequency signal together constitute the second reflected digital intermediate frequency signal.

[0232] The embodiment of the present application adopts independent four-channel RF design technology and direct / reflected interval local oscillator design method to ensure that the local oscillator frequency interval between two adjacent channels is the farthest, avoid frequency migration between channels, affect the system accuracy, and realize high-precision detection of the system.

[0233] In this embodiment, the baseband board is a printed circuit board, and a baseband signal processing unit is arranged on the baseband board. The baseband signal processing unit may include: programmable logic and processing system. The main function of the baseband processing unit is to capture, track, measure, process reflected signals, package and send data, and store digital signals processed by the radio frequency processing unit. All modules are integrated on a PCB board, which improves the integration of the system. Compared with traditional receivers, the volume and weight are reduced while ensuring the reliability of the system.

[0234] Due to the limited conditions of the ultra-small Beidou altimeter, such as limited size and limited power, compared with the traditional Beidou altimeter, the embodiment of the present application proposes an implementation method of an ultra-miniaturized, low-power system on chip (SOC (System on Chip)). COTS (Commercial Off-The-Shelf) devices have the advantages of high integration, high density, low power consumption, low price, easy procurement, flexible design, and good performance. In addition, the development of SOC technology has enabled the functions implemented by multiple discrete devices to be integrated into a single chip, which has the advantages of low power consumption, high integration, and high system flexibility. Therefore, applying SOC technology to ultra-small altimeters can well meet the application requirements of this miniaturized platform for ultra-small altimeters.

[0235] The baseband signal processing unit can use a commercial SOC solution to implement baseband signal processing and resolution, where the SOC includes PL (Programmable Logic) and PS (Processing System) parts. The PL part implements baseband signal processing and reflection signal resolution, and the PS part implements positioning resolution, reflection signal calculation, etc. The peripheral circuit can use COTS devices to assist in the implementation of SOC functions.

[0236] In this embodiment, if Figure 3 As shown, the RF processing unit can transmit configuration parameters, clock signals and data with the baseband SOC. Configuration parameters need to be transmitted between the RF processing unit and the baseband SOC. These configuration parameters may include: frequency setting parameters, gain control parameters, modulation and demodulation parameters, etc. The clock signal is the key to ensure the synchronization between the RF processing unit and the baseband SOC. In wireless communication devices, a large amount of data, such as digital intermediate frequency signals, needs to be transmitted between the RF processing unit and the baseband SOC.

[0237] like Figure 3 As shown in the figure, broadcast data, pulse per second, and scientific data can be transmitted between the UAV platform and the baseband SOC. Broadcast data is used for communication between the UAV and the altimeter to transmit status information, location information, mission instructions, etc. Pulse per second is an important signal for time synchronization, which can ensure the time consistency between various system modules on the UAV platform and between altimeters. Scientific data refers to the data collected by the UAV when performing a specific task, such as altimeter data.

[0238] In this example, the power board may also be a printed circuit board, and the power module arranged on the printed circuit board may include a power processing unit. The structure of the power processing unit may be as follows: Figure 7As shown. The power processing unit includes a current limiting switch, a linear voltage regulated power supply 1, a linear voltage regulated power supply 2 and a switching power supply. The current limiting switch is used to limit the current of the +5V power supply provided by the UAV platform to prevent irreversible effects on the system due to overcurrent. The +5V power supply output by the current limiting switch is divided into four paths, one of which is provided to the linear voltage regulated power supply 1, one of which is provided to the linear voltage regulated power supply 2, one of which is directly provided to the antenna unit, and the last one is provided to the switching power supply. Linear voltage regulated power supply 1 is used to provide +1.8V power supply to the RF IC in the RF processing unit. Linear voltage regulated power supply 2 is used to provide +3.3V power supply to the constant temperature crystal oscillator in the RF processing unit. The switching power supply is used to provide +0.75V, +3.3V, +1.8V, +1.5V, +1.0V power supply to the baseband signal processing unit. Stable power supply voltage is essential for the normal operation of the baseband signal processing unit. Voltage fluctuations may cause component performance degradation or system instability. Providing a variety of precisely regulated and stable power supply voltages can ensure that the system can maintain stable performance under various operating conditions. By providing the right supply voltage to different components, the power consumption of the system can be optimized. Operating at a lower voltage, the power consumption of the components is generally reduced, which helps to extend the battery life of the UAV platform.

[0239] The altimeter provided in the embodiment of the present application is designed in an integrated manner with the antenna and the altimeter host, so that the direct antenna is conformally located directly above the altimeter host and points to the zenith when working. The reflective antenna is conformally located directly below the altimeter host and points to the ground when working, thereby achieving miniaturization and low power consumption of the system and meeting the technical requirements of the unmanned aerial vehicle platform for miniaturization of the carried payload.

[0240] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0241] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0242] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

[0243] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A height measuring instrument, characterized in that: The altimeter includes: a direct antenna, an upper cover, a first RF layer structure, an RF board, a second RF layer structure, a first baseband layer structure, a baseband board, a second baseband layer structure, a first power layer structure, a power board, a second power layer structure, a lower cover, a reflective antenna, a first connector, a second connector, a first inter-board connector and a second inter-board connector. A direct RF channel, a reflective RF channel and a RF processing unit are provided on the RF board. The direct RF channel is connected to the direct antenna, and the reflective RF channel is connected to the reflective antenna. The RF processing unit includes four RF processing channels, namely a direct high-frequency processing channel, a direct low-frequency processing channel, a reflective high-frequency processing channel and a reflective low-frequency processing channel. The direct high-frequency processing channel and the direct low-frequency processing channel are both connected to the direct RF channel and the baseband board for communication, and the reflected high-frequency processing channel and the reflected low-frequency processing channel are both connected to the reflected RF channel and the baseband board for communication, wherein, The direct antenna, the upper cover plate, the first RF layer structure, the RF board, the second RF layer structure, the first baseband layer structure, the baseband board, the second baseband layer structure, the first power layer structure, the power board, the second power layer structure, the lower cover plate and the reflective antenna are sequentially connected to form an integrated altimeter. The upper cover plate seals the first RF layer structure, and the lower cover plate seals the second power layer structure. The first connector passes through the first RF layer structure and the upper cover plate, and is communicatively connected with the direct antenna and the RF board, so as to send the direct signal received by the direct antenna to the RF board; The second connector passes through the lower cover plate, the second power layer structure, the power board, the first power layer structure, the second baseband layer structure, the baseband board, the first baseband layer structure and the second radio frequency layer structure, and is communicatively connected with the reflection antenna and the radio frequency board to send the reflection signal received by the reflection antenna to the radio frequency board; The second inter-board connector passes through the second baseband layer structure and the first power layer structure, and is communicatively connected with the baseband board and the power board to transmit the power signal of the power board to the baseband board; The first inter-board connector passes through the second RF layer structure and the first baseband layer structure, and is communicatively connected with the RF board and the baseband board to transmit the control signal of the baseband board and the power signal of the power board to the RF board, and transmits the digital intermediate frequency signal output by the RF board to the baseband board, so that the baseband board can complete the height measurement.

2. The altimeter according to claim 1, characterized in that: The radio frequency board is a printed circuit board, wherein: The direct radio frequency channel receives the direct signal transmitted by the direct antenna and processes the direct signal; The reflection radio frequency channel receives the reflection signal transmitted by the reflection antenna and processes the reflection signal; The radio frequency processing unit processes the radio frequency signals processed by the direct radio frequency channel and the reflected radio frequency channel.

3. The altimeter according to claim 2, characterized in that: The direct radio frequency channel includes: a first power divider, a first high frequency filter and a first low frequency filter, The first power divider is communicatively connected to the direct antenna to equally divide the direct signal transmitted by the direct antenna into a first direct signal and a second direct signal; The first high-frequency filter is communicatively connected with the first power divider and the radio frequency processing unit to filter out the low-frequency signal in the first direct signal to obtain a high-frequency direct signal, and transmit the high-frequency direct signal to the radio frequency processing unit; The first low-frequency filter is communicatively connected with the first power divider and the RF processing unit to filter out the high-frequency signal in the second direct signal to obtain a low-frequency direct signal, and transmit the low-frequency direct signal to the RF processing unit.

4. The altimeter according to claim 2, characterized in that: The reflected radio frequency channel includes: a second power divider, a second high frequency filter and a second low frequency filter, The second power divider is communicatively connected to the reflection antenna to equally divide the reflection signal transmitted by the reflection antenna into a first reflection signal and a second reflection signal; The second high-frequency filter is communicatively connected with the second power divider and the radio frequency processing unit to filter out the low-frequency signal in the first reflected signal to obtain a high-frequency reflected signal, and transmit the high-frequency reflected signal to the radio frequency processing unit; The second low-frequency filter is communicatively connected with the second power divider and the radio frequency processing unit to filter out the high-frequency signal in the second reflected signal to obtain a low-frequency reflected signal, and transmit the low-frequency reflected signal to the radio frequency processing unit.

5. The altimeter according to claim 2, characterized in that: The direct high-frequency processing channel processes the high-frequency direct signal transmitted by the direct radio frequency channel to obtain a first direct digital intermediate frequency signal, and transmits the first direct digital intermediate frequency signal to the baseband board; The direct low-frequency processing channel processes the low-frequency direct signal transmitted by the direct radio frequency channel to obtain a second direct digital intermediate frequency signal, and transmits the second direct digital intermediate frequency signal to the baseband board; The reflected high-frequency processing channel processes the high-frequency reflected signal transmitted by the reflected radio frequency channel to obtain a first reflected digital intermediate frequency signal, and transmits the first reflected digital intermediate frequency signal to the baseband board; The reflected low-frequency processing channel processes the low-frequency reflected signal transmitted by the reflected radio frequency channel to obtain a second reflected digital intermediate frequency signal, and transmits the second reflected digital intermediate frequency signal to the baseband board.

6. The altimeter according to claim 5, characterized in that: The direct high-frequency processing channel includes: a first low-noise amplifier, a first down-converter, a second down-converter, a first local oscillator phase-locked loop circuit, a first intermediate frequency filter, a second intermediate frequency filter, a first variable gain amplifier, a second variable gain amplifier, a first AD converter, a second AD converter, a first analog output buffer, a second analog output buffer and a first output interface, The first low noise amplifier is respectively connected to the first down converter and the second down converter for receiving the high frequency direct signal transmitted by the direct radio frequency channel, amplifying the high frequency direct signal to obtain a high frequency amplified direct signal, and transmitting the high frequency amplified direct signal to the first down converter and the second down converter respectively; The first down-converter is communicatively connected with the first local oscillator phase-locked loop circuit and the first intermediate frequency filter to perform down-conversion processing on the high-frequency amplified direct signal according to the first radio frequency signal transmitted by the first local oscillator phase-locked loop circuit to obtain first I intermediate frequency signals, and transmit the first I intermediate frequency signals to the first intermediate frequency filter; The second down-converter is communicatively connected with the first local oscillator phase-locked loop circuit and the second intermediate frequency filter to perform down-conversion processing on the high-frequency amplified direct signal according to the second radio frequency signal transmitted by the first local oscillator phase-locked loop circuit to obtain a first Q-channel intermediate frequency signal, and transmit the first Q-channel intermediate frequency signal to the second intermediate frequency filter; The first intermediate frequency filter is communicatively connected to the first variable gain amplifier to perform intermediate frequency filtering on the first I intermediate frequency signals to obtain first I intermediate frequency filtered signals, and transmit the first I intermediate frequency filtered signals to the first variable gain amplifier; The second intermediate frequency filter is communicatively connected to the second variable gain amplifier to perform intermediate frequency filtering on the first Q intermediate frequency signal to obtain a first Q intermediate frequency filtered signal, and transmit the first Q intermediate frequency filtered signal to the second variable gain amplifier; The first variable gain amplifier is communicatively connected with the first AD converter and the first analog output buffer to perform intermediate frequency amplification processing on the first I intermediate frequency filtered signals to obtain first I intermediate frequency amplified signals, and transmit the first I intermediate frequency amplified signals to the first AD converter and the first analog output buffer; The second variable gain amplifier is communicatively connected with the second AD converter and the second analog output buffer to perform intermediate frequency amplification processing on the first Q-channel intermediate frequency filtered signal to obtain a first Q-channel intermediate frequency amplified signal, and transmit the first Q-channel intermediate frequency amplified signal to the second AD converter and the second analog output buffer; The first AD converter is communicatively connected to the first output interface to perform AD conversion processing on the first I-channel intermediate frequency amplified signals to obtain a first converted digital intermediate frequency signal, and transmit the first converted digital intermediate frequency signal to the baseband board through the first output interface; The first analog output buffer is communicatively connected to the first output interface to perform signal amplification processing on the first I-channel intermediate frequency amplified signals to obtain a first amplified digital intermediate frequency signal, and transmit the first amplified digital intermediate frequency signal to the baseband board through the first output interface; The second AD converter is communicatively connected to the first output interface to perform AD conversion processing on the first Q-channel intermediate frequency amplified signal to obtain a second converted digital intermediate frequency signal, and transmit the second converted digital intermediate frequency signal to the baseband board through the first output interface; The second analog output buffer is communicatively connected to the first output interface to perform signal amplification processing on the first Q-channel intermediate frequency amplified signal to obtain a second amplified digital intermediate frequency signal, and transmit the second amplified digital intermediate frequency signal to the baseband board through the first output interface; The first direct digital intermediate frequency signal includes: the first converted digital intermediate frequency signal, the first amplified digital intermediate frequency signal, the second converted digital intermediate frequency signal and the second amplified digital intermediate frequency signal.

7. The altimeter according to claim 5, characterized in that: The direct low-frequency processing channel includes: a second low-noise amplifier, a third down-converter, a fourth down-converter, a second local oscillator phase-locked loop circuit, a third intermediate frequency filter, a fourth intermediate frequency filter, a third variable gain amplifier, a fourth variable gain amplifier, a third AD converter, a fourth AD converter, a third analog output buffer, a fourth analog output buffer and a second output interface, The second low noise amplifier is respectively connected to the third down converter and the fourth down converter for receiving the low frequency direct signal transmitted by the direct radio frequency channel, amplifying the low frequency direct signal to obtain a low frequency amplified direct signal, and transmitting the low frequency amplified direct signal to the third down converter and the fourth down converter respectively; The third down-converter is communicatively connected with the second local oscillator phase-locked loop circuit and the third intermediate frequency filter to perform down-conversion processing on the low-frequency amplified direct signal according to the third radio frequency signal transmitted by the second local oscillator phase-locked loop circuit to obtain a second I-channel intermediate frequency signal, and transmit the second I-channel intermediate frequency signal to the third intermediate frequency filter; The fourth down-converter is communicatively connected with the second local oscillator phase-locked loop circuit and the fourth intermediate frequency filter to perform down-conversion processing on the low-frequency amplified direct signal according to the fourth radio frequency signal transmitted by the second local oscillator phase-locked loop circuit to obtain a second Q-path intermediate frequency signal, and transmit the second Q-path intermediate frequency signal to the fourth intermediate frequency filter; The third intermediate frequency filter is communicatively connected to the third variable gain amplifier to perform intermediate frequency filtering on the second I intermediate frequency signals to obtain second I intermediate frequency filtered signals, and transmit the second I intermediate frequency filtered signals to the third variable gain amplifier; The fourth intermediate frequency filter is communicatively connected to the fourth variable gain amplifier to perform intermediate frequency filtering on the second Q intermediate frequency signal to obtain a second Q intermediate frequency filtered signal, and transmit the second Q intermediate frequency filtered signal to the fourth variable gain amplifier; The third variable gain amplifier is communicatively connected with the third AD converter and the third analog output buffer to perform intermediate frequency amplification processing on the second I intermediate frequency filtered signals to obtain second I intermediate frequency amplified signals, and transmit the second I intermediate frequency amplified signals to the third AD converter and the third analog output buffer; The fourth variable gain amplifier is communicatively connected with the fourth AD converter and the fourth analog output buffer to perform intermediate frequency amplification processing on the second Q-channel intermediate frequency filtered signal to obtain a second Q-channel intermediate frequency amplified signal, and transmit the second Q-channel intermediate frequency amplified signal to the fourth AD converter and the fourth analog output buffer; The third AD converter is communicatively connected to the second output interface to perform AD conversion processing on the second I-channel intermediate frequency amplified signal to obtain a third converted digital intermediate frequency signal, and transmit the third converted digital intermediate frequency signal to the baseband board through the second output interface; The third analog output buffer is communicatively connected with the second output interface to perform signal amplification processing on the second I-channel intermediate frequency amplified signals to obtain a third amplified digital intermediate frequency signal, and transmit the third amplified digital intermediate frequency signal to the baseband board through the second output interface; The fourth AD converter is communicatively connected to the second output interface to perform AD conversion processing on the second Q-channel intermediate frequency amplified signal to obtain a fourth converted digital intermediate frequency signal, and transmit the fourth converted digital intermediate frequency signal to the baseband board through the second output interface; The fourth analog output buffer is communicatively connected with the second output interface to perform signal amplification processing on the second Q-channel intermediate frequency amplified signal to obtain a fourth amplified digital intermediate frequency signal, and transmit the fourth amplified digital intermediate frequency signal to the baseband board through the second output interface; The second direct digital intermediate frequency signal includes: the third converted digital intermediate frequency signal, the third amplified digital intermediate frequency signal, the fourth converted digital intermediate frequency signal and the fourth amplified digital intermediate frequency signal.

8. The altimeter according to claim 5, characterized in that: The reflected high-frequency processing channel includes: a third low-noise amplifier, a fifth down-converter, a sixth down-converter, a third local oscillator phase-locked loop circuit, a fifth intermediate frequency filter, a sixth intermediate frequency filter, a fifth variable gain amplifier, a sixth variable gain amplifier, a fifth AD converter, a sixth AD converter, a fifth analog output buffer, a sixth analog output buffer and a third output interface, The third low noise amplifier is respectively connected to the fifth down converter and the sixth down converter for receiving the high frequency reflected signal transmitted by the reflected radio frequency channel, amplifying the high frequency reflected signal to obtain a high frequency amplified reflected signal, and transmitting the high frequency amplified reflected signal to the fifth down converter and the sixth down converter respectively; The fifth down-converter is communicatively connected with the third local oscillator phase-locked loop circuit and the fifth intermediate frequency filter to perform down-conversion processing on the high-frequency amplified reflected signal according to the fifth radio frequency signal transmitted by the third local oscillator phase-locked loop circuit to obtain a third I intermediate frequency signal, and transmit the third I intermediate frequency signal to the fifth intermediate frequency filter; The sixth down-converter is communicatively connected with the third local oscillator phase-locked loop circuit and the sixth intermediate frequency filter to perform down-conversion processing on the high-frequency amplified reflected signal according to the sixth radio frequency signal transmitted by the third local oscillator phase-locked loop circuit to obtain a third Q-path intermediate frequency signal, and transmit the third Q-path intermediate frequency signal to the sixth intermediate frequency filter; The fifth intermediate frequency filter is communicatively connected with the fifth variable gain amplifier to perform intermediate frequency filtering on the third I intermediate frequency signals to obtain third I intermediate frequency filtered signals, and transmit the third I intermediate frequency filtered signals to the fifth variable gain amplifier; The sixth intermediate frequency filter is communicatively connected with the sixth variable gain amplifier to perform intermediate frequency filtering on the third Q intermediate frequency signal to obtain a third Q intermediate frequency filtered signal, and transmit the third Q intermediate frequency filtered signal to the sixth variable gain amplifier; The fifth variable gain amplifier is communicatively connected with the fifth AD converter and the fifth analog output buffer to perform intermediate frequency amplification processing on the third I-channel intermediate frequency filtered signals to obtain third I-channel intermediate frequency amplified signals, and transmit the third I-channel intermediate frequency amplified signals to the fifth AD converter and the fifth analog output buffer; The sixth variable gain amplifier is communicatively connected with the sixth AD converter and the sixth analog output buffer to perform intermediate frequency amplification processing on the third Q-channel intermediate frequency filtered signal to obtain a third Q-channel intermediate frequency amplified signal, and transmit the third Q-channel intermediate frequency amplified signal to the sixth AD converter and the sixth analog output buffer; The fifth AD converter is communicatively connected to the third output interface to perform AD conversion processing on the third I-channel intermediate frequency amplified signal to obtain a fifth converted digital intermediate frequency signal, and transmit the fifth converted digital intermediate frequency signal to the baseband board through the third output interface; The fifth analog output buffer is communicatively connected to the third output interface to perform signal amplification processing on the third I-channel intermediate frequency amplified signal to obtain a fifth amplified digital intermediate frequency signal, and transmit the fifth amplified digital intermediate frequency signal to the baseband board through the third output interface; The sixth AD converter is communicatively connected to the third output interface to perform AD conversion processing on the third Q-channel intermediate frequency amplified signal to obtain a sixth converted digital intermediate frequency signal, and transmit the sixth converted digital intermediate frequency signal to the baseband board through the third output interface; The sixth analog output buffer is communicatively connected to the third output interface to perform signal amplification processing on the third Q-channel intermediate frequency amplified signal to obtain a sixth amplified digital intermediate frequency signal, and transmit the sixth amplified digital intermediate frequency signal to the baseband board through the third output interface; The first reflected digital intermediate frequency signal includes: the fifth converted digital intermediate frequency signal, the fifth amplified digital intermediate frequency signal, the sixth converted digital intermediate frequency signal and the sixth amplified digital intermediate frequency signal.

9. The altimeter according to claim 5, characterized in that: The reflected low-frequency processing channel includes: a fourth low-noise amplifier, a seventh down-converter, an eighth down-converter, a fourth local oscillator phase-locked loop circuit, a seventh intermediate frequency filter, an eighth intermediate frequency filter, a seventh variable gain amplifier, an eighth variable gain amplifier, a seventh AD converter, an eighth AD converter, a seventh analog output buffer, an eighth analog output buffer and a fourth output interface, The fourth low noise amplifier is respectively connected to the seventh down converter and the eighth down converter for receiving the low frequency reflection signal transmitted by the reflection radio frequency channel, amplifying the low frequency reflection signal to obtain a low frequency amplified reflection signal, and transmitting the low frequency amplified reflection signal to the seventh down converter and the eighth down converter respectively; The seventh down-converter is communicatively connected with the fourth local oscillator phase-locked loop circuit and the seventh intermediate frequency filter to perform down-conversion processing on the low-frequency amplified reflected signal according to the seventh radio frequency signal transmitted by the fourth local oscillator phase-locked loop circuit to obtain a fourth I intermediate frequency signal, and transmit the fourth I intermediate frequency signal to the seventh intermediate frequency filter; The eighth down-converter is communicatively connected with the fourth local oscillator phase-locked loop circuit and the eighth intermediate frequency filter to perform down-conversion processing on the low-frequency amplified reflected signal according to the eighth radio frequency signal transmitted by the fourth local oscillator phase-locked loop circuit to obtain a fourth Q-channel intermediate frequency signal, and transmit the fourth Q-channel intermediate frequency signal to the eighth intermediate frequency filter; The seventh intermediate frequency filter is communicatively connected to the seventh variable gain amplifier to perform intermediate frequency filtering on the fourth I intermediate frequency signals to obtain fourth I intermediate frequency filtered signals, and transmit the fourth I intermediate frequency filtered signals to the seventh variable gain amplifier; The eighth intermediate frequency filter is communicatively connected with the eighth variable gain amplifier to perform intermediate frequency filtering on the fourth Q intermediate frequency signal to obtain a fourth Q intermediate frequency filtered signal, and transmit the fourth Q intermediate frequency filtered signal to the eighth variable gain amplifier; The seventh variable gain amplifier is communicatively connected with the seventh AD converter and the seventh analog output buffer to perform intermediate frequency amplification processing on the fourth I-channel intermediate frequency filtered signals to obtain fourth I-channel intermediate frequency amplified signals, and transmit the fourth I-channel intermediate frequency amplified signals to the seventh AD converter and the seventh analog output buffer; The eighth variable gain amplifier is communicatively connected with the eighth AD converter and the eighth analog output buffer to perform intermediate frequency amplification processing on the fourth Q-channel intermediate frequency filtered signal to obtain a fourth Q-channel intermediate frequency amplified signal, and transmit the fourth Q-channel intermediate frequency amplified signal to the eighth AD converter and the eighth analog output buffer; The seventh AD converter is communicatively connected to the fourth output interface to perform AD conversion processing on the fourth I-channel intermediate frequency amplified signal to obtain a seventh converted digital intermediate frequency signal, and transmit the seventh converted digital intermediate frequency signal to the baseband board through the fourth output interface; The seventh analog output buffer is communicatively connected with the fourth output interface to perform signal amplification processing on the fourth I-channel intermediate frequency amplified signal to obtain a seventh amplified digital intermediate frequency signal, and transmit the seventh amplified digital intermediate frequency signal to the baseband board through the fourth output interface; The eighth AD converter is communicatively connected to the fourth output interface to perform AD conversion processing on the fourth Q-channel intermediate frequency amplified signal to obtain an eighth converted digital intermediate frequency signal, and transmit the eighth converted digital intermediate frequency signal to the baseband board through the fourth output interface; The eighth analog output buffer is communicatively connected to the fourth output interface to perform signal amplification processing on the fourth Q-channel intermediate frequency amplified signal to obtain an eighth amplified digital intermediate frequency signal, and transmit the eighth amplified digital intermediate frequency signal to the baseband board through the fourth output interface; The second reflected digital intermediate frequency signal includes: the seventh converted digital intermediate frequency signal, the seventh amplified digital intermediate frequency signal, the eighth converted digital intermediate frequency signal and the eighth amplified digital intermediate frequency signal.

10. The altimeter according to claim 1, characterized in that: The baseband board is a printed circuit board. A baseband signal processing unit is arranged on the baseband board. The baseband signal processing unit includes: programmable logic and a processing system.

11. The altimeter according to claim 1, characterized in that: The direct antenna comprises: a direct antenna radiation unit and a direct front radio frequency unit. The direct antenna radiation unit is used to receive the GNSS direct signal and transmit the GNSS direct signal to the direct front radio frequency unit; The direct front radio frequency unit is used to process the GNSS direct signal to obtain the direct signal and transmit the direct signal to the radio frequency board.

12. The altimeter according to claim 11, characterized in that: The direct front radio frequency unit comprises: a first-stage amplifier, a first-stage attenuator, a first-stage duplex filter, a second-stage amplifier, a second-stage attenuator, and a second-stage duplex filter which are sequentially connected in communication. The first-stage amplifier is used to receive the GNSS direct signal and perform radio frequency amplification processing on the GNSS direct signal to obtain a first direct amplified signal; The first-stage attenuator is used to perform signal attenuation processing on the first direct amplified signal to obtain a first direct attenuated signal; The first-stage duplex filter is used to perform out-of-band interference filtering on the first direct attenuated signal to obtain a first direct filtered signal; The second-stage amplifier is used to perform radio frequency amplification processing on the first direct filtered signal to obtain a second direct amplified signal; The second-stage attenuator is used to perform signal attenuation processing on the second direct amplified signal to obtain a second direct attenuated signal; The second-stage duplex filter is used to perform out-of-band interference filtering on the second direct attenuated signal to obtain the direct signal, and transmit the direct signal to the radio frequency board.

13. The altimeter according to claim 1, characterized in that: The reflective antenna comprises: a reflective antenna radiation unit and a reflective front radio frequency unit, The reflective antenna radiation unit is used to receive the GNSS reflected signal and transmit the GNSS reflected signal to the reflective front radio frequency unit; The reflection front RF unit is used to perform signal processing on the GNSS reflection signal to obtain the reflection signal, and transmit the reflection signal to the RF board.

14. The altimeter according to claim 13, characterized in that: The reflective front radio frequency unit comprises: a third-stage amplifier, a third-stage attenuator, a third-stage duplex filter, a fourth-stage amplifier, a fourth-stage attenuator and a fourth-stage duplex filter which are sequentially connected in communication. The third-stage amplifier is used to receive the GNSS reflected signal and perform radio frequency amplification processing on the GNSS reflected signal to obtain a first reflected amplified signal; The third-stage attenuator is used to perform signal attenuation processing on the first reflected amplified signal to obtain a first reflected attenuated signal; The third-stage duplex filter is used to perform out-of-band interference filtering on the first reflection attenuation signal to obtain a first reflection filtering signal; The fourth-stage amplifier is used to perform radio frequency amplification processing on the first reflected filtered signal to obtain a second reflected amplified signal; The fourth-stage attenuator is used to perform signal attenuation processing on the second reflected amplified signal to obtain a second reflected attenuated signal; The fourth-stage duplex filter is used to perform out-of-band interference filtering on the second reflection attenuation signal to obtain the reflection signal, and transmit the reflection signal to the radio frequency board.

15. The altimeter according to claim 1, characterized in that: The altimeter further comprises: an upper supporting structure and a lower supporting structure, The direct antenna is connected to the upper cover plate through the upper supporting structure; The reflective antenna is connected to the lower cover plate through the lower supporting structure.

16. The altimeter according to claim 1, characterized in that: The direct antenna and the reflective antenna are both active antennas.

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