Low-power-consumption management method and device, electronic equipment, chip and medium

By dynamically adjusting the time required for the memory and controller to enter a low-power state, combined with access information, the problem of inability to adapt to different scenarios and access models in the prior art is solved, and more refined low-power management and better energy efficiency ratio are achieved.

CN119536498AActive Publication Date: 2025-02-28BEIJING X RING TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202311120461.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-31
Publication Date
2025-02-28
Estimated Expiration
2043-08-31

AI Technical Summary

Technical Problem

The existing technology cannot adapt to all scenarios and different access models, resulting in low-power management methods that cannot effectively adapt to the performance and power consumption requirements of different application scenarios.

Method used

By obtaining the first and second time of the memory and controller in a low power state, combining the user's access information, the first time is dynamically adjusted to meet the needs of different scenarios and access models.

Benefits of technology

It realizes more refined low-power management, avoids power waste and performance losses, and can better adapt to the needs of different application scenarios.

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Abstract

The invention provides a low-power-consumption management method and device, electronic equipment, a chip and a medium, and relates to the technical field of low power consumption, the method comprises the following steps: obtaining first time and second time of a memory and a controller in a low-power-consumption state, the first time comprising time required by the memory and the controller to enter the low-power-consumption state, and the second time comprising time required by the memory and the controller to enter the low-power-consumption state; the second time comprises time required by the memory and the controller to exit the low-power-consumption state; monitoring an access behavior of a user, and obtaining access information; the first time is adjusted based on the access information, the first time and the second time, and the time required for entering the low-power-consumption state is dynamically adjusted, so that different application scenes can be better adapted, finer low-power-consumption management is realized, and power consumption waste and performance loss are avoided.
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Description

Technical Field

[0001] The present disclosure relates to the field of low power consumption technology, and in particular to a low power consumption management method, device, electronic device, chip and medium. Background Art

[0002] With the widespread application of embedded systems, such as mobile devices, smart homes, and the Internet of Things, the issues of power consumption and energy efficiency have become increasingly prominent, directly related to the system's battery life, thermal management, performance and other aspects. Therefore, with the complexity of embedded systems and the diversification of application scenarios, a more intelligent, sophisticated and customized low-power management method is needed to achieve better system performance and lower power consumption.

[0003] However, the low-power management method in the related art takes all scenarios into consideration. On the basis of ensuring that the performance and power consumption data of typical scenarios meet the standards, a unified threshold is set to determine the time required to enter or exit different low-power states. Since the application scenarios and access models of embedded systems are diverse, different scenarios and access models have different performance and power consumption requirements. Setting a unified threshold will make it impossible to adapt to all scenarios and different access models. Summary of the invention

[0004] The present disclosure provides a low power consumption management method, device, electronic device, chip and medium to solve the problem that the related technology cannot adapt to all scenarios and different access models.

[0005] A first aspect embodiment of the present disclosure proposes a low power consumption management method, the method comprising: obtaining a first time and a second time when a memory and a controller are in a low power consumption state, the first time including the time required for the memory and the controller to enter the low power consumption state, and the second time including the time required for the memory and the controller to exit the low power consumption state; obtaining access information to the memory, the access information being related to the user's operation; and adjusting the first time based on the access information, the first time and the second time.

[0006] In some embodiments of the present disclosure, the first time and the second time are determined by the interaction time between the memory die in the memory and the controller.

[0007] In some embodiments of the present disclosure, access information includes an access scenario and an access model. Based on the access information, the first time and the second time, adjusting the first time includes: determining state transition information of a low power consumption state under the access scenario, the state transition information including the first number of times the memory enters a low power consumption state under the access scenario and the operating time in the low power consumption state; adjusting the first time based on the access information, the state transition information, the first time and the second time.

[0008] In some embodiments of the present disclosure, based on access information, state transition information, a first time, and a second time, adjusting the first time includes: acquiring power consumption data in an access scenario; based on the power consumption data and an access model, counting access intervals, where the access interval includes the time interval between executing two adjacent access behaviors; based on the access intervals, the first time, the second time, and the state transition information, determining judgment data within a preset period, where the judgment data includes a working time ratio and a first state transition ratio; and adjusting the first time based on the judgment data.

[0009] In some embodiments of the present disclosure, the judgment data includes a working time ratio and a first state transition ratio. Based on the access interval, the first time, the second time and the state transition information, determining the judgment data within a preset period includes: based on the access interval, the first time, the second time and the state transition information, obtaining a fourth time, a fifth time, a working time, a third time and a second number, the third time includes the time required for the memory and the controller to actually enter a low power consumption state within the preset period, the working time includes the time required for the data path to operate normally within the preset period, the second number includes the first number of times the memory enters a low power consumption state under an access scenario within the preset period, the fourth time includes the first time in the low power consumption state within the preset period, and the fifth time includes the second time in the low power consumption state within the preset period; determining the working time ratio based on the working time within the preset period and the preset period; determining the first state transition ratio based on the fourth time, the fifth time, the second number and the third time within the preset period.

[0010] In some embodiments of the present disclosure, adjusting the first time based on the judgment data includes: if the judgment data meets a first preset condition, increasing the first time; if the judgment data meets a second preset condition, decreasing the first time.

[0011] In some embodiments of the present disclosure, the first preset condition includes that the proportion of working time is greater than or equal to the first preset threshold; the second preset condition includes that the proportion of working time is less than the first preset threshold, and the first state transition ratio is greater than or equal to the second preset threshold.

[0012] A second aspect embodiment of the present disclosure proposes a low power management device, which includes: a first acquisition unit, used to acquire a first time and a second time when a memory and a controller are in a low power state, the first time includes the time required for the memory and the controller to enter the low power state, and the second time includes the time required for the memory and the controller to exit the low power state; a second acquisition unit, used to acquire access information of the memory, the access information is related to the user's operation; an adjustment unit, used to adjust the first time based on the access information, the first time and the second time.

[0013] In some embodiments of the present disclosure, the first time and the second time are determined by the interaction time between the memory die in the memory and the controller.

[0014] In some embodiments of the present disclosure, access information includes access scenarios and access models, and the adjustment unit is used to: determine state transition information of a low power consumption state in an access scenario, the state transition information including the number of times the memory enters a low power consumption state in an access scenario and the operating time in the low power consumption state; adjust the first time based on the access information, the state transition information, the first time and the second time.

[0015] In some embodiments of the present disclosure, the adjustment unit is used to: obtain power consumption data in an access scenario; based on the power consumption data and the access model, count the access interval, the access interval includes the time interval between two adjacent access behaviors; based on the access interval, the first time, the second time and the state transition information, determine the judgment data within a preset period, the judgment data includes the working time ratio and the first state transition ratio; based on the judgment data, adjust the first time.

[0016] In some embodiments of the present disclosure, the adjustment unit is used to: obtain the first time, the second time, the working time, the third time and the number of times in the low power consumption state within a preset period based on the access interval, the first time, the second time and the state transition information, the third time includes the time required for the memory and the controller to actually enter the low power consumption state within the preset period, and the working time includes the time required for the data path to work normally within the preset period; determine the working time ratio based on the working time within the preset period and the preset period; determine the first state transition ratio based on the first time, the second time, the first number and the third time within the preset period.

[0017] In some embodiments of the present disclosure, the adjustment unit is used to: if the judgment data meets the first preset condition, increase the first time; if the judgment data meets the second preset condition, reduce the first time.

[0018] In some embodiments of the present disclosure, the first preset condition includes that the proportion of working time is greater than or equal to the first preset threshold; the second preset condition includes that the proportion of working time is less than the first preset threshold, and the first state transition ratio is greater than or equal to the second preset threshold.

[0019] The third aspect embodiment of the present disclosure proposes an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method described in the first aspect embodiment of the present disclosure.

[0020] The fourth aspect embodiment of the present disclosure proposes a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to enable a computer to execute the method described in the first aspect embodiment of the present disclosure.

[0021] The fifth aspect embodiment of the present disclosure proposes a chip, which includes one or more interface circuits and one or more processors; the interface circuit is used to receive signals from a memory of an electronic device and send signals to the processor, the signals including computer instructions stored in the memory, and when the processor executes the computer instructions, the electronic device executes the method described in the first aspect embodiment of the present disclosure.

[0022] In summary, according to the low power management method proposed in the present invention, by obtaining the first time and the second time when the memory and the controller are in the low power state, the first time includes the time required for the memory and the controller to enter the low power state, and the second time includes the time required for the memory and the controller to exit the low power state; obtaining the access information of the memory, the access information is related to the user's operation; based on the access information, the first time and the second time, adjusting the first time, by dynamically adjusting the time required to enter the low power state, it can better adapt to different application scenarios, achieve more refined low power management, and avoid power consumption waste and performance loss.

[0023] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings herein are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the description are used to explain the principles of the present disclosure, and do not constitute improper limitations on the present disclosure.

[0025] Figure 1 A protocol diagram of a low power consumption management method in a self-refresh state provided by an embodiment of the present disclosure;

[0026] Figure 2 A schematic diagram of a state machine conversion timing of a DRAM under a JEDEC lpddrx protocol provided in an embodiment of the present disclosure;

[0027] Figure 3 A flowchart of a low power consumption management method provided by an embodiment of the present disclosure;

[0028] Figure 4 A flowchart of a low power consumption management method provided by an embodiment of the present disclosure;

[0029] Figure 5 A schematic diagram of comparing power consumption data in a low power consumption state and an idle state provided in an embodiment of the present disclosure;

[0030] Figure 6 A schematic diagram of the structure of a low power consumption management device provided by an embodiment of the present disclosure;

[0031] Figure 7 A schematic diagram of the structure of an electronic device provided by an embodiment of the present disclosure;

[0032] Figure 8 A schematic diagram of the structure of a chip provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0033] The embodiments of the present disclosure are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions.

[0034] Most related technologies use a method of implementing low power management with fixed intervals of various low power states. This method is not flexible enough and cannot be dynamically adjusted according to real business scenarios. This easily leads to the fact that most products can only find a timing parameter that covers typical use case scenarios as much as possible based on preliminary scenario analysis.

[0035] Figure 1 A protocol diagram of a low-power management method in a self-refresh state provided for an embodiment of the present disclosure. The self-refresh state is a special low-power state in which the memory can automatically refresh to keep data from being lost. The protocol specifies the time interval from exiting the self-refresh state to the arrival of a new command, and this time interval varies depending on the capacity of the memory particles. Since the timing constraints of particles of different capacities are different, the time required to exit the self-refresh state is also different on platforms of different capacities. However, the magnitude of this time difference is usually small, and the conventional operating process is not very sensitive to this difference.

[0036] The low-power management method in the related art takes all scenarios into consideration in a balanced manner. On the basis of ensuring that the performance and power consumption data of typical scenarios meet the standards, a unified threshold is set to determine the time required to enter or exit different low-power states. Since the application scenarios and access models of embedded systems are diverse, different scenarios and access models have different performance and power consumption requirements. Setting a unified threshold will result in the inability to adapt to all scenarios and different access models.

[0037] In order to solve the problems existing in the related technologies, the present invention proposes a low-power management method, which monitors access behavior in real-time user usage scenarios and dynamically adjusts the strategy of entering low power consumption, so that the embedded system can guarantee performance requirements in scenarios with high bandwidth and high access volume, while optimizing power consumption in scenarios with no access or sparse access, achieving better energy efficiency and avoiding power consumption waste and performance loss.

[0038] The method proposed in the present disclosure can be applied to the field of energy efficiency tuning related to power consumption of dynamic random access memory (DRAM) in embedded system memory, and can also be applied to other technical fields. For example, it can be applied to power consumption management of other embedded systems, such as microcontrollers, sensor nodes, etc., which is not limited in the embodiments of the present disclosure.

[0039] Figure 2 A schematic diagram of the state machine transition timing of DRAM under the JEDEC LPDDRX protocol provided in the embodiment of the present disclosure involves a variety of low-power states, including idle, idle power down, self refresh, and deep sleep mode. Each state has specific timing requirements for entry and exit, and it also takes a certain amount of time to enter or exit different low-power states on the controller side. Therefore, in order to maximize the benefits of power consumption and performance, a real-time monitoring mechanism is required.

[0040] The low power consumption management method provided by the present application is described in detail below with reference to the accompanying drawings.

[0041] Figure 3 A flowchart of a low power consumption management method provided by an embodiment of the present disclosure. Figure 3 As shown, the low power consumption management method includes steps 101-103.

[0042] Step 101, obtaining a first time and a second time when the memory and the controller are in a low power consumption state, wherein the first time includes the time required for the memory and the controller to enter the low power consumption state, and the second time includes the time required for the memory and the controller to exit the low power consumption state.

[0043] In an embodiment of the present disclosure, the memory may be a dynamic random access memory (DRAM), which is a common type of memory that uses a capacitor to store charge to store data. DRAM is characterized by high speed and low price, but requires regular refresh to maintain data. Depending on different application scenarios and requirements, there are various types of DRAM, such as SDRAM (synchronous dynamic random access memory), DDRAM (double data rate dynamic random access memory), etc. In embedded systems, DRAM is typically used to store program code, data, etc. The controller may be a controller of a SOC, which is called a system-on-chip, also known as a system on chip, and is an integrated circuit with a dedicated target, which contains a complete system and all the contents of embedded software.

[0044] The low power state refers to a state in which the memory and controller are used to reduce power consumption while maintaining data storage. For example, in embedded systems and mobile devices, different low power states are usually used to extend the battery life of the device. The memory and controller will enter different low power states, such as sleep state, stop state, etc., to reduce power consumption. In the present disclosure, the low power state is determined based on actual conditions and is not limited in the embodiments of the present disclosure.

[0045] The first time (Tlpe) refers to the time required for the memory and controller to enter the low power state. The first time includes the time required for the memory and controller to actually enter the low power state from the time when the memory and controller respond to the instruction to enter the low power state sent by the embedded system or the memory and controller itself. The second time (Tlpx) refers to the time required for the memory and controller to exit the low power state, that is, the time required for the memory and controller to actually exit the low power state from the time when the memory and controller respond to the instruction to exit the low power state sent by the embedded system or the memory and controller itself. Among them, the first time and the second time can be specifically obtained through the connection interaction time between the memory grain side and the system chip (System on Chip, SOC) controller side. The first time can specifically include the first time of the memory grain side and the controller side. Similarly, the second time can specifically include the second time of the memory grain side and the controller side.

[0046] It is understandable that in embedded systems, the power consumption management of the system can be properly arranged according to the low power consumption state and timing requirements of the memory and controller to achieve a better balance between performance and power consumption.

[0047] Step 102: Acquire access information of the memory, where the access information is related to the user's operation.

[0048] In the embodiments of the present disclosure, the user's access behavior can be detected to obtain access information, which is related to the user's operation. The access behavior may include the user's page dwell time, access frequency, access sequence, etc. According to the user's current access behavior, the access scenario corresponding to the access behavior is analyzed. The access scenario refers to the application scenario of the user's current access process obtained through the access behavior. At the same time, the user's access model can be obtained based on the access behavior. The access model may include information such as the user's behavior pattern, interests and hobbies, and access habits.

[0049] Step 103: adjust the first time based on the access information, the first time and the second time.

[0050] In an embodiment of the present disclosure, state transition information in the current low power consumption state is determined according to the access information. The first time is adjusted according to the determined state transition information and the first time and the second time. The adjusted first time can be better suitable for the current access scenario and access model.

[0051] It is understandable that, because in actual situations the second time mostly uses the minimum value by default, the present disclosure mainly adjusts the first time.

[0052] In summary, according to the low power management method proposed in the present invention, by obtaining the first time and the second time when the memory and the controller are in the low power state, the first time includes the time required for the memory and the controller to enter the low power state, and the second time includes the time required for the memory and the controller to exit the low power state; obtaining the access information of the memory, the access information is related to the user's operation; based on the access information, the first time and the second time, adjusting the first time, by dynamically adjusting the time required to enter the low power state, it can better adapt to different application scenarios, achieve more refined low power management, and avoid power consumption waste and performance loss.

[0053] based on Figure 4 The embodiment shown, Figure 4 The following further illustrates a flow chart of a low power consumption management method proposed in the present disclosure. Figure 4 based on Figure 3 In the embodiment shown, step 103 is further defined. Figure 4 In the embodiment shown, step 103 includes step 203 and step 204. The method is applied to low power consumption management scenarios, such as Figure 4 As shown, the method comprises the following steps:

[0054] Step 201 , obtaining a first time and a second time when the memory and the controller are in a low power consumption state.

[0055] In an embodiment of the present disclosure, the memory includes a storage die, and the first time and the second time are determined according to the interaction time between the storage die and the controller.

[0056] In an optional embodiment of the present disclosure, through the connection between the storage crystal grain and the controller, the time-consuming lists Tlpe and Tlpx of the grain side and the soc side of the memory in different low-power states can be directly obtained. Among them, Tlpe refers to the first time, Tlpx refers to the second time, the grain side refers to some grains in the memory, that is, the storage crystal grain of the present disclosure, and the soc side can specifically refer to the controller connected to the memory.

[0057] Step 202: monitor the user's access behavior and obtain access information, which includes access scenarios and access models.

[0058] In the embodiments of the present disclosure, the current access scenario and access model are obtained by monitoring the user's access behavior. The access model can be obtained by processing the access behavior through pattern tracing technology (Pattern Trace). Pattern Trace is a technology for analyzing and extracting system access models, which extracts relevant information by monitoring access behavior. In Pattern Trace, information in access behavior, such as address, length, cycle, etc., can be monitored and recorded. Pattern Trace obtains the access model by analyzing this information.

[0059] Step 203: determine the state transition information of the low power state in the access scenario, where the state transition information includes the number of times the memory enters the low power state and the running time in the low power state.

[0060] In an embodiment of the present disclosure, state transition information of a low power consumption state in an access scenario in the current access information is determined based on the access information.

[0061] In an optional embodiment of the present disclosure, a hardware or software processing mechanism is used to obtain state transition information of the current embedded system access scenario under idleness within a period of time, such as the number of times low power consumption is entered, the length of time of entering low power consumption, and other information.

[0062] Idle degree refers to the state of an embedded system when there are no tasks to be processed or no user operations for a period of time. It should be noted that idle degree is not necessarily equivalent to low power consumption state. Low power consumption state means that the system further reduces energy consumption by reducing power consumption technology in idle state, such as shutting down unnecessary hardware devices, reducing CPU frequency, etc. Therefore, idle degree and low power consumption state are two different concepts, but there is a certain relationship between them. In an embedded system, the idle degree of the system can be monitored to determine whether it is necessary to enter a low power consumption state to further reduce the power consumption of the system.

[0063] In an embodiment of the present disclosure, the state transition information is obtained through the hardware of the chip in the memory.

[0064] Step 204: adjust the first time based on the access information, the state transition information, the first time, and the second time.

[0065] In an embodiment of the present disclosure, power consumption data in an access scenario is acquired; based on the power consumption data and the access model, access intervals are counted, where the access interval includes the time interval between two adjacent access behaviors; based on the access interval, the first time, the second time, and the state transition information, judgment data within a preset period is determined; and based on the judgment data, the first time is adjusted.

[0066] In an embodiment of the present disclosure, the judgment data includes a working time ratio and a first state transition ratio. Determining the judgment data within a preset period may include: based on the access interval, the first time, the second time and the state transition information, obtaining a fourth time, a fifth time, a working time, a third time and a second number, the third time including the time required for the memory and the controller to actually enter a low power state within the preset period, the working time including the time required for the data path to operate normally within the preset period, the second number including the first number of times the memory enters a low power state under an access scenario within the preset period, the fourth time including the first time in the low power state within the preset period, and the fifth time including the second time in the low power state within the preset period; determining the working time ratio based on the working time within the preset period and the preset period; determining the first state transition ratio based on the fourth time, the fifth time, the second number and the third time within the preset period.

[0067] In an embodiment of the present disclosure, based on the judgment data, adjusting the first time may include: if the judgment data meets the first preset condition, increasing the first time; if the judgment data meets the second preset condition, reducing the first time. The first preset condition includes that the working time ratio is greater than or equal to the first preset threshold; the second preset condition includes that the working time ratio is less than the first preset threshold, and the first state transition ratio is greater than or equal to the second preset threshold.

[0068] In an optional embodiment of the present disclosure, it is necessary to obtain power consumption data according to the current access scenario, that is, to actually measure the power consumption data under the current access scenario. According to the power consumption data and the access model extracted by Pattern Trace, the access interval is counted to determine the judgment data. Specifically, as shown in Formula 1

[0069] Tall = Tbusy + Tlp + n(Tlpe + Tlpx) Formula 1

[0070] Among them, Tall represents the preset cycle, that is, a single monitoring cycle set in advance. Tbusy represents the working time within the preset cycle, that is, the length of time that the power consumption data works normally in the data path. Tlp represents the third time, that is, the length of time it actually enters the low power consumption state within the preset cycle. n is the number of times, that is, the number of times it enters the low power consumption state within the preset cycle. Tlpe represents the first time within the preset cycle, that is, the time it takes to enter the low power consumption state within the preset cycle, including the software idle waiting time and the hardware state machine time. Tlpx represents the second time within the preset cycle, that is, the time it takes to exit low power consumption within the preset cycle.

[0071] It can be understood that through the data in formula 1, we can get as well as n(Tlpe+Tlpx) represents the first state transition coefficient, that is, the proportional coefficient between the duration of staying in different low-power states and the time taken for the hardware to enter and exit. Indicates the conversion ratio of the first state. Indicates the proportion of working time.

[0072] According to the first state transition ratio and working time ratio obtained by formula 1, the classic configuration values ​​in different low power states are adjusted according to the access scenario in the access information:

[0073] For example: In the overload scenario When it is greater than or equal to the first preset threshold, the duration of Tlpe is increased. In the present disclosure, the specific increase can be determined according to actual conditions and needs, and is not limited in the embodiments of the present disclosure. For example, the original Tlpe duration can be multiplied by 2 or 4 to achieve the purpose of reducing the entry into low power consumption scenarios.

[0074] The choice of multiplying by 2 or 4 may need to be weighed and selected according to the actual situation. If the system has high requirements for performance and can withstand high energy consumption, you can choose to multiply by 4 and extend the software's Tlpe time four times. If the system has high requirements for energy consumption and needs to reduce energy consumption as much as possible, you can choose to multiply by 2 and extend the software's Tlpe time twice.

[0075] In intermittent sparse access scenarios, is less than a first preset threshold, and When it is greater than or equal to the second preset threshold, the duration of the software Tlpe is reduced. In the present disclosure, the specific reduction amount can be determined according to actual conditions and needs, and is not limited in the embodiments of the present disclosure. For example, the original parameters can be divided by 2 or 4 to achieve the purpose of increasing Tlp.

[0076] The choice of dividing by 2 or dividing by 4 may need to be weighed and selected according to the actual situation. If the embedded system has a high requirement for response speed and hopes to respond to user requests faster, you can choose to divide by 2 to shorten the software's Tlpe time by half. If the system has a high requirement for energy consumption and needs to reduce energy consumption as much as possible, you can choose to divide by 4 to shorten the software's Tlpe time by three quarters.

[0077] like Figure 5 As shown, the power consumption data of the SOC side in the memory is compared with the power consumption data of each channel in the idle state after the first adjustment. It can be seen that the low power consumption management method disclosed in the present invention can make the power consumption data of each channel achieve low power consumption characteristics while meeting performance requirements.

[0078] In summary, through the method provided by the present disclosure, by monitoring access behavior in real-time user usage scenarios, dynamically adjusting the strategy for entering low power consumption, when the amount of data accessed to the memory is large and the access is frequent, the idle time required to enter low power consumption is extended to reduce the probability of entering low power consumption at this moment. On the contrary, if there is no access in the current time period, or the access is sparse, the waiting time for entering low power consumption can be shortened, and the time for staying in the low power consumption state in this scenario is increased. In this way, the entire system can guarantee the performance requirements in scenarios with high bandwidth and high access volume as much as possible, and optimize the power consumption in scenarios with no access or sparse access, so as to achieve adaptive adjustment of the strategy for entering low power consumption.

[0079] Figure 6 FIG. 6 is a schematic diagram of a low power consumption management device 600 provided in an embodiment of the present disclosure. Figure 6 As shown, the low power consumption management device comprises:

[0080] A first acquisition unit 610 is used to acquire a first time and a second time when the memory and the controller are in a low power consumption state, the first time includes a time required for the memory and the controller to enter the low power consumption state, and the second time includes a time required for the memory and the controller to exit the low power consumption state;

[0081] A second acquisition unit 620 is used to acquire access information of the memory, where the access information is related to the user operation;

[0082] The adjusting unit 630 is configured to adjust the first time based on the access information, the first time and the second time.

[0083] In some embodiments, the first time and the second time are determined by interaction time between a memory die in the memory and a controller.

[0084] In some embodiments, the access information includes an access scenario and an access model, and the adjustment unit 630 is used to: determine state transition information of a low power consumption state in an access scenario, the state transition information including the number of times the memory enters a low power consumption state in an access scenario and the operating time in the low power consumption state; adjust the first time based on the access information, the state transition information, the first time and the second time.

[0085] In some embodiments, the adjustment unit 630 is used to: obtain power consumption data in an access scenario; based on the power consumption data and the access model, count the access interval, where the access interval includes the time interval between two adjacent access behaviors; based on the access interval, the first time, the second time, and the state transition information, determine the judgment data within a preset period; and adjust the first time based on the judgment data.

[0086] In some embodiments, the judgment data includes a working time ratio and a first state transition ratio, and the adjustment unit 630 is used to: based on the access interval, the first time, the second time and the state transition information, obtain the fourth time, the fifth time, the working time, the third time and the second number, the third time includes the time required for the memory and the controller to actually enter the low power consumption state within a preset period, the working time includes the time required for the data path to work normally within the preset period, the second number includes the first number of times the memory enters the low power consumption state under the access scenario within the preset period, the fourth time includes the first time in the low power consumption state within the preset period, and the fifth time includes the second time in the low power consumption state within the preset period; determine the working time ratio based on the working time within the preset period and the preset period; determine the first state transition ratio based on the fourth time, the fifth time, the second number and the third time within the preset period.

[0087] In some embodiments, the adjustment unit 630 is used to: if the judgment data meets the first preset condition, increase the first time; if the judgment data meets the second preset condition, reduce the first time.

[0088] In some embodiments, the first preset condition includes that the proportion of working time is greater than or equal to a first preset threshold; the second preset condition includes that the proportion of working time is less than the first preset threshold, and the first state transition proportion is greater than or equal to the second preset threshold.

[0089] In summary, through the low power management device, by obtaining the first time and the second time when the memory and the controller are in the low power state, the first time includes the time required for the memory and the controller to enter the low power state, and the second time includes the time required for the memory and the controller to exit the low power state, the access information of the memory is obtained, and the access information is related to the user's operation; based on the access information, the first time and the second time, the first time is adjusted, and by dynamically adjusting the time required to enter the low power state based on the access model and the access scenario, it can better adapt to different application scenarios and access models, achieve more refined low power management, and avoid power consumption waste and performance loss.

[0090] Corresponding to the methods provided in the above-mentioned embodiments, the present disclosure also provides a low power consumption management device. Since the device provided in the embodiment of the present disclosure corresponds to the methods provided in the above-mentioned embodiments, the implementation method of the method is also applicable to the device provided in this embodiment and will not be described in detail in this embodiment.

[0091] In the embodiments provided in the present application, the methods and devices provided in the embodiments of the present application are introduced. In order to implement the functions in the methods provided in the embodiments of the present application, the electronic device may include a hardware structure and a software module, and implement the functions in the form of a hardware structure, a software module, or a hardware structure plus a software module. A function of the functions may be executed in the form of a hardware structure, a software module, or a hardware structure plus a software module.

[0092] Figure 7 is a block diagram of an electronic device 700 for implementing the above-mentioned low power consumption management method according to an exemplary embodiment. For example, the electronic device 700 may be a mobile phone, a computer, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0093] Reference Figure 7 , the electronic device 700 may include one or more of the following components: a processing component 702 , a memory 704 , a power component 706 , a multimedia component 708 , an audio component 710 , an input / output (I / O) interface 712 , a sensor component 714 , and a communication component 716 .

[0094] The processing component 702 generally controls the overall operation of the electronic device 700, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 702 may include one or more processors 720 to execute instructions to complete all or part of the steps of the above-mentioned method. In addition, the processing component 702 may include one or more modules to facilitate the interaction between the processing component 702 and other components. For example, the processing component 702 may include a multimedia module to facilitate the interaction between the multimedia component 708 and the processing component 702.

[0095] The memory 704 is configured to store various types of data to support operations on the electronic device 700. Examples of such data include instructions for any application or method operating on the electronic device 700, contact data, phone book data, messages, pictures, videos, etc. The memory 704 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0096] The power supply component 706 provides power to the various components of the electronic device 700. The power supply component 706 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device 700.

[0097] The multimedia component 708 includes a screen that provides an output interface between the electronic device 700 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 708 includes a front camera and / or a rear camera. When the electronic device 700 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0098] The audio component 710 is configured to output and / or input audio signals. For example, the audio component 710 includes a microphone (MIC), and when the electronic device 700 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 704 or sent via the communication component 716. In some embodiments, the audio component 710 also includes a speaker for outputting audio signals.

[0099] I / O interface 712 provides an interface between processing component 702 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0100] The sensor assembly 714 includes one or more sensors for providing various aspects of status assessment for the electronic device 700. For example, the sensor assembly 714 can detect the open / closed state of the electronic device 700, the relative positioning of components, such as the display and keypad of the electronic device 700, and the sensor assembly 714 can also detect the position change of the electronic device 700 or a component of the electronic device 700, the presence or absence of user contact with the electronic device 700, the orientation or acceleration / deceleration of the electronic device 700, and the temperature change of the electronic device 700. The sensor assembly 714 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 714 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 714 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0101] The communication component 716 is configured to facilitate wired or wireless communication between the electronic device 700 and other devices. The electronic device 1000 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, 4G LTE, 5G NR (NewRadio) or a combination thereof. In an exemplary embodiment, the communication component 716 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 716 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0102] In an exemplary embodiment, the electronic device 700 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above methods.

[0103] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 704 including instructions, and the instructions can be executed by a processor 720 of an electronic device 700 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0104] The embodiments of the present disclosure further provide a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to enable a computer to execute the low power consumption management method described in the above embodiments of the present disclosure.

[0105] An embodiment of the present disclosure further provides a computer program product, including a computer program, which executes the low power consumption management method described in the above embodiment of the present disclosure when a processor executes the computer program.

[0106] The embodiment of the present disclosure also provides a chip, such as Figure 8 As shown, the chip includes one or more interface circuits 810 and one or more processors 820; the interface circuit 810 is used to receive signals from the memory of the electronic device and send signals to the processor 820, the signals include computer instructions stored in the memory, when the processor 820 executes the computer instructions, the electronic device executes the low power management method described in the above embodiment of the present disclosure.

[0107] It should be noted that the terms "first", "second", etc. in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present disclosure described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0108] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples" or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0109] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention belong.

[0110] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processing module, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (control method), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or otherwise processing in a suitable manner if necessary, and then stored in a computer memory.

[0111] It should be understood that the various parts of the embodiments of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0112] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0113] In addition, each functional unit in each embodiment of the present invention may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium. The above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0114] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A low power consumption management method, characterized in that: The method comprises: Acquire a first time and a second time when the memory and the controller are in a low power consumption state, wherein the first time includes a time required for the memory and the controller to enter the low power consumption state, and the second time includes a time required for the memory and the controller to exit the low power consumption state; Acquire access information to the memory, where the access information is related to a user's operation; The first time is adjusted based on the access information, the first time, and the second time.

2. The method according to claim 2, characterized in that: The first time and the second time are determined by the interaction time between the memory die in the memory and the controller.

3. The method according to claim 2, characterized in that The access information includes an access scenario and an access model, and adjusting the first time based on the access information, the first time, and the second time includes: Determine state transition information of the low power consumption state in the access scenario, the state transition information including a first number of times the memory enters the low power consumption state in the access scenario and an operating time in the low power consumption state; The first time is adjusted based on the access information, the state transition information, the first time, and the second time.

4. The method according to claim 3, characterized in that The adjusting the first time based on the access information, the state transition information, the first time, and the second time includes: Acquire power consumption data in the access scenario; Based on the power consumption data and the access model, counting access intervals, where the access intervals include a time interval between two adjacent access actions; Determine judgment data within a preset period based on the access interval, the first time, the second time, and the state transition information; Based on the judgment data, the first time is adjusted.

5. The method according to claim 4, characterized in that The judgment data includes a working time ratio and a first state transition ratio, and the judgment data determined within a preset period based on the access interval, the first time, the second time, and the state transition information includes: Based on the access interval, the first time, the second time and the state transition information, a fourth time, a fifth time, a working time, a third time and a second number are obtained, wherein the third time includes the time required for the memory and the controller to actually enter the low power state within a preset period, the working time includes the time required for the data path to work normally within the preset period, the second number includes the first number of times that the memory enters the low power state under the access scenario within the preset period, the fourth time includes the first time in the low power state within the preset period, and the fifth time includes the second time in the low power state within the preset period; Determining the working time ratio based on the working time within the preset period and the preset period; The first state conversion ratio is determined based on the fourth time, the fifth time, the second number and the third time within the preset period.

6. The method according to claim 5, characterized in that The adjusting the first time based on the judgment data includes: If the judgment data meets the first preset condition, increasing the first time; If the judgment data meets a second preset condition, the first time is reduced.

7. The method according to claim 6, characterized in that The first preset condition includes that the working time ratio is greater than or equal to a first preset threshold; the second preset condition includes that the working time ratio is less than the first preset threshold, and the first state transition ratio is greater than or equal to a second preset threshold.

8. A low power consumption management device, characterized in that: The device comprises: A first acquisition unit, configured to acquire a first time and a second time when the memory and the controller are in a low power consumption state, wherein the first time includes a time required for the memory and the controller to enter the low power consumption state, and the second time includes a time required for the memory and the controller to exit the low power consumption state; a second acquisition unit, configured to acquire access information to the memory, wherein the access information is related to an operation of a user; An adjusting unit is configured to adjust the first time based on the access information, the first time, and the second time.

9. An electronic device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: The computer instructions are used to cause the computer to execute the method according to any one of claims 1-7.

11. A chip, characterized in that: It comprises one or more interface circuits and one or more processors; the interface circuit is used to receive a signal from a memory of an electronic device and send the signal to the processor, the signal includes a computer instruction stored in the memory, and when the processor executes the computer instruction, the electronic device executes the method described in any one of claims 1 to 7.

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