Touch display device

Abstract

The present disclosure provides a touch display device including a first area disposed in the center and a second area surrounding the first area, the touch display device including: a display panel including a substrate, a plurality of first pixels disposed in the first area of the substrate, and a plurality of second pixels disposed in the second area of the substrate; and a touch sensor disposed on the display panel and including a plurality of first sensing electrodes disposed in the first area and a plurality of second sensing electrodes disposed in the second area. The plurality of first pixels and the plurality of second pixels may be disposed at different densities, and the plurality of first sensing electrodes and the plurality of second sensing electrodes may be disposed at different densities.

Description

Technical Field

[0001] This disclosure relates to a touch display device. Background Technology

[0002] With the advent of the information age, the field of displays that visually express electrical information signals has developed rapidly, and in response, various display devices with excellent properties such as thinness, light weight, and low power consumption have been developed. Examples of such display devices can include liquid crystal displays (LCDs), organic light-emitting diode (OLED) displays, and so on.

[0003] The applications are diverse, ranging from personal digital assistants to computer monitors and televisions, and display devices with large display areas and reduced size and weight are being researched.

[0004] Furthermore, the display device may include a display panel for displaying images and a touch panel disposed on the display panel for receiving touch input, and the touch panel may include multiple sensing electrodes. The display device (or input sensing device) can locate the touch point by sensing changes in capacitance formed in the multiple sensing electrodes. Summary of the Invention

[0005] One objective of this disclosure is to provide a touch display device that includes a flexible peripheral region.

[0006] Another objective of this disclosure is to provide a touch display device that utilizes a connecting line disposed in the peripheral area as part of a touch electrode.

[0007] The purpose of this disclosure is not limited to the above-described purposes, and other purposes not mentioned above will be clearly understood by those skilled in the art from the following description.

[0008] To achieve the above objectives, according to one aspect of this disclosure, a touch display device includes a first region disposed centrally and a second region surrounding the first region. The touch display device includes: a display panel comprising a substrate, a plurality of first pixels disposed in the first region of the substrate, and a plurality of second pixels disposed in the second region of the substrate; and a touch sensor disposed on the display panel and including a plurality of first sensing electrodes disposed in the first region and a plurality of second sensing electrodes disposed in the second region. The plurality of first pixels and the plurality of second pixels may be arranged at different densities, and the plurality of first sensing electrodes and the plurality of second sensing electrodes may also be arranged at different densities.

[0009] In one embodiment, a touch display device includes: a display panel including a first region of the display panel, a second region corresponding to an arcuate edge of the display panel surrounding the first region, a plurality of first pixels configured to emit light in the first region of the display panel, and a plurality of second pixels configured to emit light in the second region of the display panel; and a touch sensor on the display panel, the touch sensor including: a plurality of first sensing electrodes in the first region configured to sense a touch in the first region; a plurality of second sensing electrodes spaced apart from each other in the second region configured to sense a touch in the second region; and a plurality of connecting lines in the second region, at least one of the connecting lines being located between a pair of second sensing electrodes and electrically connecting the pair of second sensing electrodes together.

[0010] Further details of exemplary embodiments are included in the detailed description and accompanying drawings.

[0011] According to an exemplary embodiment of this disclosure, the touch display device may include a display panel and a touch sensor disposed on the display panel, and may include a first region as a central region and a second region as a peripheral region (edge ​​region) surrounding the first region. Furthermore, the touch display device may include a plurality of plate-like patterns and connecting patterns. The plurality of plate-like patterns are disposed on the second region and include sensing electrodes disposed thereon, and the connecting patterns are configured to connect adjacent plate-like patterns and include connecting lines disposed thereon. The connecting lines connect the sensing electrodes formed on the plate-like patterns. Therefore, the connecting lines disposed in the peripheral region can be used as part of the touch electrodes.

[0012] According to an exemplary embodiment of this disclosure, in a touch display device, a second pixel disposed in a second region can be configured to have a lower pixel density than a first pixel disposed in a first region. Therefore, in the second region, which serves as a peripheral region, the touch display device can be modified so that the second region, as a peripheral region, can be designed to have an arc-shaped form.

[0013] Furthermore, according to exemplary embodiments of this disclosure, in the case of a touch display device, an image can be displayed not only in a first area, which is the central area, but also in a second area, which is the peripheral area. Therefore, the display surface can be maximized, and the border area can be minimized or reduced.

[0014] The effects of this disclosure are not limited to those exemplified above, and many more different effects are included in this specification. Attached Figure Description

[0015] The above and other aspects, features and other advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, wherein:

[0016] Figure 1 This is a schematic plan view of a touch display device according to an exemplary embodiment of the present disclosure;

[0017] Figure 2 This is a schematic cross-sectional view of a touch display device according to an exemplary embodiment of the present disclosure;

[0018] Figure 3 It is shown Figure 1 An enlarged view of an example of the FF portion of a display panel included in a touch display device;

[0019] Figure 4 It is shown Figure 1 An enlarged view of an example of the FF portion of a touch sensor included in a touch display device;

[0020] Figure 5 It shows along Figure 4 The cross-sectional view of the example intercepted by line I-I' is shown;

[0021] Figure 6 It shows that it has been enlarged. Figure 1 An enlarged view of an example of a portion of the second area of ​​a touch display device;

[0022] Figure 7 It shows along Figure 6 A cross-sectional view of an example taken from line II-II'; and

[0023] Figure 8 It shows along Figure 6 A cross-sectional view of an example taken from line III-III'. Detailed Implementation

[0024] The advantages and features of this disclosure, as well as methods for achieving these advantages and features, will become clear from the exemplary embodiments described in detail below with reference to the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. Exemplary embodiments are provided by way of example only to enable those skilled in the art to fully understand the content and scope of this disclosure.

[0025] The shapes, dimensions, ratios, angles, quantities, etc., shown in the accompanying drawings to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, the same reference numerals generally denote the same elements. Furthermore, in the following description of this disclosure, detailed explanations of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of other components, unless these terms are used in conjunction with the term “only.” Unless otherwise expressly stated, any reference to the singular may include the plural.

[0026] Even if not explicitly stated, the components will be interpreted as including the normal error range.

[0027] When using terms such as “on top of,” “above,” “below,” and “next to” to describe the positional relationship between two parts, one or more parts may be located between the two parts unless these terms are used with the terms “immediately following” or “directly.”

[0028] When one element or layer is placed "on" another element or layer, the element or layer can be placed directly on top of the other element or layer, or another element can be inserted between them.

[0029] Although the terms "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from others. Therefore, the first component mentioned below can be a second component in the technical concept of this disclosure.

[0030] Throughout the specification, the same reference numerals generally denote the same elements.

[0031] The dimensions and thicknesses of each component shown in the accompanying drawings are for illustrative purposes only, and this disclosure is not limited to the dimensions and thicknesses of the components shown.

[0032] Features of the various embodiments of this disclosure can be attached or combined with each other in part or in whole and can be interlocked and operated in various technical ways, and these embodiments can be implemented independently or in conjunction with each other.

[0033] In the following, a touch display device according to an exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0034] Figure 1 This is a schematic plan view of a touch display device according to an exemplary embodiment of the present disclosure.

[0035] exist Figure 1The image shows a touch display device DD according to an exemplary embodiment of the present disclosure, including a display module DM and a drive circuit DCP for driving the display module DM.

[0036] Despite Figure 1 The touch display device DD is shown in the form of a smartphone, but it is not limited to this, and the touch display device DD can be implemented as a variety of electronic devices (e.g., smartwatches or tablet PCs).

[0037] At the same time, although for the sake of convenience of description Figure 1 The display module DM and the driving circuit DCP are shown separately, but the exemplary embodiments of this disclosure are not limited thereto. According to the exemplary embodiments, all or part of the driving circuit DCP can be integrated into the display module DM.

[0038] Reference Figure 1 According to an exemplary embodiment of the present disclosure, the touch display device DD may include a display module DM and a driving circuit DCP. The display module DM includes a display panel DP and a touch sensor TS, and the driving circuit DCP is used to drive the display module DM. According to an exemplary embodiment, the touch display device DD may also include a window WD covering the display module DM.

[0039] The touch display device DD can be configured in various shapes. For example, the touch display device DD can be configured as a rectangular planar shape with two pairs of parallel sides, but the exemplary embodiments of this disclosure are not limited thereto. When the touch display device DD is configured as a rectangular planar shape, any pair of sides can be longer than the other pair of sides. Meanwhile, for ease of description, in Figure 1 The diagram shows a touch display device DD with a rectangular shape, having a pair of long sides and a pair of short sides, wherein the pair of long sides extend in a second direction DR2 and the pair of short sides extend in a first direction DR1. According to an exemplary embodiment, such as... Figure 1 As shown, a touch display device DD with a rectangular planar shape may have rounded corners where one of its long sides and one of its short sides meet each other. However, this is merely illustrative, and therefore the shape of the touch display device DD is not limited to this. For example, the touch display device DD may have an angled shape at the corner where one of its long sides and one of its short sides intersect.

[0040] Furthermore, the front (or top) and rear (or bottom) surfaces of the components or units of the touch display device DD, which will be described below, can be distinguished by a third direction DR3. However, the first direction to the third direction DR1, DR2, and DR3 shown in the specification are merely illustrative, and the first direction to the third direction DR1, DR2, and DR3 are relative concepts and can be converted to other directions. In the following description, the same reference numerals will be used to denote the first direction to the third direction DR1, DR2, and DR3, respectively.

[0041] Furthermore, in this specification, when expressed as “overlapping,” unless otherwise specified, it means that two components overlap in the thickness direction (i.e., third direction DR3) of the touch display device DD.

[0042] Touch display devices (DD) can be flat panel displays, flexible displays, curved displays, foldable displays, bendable displays, etc. Furthermore, touch display devices (DD) can be applied to transparent displays, head-mounted displays, wearable displays, etc.

[0043] In one exemplary embodiment, at least a portion of the touch display device DD may be flexible. For example, at least a portion of the touch display device DD may be stretchable.

[0044] More specifically, the touch display device DD may include a display surface having a flat central region and a display surface having an arc-shaped peripheral region (e.g., an edge region). For example, in the touch display device DD, the front surface including the central region and the peripheral region (e.g., the edge region) surrounding the central region may be configured as the display surface.

[0045] For example, the touch display device DD may include a first region A1 and a second region A2 other than the first region A1. For example, the second region A2 may be defined as the region surrounding the first region A1. For example, the first region A1 may correspond to the aforementioned central region, and the second region A2 may correspond to the aforementioned peripheral region (e.g., the edge region). Meanwhile, the first region A1 may occupy most of the display surface.

[0046] In one exemplary embodiment, the first region A1 corresponds to the central region of the touch display device DD and may have a flat shape, while the second region A2 corresponds to the peripheral region (edge ​​region) of the touch display device DD and may have an arcuate shape. This will be referred to Figures 2 to 4 To provide a more detailed description.

[0047] The touch display device DD can display images via a display surface (e.g., a first region A1 and a second region A2). Here, the display surface can be defined as the area for displaying the image. For example, the touch display device DD may include a display module DM, and the display panel DP may include multiple pixels (or multiple subpixels) for displaying the image.

[0048] In one exemplary embodiment, the display surface of the touch display device DD (e.g., at least one of the first region A1 and the second region A2) can be used as an area for recognizing user touch input (e.g., a sensing area or a touch area). That is, at least a portion of the display surface of the touch display device DD can be configured as a sensing area. For example, the display module DM included in the touch display device DD may also include a touch sensor TS, and the touch sensor TS may include a plurality of sensing electrodes to sense user touch input. However, the exemplary embodiments of this disclosure are not limited thereto. Therefore, according to the exemplary embodiment, the display surface of the touch display device DD (e.g., both the first region A1 and the second region A2) can be used as an area for recognizing user touch input (e.g., a sensing area or a touch area).

[0049] The driving circuit DCP can drive the display module DM. For example, the driving circuit DCP can output data signals corresponding to image data to multiple pixels included in the display panel DP, or it can receive electrical signals (e.g., sensing signals) from multiple sensing electrodes to output driving signals to multiple sensing electrodes included in the touch sensor TS. The driving circuit DCP can use electrical signals to sense user touch input.

[0050] According to an exemplary embodiment, the driving circuit DCP may include a panel driver PDV and a touch driver TDV (or a sensor driver). Although for ease of description, Figure 1 The panel driver PDV and touch driver TDV are shown to be configured separately, but the exemplary embodiments of this disclosure are not limited thereto. For example, at least a portion of the touch driver TDV may be integrated with or interact with the panel driver PDV.

[0051] The panel driver PDV can supply data signals corresponding to image data signals to multiple pixels while sequentially scanning the multiple pixels included in the display panel DP. In this case, the display panel DP can display an image corresponding to the image data.

[0052] The touch driver TDV can detect user touch input based on sensing signals received from multiple sensing electrodes included in the touch sensor TS.

[0053] Figure 2This is a schematic cross-sectional view of a touch display device according to an exemplary embodiment of the present disclosure.

[0054] Reference Figure 1 and Figure 2 The touch display device DD may include a display module DM and a window WD.

[0055] The display module (DM) may include a display panel (DP) and a touch sensor (TS).

[0056] The touch sensor TS can be directly mounted on the display panel DP, or it can be mounted on the display panel DP with a separate layer such as an adhesive layer or a substrate (or insulating layer).

[0057] The display panel DP can display images. As the display panel DP, a self-emissive (e.g., self-emitting) display panel, such as an organic light-emitting display panel (OLED panel), can be used. However, the exemplary embodiments of this disclosure are not limited to this, and, for example, a non-emissive display panel, such as a liquid crystal display (LCD) panel, an electrophoretic display (EPD) panel, or an electrowetting display (EWD) panel, can be used as the display panel DP. Meanwhile, when a non-emissive display panel is used as the display panel DP, the touch display device DD may include a backlight unit that supplies light to the display panel DP.

[0058] A touch sensor TS is disposed on the surface of the display image on the display panel DP to receive user touch input. The touch sensor TS can recognize touch events from the touch display device DD via the user's hand or a separate input unit. The touch sensor TS can recognize touch events capacitively. For example, the touch sensor TS can sense touch input using mutual capacitance or self-capacitance.

[0059] A window WD, used to protect the exposed surfaces of the display module DM, can be installed on the display module DM. The window WD protects the display module DM from external impacts and provides the user with an input surface and / or a display surface. The window WD can be attached to the display module DM using an optically clear adhesive member (OCA).

[0060] The window WD can have a multilayer structure selected from glass substrates, plastic films, or plastic substrates. The multilayer structure can be formed using continuous processes or by using adhesive bonding processes. All or part of the window WD is flexible.

[0061] At the same time, as referenced Figure 1In one exemplary embodiment, the first region A1 corresponds to the central region of the touch display device DD and may be flat, while the second region A2 corresponds to the peripheral region (edge ​​region) of the touch display device DD and may be arc-shaped or curved. Therefore, the second region A2 is the curved edge of the display panel DP.

[0062] For example, such as Figure 2 As shown, the second region A2 can have an arcuate shape that bends along the strain direction (e.g., any direction on the plane defined by the first direction DR1 and the second direction DR2).

[0063] In one exemplary embodiment, the touch display device DD (e.g., the portion of the display panel DP corresponding to the second region A2) can be flexible or stretchable. For example, the portion of the display panel DP corresponding to the second region A2 can not only be flexible but also stretchable. Therefore, the touch display device DD corresponding to the second region A2 can be freely deformed in shape so that it can be designed to have an arcuate shape in the corresponding region.

[0064] Figure 3 It is shown Figure 1 An enlarged view of an example of the FF portion of a display panel included in a touch display device.

[0065] Figure 4 It is shown Figure 1 An enlarged view of an example of the FF portion of a touch sensor included in a touch display device.

[0066] exist Figure 3 The diagram illustrates the arrangement of multiple pixels PX1 and PX2 included in the display panel DP within the first region A1 and the second region A2, and... Figure 4 The diagram shows the arrangement of the multiple sensing electrodes TE1 and TE2 included in the touch sensor TS in the first region A1 and the second region A2.

[0067] First, refer to Figure 1 , Figure 2 and Figure 3 The display panel DP may include a first region A1 and a second region A2. Here, as described above, the first region A1 is the region corresponding to the central region of the touch display device DD and may have a flat shape, while the second region A2 is the region corresponding to the peripheral region (edge ​​region) of the touch display device DD and may have an arc shape.

[0068] Multiple pixels PX1 and PX2 can be disposed on a display panel DP. According to an exemplary embodiment, each of the multiple pixels PX1 and PX2 may include at least one light-emitting diode (LED). According to an exemplary embodiment, the LED may be configured as an inorganic LED such as an organic light-emitting diode, a micro LED, or a quantum dot LED. Furthermore, the LED may be a mixture of organic and inorganic materials. Additionally, each of the multiple pixels PX1 and PX2 includes a single LED, or in another exemplary embodiment, each of the multiple pixels PX1 and PX2 includes multiple LEDs. The multiple LEDs may be connected to each other in series, parallel, or series-parallel configurations. The touch display device DD drives the multiple pixels PX1 and PX2 to display an image on a first area A1 and a second area A2 corresponding to input image data.

[0069] Meanwhile, each of the plurality of pixels PX1 and PX2 may include at least one sub-pixel selected from red, green, and blue sub-pixels. According to an exemplary embodiment, at least some of the plurality of pixels PX1 and PX2 may also include white sub-pixels.

[0070] In one exemplary embodiment, the display panel DP can have different pixel densities for each region.

[0071] For example, the display panel DP may include a plurality of first pixels PX1 disposed on a first region A1 and a plurality of second pixels PX2 disposed on a second region A2. Here, the first pixels PX1 may be disposed on the first region A1 with a first pixel density, and the second pixels PX2 may be disposed on the second region A2 with a second pixel density less than the first pixel density.

[0072] Here, the pixel density can be defined as the total area of ​​the portion containing actual pixels relative to the overall area of ​​the corresponding region, or as the total area of ​​pixels included in a predetermined unit area. Here, the area containing each pixel can be the area of ​​the emitting surface of the light-emitting diode included in each pixel. For example, when the pixel includes an organic light-emitting diode, the pixel area can be the area of ​​the anode electrode exposed between the pixel defining films, or the area of ​​the emitting layer.

[0073] More specifically, such as Figure 3 As shown, in the first region A1 and the second region A2, unit regions UA of the same size can be defined.

[0074] Here, based on the unit area UA, the first pixel PX1 set on the first area A1 can be set with a large first pixel density. For example, the first pixel PX1 on the first area A1 can be set with a high pixel per inch (PPI). Therefore, an image with high resolution can be displayed in the first area A1, which occupies most of the display surface and corresponds to the central area.

[0075] Here, based on the unit region UA, the second pixel PX2 disposed on the second region A2 can be disposed at a second pixel density that is smaller than the first pixel density. Here, the second pixel density is less than the first pixel density, and for example, the first pixel density can be four times the second pixel density, but this is only exemplary, and the exemplary embodiments of this disclosure are not limited thereto. For example, on the second region A2, the second pixel PX2 can be disposed at a PPI that is lower than that of the first pixel PX1 in the first region A1.

[0076] Next, further reference Figure 4 The touch sensor TS may include a first region A1 and a second region A2. Here, as described above, the first region A1 is the region corresponding to the central region of the touch display device DD and may have a flat shape, while the second region A2 is the region corresponding to the peripheral region (edge ​​region) of the touch display device DD and may have an arc shape.

[0077] Multiple sensing electrodes TE1 and TE2 can be disposed on the touch sensor TS. The multiple sensing electrodes TE1 and TE2 can have a grid pattern or grid structure. The grid pattern can include grid lines as metal lines forming at least one grid hole (or opening). The at least one grid hole (or opening) corresponds to the emission region of a pixel to form a path for light emitted from the pixel. The grid hole can have a rhomboid planar shape through the grid lines, but is not limited to this. The multiple sensing electrodes TE1 and TE2 having a grid pattern reduces parasitic capacitance with the electrodes of the display panel DP. Furthermore, when multiple sensing electrodes TE1 and TE2 with a grid pattern are disposed on the display panel DP, the flexibility of the touch display device DD can be improved.

[0078] The multiple sensing electrodes TE1 and TE2 may include aluminum, copper, chromium, nickel, titanium, etc. According to an exemplary embodiment, the multiple sensing electrodes TE1 and TE2 may have a titanium / aluminum / titanium three-layer structure. However, this disclosure is not limited thereto, and the multiple sensing electrodes TE1 and TE2 may be formed of various metals.

[0079] Multiple sensing electrodes TE1 and TE2 are electrically connected to signal lines connected to a drive circuit DCP (e.g., touch driver TDV) to receive drive signals from the drive circuit DCP (e.g., touch driver TDV) or to output sensing signals to the drive circuit DCP (e.g., touch driver TDV).

[0080] In one exemplary embodiment, the multiple sensing electrodes TE1 and TE2 included in the touch sensor TS can be set with different densities for each region.

[0081] For example, a touch sensor TS may include a plurality of first sensing electrodes TE1 disposed on a first region A1 and a plurality of second sensing electrodes TE2 disposed on a second region A2. Here, the first sensing electrodes TE1 may be disposed on the first region A1 at a density greater than the density of the second sensing electrodes TE2 disposed on the second region A2. Figure 3 Similarly, the density of the first sensing electrode TE1 and the density of the second sensing electrode TE2 are relative to unit regions of the same size in the first region A1 and the second region A2.

[0082] More specifically, a plurality of first sensing electrodes TE1 may be disposed on the first region A1 to have a continuous grid pattern. For example, the first sensing electrodes TE1 may be configured to have a grid pattern over the entire first region A1.

[0083] Furthermore, a plurality of second sensing electrodes TE2 having a grid pattern on the second region A2 can be spaced apart from each other and electrically connected by a connecting line (e.g., a first connecting line CL1). For example, the second sensing electrodes TE2 with a grid pattern can be disposed on the second region A2 and spaced apart from each other, thereby corresponding to the region where the second pixel PX2 of the display panel DP is disposed. Adjacent second sensing electrodes TE2 can be electrically connected by a first connecting line CL1 having a wavy shape disposed between the pair of second sensing electrodes TE2. The first connecting line CL1 and the second sensing electrodes together form a touch electrode for sensing touch on the second region A2. For example, the first connecting line CL1 can have a sine wave shape, but this is merely illustrative and the exemplary embodiments of this disclosure are not limited thereto. Therefore, the first connecting line CL1 includes a plurality of arcuate portions connected to each other to form a wavy shape.

[0084] Meanwhile, as described above, the second region A2 is an outer peripheral region (edge ​​region) and can have an arcuate shape that bends along the strain direction. For example, the substrate of the touch display device DD is made of a flexible substrate. Multiple rigid plate-like patterns are disposed on the substrate in a spaced-apart manner. The second pixel PX2 and the second sensing electrode TE2 of the unit region UA ​​of the second region A2 are disposed on the rigid plate-like patterns. In the regions where the second pixel PX2 and the second sensing electrode TE2 are not disposed, connecting lines with a wavy shape (e.g., a first connecting line CL1) are provided, so that the touch display device DD can be stretched in the second region A2. Therefore, the touch display device DD can have an arcuate shape that bends along the strain direction in the second region A2.

[0085] In the following text, reference will be made to Figure 5 Describe in detail the stacking relationship between the display panel DP and the touch sensor TS included in the touch display device DD.

[0086] Figure 5 It shows along Figure 4 The example cross-sectional view is shown by line I-I'.

[0087] Reference Figures 1 to 5 A touch display device DD (e.g., display module DM) according to an exemplary embodiment of the present disclosure may include a display panel DP and a touch sensor TS located on the display panel DP.

[0088] At least one transistor TR1, TR2 and a light-emitting diode LD constituting a pixel can be disposed on the substrate SUB of the display panel DP. For example, at least one transistor TR1, TR2 and a light-emitting diode LD disposed on the first region A1 can constitute a first pixel PX1, and at least one transistor TR1, TR2 and a light-emitting diode LD disposed on the second region A2 can constitute a second pixel PX2.

[0089] Meanwhile, the first transistor TR1 among the transistors disposed on the substrate SUB can be a polycrystalline silicon semiconductor transistor. For example, the first transistor TR1 is a p-type MOSFET transistor (PMOS transistor) that includes a polycrystalline silicon semiconductor layer formed by a low-temperature polycrystalline silicon (LTPS) process as the active layer (channel).

[0090] Furthermore, the second transistor TR2 in the transistor disposed on the substrate SUB can be an oxide semiconductor transistor. For example, the second transistor TR2 can be an n-type MOSFET transistor (NMOS transistor) that includes an oxide semiconductor layer as the active layer (channel).

[0091] The substrate (SUB) is the fundamental component of the display panel (DP) and can be essentially transparent and light-transmitting. The substrate (SUB) can be a flexible substrate formed from plastic materials. Here, flexibility can be interpreted in the same way as bendability, durability, rollability, and foldability.

[0092] For example, the substrate SUB may include silicone rubber such as polydimethylsiloxane (PDMS) and elastomers such as polyurethane. Therefore, the substrate SUB can have bendable or stretchable properties. However, this is merely illustrative, and the materials of the substrate SUB are not limited to these.

[0093] At the same time, despite Figure 5 Although not shown separately, a backplate and a metal plate can also be provided below the substrate SUB.

[0094] The pattern layer PTL can be disposed on the substrate SUB. The pattern layer PTL supports pixels and connecting lines, and can include multiple plate-shaped patterns and multiple connecting patterns disposed on the second region A2. (See reference...) Figures 6 to 8 A more detailed description of the pattern layer PTL.

[0095] A shielding metal layer, including at least one shielding metal pattern BSM, can be disposed on a substrate SUB (or pattern layer PTL).

[0096] The shielding metal pattern BSM included in the shielding metal layer can be formed by a single layer or multiple layers of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni) and neodymium (Nd) or their alloys.

[0097] According to an exemplary embodiment, the shielding metal pattern BSM can be defined as a component included in the first transistor TR1. For example, the shielding metal pattern BSM can constitute the lower gate electrode of the first transistor TR1.

[0098] The first buffer layer BUF1 can be disposed on the substrate SUB (or pattern layer PTL). For example, the first buffer layer BUF1 can be disposed on the substrate SUB (or pattern layer PTL) to cover the shielding metal pattern BSM.

[0099] In one exemplary embodiment, the first buffer layer BUF1 may include a multi-buffer layer BUF1a disposed on the substrate SUB (or pattern layer PTL) and an active buffer layer BUF1b disposed on the multi-buffer layer BUF1a.

[0100] A first transistor TR1 may be disposed on a first buffer layer BUF1. The first transistor TR1 may include a first semiconductor pattern ACT1, a first gate electrode G1, a source electrode SE1, and a drain electrode DE1. According to an exemplary embodiment, as described above, the first transistor TR1 may further include a shielding metal pattern BSM disposed between the first buffer layer BUF1 and the substrate SUB.

[0101] A first semiconductor layer, including at least one first semiconductor pattern ACT1, may be disposed on a first buffer layer BUF1.

[0102] For example, a first semiconductor pattern ACT1, included in the first transistor TR1, can be disposed on the first buffer layer BUF1. The first semiconductor pattern ACT1 may include a first region S1 (or source electrode or source region), a second region D1 (or drain electrode or drain region), and a channel region C1 located therebetween. Furthermore, as described above, the first semiconductor pattern ACT1 may include a polycrystalline silicon semiconductor layer formed by a low-temperature polycrystalline silicon (LTPS) process.

[0103] A first gate insulating layer GI1 may be disposed on a first semiconductor layer (e.g., a first semiconductor pattern ACT1). For example, the first gate insulating layer GI1 may be configured to cover the first semiconductor layer (e.g., the first semiconductor pattern ACT1) so that the first semiconductor pattern ACT1 of the first transistor TR1 is insulated from the first gate electrode G1.

[0104] For example, the first gate insulating layer GI1 can be made of silicon nitride (SiN). x or silicon dioxide (SiO) x It may consist of a single layer or multiple layers, but is not limited thereto.

[0105] A first conductive layer GAT1 may be disposed on a first gate insulating layer GI1. The first conductive layer GAT1 may constitute at least a portion of an emission control line supplying emission control signals to a pixel, a scan line supplying scan signals, and a power supply line supplying various power supply voltages. Here, when the first conductive layer GAT1 constitutes at least a portion of the power supply line supplying power supply voltages, the first conductive layer GAT1 may comprise a material with high conductivity, such as a metal or conductive oxide. For example, the first conductive layer GAT1 may be formed from a single layer or multiple layers comprising aluminum (Al), copper (Cu), or titanium (Ti). In some exemplary embodiments, the first conductive layer GAT1 may be configured as a three-layer configuration of titanium, aluminum, and titanium (Ti / Al / Ti) arranged sequentially. However, the first conductive layer GAT1 is not limited to this and may be formed from a single layer or multiple layers of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd) or their alloys.

[0106] The first gate electrode G1, which constitutes at least a portion of the emitter control line or scan line of the first conductive layer GAT1, can be disposed on the first gate insulating layer GI1.

[0107] The first gate electrode G1 of the first transistor TR1 may be configured to overlap at least partially with the first semiconductor pattern ACT1.

[0108] The first insulating layer ILD1 may be disposed on the first conductive layer GAT1 (e.g., the first gate electrode G1 of the first transistor TR1). For example, the first insulating layer ILD1 may be configured to cover the first conductive layer GAT1 (e.g., the first gate electrode G1 of the first transistor TR1).

[0109] The first insulating layer ILD1 can be made of silicon nitride (SiN). x ) or silicon dioxide (SiO) x It may consist of a single layer or multiple layers, but is not limited thereto.

[0110] The second conductive layer TM1 can be disposed on the first insulating layer ILD1. The second conductive layer TM1 includes molybdenum (Mo), copper (Cu), and titanium (Ti), and can be formed from a single layer or multiple layers.

[0111] The second insulating layer ILD2 can be disposed on the second conductive layer TM1. For example, the second insulating layer ILD2 can be configured to cover the second conductive layer TM1.

[0112] The second insulating layer, ILD2, can be made of silicon nitride (SiN). x or silicon dioxide (SiO) x It may consist of a single layer or multiple layers, but is not limited thereto.

[0113] The third conductive layer TM2 can be disposed on the second insulating layer ILD2. The third conductive layer TM2 may include molybdenum (Mo), copper (Cu), and titanium (Ti), and may be formed as a single layer or multiple layers.

[0114] For example, the first source electrode SE1 and the first drain electrode DE1 of the first transistor TR1 in the third conductive layer TM2 can be disposed on the second insulating layer ILD2. The first source electrode SE1 of the first transistor TR1 in the third conductive layer TM2 can contact the first region S1 of the first semiconductor pattern ACT1 through a contact hole passing through the second insulating layer ILD2, the first insulating layer ILD1, and the first gate insulating layer GI1. The first drain electrode DE1 of the first transistor TR1 in the third conductive layer TM2 can contact the second region D1 of the first semiconductor pattern ACT1 through a contact hole passing through the second insulating layer ILD2, the first insulating layer ILD1, and the first gate insulating layer GI1.

[0115] The second buffer layer BUF2 can be disposed on the third conductive layer TM2 (e.g., the first source electrode SE1 and the first drain electrode DE1 of the first transistor TR1). For example, the second buffer layer BUF2 can be configured to cover the third conductive layer TM2.

[0116] The second buffer layer BUF2 can be made of silicon nitride (SiN). x or silicon dioxide (SiO) x It may consist of a single layer or multiple layers, but is not limited thereto.

[0117] A second semiconductor layer, including at least one second semiconductor pattern ACT2, may be disposed on the second buffer layer BUF2.

[0118] For example, the second semiconductor pattern ACT2, which is included in the second transistor TR2, can be disposed on the second buffer layer BUF2. The second semiconductor pattern ACT2 may include a first region S2 (or source electrode or source region), a second region D2 (or drain electrode or drain region), and a channel region C2 located therebetween. Furthermore, as described above, the second semiconductor pattern ACT2 may include an oxide semiconductor layer.

[0119] The second gate insulating layer GI2 can be disposed on the second semiconductor layer (e.g., the second semiconductor pattern ACT2). The second gate insulating layer GI2 can be made of silicon nitride (SiN). x or silicon dioxide (SiO) x It may consist of a single layer or multiple layers, but is not limited thereto.

[0120] The fourth conductive layer GAT2 can be disposed on the second gate insulating layer GI2. The fourth conductive layer GAT2 includes molybdenum (Mo), copper (Cu), and titanium (Ti), and can be formed by a single layer or multiple layers.

[0121] For example, the second gate electrode G2 of the second transistor TR2, which constitutes at least a portion of the scan line of the fourth conductive layer GAT2, can be disposed on the second gate insulating layer GI2.

[0122] The second gate electrode G2 of the second transistor TR2 can be configured to at least partially overlap with the second semiconductor pattern ACT2.

[0123] The third insulating layer ILD3 can be disposed on the fourth conductive layer GAT2 (e.g., the second gate electrode G2 of the second transistor TR2). For example, the third insulating layer ILD3 can be configured to cover the fourth conductive layer GAT2 (e.g., the second gate electrode G2 of the second transistor TR2).

[0124] The third insulating layer, ILD3, can be made of silicon nitride (SiN). x or silicon dioxide (SiO) xIt may consist of a single layer or multiple layers, but is not limited thereto.

[0125] The fifth conductive layer SD1 may be disposed on the third insulating layer ILD3. The fifth conductive layer SD1 may constitute at least a portion of the power line supplying the power supply voltage. Here, since the fifth conductive layer SD1 constitutes at least a portion of the power line supplying the power supply voltage, the fifth conductive layer SD1 may include a material with high conductivity, such as a metal or conductive oxide. For example, the fifth conductive layer SD1 may be formed of a single layer or multiple layers including aluminum (Al), copper (Cu), or titanium (Ti). In some exemplary embodiments, the fifth conductive layer SD1 may be configured as a three-layer configuration of titanium, aluminum, and titanium (Ti / Al / Ti) arranged sequentially. However, the fifth conductive layer SD1 is not limited to this and may be formed of a single layer or multiple layers of any of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd) or their alloys.

[0126] Furthermore, at least a portion of the fifth conductive layer SD1 can be used as a connection electrode. For example, at least a portion of the fifth conductive layer SD1 can be connected to at least a portion of the third conductive layer TM2 through contact holes passing through the third insulating layer ILD3, the second gate insulating layer GI2, and the second buffer layer BUF2. Alternatively, at least a portion of the fifth conductive layer SD1 can contact at least a portion of the fourth conductive layer GAT2 through contact holes passing through the third insulating layer ILD3.

[0127] Furthermore, at least a portion of the fifth conductive layer SD1 can constitute the second source electrode SE2 and the second drain electrode DE2 of the second transistor TR2. For example, the second source electrode SE2 of the second transistor TR2 of the fifth conductive layer SD1 can contact the first region S2 of the second semiconductor pattern ACT2 through a contact hole passing through the third insulating layer ILD3 and the second gate insulating layer GI2. The second drain electrode DE2 of the second transistor TR2 of the fifth conductive layer SD1 can contact the second region D2 of the second semiconductor pattern ACT2 through a contact hole passing through the third insulating layer ILD3 and the second gate insulating layer GI2.

[0128] The first planarization layer PNL1 may be disposed on the fifth conductive layer SD1. The first planarization layer PNL1 may be an organic layer that planarizes the upper part and protects the components disposed below it. For example, the first planarization layer PNL1 may include organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0129] The sixth conductive layer SD2 can be disposed on the first planarization layer PNL1.

[0130] The sixth conductive layer SD2 can constitute at least a portion of a data line supplying data signals to a pixel or a power line supplying a high-potential power supply voltage. Here, since the sixth conductive layer SD2 constitutes at least a portion of the power line supplying the power supply voltage, it can include a material with high conductivity, such as a metal or a conductive oxide. For example, the sixth conductive layer SD2 can be formed from a single layer or multiple layers of aluminum (Al), copper (Cu), or titanium (Ti). In some exemplary embodiments, the sixth conductive layer SD2 can be configured as a three-layer structure consisting of titanium, aluminum, and titanium (Ti / Al / Ti) arranged sequentially. However, the sixth conductive layer SD2 is not limited to this and can be formed from a single layer or multiple layers of any of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd) or their alloys.

[0131] Furthermore, at least a portion of the sixth conductive layer SD2 can be used as a connection electrode. For example, at least a portion of the sixth conductive layer SD2 can be connected to at least a portion of the fifth conductive layer SD1 through a contact hole passing through the first planarization layer PNL1.

[0132] The second planarization layer PNL2 may be disposed on the sixth conductive layer SD2. The second planarization layer PNL2 may be an organic layer that planarizes the upper part and protects the components disposed below it. For example, the second planarization layer PNL2 may include organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0133] The seventh conductive layer SD3 can be disposed on the second planarization layer PNL2. The seventh conductive layer SD3 can be formed as a single layer or multiple layers of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni) and neodymium (Nd) or their alloys.

[0134] In one exemplary embodiment, at least a portion of the seventh conductive layer SD3 can be used as a shielding pattern SM. For example, in the seventh conductive layer SD3, signal interference may exist between the metal or conductive layer located below it (e.g., the first to sixth conductive layers GAT1, GAT2, TM1, TM2, SD1, and SD2) and the anode electrode AND of the light-emitting diode LD located above it. In this case, the voltage of the anode electrode AND of the light-emitting diode LD is unstable, which may degrade the display quality of the desired pixel. Therefore, in the case of the touch display device DD according to an exemplary embodiment of the present disclosure, the seventh conductive layer SD3 disposed above the second planarization layer PNL2 serves as a shielding pattern SM to shield the signal between at least a portion of the metal or conductive layer located below it and the anode electrode AND of the light-emitting diode LD. Therefore, display quality can be improved.

[0135] Furthermore, at least a portion of the seventh conductive layer SD3 can be connected to at least a portion of the sixth conductive layer SD2 through a contact hole passing through the second planarization layer PNL2.

[0136] The third planarization layer PNL3 may be disposed on the seventh conductive layer SD3. The third planarization layer PNL3 may be an organic layer that planarizes the upper part and protects the components disposed below it. For example, the third planarization layer PNL3 may include organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0137] A light-emitting diode (LD) can be disposed on a third planarization layer PNL3. The LD may include an anode electrode AND (or a first electrode), a cathode electrode CAD (or a second electrode), and an emitter layer EML formed therebetween.

[0138] The anode electrode AND can be disposed on the third planarization layer PNL3.

[0139] Meanwhile, when the touch display device DD is a top-emission type where light emitted from a light-emitting diode LD is emitted above a substrate SUB on which the light-emitting diode LD is disposed, the anode electrode AND may further include a transparent conductive layer and a reflective layer located on the transparent conductive layer. The transparent conductive layer may be formed of a transparent conductive oxide such as ITO or IZO, and the reflective layer may include silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or alloys thereof.

[0140] A dam layer (BNK) is configured to cover at least a portion of the anode electrode AND, while allowing the remaining portion of the anode electrode AND to remain open. For example, the dam layer BNK can be configured to open a portion corresponding to the emission region of a pixel. Therefore, a portion of the anode electrode AND can be exposed through the open portion of the dam layer BNK.

[0141] The dam layer BNK can include materials such as silicon nitride (SiN). x or silicon dioxide (SiO) x Inorganic insulating materials such as benzocyclobutene resin, acrylic resin or imide resin, but not limited to these.

[0142] The emitter layer EML can be disposed on the entire surface of the pixel on the top surface of the dam layer BNK and the anode electrode AND. At the same time, a portion of the emitter layer EML can contact the exposed portion of the anode electrode AND through the opening portion of the dam layer BNK.

[0143] According to an exemplary embodiment, the emitter layer (EML) may include multiple organic films.

[0144] The cathode electrode CAD can be set on the emitter layer EML. For example, the cathode electrode CAD can be set on the entire surface of a pixel.

[0145] A light-emitting diode (LD) can be formed from an anode electrode (AND), an emitter layer (EML), and a cathode electrode (CAD).

[0146] An encapsulation layer can be disposed above the light-emitting diode (LD). For example, the encapsulation layer may include a first inorganic encapsulation layer PAS1, a first organic encapsulation layer PCL1 located on the first inorganic encapsulation layer PAS1, a second inorganic encapsulation layer PAS2 located on the first organic encapsulation layer PCL1, a second organic encapsulation layer PCL2 located on the second inorganic encapsulation layer PAS2, and a third inorganic encapsulation layer PAS3 located on the second organic encapsulation layer PCL2. The first inorganic encapsulation layer PAS1, the second inorganic encapsulation layer PAS2, and the third inorganic encapsulation layer PAS3 can be used to block the penetration of moisture or oxygen. For example, the first inorganic encapsulation layer PAS1, the second inorganic encapsulation layer PAS2, and the third inorganic encapsulation layer PAS3 can be formed from inorganic materials such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide. The first inorganic encapsulation layer PAS1, the second inorganic encapsulation layer PAS2, and the third inorganic encapsulation layer PAS3 can be formed by chemical vapor deposition (CVD) or atomic layer deposition (ALD).

[0147] A first organic encapsulation layer PCL1 may be disposed between a first inorganic encapsulation layer PAS1 and a second inorganic encapsulation layer PAS2, and a second organic encapsulation layer PCL2 may be disposed between the second inorganic encapsulation layer PAS2 and a third inorganic encapsulation layer PAS3. Particles may be generated during the manufacturing process. The first organic encapsulation layer PCL1 and the second organic encapsulation layer PCL2 may be formed with a thickness greater than that of the first inorganic encapsulation layer PAS1, the second inorganic encapsulation layer PAS2, and the third inorganic encapsulation layer PAS3 to adsorb and / or block particles. The first organic encapsulation layer PCL1 and the second organic encapsulation layer PCL2 may be formed from organic materials such as silicon-oxygen-carbon silicon-oxygen SiOCz, acrylic resin, or epoxy resin. The first organic encapsulation layer PCL1 and the second organic encapsulation layer PCL2 may be formed by a coating process such as inkjet coating or slot coating.

[0148] The touch sensor TS can be disposed on the display panel DP. For example, the touch sensor TS may include a third buffer layer BUF3, a fourth insulating layer ILD4, and a protective layer PAC disposed on the encapsulation layer of the display panel DP.

[0149] The third buffer layer BUF3 of the touch sensor TS can be set on the encapsulation layer of the display panel DP.

[0150] When the touch sensor TS is formed on the display panel DP, chemicals used in the process (developers or etchants, etc.) and external moisture may be generated. Since the touch sensor TS is disposed on the third buffer layer BUF3, the penetration of chemicals or moisture into the emitter layer EML, which includes organic materials, can be prevented during the manufacturing process of the touch sensor TS. Thus, the third buffer layer BUF3 can prevent damage to the emitter layer EML, which is susceptible to chemicals or moisture.

[0151] The third buffer layer BUF3 may include an organic insulating material formed at a temperature below a predetermined temperature (e.g., 100°C) to suppress damage to the emitter layer EML, which includes organic materials susceptible to high temperatures. The organic insulating material has a low dielectric constant of 1 to 3. For example, the third buffer layer BUF3 may include acrylic, epoxy, or siloxane materials. Meanwhile, when the touch display device DD is bent, the encapsulation layer of the display panel DP may be damaged, and the metal located on the third buffer layer BUF3 (e.g., multiple sensing electrodes TE1 and TE2 and / or multiple bridge electrodes BRG1 and BRG2) may break. Here, even if the touch display device DD is bent, the third buffer layer BUF3, as an organic insulating material and having planarization properties, can suppress damage to the encapsulation layer of the display panel DP and / or suppress breakage of the metal constituting the touch sensor TS (e.g., multiple sensing electrodes TE1 and TE2 and / or multiple bridge electrodes BRG1 and BRG2).

[0152] Multiple sensing electrodes TE1 and TE2, as well as bridge electrodes BRG1 and BRG2, which are set on different layers, can be set on the third buffer layer BUF3.

[0153] For example, multiple bridge electrodes BRG1 and BRG2 can be disposed on the third buffer layer BUF3. For example, the first bridge electrode BRG1 can be disposed on the third buffer layer BUF3 of the first region A1, and the second bridge electrode BRG2 can be disposed on the third buffer layer BUF3 of the second region A2.

[0154] The fourth insulating layer ILD4 can be disposed on the bridge electrodes BRG1 and BRG2. The fourth insulating layer ILD4 is disposed between the multiple sensing electrodes TE1 and TE2 and the bridge electrodes BRG1 and BRG2, so as to insulate the multiple sensing electrodes TE1 and TE2 from the bridge electrodes BRG1 and BRG2.

[0155] The fourth insulating layer, ILD4, can be made of silicon nitride (SiN). x or silicon dioxide (SiO) x It may consist of a single layer or multiple layers, but is not limited thereto.

[0156] Multiple sensing electrodes TE1 and TE2 can be disposed on the fourth insulating layer ILD4. For example, the first sensing electrode TE1 can be disposed on the fourth insulating layer ILD4 of the first region A1, and the second sensing electrode TE2 can be disposed on the fourth insulating layer ILD4 of the second region A2.

[0157] According to an exemplary embodiment, in the first region A1, the first sensing electrode TE1 can be electrically connected to the first bridge electrode BRG1 through a contact hole passing through the fourth insulating layer ILD4. Furthermore, in the second region A2, the second sensing electrode TE2 can be electrically connected to the second bridge electrode BRG2 through a contact hole passing through the fourth insulating layer ILD4.

[0158] The protective layer PAC can be disposed on multiple sensing electrodes TE1 and TE2. For example, the protective layer PAC can be disposed on the fourth insulating layer ILD4 to cover multiple sensing electrodes TE1 and TE2.

[0159] The protective layer PAC can be an organic insulating film, but is not limited to this. For example, the protective layer PAC can include materials such as silicon nitride (SiN). x ) and / or silicon dioxide (SiO2) x Inorganic materials such as )

[0160] At the same time, as referenced Figure 4 The first connecting line CL1 can be disposed on the second region A2 to connect the second sensing electrodes TE2 that are adjacent to each other among the plurality of second sensing electrodes TE2.

[0161] For example, such as Figure 5 As shown, at the boundary between the first region A1 and the second region A2, at least a portion of the first sensing electrode TE1 disposed in the first region A1 extends into the second region A2 to form a first connecting line CL1. The first connecting line CL1 can be electrically connected to the second sensing electrode TE2 in the second region A2. For example, at least a portion of the first sensing electrode TE1 is configured to contact the top and side surfaces of the fourth insulating layer ILD4 and the side surface of the third buffer layer BUF3 disposed in the first region A1, extending to the top surface of the patterned layer PTL in the second region A2, thereby being electrically connected to the first connecting line CL1. The first connecting line CL1 is configured to contact the side surface of the third buffer layer BUF3 and the top and side surfaces of the fourth insulating layer ILD4 disposed in the second region A2, thereby being electrically connected to the second sensing electrode TE2 in the second region A2. Therefore, at the boundary between the first region A1 and the second region A2, the first sensing electrode TE1 disposed in the first region A1 and the second sensing electrode TE2 disposed in the second region A2 can be electrically connected to each other through the first connecting line CL1.

[0162] Figure 6It shows that it has been enlarged. Figure 1 An enlarged view of an example of a portion of the second area of ​​a touch display device.

[0163] Figure 7 It shows along Figure 6 A cross-sectional view of an example taken from line II-II'.

[0164] Figure 8 It shows along Figure 6 A cross-sectional view of an example taken from line III-III'.

[0165] To avoid redundancy, the main descriptions and references will be provided. Figures 1 to 5 The descriptions do not overlap. Parts not specifically described follow the exemplary embodiments described above, and the same reference numerals denote the same components, and similar reference numerals denote similar components.

[0166] Reference Figures 1 to 6 According to an exemplary embodiment of the present disclosure, a touch display device DD includes a display panel DP and a touch sensor TS disposed on the display panel DP. The display panel DP includes a substrate SUB, a pattern layer PTL, and a plurality of pixels PX1 and PX2, and the touch sensor TS may include a plurality of sensing electrodes TE1 and TE2.

[0167] As described above, the substrate SUB is the basic component of the display panel DP, and is also the substrate used to support and protect the various components of the touch display device DD.

[0168] The substrate SUB is a flexible substrate that can reversibly expand and contract. Therefore, the substrate SUB can be called a stretchable substrate, elastic substrate, tensile substrate, or flexible substrate. Furthermore, the elastic modulus of the substrate SUB can range from a few MPa to several hundred MPa. Additionally, the ductile fracture rate of the substrate SUB can be 100% or higher. Here, the ductile fracture rate refers to the elongation at which the object being stretched breaks or fractures.

[0169] The pattern layer PTL can be disposed on the substrate SUB. According to an exemplary embodiment, the pattern layer PTL may include a plurality of plate-shaped patterns PP, a plurality of first connection patterns LP1, and a plurality of second connection patterns LP2 disposed on the second region A2.

[0170] Multiple plate-shaped patterns PP can be disposed on the second region A2. For example, the plate-shaped patterns PP can be disposed above the second region A2 of the substrate SUB. Furthermore, as... Figure 6 As shown, the second sensing electrode TE2 and a plurality of second pixels PX2, each including a plurality of sub-pixels SPX, can be disposed and / or formed on the plate-shaped pattern PP.

[0171] Plate-shaped patterns PP can be spaced apart from each other to be disposed on the second region A2 of the substrate SUB. For example, as Figure 6 As shown, the plate-shaped pattern PP can be set as a matrix on the second region A2 of the substrate SUB, but this is only illustrative and the exemplary embodiments of this disclosure are not limited thereto.

[0172] Connecting patterns LP1 and LP2 are disposed between adjacent plate-shaped patterns PP to connect the plate-shaped patterns, and can also be disposed on the second region A2. Connecting patterns LP1 and LP2 can be divided into a first connecting pattern LP1 and a second connecting pattern LP2.

[0173] Multiple first connection patterns LP1 can be disposed on the second region A2. For example, the first connection patterns LP1 can be disposed above the second region A2 of the substrate SUB. In one embodiment, each first connection pattern LP1 is located between a pair of plate-shaped patterns PP and electrically connects the pair of plate-shaped patterns PP together. Similarly, each second connection pattern LP2 is located between a pair of plate-shaped patterns PP and electrically connects the pair of plate-shaped patterns PP together. Figure 6 As shown, a pair of plate-shaped patterns PP connected together by at least one second connecting pattern LP2 are also connected together by a first connecting pattern LP1.

[0174] The first connecting pattern LP1 may be a pattern disposed on the second region A2 and connecting adjacent plate-shaped patterns PP. According to an exemplary embodiment, the first connecting pattern LP1 may be referred to as a first line pattern. That is, at least one first connecting pattern LP1 may be disposed between plate-shaped patterns PP.

[0175] In an exemplary embodiment, each of the first connection patterns LP1 may have a wavy shape. For example, the first connection pattern LP1 may have a sine wave shape. However, this is merely illustrative, and therefore the shape of the first connection pattern LP1 is not limited to this. For example, each of the first connection patterns LP1 may have a sawtooth shape. As another example, each of the first connection patterns LP1 may have various shapes, such as multiple rhomboid substrates connected and extending at the vertices. As described above, Figure 6 The number and shape of the multiple first connecting patterns LP1 shown are illustrative, and the number and shape of the first connecting patterns LP1 can vary according to the design.

[0176] In addition, the first connecting line CL1 can be positioned above each first connecting pattern LP1.

[0177] Multiple second connection patterns LP2 can be disposed on the second region A2. For example, the second connection patterns LP2 can be disposed above the second region A2 of the substrate SUB.

[0178] Similar to the first connecting pattern LP1, the second connecting pattern LP2 can be a pattern disposed on the second region A2 and connecting adjacent plate-shaped patterns PP. According to an exemplary embodiment, the second connecting pattern LP2 can be referred to as a second line pattern. That is, at least one second connecting pattern LP2 can be disposed between plate-shaped patterns PP.

[0179] In one exemplary embodiment, the number of second connecting patterns LP2 disposed between plate-shaped patterns PP can be greater than the number of first connecting patterns LP1 disposed between plate-shaped patterns PP. For example, as Figure 6 As shown, a first connecting pattern LP1 can be disposed between plate-shaped patterns PP, and two second connecting patterns LP2 can be disposed between plate-shaped patterns PP, but the exemplary embodiments of this disclosure are not limited thereto. For example, two or more first connecting patterns LP1 can be disposed between plate-shaped patterns PP and / or one or three or more second connecting patterns LP2 can be disposed between plate-shaped patterns PP.

[0180] In an exemplary embodiment, each of the second connection patterns LP2 may have a wavy shape. For example, the second connection pattern LP2 may have a sine wave shape. However, this is merely illustrative, and therefore the shape of the second connection pattern LP2 is not limited to this. For example, each of the second connection patterns LP2 may have a serrated shape. As another example, each of the second connection patterns LP2 may have various shapes, such as multiple rhomboid substrates connected and extending at the vertices. As described above, Figure 6 The number and shape of the second connecting pattern LP2 shown are illustrative, and the number and shape of the second connecting pattern LP2 can be varied according to the design.

[0181] In addition, a second connecting line CL2 can be positioned above each second connecting pattern LP2.

[0182] In an exemplary embodiment, the patterned layer PTL (e.g., a plate-like pattern PP, a first connecting pattern LP1, and a second connecting pattern LP2) can each be a rigid pattern. For example, each of the plate-like pattern PP, the first connecting pattern LP1, and the second connecting pattern LP2 can be more rigid than the substrate SUB. Therefore, the elastic modulus of the plate-like pattern PP, the first connecting pattern LP1, and the second connecting pattern LP2 can be higher than the elastic modulus of the substrate SUB. The elastic modulus is a parameter representing the rate of deformation relative to stress applied to the substrate, and a higher elastic modulus indicates higher hardness. Therefore, the plate-like pattern PP, the first connecting pattern LP1, and the second connecting pattern LP2 can also be referred to as a first rigid pattern to a third rigid pattern. For example, the elastic modulus of the plate-like pattern PP, the first connecting pattern LP1, and the second connecting pattern LP2 can be 1000 times the elastic modulus of the substrate SUB, but this is exemplary, and the exemplary embodiments of this disclosure are not limited thereto.

[0183] In one exemplary embodiment, the patterned layer PTL (e.g., each of the plate-like pattern PP, the first connecting pattern LP1, and the second connecting pattern LP2) may include a plastic material with a flexibility lower than that of the substrate SUB. For example, the plate-like pattern PP, the first connecting pattern LP1, and the second connecting pattern LP2 may include at least one material selected from polyimide (PI), polyacrylate, and polyacetate.

[0184] According to an exemplary embodiment, the plate-shaped pattern PP, the first connecting pattern LP1, and the second connecting pattern LP2 can be formed from the same material, but are not limited thereto, and can be formed from different materials. When the plate-shaped pattern PP, the first connecting pattern LP1, and the second connecting pattern LP2 are formed from the same material, the plate-shaped pattern PP, the first connecting pattern LP1, and the second connecting pattern LP2 can be integrally formed.

[0185] like Figure 6 As shown, on the second region A2, a first connecting line CL1 extending along the first direction DR1 or the second direction DR2 and disposed on the first connecting pattern LP1, and a second connecting line CL2 extending along the first direction DR1 or the second direction DR2 and disposed on the second connecting pattern LP2 can be formed.

[0186] In one exemplary embodiment, the first connecting line CL1 may be electrically connected to a sensing electrode (e.g., a second sensing electrode TE2) disposed on an adjacent plate-shaped pattern PP.

[0187] For example, further reference Figure 7The second sensing electrode TE2 included in the touch sensor TS can be disposed on the plate-shaped pattern PP of the pattern layer PTL. Here, at least a portion of the second sensing electrode TE2 can be disposed and extended to contact the top and side surfaces of the fourth insulating layer ILD4 and the side surface of the third buffer layer BUF3 disposed on the plate-shaped pattern PP. Therefore, at least a portion of the second sensing electrode TE2 can be electrically connected to the first connecting line CL1 disposed on the first connecting pattern LP1. Therefore, the first connecting line CL1 disposed on the first connecting pattern LP1 can be electrically connected to the second sensing electrode TE2 disposed on the adjacent plate-shaped pattern PP. That is, the first connecting line CL1 can be used together with the second sensing electrode TE2 as a touch electrode in the second region A2.

[0188] Furthermore, in one exemplary embodiment, the second connecting line CL2 may electrically connect pixels disposed on adjacent plate-shaped patterns PP, such as the second pixel PX2.

[0189] For example, further reference Figure 8 The second pixel PX2 (e.g., at least one transistor TR1, TR2 and a light-emitting diode LD) included in the display panel DP can be disposed on the plate-shaped pattern PP of the pattern layer PTL. Here, at least a portion of the seventh conductive layer SD3 included in the second pixel PX2 is disposed and extends to contact the top and side surfaces of the second planarization layer PNL2, the side surface of the first planarization layer PNL1, the side surface of the third insulating layer ILD3, the side surface of the second gate insulating layer GI2, the side surface of the second insulating layer ILD2, the side surface of the first insulating layer ILD1, the side surface of the first gate insulating layer GI1, and the side surface of the first buffer layer BUF1 disposed on the plate-shaped pattern PP, and is electrically connected to the second connection line CL2 disposed on the second connection pattern LP2. Therefore, the second connection line CL2 disposed on the second connection pattern LP2 can be electrically connected to the second pixel PX2 disposed on the adjacent plate-shaped pattern PP.

[0190] In one exemplary embodiment, the second connection line CL2 configured to connect the second pixel PX2 may include various wirings, such as gating lines (e.g., scan signal lines or transmit control lines), data lines, high-potential voltage lines, low-potential voltage lines, and initialization voltage lines.

[0191] The first connecting line CL1 and the second connecting line CL2 may be formed by a stacked structure of metallic materials such as copper (Cu), aluminum (Al), titanium (Ti) and molybdenum, or metallic materials such as copper / molybdenum / titanium (Cu / Mo / Ti) or titanium / aluminum / titanium (Ti / Al / Ti), but are not limited thereto.

[0192] In one exemplary embodiment, the first connection line CL1 can be formed simultaneously with the sensing electrode (e.g., the second sensing electrode TE2) of the touch sensor TS using the same process. In this case, the first connection line CL1 and the second sensing electrode TE2 can comprise the same material.

[0193] In one exemplary embodiment, the second connection line CL2 can be formed simultaneously with the seventh conductive layer SD3 of the display panel DP using the same process. In this case, the second connection line CL2 and the seventh conductive layer SD3 may comprise the same material.

[0194] According to exemplary embodiments, such as Figure 7 and Figure 8 As shown, the first connecting line CL1 and the second connecting line CL2 can be disposed on the same plane. For example, the first connecting line CL1 can be directly disposed on the first connecting pattern LP1, and the second connecting line CL2 can be directly disposed on the second connecting pattern LP2 located on the same layer as the first connecting pattern LP1. That is, the first connecting line CL1 and the second connecting line CL2 can be placed horizontally. Therefore, the touch display device DD can ensure the stretchability of the second area A2.

[0195] As described above, according to an exemplary embodiment of this disclosure, a touch display device includes a display panel and a touch sensor disposed on the display panel, and may include a first region as a central region and a second region as a peripheral region (edge ​​region) surrounding the first region. Furthermore, the touch display device may include a plurality of plate-like patterns and connecting patterns. The plurality of plate-like patterns are disposed on the second region and include sensing electrodes disposed thereon, and the connecting patterns are configured to connect adjacent plate-like patterns and include connecting lines disposed thereon. The connecting lines connect the sensing electrodes formed on the plate-like patterns. Therefore, the connecting lines disposed in the peripheral region can be used as part of the touch electrodes.

[0196] According to an exemplary embodiment of this disclosure, in a touch display device, a second pixel disposed in a second region can be configured to have a lower pixel density than a first pixel disposed in a first region. Therefore, in the second region, which serves as a peripheral region, the touch display device can be modified so that the second region, as a peripheral region, can be designed to have an arc-shaped form.

[0197] Exemplary embodiments of this disclosure can also be described as follows:

[0198] According to one aspect of this disclosure, a touch display device includes a first region disposed centrally and a second region surrounding the first region. The touch display device includes: a display panel comprising a substrate, a plurality of first pixels disposed in the first region of the substrate, and a plurality of second pixels disposed in the second region of the substrate; and a touch sensor disposed on the display panel and including a plurality of first sensing electrodes disposed in the first region and a plurality of second sensing electrodes disposed in the second region. The plurality of first pixels and the plurality of second pixels may be arranged at different densities, and the plurality of first sensing electrodes and the plurality of second sensing electrodes may also be arranged at different densities.

[0199] The first pixel can be set in the first region with a first pixel density, and the second pixel can be set in the second region with a second pixel density that is less than the first pixel density.

[0200] The first sensing electrode can be set at a higher density than the second sensing electrode.

[0201] Each of the second sensing electrodes can be configured to correspond to a region in which each of the second pixels can be configured.

[0202] The touch sensor may also include connecting wires configured to connect adjacent second sensing electrodes in the second sensing electrodes.

[0203] The touch display device may further include: a pattern layer comprising a plurality of plate-shaped patterns, a plurality of first connection patterns and a plurality of second connection patterns disposed on a second region of a substrate, and comprising an insulating material.

[0204] Multiple plate-shaped patterns can be set to be spaced apart from each other, a first connecting pattern connects adjacent plate-shaped patterns among the multiple plate-shaped patterns, and a second connecting pattern connects adjacent plate-shaped patterns among the multiple plate-shaped patterns.

[0205] The touch display device may further include: a plurality of second connecting lines disposed on a second connecting pattern, the second pixels being disposed above the plurality of plate-shaped patterns respectively, and the second connecting lines electrically connecting adjacent second pixels among the second pixels.

[0206] The touch display device may further include: a plurality of first connecting lines disposed on a first connecting pattern, second sensing electrodes disposed above second pixels respectively, and the first connecting lines electrically connecting adjacent second sensing electrodes among the second sensing electrodes.

[0207] The number of first connecting patterns between adjacent plate-shaped patterns in a plurality of plate-shaped patterns can be less than the number of second connecting patterns between adjacent plate-shaped patterns.

[0208] Each of the first and second connecting patterns can have a wavy shape.

[0209] The display panel includes: a first buffer layer disposed on a pattern layer; a first semiconductor layer disposed on the first buffer layer and including a first semiconductor pattern of a first transistor; a first gate insulating layer disposed on the first semiconductor layer; a first conductive layer disposed on the first gate insulating layer and including a first gate electrode of the first transistor; a first insulating layer disposed on the first conductive layer; a second conductive layer disposed on the first insulating layer; a second insulating layer disposed on the second conductive layer; and a third conductive layer disposed on the second insulating layer and including a first source electrode and a first drain electrode of the first transistor.

[0210] The display panel may further include: a second buffer layer disposed on a third conductive layer; a second semiconductor layer disposed on the second buffer layer and including a second semiconductor pattern of a second transistor; a second gate insulating layer disposed on the second semiconductor layer; a fourth conductive layer disposed on the second gate insulating layer and including a second gate electrode of the second transistor; a third insulating layer disposed on the fourth conductive layer; and a fifth conductive layer disposed on the third insulating layer and including a second source electrode and a second drain electrode of the second transistor.

[0211] The display panel may further include: a first planarization layer disposed on a fifth conductive layer; a sixth conductive layer disposed on the first planarization layer; a second planarization layer disposed on the sixth conductive layer; and a seventh conductive layer disposed on the second planarization layer.

[0212] The seventh conductive layer can be configured to extend from the first region to a second connection pattern disposed on the second region.

[0213] The display panel may further include: a light-emitting diode disposed on a seventh conductive layer; and an encapsulation layer disposed on the light-emitting diode, wherein the encapsulation layer includes: a first inorganic encapsulation layer disposed on the light-emitting diode; a first organic encapsulation layer disposed on the first inorganic encapsulation layer; a second inorganic encapsulation layer disposed on the first organic encapsulation layer; a second organic encapsulation layer disposed on the second inorganic encapsulation layer; and a third inorganic encapsulation layer disposed on the second organic encapsulation layer.

[0214] The touch sensor may include: a third buffer layer disposed on the display panel; a plurality of bridge electrodes disposed on the third buffer layer; a fourth insulating layer disposed on the plurality of bridge electrodes; a plurality of sensing electrodes disposed on the fourth insulating layer; and a protective layer disposed on the plurality of sensing electrodes.

[0215] The plurality of bridge electrodes may include a first bridge electrode disposed on a first region and a second bridge electrode disposed on a second region, and the plurality of sensing electrodes include a first sensing electrode disposed on a first region and a second sensing electrode disposed on a second region. In the first region, the first sensing electrode may be electrically connected to the first bridge electrode through a contact hole passing through a fourth insulating layer, and in the second region, the second sensing electrode may be electrically connected to the second bridge electrode through a contact hole passing through a fourth insulating layer.

[0216] Among multiple sensing electrodes, the first sensing electrode disposed on the first region can be configured to extend from the first region to the second connection pattern disposed on the second region.

[0217] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all respects and do not limit the present disclosure. All technical concepts within the equivalent scope of the present disclosure should be considered to fall within the scope of the present disclosure.

[0218] Cross-reference to related applications

[0219] This application claims priority to Korean Patent Application No. 10-2023-0115323, filed on August 31, 2023, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference.

Claims

1. A touch display device, comprising a first area arranged in the center and a second area surrounding the first area, the touch display device comprising: a display panel comprising a substrate, a plurality of first pixels disposed on the substrate in the first region, and a plurality of second pixels disposed on the substrate in the second region; as well as a touch sensor disposed on the display panel and including a plurality of first sensing electrodes disposed in the first area and a plurality of second sensing electrodes disposed in the second area, wherein the plurality of first pixels and the plurality of second pixels are arranged at different densities, and The plurality of first sensing electrodes and the plurality of second sensing electrodes are disposed at different densities.

2. The touch display device according to claim 1, in, The first pixels are arranged in the first region at a first pixel density, and the second pixels are arranged in the second region at a second pixel density that is smaller than the first pixel density.

3. The touch display device according to claim 2, in, The first sensing electrodes are disposed at a density greater than a density of the second sensing electrodes.

4. The touch display device according to claim 3, in, Each of the second sensing electrodes is disposed to correspond to a region where each of the second pixels is disposed.

5. The touch display device according to claim 1, in, The touch sensor further includes a connection line configured to connect second sensing electrodes adjacent to each other among the second sensing electrodes.

6. The touch display device according to claim 1, further comprising: A pattern layer includes a plurality of plate patterns, a plurality of first connection patterns, and a plurality of second connection patterns disposed on the second region of the substrate, and the pattern layer includes an insulating material.

7. The touch display device according to claim 6, in, The plurality of plate-like patterns are arranged to be spaced apart from each other, The first connection pattern connects the plate-shaped patterns adjacent to each other among the plurality of plate-shaped patterns, and The second connection pattern connects the plate patterns adjacent to each other among the plurality of plate patterns.

8. The touch display device according to claim 6, further comprising: a plurality of second connection lines, wherein the plurality of second connection lines are arranged on the second connection pattern, Wherein, the second pixels are respectively arranged above the plurality of plate-shaped patterns, and The second connection line electrically connects second pixels adjacent to each other among the second pixels.

9. The touch display device according to claim 8, further comprising: a plurality of first connection lines, wherein the plurality of first connection lines are arranged on the first connection pattern, Wherein, the second sensing electrodes are respectively arranged above the second pixels, and The first connection line electrically connects second sensing electrodes adjacent to each other among the second sensing electrodes.

10. The touch display device according to claim 7, in, The number of first connection patterns disposed between adjacent plate patterns among the plurality of plate patterns is smaller than the number of second connection patterns disposed between adjacent plate patterns among the plurality of plate patterns.

11. The touch display device according to claim 6, in, Each of the first connection pattern and the second connection pattern has a wave shape.

12. The touch display device according to claim 6, wherein: The display panel comprises: a first buffer layer, wherein the first buffer layer is disposed on the pattern layer; a first semiconductor layer disposed on the first buffer layer and including a first semiconductor pattern of a first transistor; a first gate insulating layer, the first gate insulating layer being disposed on the first semiconductor layer; a first conductive layer, the first conductive layer being disposed on the first gate insulating layer and comprising a first gate electrode of the first transistor; a first insulating layer, the first insulating layer being disposed on the first conductive layer; a second conductive layer, the second conductive layer being disposed on the first insulating layer; a second insulating layer, the second insulating layer being disposed on the second conductive layer; and A third conductive layer is provided on the second insulating layer and includes a first source electrode and a first drain electrode of the first transistor.

13. The touch display device according to claim 12, in, The display panel further includes: a second buffer layer, wherein the second buffer layer is disposed on the third conductive layer; a second semiconductor layer disposed on the second buffer layer and including a second semiconductor pattern of a second transistor; a second gate insulating layer, the second gate insulating layer being disposed on the second semiconductor layer; a fourth conductive layer, the fourth conductive layer being disposed on the second gate insulating layer and including a second gate electrode of the second transistor; a third insulating layer, the third insulating layer being disposed on the fourth conductive layer; and A fifth conductive layer is provided on the third insulating layer and includes a second source electrode and a second drain electrode of the second transistor.

14. The touch display device according to claim 13, in, The display panel further includes: a first planarization layer, wherein the first planarization layer is disposed on the fifth conductive layer; a sixth conductive layer, the sixth conductive layer being disposed on the first planarization layer; a second planarization layer, the second planarization layer being disposed on the sixth conductive layer; and A seventh conductive layer is disposed on the second planarization layer.

15. The touch display device according to claim 14, in, The seventh conductive layer is disposed to extend from the first region to the second connection pattern disposed on the second region.

16. The touch display device according to claim 14, in, The display panel further includes: a light emitting diode, wherein the light emitting diode is disposed on the seventh conductive layer; and an encapsulation layer, the encapsulation layer being disposed on the light emitting diode, and The encapsulation layer comprises: a first inorganic encapsulation layer, wherein the first inorganic encapsulation layer is disposed on the light emitting diode; a first organic encapsulation layer, the first organic encapsulation layer being disposed on the first inorganic encapsulation layer; a second inorganic encapsulation layer, the second inorganic encapsulation layer being disposed on the first organic encapsulation layer; a second organic encapsulation layer, the second organic encapsulation layer being disposed on the second inorganic encapsulation layer; and A third inorganic encapsulation layer is disposed on the second organic encapsulation layer.

17. The touch display device according to claim 6, in, The touch sensor comprises: a third buffer layer, wherein the third buffer layer is disposed on the display panel; A plurality of bridge electrodes, wherein the plurality of bridge electrodes are arranged on the third buffer layer; a fourth insulating layer, the fourth insulating layer being disposed on the plurality of bridge electrodes; a plurality of sensing electrodes including the plurality of first sensing electrodes and the plurality of second sensing electrodes, the plurality of sensing electrodes being disposed on the fourth insulating layer; and A protection layer is disposed on the plurality of sensing electrodes.

18. The touch display device according to claim 17, in, The plurality of bridge electrodes include a first bridge electrode disposed in the first region and a second bridge electrode disposed in the second region, In the first region, a first sensing electrode among the first sensing electrodes is electrically connected to the first bridge electrode through a contact hole passing through the fourth insulating layer, and In the second region, a second sensing electrode among the second sensing electrodes is electrically connected to the second bridge electrode through a contact hole passing through the fourth insulating layer.

19. The touch display device according to claim 6, in, A first sensing electrode of the first sensing electrodes is disposed to extend from the first region to the second connection pattern disposed on the second region.

20. A touch display device, comprising: a display panel, the display panel comprising a first area of ​​the display panel, a second area surrounding the first area corresponding to an arc-shaped edge of the display panel, a plurality of first pixels in the first area of ​​the display panel configured to emit light, and a plurality of second pixels in the second area of ​​the display panel configured to emit light; as well as A touch sensor on the display panel, the touch sensor comprising: a plurality of first sensing electrodes in the first area, the plurality of first sensing electrodes configured to sense a touch of the first area; a plurality of second sensing electrodes spaced apart from each other in the second region, the plurality of second sensing electrodes configured to sense a touch of the second region; and In the second region, at least one connection line among the plurality of connection lines is located between a pair of second sensing electrodes among the plurality of second sensing electrodes and electrically connects the pair of second sensing electrodes together.

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