A high-performance multi-channel input / output satellite integrated electronic interface expansion device
Through the design of series serial expansion chip and power module, multi-channel interface expansion is realized, solving the problem that existing devices cannot meet the interface expansion needs, reducing the maintenance cost of core processing chips, and adapting to the needs of the commercial aerospace market.
Patent Information
- Application Number
- CN202411640682.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-18
- Publication Date
- 2025-08-05
- Estimated Expiration
- 2044-11-18
AI Technical Summary
The existing satellite integrated electronic interface expansion device cannot meet the multi-channel interface expansion needs, and the addition of core processing chips leads to an increase in weight and power consumption, which is unable to adapt to the rapidly growing commercial aerospace market.
A high-performance multi-channel input and output satellite integrated electronic interface expansion device is designed. By connecting the first and second-level serial port expansion chips in series, the expansion of 7 UART sub-serial ports and 16 GPIO interfaces is realized. The power module is combined for voltage conversion and current limit protection, and supports 2-channel RS485, 4-channel RS422, 8-channel analog acquisition interfaces and 16-channel power drive outputs.
Multi-channel interface expansion is realized, reducing the on-orbit maintenance needs of the core processing chip, improving the interface expansion efficiency, supporting rapid iterative updates, and covering most of the needs of satellite-borne equipment.
Smart Images

Figure CN119537290B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of transmission technology, in particular to a high-performance multi-channel input and output satellite integrated electronic interface expansion device. Background Art
[0002] In recent years, my country's commercial space industry has experienced rapid development across all sectors. Each commercial aerospace company has introduced integrated electronics units tailored to their specific technical characteristics, significantly shortening satellite development cycles and effectively reducing R&D costs. However, as the market expands and commercial space missions experience explosive growth, the added equipment poses challenges to integrated electronics.
[0003] The primary approach currently used to improve these systems is to continuously upgrade core processing chips, which significantly increases weight and power consumption. Furthermore, this development approach is unsuitable for the rapidly growing commercial space market. Another approach maintains the integrated core electronics board and adds expansion boards with core processing chips. This improves R&D efficiency to a certain extent, but the core processing chips often require on-orbit maintenance, adding unnecessary costs.
[0004] There is a serial port expansion chip on the market. Its input is a 1-channel UART, SPI, IIC or 8-bit parallel bus interface, and its output is a 4-channel UART interface. However, its expansion performance still cannot meet the needs of a large number of interface expansions, and there is currently no solution for cascading expansion of this chip.
[0005] Therefore, how to obtain a high-performance multi-channel input and output satellite integrated electronic interface expansion device is a problem that needs to be solved urgently. Summary of the Invention
[0006] The present invention aims to solve the problem of satellite interface expansion and provide a high-performance multi-channel input and output satellite integrated electronic interface expansion device.
[0007] The present invention provides a high-performance multi-channel input and output satellite integrated electronic interface expansion device, comprising an internal bus, an interface expansion module, an interface application module, and a power supply module connected to the internal bus, the interface expansion module, and the interface application module. The output port of the interface expansion module includes 7 UART sub-serial ports and 16 GPIO interfaces, and all of the output ports can be connected to the interface application module.
[0008] The interface expansion module includes a first-level serial port expansion chip and a second-level serial port expansion chip connected in series. The first-level serial port expansion chip and the second-level serial port expansion chip each include a main serial port, four UART sub-serial ports, and eight GPIO interfaces. The main serial port of the first-level serial port expansion chip is connected to the internal bus, and another UART sub-serial port is connected to the main serial port of the second-level serial port expansion chip. The other three UART sub-serial ports and eight GPIO interfaces of the first-level serial port expansion chip are all connected to the interface application module. The four UART sub-serial ports and eight GPIO interfaces of the second-level serial port expansion chip are all connected to the interface application module.
[0009] The interface application module can be a transceiver chip, an ADC acquisition chip, and a combination circuit of a triode and a MOS tube;
[0010] The internal bus inputs the primary power supply VCC to the power module. After voltage conversion, the power module outputs the secondary power supply VDD to the first-level serial port expansion chip and the second-level serial port expansion chip. The power module performs current limiting protection on the primary power supply VCC, EMI filtering and surge suppression on the primary power signal.
[0011] The internal bus sends the first-level slave serial port data to the main serial port of the first-level serial port expansion chip. The first-level slave serial port data includes the first-level control byte and the first-level data byte.
[0012] When the level 1 data byte does not contain a control byte, the level 1 data byte is output to the interface application module connected to the first level serial port expansion chip;
[0013] When the level 1 data byte includes the level 2 control byte and the level 2 data byte, the level 1 data byte is output to the second-level serial port expansion chip through the UART sub-serial port of the first-level serial port expansion chip, and the level 2 data byte is output to the interface application module connected to the second-level serial port expansion chip;
[0014] The communication method of the multi-channel input and output satellite integrated electronic interface expansion device comprises the following steps:
[0015] After S1, the internal bus, the interface expansion module, the interface application module, and the power module are all connected, the baud rate of the first-level serial port expansion chip is adapted;
[0016] S2. The internal bus communicates with the first-level serial port expansion chip through the main serial port, and sets / reads the register status to initialize the UART sub-serial port of the first-level serial port expansion chip;
[0017] S3, initialization of the GPIO interface of the first-level serial port expansion chip;
[0018] S4, communicating with the second-level serial port expansion chip through the UART sub-serial port of the first-level serial port expansion chip, adapting the baud rate of the second-level serial port expansion chip, initializing the UART sub-serial port and the GPIO interface;
[0019] The internal bus sends data to the first-level serial port expansion chip and the second-level serial port expansion chip and outputs the data to the interface application module, and the communication method of the multi-channel input and output satellite integrated electronic interface expansion device is completed.
[0020] The high-performance multi-channel input and output satellite integrated electronic interface expansion device described in the present invention is, as a preferred embodiment, in step S1 of the communication method of the multi-channel input and output satellite integrated electronic interface expansion device, when the main serial port of the first-level serial port expansion chip receives the first frame of data, the first-level serial port expansion chip performs internal adaptation according to the main serial port baud rate matching instruction code to set the baud rate to the main serial port baud rate and establish communication.
[0021] The high-performance multi-channel input and output satellite integrated electronic interface expansion device of the present invention, as a preferred embodiment, step S2 of the communication method of the multi-channel input and output satellite integrated electronic interface expansion device includes the following steps:
[0022] S21. Initialize the sub-serial port 1 of the first-level serial port expansion chip: set the general register address and sub-serial port 1 in the general register data after reading the general register data; set the software reset sub-serial port register address and software reset sub-serial port data after reading the general register data; and read the software reset sub-serial port data register data;
[0023] S22, enable serial port interrupt: read enable serial port interrupt and set enable serial port interrupt address, write enable serial port interrupt data;
[0024] S23, enable the slave serial port receiving contact interrupt and timeout interrupt: read the interrupt register data and set the operation interrupt register address, and write the interrupt register configuration data;
[0025] S24, initialize FIFO and set fixed interrupt contact: set the fifo control register address, write the fifo control register data, set the serial port 1 page register address, switch to the serial port 1 page 1 register, set the sub-serial port 1 receiving mode of the first-level serial port expansion chip to contact mode, the receiving contact is 64 bytes, the sending mode to contact, the sending contact is 16 bytes, set the page register address of the sub-serial port 1 of the first-level serial port expansion chip and switch to the register, read the sub-serial port 1 send and receive enable register of the first-level serial port expansion chip and set the send and receive enable register address, enable the sub-serial port 1 send and receive enable register of the first-level serial port expansion chip;
[0026] S25. Set the baud rate of the sub-serial port 1 of the first-level serial port expansion chip: read the sub-serial port 1 send / receive enable register of the first-level serial port expansion chip, set the send / receive enable register address, disable the send / receive enable register, set the page register address and switch to the page1 register, set the baud rate register 1 address, baud rate register 1 data, baud rate register 0 address, baud rate register 1 data, set the pres register address, pres register data, set the page register address and switch to the page0 register, read the send / receive enable register, set the send / receive enable register address, enable the send / receive enable register of serial port 1, and complete the initialization of the sub-serial port 1 of the first-level serial port expansion chip.
[0027] S26. Initialize the sub-serial port 2, sub-serial port 3, and sub-serial port 4 of the first-level serial port expansion chip respectively according to the method of steps S21 to S25. After the initialization is completed, data communication can be performed with the sub-serial port 1, sub-serial port 2, sub-serial port 3, and sub-serial port 4 of the first-level serial port expansion chip, wherein the sub-serial port 3 of the first-level serial port expansion chip is connected to the main serial port of the second-level serial port expansion chip, and the sub-serial port 1, sub-serial port 2, and sub-serial port 4 of the first-level serial port expansion chip can all be connected to the interface application module.
[0028] The high-performance multi-channel input and output satellite integrated electronic interface expansion device of the present invention, as a preferred embodiment, step S3 of the communication method of the multi-channel input and output satellite integrated electronic interface expansion device includes the following steps:
[0029] S31, the serial port chip GPIO write operation of the first-level serial port expansion chip: set the GPIO input and output register address of the first-level serial port expansion chip, and set the 8 GPIO interfaces of the first-level serial port expansion chip to active state, output data, and output high level;
[0030] S32, the serial port chip GPIO read operation of the first-level serial port expansion chip: set the GPIO input and output register address of the first-level serial port expansion chip, set the 8 GPIO interfaces to the active state and read the GPIO level state of the first-level serial port expansion chip, and the GPIO interface initialization of the first-level serial port expansion chip is completed.
[0031] The high-performance multi-channel input and output satellite integrated electronic interface expansion device of the present invention, as a preferred embodiment, step S4 of the communication method of the multi-channel input and output satellite integrated electronic interface expansion device includes the following steps:
[0032] S41, the first-level serial port expansion chip sends serial port data to the main serial port of the second-level serial port expansion chip through the sub-serial port 3 to adapt the baud rate and establish communication;
[0033] S42, the first-level serial port expansion chip sends a specified amount of data to the main serial port of the second-level serial port expansion chip, and the second-level serial port expansion chip initializes the sub-serial port and sets the baud rate;
[0034] S43, the first-level serial port expansion chip sends data to the main serial port of the second-level serial port expansion chip to initialize the GPIO interface of the second-level serial port expansion chip;
[0035] After the second-level serial port expansion chip is completed, the internal bus sends data to the first-level serial port expansion chip and the second-level serial port expansion chip and outputs it to the interface application module, and the communication method of the multi-channel input and output satellite integrated electronic interface expansion device is completed.
[0036] In a preferred embodiment of the high-performance multi-channel input / output satellite integrated electronic interface expansion device of the present invention, in step S41, when the level 1 data byte of the first-level serial port expansion chip includes the level 2 control byte and the level 2 data byte, the main serial port of the second-level serial port expansion chip receives the first frame of data and performs internal adaptation according to the main serial port baud rate matching instruction code to set the baud rate to the main serial port baud rate and establish communication;
[0037] The main serial port initialization instruction of the second-level serial port expansion chip is the same as the initialization instruction of the first-level serial port expansion chip.
[0038] The high-performance multi-channel input and output satellite integrated electronic interface expansion device of the present invention, as a preferred embodiment, step S42 includes:
[0039] S421, the first-level serial port expansion chip sends a specified amount of data to the main serial port of the second-level serial port expansion chip, initializing the second-level serial port expansion chip sub-serial port 1;
[0040] S422: The first-level serial port expansion chip sends a specified amount of data to the main serial port of the second-level serial port expansion chip, enabling the second-level serial port expansion chip's serial port interrupt.
[0041] S423: The first-level serial port expansion chip sends a specified amount of data to the main serial port of the second-level serial port expansion chip, enabling the second-level serial port expansion chip's slave serial port 1 receiving contact interrupt and timeout interrupt:
[0042] S424: The first-level serial port expansion chip sends a specified amount of data to the main serial port of the second-level serial port expansion chip, initializes the second-level serial port expansion chip FIFO, and sets a fixed interrupt contact.
[0043] S425: The first-level serial port expansion chip sends a specified amount of data to the main serial port of the second-level serial port expansion chip, and sets the baud rate of the second-level serial port expansion chip's slave serial port 1.
[0044] Using the same method as steps S421 to S425, the sub-serial port 2, sub-serial port 3 and sub-serial port 4 of the second-level serial port expansion chip are initialized respectively, and the second-level serial port expansion chip can communicate data with the first-level serial port expansion chip.
[0045] The high-performance multi-channel input and output satellite integrated electronic interface expansion device of the present invention is preferably configured such that, in step S421, the first-level serial port expansion chip sub-serial port 3 is operated to send two data, general register data is read, and data received by the first-level serial port expansion chip sub-serial port 3 is read;
[0046] Operate the first-level serial port expansion chip sub-serial port 3 to send a data, set the operation general register address, and set the second-level serial port expansion chip sub-serial port 1 in the general register data;
[0047] Operate the first-level serial port expansion chip UART 3 to send 2 data, read the general register data, and read the data received by the first-level serial port expansion chip UART 3;
[0048] Operate the first-level serial port expansion chip sub-serial port 3 to send 2 data, set the operating software to reset the sub-serial port register address, and set the software to reset the sub-serial port data;
[0049] Operate the first-level serial port expansion chip UART 3 to send 2 data, read the software reset UART data register data, and read the data received by the first-level serial port expansion chip UART 3;
[0050] In step S422, the first-level serial port expansion chip sub-serial port 3 is operated to send 2 data, the serial port general interrupt is enabled, and the data received by the first-level serial port expansion chip sub-serial port 3 is read;
[0051] Operate the first-level serial port expansion chip sub-serial port 3 to send 2 data, set the serial port general interrupt address, and write the serial port general interrupt data;
[0052] In step S423, the first-level serial port expansion chip sub-serial port 3 is operated to send 2 data, the interrupt register data is read, and the data received by the first-level serial port expansion chip sub-serial port 3 is read;
[0053] Operate the first-level serial port expansion chip UART 3 to send 2 data, set the interrupt register address, and write the interrupt register configuration data;
[0054] In step S424, the first-level serial port expansion chip sub-serial port 3 is operated to send 2 data, set the fifo control register address, and write the fifo control register data;
[0055] Operate the first-level serial port expansion chip UART 3 to send 2 data, set the serial port 1page register address, and switch to the serial port 1page1 register;
[0056] Operate the first-level serial port expansion chip sub-serial port 3 to send 4 data, set the second-level serial port expansion chip sub-serial port 1 receiving mode to contact mode, set the receiving contact to 64 bytes, set the second-level serial port expansion chip sub-serial port 1 sending mode to contact mode, set the sending contact to 16 bytes;
[0057] Operate the first-level serial port expansion chip's sub-serial port 3 to send 2 data, set the second-level serial port expansion chip's sub-serial port 1page register address, and switch to the second-level serial port expansion chip's sub-serial port 1page0 register;
[0058] Operate the first-level serial port expansion chip UART 3 to send 2 data, read the second-level serial port expansion chip UART 1 send and receive enable register to read the data received by the first-level serial port expansion chip UART 3;
[0059] Operate the first-level serial port expansion chip sub-serial port 3 to send 2 data, set the second-level serial port expansion chip sub-serial port 1 send and receive enable register address, and enable the second-level serial port expansion chip sub-serial port 1 send and receive enable register;
[0060] In step S425, the first-level serial port expansion chip sub-serial port 3 is operated to send 2 data, the second-level serial port expansion chip sub-serial port 1 sending and receiving enable register is read, and the data received by the first-level serial port expansion chip sub-serial port 3 is read;
[0061] Operate the first-level serial port expansion chip sub-serial port 3 to send 2 data, set the second-level serial port expansion chip sub-serial port 1 send and receive enable register address, and disable the second-level serial port expansion chip sub-serial port 1 send and receive enable register;
[0062] Operate the first-level serial port expansion chip's sub-serial port 3 to send 2 data, set the second-level serial port expansion chip's sub-serial port 1page register address, and switch to the second-level serial port expansion chip's sub-serial port 1page1 register;
[0063] Operate the first-level serial port expansion chip UART 3 to send 2 data, set the baud rate register 1 address, and set the baud rate register 1 data;
[0064] Operate the first-level serial port expansion chip sub-serial port 3 to send 2 data, set the baud rate register 0 address, and set the baud rate register 1 data;
[0065] Operate the first-level serial port expansion chip sub-serial port 3 to send 2 data, set the pres register address, and set the pres register data;
[0066] Operate the first-level serial port expansion chip UART 3 to send 2 data, set the page register address of the second-level serial port expansion chip UART 1, and switch to the page0 register of the second-level serial port expansion chip UART 1;
[0067] Operate the first-level serial port expansion chip UART 3 to send 2 data, read the second-level serial port expansion chip UART 1 send and receive enable register, and read the data received by the first-level serial port expansion chip UART 3;
[0068] Operate the first-level serial port expansion chip sub-serial port 3 to send 2 data, set the second-level serial port expansion chip sub-serial port 1 send / receive enable register address, and enable the second-level serial port expansion chip sub-serial port 1 send / receive enable register.
[0069] The high-performance multi-channel input and output satellite integrated electronic interface expansion device of the present invention, as a preferred embodiment, in step S43, operates the first-level serial port expansion chip to send four data to the second-level serial port expansion chip through the sub-serial port 3, sets the GPIO interface input and output register addresses of the second-level serial port expansion chip, sets all eight GPIO interfaces to output and sets the GPIO output data, and all eight GPIO interfaces of the second-level serial port expansion chip output high levels;
[0070] Operate the first-level serial port expansion chip to send three data to the second-level serial port expansion chip through sub-serial port 3, set the input and output register addresses of the GPIO interface of the second-level serial port expansion chip, set all eight GPIO interfaces to output and set the GPIO output data, and read the data received by the UART serial port connecting the first-level serial port expansion chip and the second-level serial port expansion chip.
[0071] The present invention discloses a high-performance multi-channel input and output satellite integrated electronic interface expansion device. As a preferred embodiment, the interface application module includes two 485 transceiver chips, four 422 transceiver chips, one UART interface ADC acquisition chip, and a 16-channel triode and MOS tube combination circuit. The interface application module includes two RS485 output interfaces, four RS422 output interfaces, eight analog acquisition interfaces, and 16 power drive output interfaces.
[0072] The present invention is a high-performance, multi-channel input and output satellite integrated electronic interface expansion device that can be quickly adapted based on WK2168. It can quickly respond to an endless stream of new tasks and has great practical value.
[0073] The present invention has the following advantages:
[0074] (1) The present invention realizes the expansion of 7 sub-serial ports and 16 GPIO interfaces from 1 main serial port, thereby realizing interface input and output such as 2 RS485 interfaces, 4 RS422 interfaces, 8 analog acquisition interfaces, and 16 power drive output interfaces; the 7 sub-serial ports are divided into 3 first-level sub-serial ports and 4 second-level sub-serial ports, and the working mode is time-sharing multiplexing mode, with efficiency reaching 94.1% and 88.2%.
[0075] (2) The present invention proposes a high-performance, multi-channel input and output satellite integrated electronic interface expansion device that can be quickly adapted. It does not require a new core processing chip, thus reducing the on-orbit maintenance circuit of the core processing chip. The present invention is based on the CPCI interface and can be quickly iterated and updated. The output interface of the present invention is rich in variety and huge in number, which can cover most of the requirements of satellite-borne equipment. The present invention is functional, efficient, and can be quickly replaced, and has great practical value. BRIEF DESCRIPTION OF THE DRAWINGS
[0076] Figure 1 This is a block diagram of the system composition of a high-performance multi-channel input and output satellite integrated electronic interface expansion device;
[0077] Figure 2 The present invention provides a flowchart for the initialization operation of a high-performance multi-channel input and output satellite integrated electronic interface expansion device.
[0078] Reference numerals:
[0079] 1. Internal bus; 2. Interface expansion module; 21. First-level serial port expansion chip; 22. Second-level serial port expansion chip; 3. Interface application module; 4. Power module. DETAILED DESCRIPTION
[0080] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.
[0081] Example 1
[0082] like Figure 1 As shown, a high-performance multi-channel input and output satellite integrated electronic interface expansion device includes an internal bus 1, an interface expansion module 2, an interface application module 3 and a power supply module 4;
[0083] 1) Power module 4
[0084] Perform current limiting protection on the primary power supply VCC; perform EMI filtering and surge suppression on the input primary power supply signal; perform voltage conversion on the primary power supply to convert the primary power supply into the secondary power supply required by the interface expansion device.
[0085] 2) Interface expansion module 2
[0086] It consists of two WK2168 serial port expansion chips 21 and 22 connected in series. The first-level WK2168 serial port expansion chip 21 communicates with the integrated electronics 1 via the serial port, expanding it into four UART sub-serial ports and eight GPIO interfaces. The second-level WK2168 serial port expansion chip 22, connected to any sub-serial port of the first-level WK2168 serial port expansion chip 21 (for example, the first-level word serial port 3 in this device), can also expand it into four UART sub-serial ports and eight GPIO interfaces. Therefore, the two-level WK2168 serial port expansion chips 21 and 22 can expand a single serial port into seven UART sub-serial ports and 16 GPIO interfaces.
[0087] 3) Interface application module 3
[0088] It consists of two 485 transceiver chips, four 422 transceiver chips, one UART interface ADC acquisition chip and several transistor and MOS tube combination circuits. It can expand to 2 RS485 interfaces, 4 RS422 interfaces, 8 analog acquisition interfaces and 16 power drivers.
[0089] The software design of the present invention is as follows:
[0090] The extended function of the serial port expansion chip WK2168 is realized by the external serial port through data communication with the WK2168 main serial port. The data sent by the external serial port to the WK2168 main serial port consists of two parts: control byte CMD and data byte DB. The control byte CMD indicates the required operation. For example, if data 0xFF is sent through level 1 slave serial port 1, 0x11FF needs to be sent to the main serial port, where 0x11 indicates sending data to slave serial port 1 and 0xFF indicates the content of the data sent to level 1 slave serial port 1.
[0091] The data format sent to the first-level slave serial port is level 1 control CMD + level 1 data DB; the data format sent to the second-level slave serial port is level 1 control CMD + level 2 control CMD + level 2 data DB.
[0092] Following the above data format, two WK2168s can be cascaded and used, and 7 sub-serial ports can be expanded from 1 main serial port.
[0093] The use of satellite integrated electronic interface expansion device requires first performing baud rate adaptation, sub-serial port configuration, GPIO initialization and other operations on the 2nd level WK2168. The initialization operation process is as follows: Figure 2 shown.
[0094] The use of the satellite integrated electronic interface expansion device requires first performing operations such as baud rate adaptation, sub-serial port configuration, and GPIO initialization.
[0095] S1, Level 1 WK2168 baud rate adaptation
[0096] When the interface expansion module 2 receives the first frame of data through the main serial port, the first-level WK2168 internally adapts its baud rate to the main serial port baud rate and establishes communication.
[0097] The internal bus sends the following command code to the main serial port at a rate of 115200bps:
[0098] 0x55 Main serial port baud rate matching
[0099] Note: The instruction codes are all data sent from the internal bus to the main serial port, and the same applies to the following.
[0100] S2, Level 1 slave serial port initialization:
[0101] The internal bus communicates with the level 1 WK2168 through the main serial port and sets / reads the register status to implement the initialization of the level 1 slave serial port.
[0102] a) Initialize the level 1 slave serial port 1:
[0103] Read general register data, set the general register address, set the general register data in serial port 1, read general register data, set the software reset sub-serial port register address, set the software reset sub-serial port data, read the software reset sub-serial port data register data;
[0104] b). Enable serial port interrupt: read the serial port interrupt, set the serial port interrupt address, and write the serial port interrupt data.
[0105] c). Enable the slave serial port receiving contact interrupt and timeout interrupt: read the interrupt register data, set the operation interrupt register address, and write the interrupt register configuration data;
[0106] d). Initialize FIFO and set fixed interrupt contacts: set the fifo control register address, write fifo control register data, set the serial port 1page register address, switch to the serial port 1page1 register, set the serial port 1 receiving mode to contact mode, set the receiving contact to 64 bytes, set the serial port 1 sending mode to contact, set the sending contact to 16 bytes, set the serial port 1page register address, switch to the serial port 1page0 register, read the serial port 1 send and receive enable register, set the serial port 1 send and receive enable register address, and enable the serial port 1 send and receive enable register;
[0107] e). Set the baud rate of serial port 1
[0108] Turn off the sub-serial port transmission and reception enable: read the serial port 1 transmit and receive enable register, set the serial port 1 transmit and receive enable register address, disable the serial port 1 transmit and receive enable register, set the serial port 1page register address, switch to the serial port 1page1 register, set the baud rate register 1 address, set the baud rate register 1 data, set the baud rate register 0 address, set the baud rate register 1 data, set the pres register address, set the pres register data, set the serial port 1page register address, switch to the serial port 1page0 register, read the serial port 1 transmit and receive enable register, set the serial port 1 transmit and receive enable register address, enable the serial port 1 transmit and receive enable register;
[0109] S3, Level 1 GPIO initialization:
[0110] a). GPIO write operation of the first-level serial port chip: set the GPIO input and output register address of the first-level chip, set the 8 GPIOs of the first-level chip to active state and output data, set the GPIO output data of the first-level chip, and set the 8 GPIOs of the first-level chip to output high level;
[0111] b) GPIO read operation of the first-level serial port chip: set the GPIO input and output register address of the first-level chip, set the 8 GPIOs of the first-level chip to active state, and read the GPIO level state of the first-level chip;
[0112] S4, communicate with the second-level WK2168 through the first-level sub-serial port 3
[0113] The main serial port of the level 2 WK2168 is connected to the level 1 sub-serial port 3. Therefore, the actual initialization process of the level 2 WK2168 is that data communicates with the level 2 main serial port through the level 1 main serial port and the level 1 sub-serial port 3. That is, the instruction composition of initializing the level 2 main serial port through the level 1 main serial port is composed of the level 1 sub-serial port 3 communication control CMD + the level 2 main serial port initialization instruction. The level 2 main serial port initialization instruction and process are the same as the level 1 main serial port initialization instruction and process. The bold in the following instruction codes are all the level 1 sub-serial port 3 communication control CMD.
[0114] S41, Level 2 WK2168 baud rate adaptation
[0115] The interface expansion module sends serial port data to the main serial port of the second-level interface expansion chip through the first-level sub-serial port 3 to adapt the baud rate and establish communication;
[0116] Operate the 1st level sub-serial port 3 to send a data (1st level sub-serial port 3 communication control CMD) and match the baud rate of the secondary serial port chip (2nd level main serial port initialization command, the same as the 1st level main serial port initialization command)
[0117] S42, initialize the second level sub-serial port 1
[0118] ⅰ. Initialize slave serial port 1: operate the first-level slave serial port 3 to send 2 data, read the general register data, and read the data received by the first-level slave serial port 3;
[0119] Operate the 1st level sub-serial port 3 to send a data, set the operation general register address, and set the serial port 1 in the general register data;
[0120] Operate the first-level slave serial port 3 to send 2 data, read the general register data, and read the data received by the first-level slave serial port 3;
[0121] Operate the level 1 slave serial port 3 to send 2 data, set the operating software to reset the slave serial port register address, and set the software to reset the slave serial port data;
[0122] Operate the 1st level slave serial port 3 to send 2 data, read the software reset slave serial port data register data, and read the data received by the 1st level slave serial port 3;
[0123] ⅱ. Enable the total interrupt of the serial port: operate the 1st level sub-serial port 3 to send 2 data, read the data received by the 1st level sub-serial port 3;
[0124] Operate the 1st level slave serial port 3 to send 2 data, set the address for enabling the serial port interrupt, and write the data for enabling the serial port interrupt;
[0125] ⅲ. Enable the slave serial port receiving contact interrupt and timeout interrupt:
[0126] Operate the first-level slave serial port 3 to send 2 data, read the interrupt register data, and read the data received by the first-level slave serial port 3;
[0127] Operate the level 1 slave serial port 3 to send 2 data, set the interrupt register address, and write the interrupt register configuration data;
[0128] ⅳ. Initialize FIFO and set fixed interrupt contacts:
[0129] Operate the 1st level slave serial port 3 to send 2 data, set the fifo control register address, and write the fifo control register data;
[0130] Operate the 1st level slave serial port 3 to send 2 data, set the serial port 1page register address, and switch to the serial port 1page1 register;
[0131] Operate the 1st level sub-serial port 3 to send 4 data, set the 2nd level sub-serial port 1 receiving mode to contact mode, set the receiving contact to 64 bytes, set the 2nd level sub-serial port 1 sending mode to contact, set the sending contact to 16 bytes;
[0132] Operate the 1st level slave serial port 3 to send 2 data, set the 2nd level slave serial port 1page register address, and switch to the 2nd level slave serial port 1page0 register;
[0133] Operate the first-level slave serial port 3 to send 2 data, read the second-level slave serial port 1 send and receive enable register to read the data received by the first-level slave serial port 3;
[0134] Operate the 1st level slave serial port 3 to send 2 data, set the 2nd level slave serial port 1 send and receive enable register address, and enable the 2nd level slave serial port 1 send and receive enable register;
[0135] ⅴ. Set the baud rate of the second-level serial port 1
[0136] Operate the 1st level slave serial port 3 to send 2 data, read the 2nd level slave serial port 1 send and receive enable register, and read the data received by the 1st level slave serial port 3;
[0137] Operate the 1st level sub-serial port 3 to send 2 data, set the 2nd level sub-serial port 1 send and receive enable register address, and disable the 2nd level sub-serial port 1 send and receive enable register;
[0138] Operate the 1st level slave serial port 3 to send 2 data, set the 2nd level slave serial port 1page register address, and switch to the 2nd level slave serial port 1page1 register;
[0139] Operate the 1st level slave serial port 3 to send 2 data, set the baud rate register 1 address, and set the baud rate register 1 data;
[0140] Operate the 1st level slave serial port 3 to send 2 data, set the baud rate register 0 address, and set the baud rate register 1 data;
[0141] Operate the 1st level slave serial port 3 to send 2 data, set the pres register address, and set the pres register data;
[0142] Operate the 1st level slave serial port 3 to send 2 data, set the 2nd level slave serial port 1page register address, and switch to the 2nd level slave serial port 1page0 register;
[0143] Operate the 1st level slave serial port 3 to send 2 data, read the 2nd level slave serial port 1 send and receive enable register, and read the data received by the 1st level slave serial port 3;
[0144] Operate the 1st level slave serial port 3 to send 2 data, set the 2nd level slave serial port 1 send and receive enable register address, and enable the 2nd level slave serial port 1 send and receive enable register;
[0145] The same operation is performed to initialize the level 1 slave serial ports 2 / 3 / 4 respectively. After completing the initialization of the slave serial ports, data communication can be carried out with each level 1 slave serial port.
[0146] S43, Level 2 GPIO initialization
[0147] Operate the first-level sub-serial port 3 to send 4 data to the second-level serial port chip, set the GPIO input and output register address of the second-level chip, set the 8 GPIOs of the second-level chip to output, set the GPIO output data of the second-level chip, set the 8 GPIOs of the second-level chip to output high level, operate the first-level sub-serial port 3 to send 3 data to the second-level serial port, set the GPIO input and output register address of the second-level chip, set the 8 GPIOs of the second-level chip to output, read the GPIO output data of the second-level chip, and read the data received by the first-level sub-serial port 3;
[0148] The data used to communicate with WK2168 consists of two parts: control byte CMD and data byte DB. For example, if data 0xFF is sent through the level 1 slave serial port 1, 0x11FF needs to be sent to the main serial port, where 0x11 indicates sending data to the slave serial port 1 and 0xFF indicates the content of the data sent to the level 1 slave serial port 1.
[0149] The data format of the data sent by the first-level sub-serial port in step 3) is level 1 control CMD + level 1 data DB, wherein the content of level 1 data DB is to control level 2 WK2168, so level 1 data DB is level 2 control CMD + level 2 data DB, which is combined into level 1 control CMD + level 2 control CMD + level 2 data DB.
[0150] Therefore, we can conclude that:
[0151] The data format sent to the first-level slave serial port is level 1 control CMD + level 1 data DB;
[0152] The data format sent to the second-level slave serial port is level 1 control CMD+level 2 control CMD+level 2 data DB.
[0153] Following the above data format, two WK2168s can be cascaded and used, and 7 sub-serial ports can be expanded from 1 main serial port.
[0154] The 7-way sub-serial port is divided into 3-way level 1 sub-serial ports and 4-way level 2 sub-serial ports. The maximum single transmission data length of each sub-serial port of a single WK2168 chip is 16 bytes. Therefore, under the maximum transmission efficiency of the level 1 sub-serial port, the main serial port data composition is 1 byte CMD + 16 bytes of valid data, with an efficiency of 94.1%. Under the maximum transmission efficiency of the level 2 sub-serial port, the main serial port data composition is 1 byte level 1 CMD + (1 byte level 2 CMD + 15 bytes level 2 valid data) = 2 bytes CMD + 15 bytes of valid data, with an efficiency of 88.2%.
[0155] The above description is only a preferred specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with the technical field, within the technical scope disclosed by the present invention, who makes equivalent replacements or changes based on the technical solution and inventive concept of the present invention, should be covered by the scope of protection of the present invention.
Claims
1. A high-performance multi-channel input and output satellite integrated electronic interface expansion device, characterized by: It comprises an electrically connected internal bus (1), an interface expansion module (2), an interface application module (3), and a power supply module (4) connected to the internal bus (1), the interface expansion module (2), and the interface application module (3); the output port of the interface expansion module (2) comprises 7 UART sub-serial ports and 16 GPIO interfaces, all of which are connected to the interface application module (3); The interface expansion module (2) comprises a first-level serial port expansion chip (21) and a second-level serial port expansion chip (22) connected in series, the first-level serial port expansion chip (21) and the second-level serial port expansion chip (22) each comprising a main serial port, four UART sub-serial ports and eight GPIO interfaces, the main serial port of the first-level serial port expansion chip (21) being connected to the internal bus (1), the other UART sub-serial port being connected to the main serial port of the second-level serial port expansion chip (22), the other three UART sub-serial ports and eight GPIO interfaces of the first-level serial port expansion chip (21) being connected to the interface application module (3), and the four UART sub-serial ports and eight GPIO interfaces of the second-level serial port expansion chip (22) being connected to the interface application module (3); The interface application module (3) is a transceiver chip, an ADC acquisition chip, and a triode and MOS tube combination circuit; The internal bus (1) inputs a primary power supply VCC to the power supply module (4); the power supply module (4) performs voltage conversion and outputs a secondary power supply VDD to the first-level serial port expansion chip (21) and the second-level serial port expansion chip (22); the power supply module (4) performs current limiting protection on the primary power supply VCC and performs EMI filtering and surge suppression on the primary power supply signal; The internal bus (1) sends level 1 sub-serial port data to the main serial port of the first-level serial port expansion chip (21), wherein the level 1 sub-serial port data includes a level 1 control byte and a level 1 data byte; When the level 1 data byte does not include a control byte, the level 1 data byte is output to the interface application module (3) connected to the first level serial port expansion chip (21); When the level 1 data bytes include the level 2 control bytes and the level 2 data bytes, the level 1 data bytes are output to the second-level serial port expansion chip (22) via the UART sub-serial port of the first-level serial port expansion chip (21), and the level 2 data bytes are output to the interface application module (3) connected to the second-level serial port expansion chip (22); The communication method of the multi-channel input and output satellite integrated electronic interface expansion device comprises the following steps: After S1, the internal bus (1), the interface expansion module (2), the interface application module (3) and the power supply module (4) are all connected, the baud rate of the first-level serial port expansion chip (21) is adapted; S2, the internal bus (1) communicates with the first-level serial port expansion chip (21) through the main serial port, and sets / reads the register state to implement the UART sub-serial port initialization of the first-level serial port expansion chip (21); S3, initializing the GPIO interface of the first-level serial port expansion chip (21); S4, communicating with the second-level serial port expansion chip (22) through the UART sub-serial port of the first-level serial port expansion chip (21), adapting the baud rate of the second-level serial port expansion chip (22), initializing the UART sub-serial port, and initializing the GPIO interface; The internal bus (1) sends data to the first-level serial port expansion chip (21) and the second-level serial port expansion chip (22) and outputs the data to the interface application module (3), thereby completing the communication method of the multi-channel input and output satellite integrated electronic interface expansion device.
2. The high-performance multi-channel input and output satellite integrated electronic interface expansion device according to claim 1, characterized in that: In step S1 of the communication method of the multi-channel input and output satellite integrated electronic interface expansion device, when the main serial port of the first-level serial port expansion chip (21) receives the first frame of data, the first-level serial port expansion chip (21) performs internal adaptation according to the main serial port baud rate matching instruction code to set the baud rate to the main serial port baud rate and establish communication.
3. The high-performance multi-channel input and output satellite integrated electronic interface expansion device according to claim 1, characterized in that: Step S2 of the communication method of the multi-channel input and output satellite integrated electronic interface expansion device includes the following steps: S21, initializing the sub-serial port 1 of the first-level serial port expansion chip (21): setting the operation general register address and the sub-serial port 1 in the general register data after reading the general register data, setting the operation software reset sub-serial port register address and the software reset sub-serial port data after reading the general register data, and reading the software reset sub-serial port data register data; S22, enable serial port interrupt: read enable serial port interrupt and set enable serial port interrupt address, write enable serial port interrupt data; S23, enable the slave serial port receiving contact interrupt and timeout interrupt: read the interrupt register data and set the operation interrupt register address, and write the interrupt register configuration data; S24, initializing FIFO and setting fixed interrupt contacts: setting the fifo control register address, writing the fifo control register data, setting the serial port 1 page register address, switching to the serial port 1 page 1 register, setting the sub-serial port 1 receiving mode of the first-level serial port expansion chip (21) to the contact mode, the receiving contact to 64 bytes, the sending mode to the contact, the sending contact to 16 bytes, setting the page register address of the sub-serial port 1 of the first-level serial port expansion chip (21) and switching to the register, reading the sub-serial port 1 sending and receiving enable register of the first-level serial port expansion chip (21) and setting the sending and receiving enable register address, enabling the sub-serial port 1 sending and receiving enable register of the first-level serial port expansion chip (21); S25, setting the baud rate of the sub-serial port 1 of the first-level serial port expansion chip (21): reading the sub-serial port 1 sending and receiving enable register of the first-level serial port expansion chip (21), setting the sending and receiving enable register address, disabling the sending and receiving enable register, setting the page register address and switching to the page1 register, setting the baud rate register 1 address, baud rate register 1 data, baud rate register 0 address, baud rate register 1 data, setting the pres register address, pres register data, setting the page register address and switching to the page0 register, reading the sending and receiving enable register, setting the sending and receiving enable register address, enabling the serial port 1 sending and receiving enable register, and completing the initialization of the sub-serial port 1 of the first-level serial port expansion chip (21); S26. Initialize the sub-serial port 2, sub-serial port 3, and sub-serial port 4 of the first-level serial port expansion chip (21) respectively according to the method of steps S21 to S25. After the initialization is completed, perform data communication with the sub-serial port 1, sub-serial port 2, sub-serial port 3, and sub-serial port 4 of the first-level serial port expansion chip (21), wherein the sub-serial port 3 of the first-level serial port expansion chip (21) is connected to the main serial port of the second-level serial port expansion chip (22), and the sub-serial port 1, sub-serial port 2, and sub-serial port 4 of the first-level serial port expansion chip (21) are all connected to the interface application module (3).
4. The high-performance multi-channel input and output satellite integrated electronic interface expansion device according to claim 1, characterized in that: Step S3 of the communication method of the multi-channel input and output satellite integrated electronic interface expansion device includes the following steps: S31, a GPIO write operation of the first-level serial port expansion chip (21): setting the GPIO input and output register addresses of the first-level serial port expansion chip (21), and setting the eight GPIO interfaces of the first-level serial port expansion chip (21) to an active state, output data, and output a high level; S32, serial port chip GPIO read operation of the first-level serial port expansion chip (21): setting the GPIO input and output register addresses of the first-level serial port expansion chip (21), setting the eight GPIO interfaces to an active state and reading the GPIO level state of the first-level serial port expansion chip (21), and completing the initialization of the GPIO interface of the first-level serial port expansion chip (21).
5. The high-performance multi-channel input and output satellite integrated electronic interface expansion device according to claim 1, characterized in that: Step S4 of the communication method of the multi-channel input and output satellite integrated electronic interface expansion device includes the following steps: S41, the first-level serial port expansion chip (21) sends serial port data to the main serial port of the second-level serial port expansion chip (22) through the sub-serial port 3 to adapt the baud rate and establish communication; S42, the first-level serial port expansion chip (21) sends a specified amount of data to the main serial port of the second-level serial port expansion chip (22), and the second-level serial port expansion chip (22) initializes the sub-serial port and sets the baud rate; S43, the first-level serial port expansion chip (21) sends data to the main serial port of the second-level serial port expansion chip (22) to initialize the GPIO interface of the second-level serial port expansion chip (22); After the second-level serial port expansion chip (22) is completed, the internal bus (1) sends data to the first-level serial port expansion chip (21) and the second-level serial port expansion chip (22) and outputs the data to the interface application module (3), and the communication method of the multi-channel input and output satellite integrated electronic interface expansion device is completed.
6. The high-performance multi-channel input and output satellite integrated electronic interface expansion device according to claim 5, characterized in that: In step S41, when the level 1 data bytes of the first-level serial port expansion chip (21) include level 2 control bytes and level 2 data bytes, the main serial port of the second-level serial port expansion chip (22) receives the first frame of data and performs internal adaptation according to the main serial port baud rate matching instruction code to set the baud rate to the main serial port baud rate and establish communication; The main serial port initialization instruction of the second-level serial port expansion chip (22) is the same as the initialization instruction of the first-level serial port expansion chip (21).
7. The high-performance multi-channel input and output satellite integrated electronic interface expansion device according to claim 5, characterized in that: Step S42 includes: S421, the first-level serial port expansion chip (21) sends a specified amount of data to the main serial port of the second-level serial port expansion chip (22), initializing the second-level serial port expansion chip (22) sub-serial port 1; S422, the first-level serial port expansion chip (21) sends a specified amount of data to the main serial port of the second-level serial port expansion chip (22), enabling the second-level serial port expansion chip (22) serial port total interrupt; S423, the first-level serial port expansion chip (21) sends a specified amount of data to the main serial port of the second-level serial port expansion chip (22), enabling the second-level serial port expansion chip (22) to receive contact interrupt and timeout interrupt. S424, the first-level serial port expansion chip (21) sends a specified amount of data to the main serial port of the second-level serial port expansion chip (22), initializes the second-level serial port expansion chip (22) fifo and sets a fixed interrupt contact: S425, the first-level serial port expansion chip (21) sends a specified amount of data to the main serial port of the second-level serial port expansion chip (22), and sets the baud rate of the second-level serial port expansion chip (22) sub-serial port 1; The same method as steps S421 to S425 is used to initialize the sub-serial port 2, sub-serial port 3 and sub-serial port 4 of the second-level serial port expansion chip (22), respectively, and the second-level serial port expansion chip (22) performs data communication with the first-level serial port expansion chip (21).
8. The high-performance multi-channel input and output satellite integrated electronic interface expansion device according to claim 7, characterized in that: In step S421, the first-level serial port expansion chip (21) sub-serial port 3 is operated to send 2 data, the general register data is read, and the data received by the first-level serial port expansion chip (21) sub-serial port 3 is read; The first-level serial port expansion chip (21) operates the sub-serial port 3 to send a data, sets the operation general register address, and sets the second-level serial port expansion chip (22) sub-serial port 1 in the general register data; Operate the first-level serial port expansion chip (21) sub-serial port 3 to send 2 data, read the general register data, and read the data received by the first-level serial port expansion chip (21) sub-serial port 3; Operate the sub-serial port 3 of the first-level serial port expansion chip (21) to send 2 data, set the operating software to reset the sub-serial port register address, and set the software to reset the sub-serial port data; Operate the first-level serial port expansion chip (21) sub-serial port 3 to send 2 data, read the software reset sub-serial port data register data, and read the data received by the first-level serial port expansion chip (21) sub-serial port 3; In step S422, the sub-serial port 3 of the first-level serial port expansion chip (21) is operated to send 2 data, the serial port general interrupt is read and enabled, and the data received by the sub-serial port 3 of the first-level serial port expansion chip (21) is read; The first-level serial port expansion chip (21) is operated to send two data to the sub-serial port 3, set the address for enabling the serial port general interrupt, and write the data for enabling the serial port general interrupt; In step S423, the first-level serial port expansion chip (21) sub-serial port 3 is operated to send 2 data, the interrupt register data is read, and the data received by the first-level serial port expansion chip (21) sub-serial port 3 is read; The first-level serial port expansion chip (21) operates the sub-serial port 3 to send 2 data, sets the operation interrupt register address, and writes the interrupt register configuration data; In step S424, the first-level serial port expansion chip (21) is operated to send two data to the sub-serial port 3, set the fifo control register address, and write the fifo control register data; Operate the first-level serial port expansion chip (21) to send two data to the sub-serial port 3, set the serial port 1page register address, and switch to the serial port 1page1 register; The first-level serial port expansion chip (21) sub-serial port 3 is operated to send 4 data, the second-level serial port expansion chip (22) sub-serial port 1 receiving mode is set to contact mode, the receiving contact is set to 64 bytes, and the second-level serial port expansion chip (22) sub-serial port 1 sending mode is set to contact, and the sending contact is set to 16 bytes; Operate the first-level serial port expansion chip (21) sub-serial port 3 to send 2 data, set the second-level serial port expansion chip (22) sub-serial port 1page register address, and switch to the second-level serial port expansion chip (22) sub-serial port 1page0 register; The first-level serial port expansion chip (21) operates the sub-serial port 3 to send two data, and the second-level serial port expansion chip (22) reads the sub-serial port 1 sending and receiving enable register to read the data received by the sub-serial port 3 of the first-level serial port expansion chip (21); The first-level serial port expansion chip (21) operates the sub-serial port 3 to send two data, sets the send / receive enable register address of the second-level serial port expansion chip (22) sub-serial port 1, and enables the send / receive enable register of the second-level serial port expansion chip (22); In step S425, the first-level serial port expansion chip (21) sub-serial port 3 is operated to send 2 data, the second-level serial port expansion chip (22) sub-serial port 1 sending and receiving enable register is read, and the data received by the first-level serial port expansion chip (21) sub-serial port 3 is read; The first-level serial port expansion chip (21) operates the sub-serial port 3 to send two data, sets the send / receive enable register address of the second-level serial port expansion chip (22) sub-serial port 1, and disables the send / receive enable register of the second-level serial port expansion chip (22); Operate the first-level serial port expansion chip (21) sub-serial port 3 to send 2 data, set the second-level serial port expansion chip (22) sub-serial port 1page register address, and switch to the second-level serial port expansion chip (22) sub-serial port 1page1 register; The first-level serial port expansion chip (21) is operated to send two data to the sub-serial port 3, set the baud rate register 1 address, and set the baud rate register 1 data; The first-level serial port expansion chip (21) is operated to send two data to the sub-serial port 3, set the baud rate register 0 address, and set the baud rate register 1 data; Operate the first-level serial port expansion chip (21) sub-serial port 3 to send 2 data, set the pres register address, and set the pres register data; Operate the first-level serial port expansion chip (21) sub-serial port 3 to send 2 data, set the page register address of the second-level serial port expansion chip (22) sub-serial port 1, and switch to the page0 register of the second-level serial port expansion chip (22) sub-serial port 1; Operate the first-level serial port expansion chip (21) sub-serial port 3 to send 2 data, read the second-level serial port expansion chip (22) sub-serial port 1 send / receive enable register, and read the data received by the first-level serial port expansion chip (21) sub-serial port 3; The first-level serial port expansion chip (21) sub-serial port 3 is operated to send 2 data, the second-level serial port expansion chip (22) sub-serial port 1 sending / receiving enable register address is set, and the second-level serial port expansion chip (22) sub-serial port 1 sending / receiving enable register is enabled.
9. The high-performance multi-channel input and output satellite integrated electronic interface expansion device according to claim 5, characterized in that: In step S43, the first-level serial port expansion chip (21) is operated to send 4 data to the second-level serial port expansion chip (22) through the sub-serial port 3, the GPIO interface input and output register addresses of the second-level serial port expansion chip (22) are set, the 8 GPIO interfaces are set to output and the GPIO output data are set, and the 8 GPIO interfaces of the second-level serial port expansion chip (22) all output high levels; The first-level serial port expansion chip (21) is operated to send three data to the second-level serial port expansion chip (22) through the sub-serial port 3, the GPIO interface input and output register addresses of the second-level serial port expansion chip (22) are set, all eight GPIO interfaces are set to output and the GPIO output data are set, and the UART serial port connected to the first-level serial port expansion chip (21) and the second-level serial port expansion chip (22) is read to receive data.
10. The high-performance multi-channel input and output satellite integrated electronic interface expansion device according to claim 1, characterized in that: The interface application module (3) includes two 485 transceiver chips, four 422 transceiver chips, one UART interface ADC acquisition chip, and a 16-channel triode and MOS tube combination circuit. The interface application module (3) includes two RS485 output interfaces, four RS422 output interfaces, eight analog acquisition interfaces, and 16 power drive output interfaces.
Citation Information
Patent Citations
Serial port extended chip
CN1601504A
STM32F103RC-based multi-serial port communication acquisition equipment
CN215867846U