Surge current suppression circuit and device and power supply system
By designing a surge current suppression circuit including a first switching module, a second switching module, a delay module and a current limiting module, the problem of current limiting resistor consumption of electric energy after the surge current impact in the prior art is solved, and the effect of effectively suppressing surge current and reducing power loss is achieved.
Patent Information
- Application Number
- CN202411753230.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-02
- Publication Date
- 2025-02-28
AI Technical Summary
When the prior art prevents inrush current from impacting, the current limiting resistor will consume electricity as a load after impact, resulting in the impact of the power loss and output current magnitude.
An inrush current suppression circuit is designed, including a first switching module, a second switching module, a delay module and a current limiting module. The voltage is obtained from the input power supply through the first switching module. When the second input voltage is less than the first input voltage, the first switching module is turned on and electrically connected to the load through the current limiting module. After the delay module is started, the second switching module is controlled to conduct, so that the current limiting module is short-circuited, thereby switching the circuit after the surge current is impacted, reducing power loss.
It effectively suppresses the impact of inrush current, reduces power loss, and ensures that the normal output current is not affected.
Smart Images
Figure CN119543077A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of hot-swap control technology, and in particular to a surge current suppression circuit, device and power supply system. Background Art
[0002] Hot-swappable devices are susceptible to surge current shocks at the moment of power-on. In order to prevent surge current shocks, the existing technology usually connects a current limiting resistor in series at the power input end. However, since the surge current shock only occurs for a short time and does not last, after the surge current shock, the current limiting resistor will consume electrical energy as a load. How to effectively suppress surge current without affecting the current output size has become an urgent problem to be solved. Summary of the invention
[0003] In view of this, the purpose of the present invention is to overcome the deficiencies in the prior art and provide a surge current suppression circuit, device and power supply system. The present invention provides the following technical solutions:
[0004] In a first aspect, the present invention provides an inrush current suppression circuit, the circuit comprising: a first switch module, a second switch module, a delay module and a current limiting module; the first switch module is electrically connected to an input power supply, the current limiting module, the second switch module and the delay module respectively; a load is electrically connected to the current limiting module and the second switch module respectively; the delay module is also electrically connected to the second switch module and the input power supply respectively;
[0005] The first switch module is used to obtain a first input voltage and a second input voltage from the input power supply; when the second input voltage is less than the first input voltage, the first switch module is turned on; when the first switch module is turned on, the input power supply is electrically connected to the load through the first switch module and the current limiting module in sequence, and the delay module starts the delay; after a preset delay time, the delay module is used to control the second switch module to turn on, so that the current limiting module is short-circuited by the second switch module, and the input power supply is electrically connected to the load through the first switch module and the second switch module in sequence, and the preset time is greater than the surge current impact time.
[0006] In one embodiment, the first switch module includes: a first switch tube; an input end of the first switch tube and a control end of the first switch tube are electrically connected to the input power supply respectively, and an output end of the first switch tube is electrically connected to the current limiting module, the second switch module and the delay module respectively;
[0007] The input end of the first switch module is used to obtain the first input voltage from the input power supply, and the control end of the first switch module is used to obtain the second input voltage from the input power supply; when the second input voltage is less than the first input voltage, the first switch tube is turned on; when the first switch tube is turned on, the input power supply is electrically connected to the load through the first switch tube and the current limiting module in sequence, and the delay module starts the delay; after the preset delay time, the delay module is used to control the second switch module to turn on, so that the current limiting module is short-circuited by the second switch module, and the input power supply is electrically connected to the load through the first switch tube and the second switch module in sequence.
[0008] In one embodiment, the delay module includes: a delay capacitor; a first end of the delay capacitor is electrically connected to the output end of the first switch tube, and a second end of the delay capacitor is electrically connected to the second switch module.
[0009] In one embodiment, the delay module further includes: a delay resistor; a first end of the delay resistor is electrically connected to a second end of the delay capacitor, and a second end of the delay resistor is electrically connected to the input power supply; the delay resistor and the delay capacitor are used to start the delay when the first switch tube is turned on;
[0010] The delay resistor and the delay capacitor are also used to control the second switch module to be turned on after a preset delay time, so that the current limiting module is short-circuited by the second switch module, and the input power supply is electrically connected to the load through the first switch tube and the second switch module in sequence.
[0011] In one embodiment, the second switch module includes a second switch tube; the input end of the second switch tube is electrically connected to the output end of the first switch tube, the control end of the second switch tube is electrically connected to the second end of the delay capacitor, and the output end of the second switch tube is electrically connected to the load; the delay resistor and the delay capacitor are also used to control the second switch tube to be turned on after delaying the preset time, so that the current limiting module is short-circuited by the second switch tube, and the input power supply is electrically connected to the load through the first switch tube and the second switch tube in sequence.
[0012] In one embodiment, the current limiting module includes: a first current limiting resistor; the first end of the first current limiting resistor is electrically connected to the output end of the first switching tube, and the second end of the first current limiting resistor is electrically connected to the load; when the first switching tube is turned on, the first current limiting resistor is used to electrically connect the output end of the first switching tube and the load.
[0013] In one embodiment, the first switch tube includes a first MOS tube, and the second switch tube includes a second MOS tube; the drain of the first MOS tube and the gate of the first MOS tube are electrically connected to the input power supply, respectively, and the source of the first MOS tube is electrically connected to the first end of the first current limiting resistor, the source of the second MOS tube and the first end of the delay capacitor, respectively; the drain of the second MOS tube is electrically connected to the load, and the control end of the second MOS tube is electrically connected to the input power supply.
[0014] In one implementation, the first switch module further includes a second current limiting resistor connected in series between the control end of the first switch tube and the input power supply.
[0015] In a second aspect, the present invention provides a surge current suppression device, comprising: the surge current suppression circuit described in the first aspect.
[0016] In a third aspect, the present invention provides a power supply system, comprising: an input power supply and the surge current suppression device described in the second aspect.
[0017] The present invention provides an inrush current suppression device, a device and a power supply system, wherein the circuit comprises: a first switch module, a second switch module, a delay module and a current limiting module; the first switch module is electrically connected to the input power supply, the current limiting module, the second switch module and the delay module respectively; the load is electrically connected to the current limiting module and the second switch module respectively; the delay module is also electrically connected to the second switch module and the input power supply respectively. The present invention obtains a first input voltage and a second input voltage from the input power supply through the first switch module; when the second input voltage is less than the first input voltage, the first switch module is turned on; when the first switch module is turned on, the input power supply is electrically connected to the load through the first switch module and the current limiting module in turn, and the delay module starts the delay; after the delay is preset for a time, the delay module controls the second switch module to be turned on, so that the current limiting module is short-circuited by the second switch module, and the input power supply is electrically connected to the load through the first switch module and the second switch module in turn, and the preset time is greater than the inrush current impact time, so that the inrush current impact is suppressed while reducing the power loss, and ensuring that the normal output current size is not affected.
[0018] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.
[0020] Figure 1 A schematic diagram of the structure of a surge current suppression circuit provided by an embodiment of the present invention is shown;
[0021] Figure 2 A circuit diagram of a surge current suppression circuit provided by an embodiment of the present invention is shown;
[0022] Figure 3 Another circuit diagram of the surge current suppression circuit provided by an embodiment of the present invention is shown;
[0023] Figure 4 A schematic structural diagram of a power supply system provided by an embodiment of the present invention is shown.
[0024] Description of main component symbols:
[0025] 100 - surge current suppression circuit; 110 - first switch module; 120 - current limiting module; 130 - second switch module; 140 - delay module; 200 - input power supply; 300 - load; 400 - power supply system. DETAILED DESCRIPTION
[0026] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.
[0027] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of the template are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0029] Example 1
[0030] See also Figure 1 , an embodiment of the present invention provides an inrush current suppression circuit 100, the circuit comprising: a first switch module 110, a current limiting module 120, a second switch module 130 and a delay module 140;
[0031] The first switch module 110 is electrically connected to the input power supply 200, the current limiting module 120, the second switch module 130 and the delay module 140 respectively; the load 300 is electrically connected to the current limiting module 120 and the second switch module 130 respectively; the delay module 140 is also electrically connected to the second switch module 130 and the input power supply 200 respectively.
[0032] It should be noted that the current limiting module 120 and the second switch module 130 are connected in parallel, and the parallel current limiting module 120 and the second switch module 130 are electrically connected to the first switch module 110 and the load 300 respectively. When the second switch module 130 is turned on, the current limiting module 120 is short-circuited.
[0033] The first switch module 110 is used to obtain a first input voltage and a second input voltage from the input power source 200; when the second input voltage is less than the first input voltage, the first switch module 110 is turned on;
[0034] When the first switch module 110 is turned on, the input power supply 200 is electrically connected to the load 300 through the first switch module 110 and the current limiting module 120 in sequence, and the delay module 140 starts the delay; after the preset delay time, the delay module 140 is used to control the second switch module 130 to be turned on, so that the current limiting module 120 is short-circuited by the second switch module 130, and the input power supply 200 is electrically connected to the load 300 through the first switch module 110 and the second switch module 130 in sequence, and the preset time is greater than the surge current impact time.
[0035] In this embodiment, the load 300 is grounded. When the first switch module 110 is turned on, the input power supply 200, the first switch module 110, the current limiting module 120 and the load 300 form a first circuit, the input power supply 200 supplies power to the load 300 through the first circuit, and the delay module 140 starts the delay; after the predetermined delay time, the second switch module 130 is turned on, at this time the current limiting module 120 is short-circuited, the input power supply 200, the first switch module 110, the second switch module 130 and the load 300 form a second circuit, and the input power supply 200 supplies power to the load 300 through the second circuit.
[0036] It can be understood that the preset time is greater than the surge current impact time, that is, during the time when the surge current impact exists, power is supplied to the load 300 through the first circuit, and the current limiting module 120 plays a current limiting role to suppress the surge current impact; after the surge current impact, the second circuit is switched to supply power to the load 300. At this time, the current limiting module 120 is short-circuited and no longer consumes the electric energy output by the input power supply 200.
[0037] In one embodiment, see Figure 2 , Figure 2 A circuit diagram of the surge current impact circuit provided by an embodiment of the present invention is shown. The first switch module 110 includes: a first switch tube Q1; the input end of the first switch tube Q1 and the control end of the first switch tube Q1 are electrically connected to the input power supply 200 respectively, and the output end of the first switch tube Q1 is electrically connected to the current limiting module 120, the second switch module 130 and the delay module 140 respectively;
[0038] The input end of the first switch module 110 is used to obtain the first input voltage from the input power supply 200, and the control end of the first switch module 110 is used to obtain the second input voltage from the input power supply 200; when the second input voltage is less than the first input voltage, the first switch tube Q1 is turned on; when the first switch tube Q1 is turned on, the input power supply 200 is electrically connected to the load 300 through the first switch tube Q1 and the current limiting module 120 in sequence, and the delay module 140 starts the delay; after the preset delay time, the delay module 140 is used to control the second switch module 130 to be turned on, so that the current limiting module 120 is short-circuited by the second switch module 130, and the input power supply 200 is electrically connected to the load 300 through the first switch tube Q1 and the second switch module 130 in sequence.
[0039] In this embodiment, within a preset time after the first switch tube Q1 is turned on, the input power 200 is electrically connected to the current limiting module 120 through the first switch tube Q1. After the preset time, the input power 200 is electrically connected to the second switch module 130 through the first switch tube Q1.
[0040] It can be understood that when the voltage at the control terminal of the first switch tube Q1 is less than the voltage at the input terminal, that is, the second input voltage is less than the first input voltage, the first switch tube Q1 is turned on, and vice versa, when the voltage at the control terminal of the first switch tube Q1 is greater than or equal to the voltage at the input terminal, that is, the second input voltage is greater than or equal to the first input voltage, the first switch tube Q1 is turned off. Thus, the first switch tube Q1 can prevent the input power supply 200 from being reversely connected. When the input terminal of the input power supply 200 is reversely connected, the voltage at the control terminal of the first switch tube Q1 is greater than or equal to the voltage at the input terminal, and at this time, the surge current suppression circuit 100 is not turned on.
[0041] It should be noted that VIN in the figure indicates connection to the positive electrode of the input power supply 200 , GND indicates connection to the negative electrode of the input power supply 200 , and VOUT indicates connection to the load 300 . Figure 2 The circuit diagram shows the case where the input power supply 200 is positively connected, wherein the input end of the first switch tube Q1 is electrically connected to the positive electrode VIN of the input power supply 200, and the control end of the first switch tube Q1 and the second end of the delay resistor R3 are both electrically connected to the negative electrode GND of the input power supply 200. Figure 3 When the input power supply 200 is reversely connected, the input end of the first switch tube Q1 is electrically connected to the negative electrode GND of the input power supply 200, and the control end of the first switch tube Q1 and the second end of the delay resistor R3 are both electrically connected to the positive electrode VIN of the input power supply.
[0042] In one embodiment, see again Figure 2 The delay module 140 includes: a delay capacitor; a first end of the delay capacitor is electrically connected to the output end of the first switch tube Q1, and a second end of the delay capacitor is electrically connected to the second switch module 130.
[0043] In this embodiment, the delay module 140 includes: a delay capacitor and a delay resistor R3, and the delay capacitor and the delay resistor R3 form an RC delay circuit. It can be understood that when the first switch tube Q1 is turned on, since the voltage across the delay capacitor cannot change suddenly, the control terminal voltage of the second switch module 130 is equal to the first input voltage obtained by the first switch module 110. As the charging time increases, the voltage across the delay capacitor gradually increases, and the control terminal voltage of the second switch module 130 becomes lower and lower. When the turn-on voltage of the second switch module 130 is reached, the second switch module 130 is turned on.
[0044] In one embodiment, see again Figure 2 The delay module 140 also includes: a delay resistor R3; a first end of the delay resistor R3 is electrically connected to the second end of the delay capacitor, and the second end of the delay resistor R3 is electrically connected to the input power supply 200; the delay resistor R3 and the delay capacitor are used to start the delay when the first switch tube Q1 is turned on; the delay resistor R3 and the delay capacitor are also used to control the second switch module 130 to be turned on after a preset delay time, so that the current limiting module 120 is short-circuited by the second switch module 130, and the input power supply 200 is electrically connected to the load 300 through the first switch tube Q1 and the second switch module 130 in sequence.
[0045] In this embodiment, the preset time can be adjusted by adjusting the resistance value of the delay resistor R3 and the capacity of the delay capacitor, wherein the preset time is determined according to the surge current impact time. For different loads 300, the surge current impact time may be different. Therefore, the selection of the delay resistor R3 and the delay capacitor needs to be determined according to actual conditions and is not limited here.
[0046] In one embodiment, see again Figure 2 The second switch module 130 includes a second switch tube Q2; the input end of the second switch tube Q2 is electrically connected to the output end of the first switch tube Q1, the control end of the second switch tube Q2 is electrically connected to the second end of the delay capacitor, and the output end of the second switch tube Q2 is electrically connected to the load 300; the delay resistor R3 and the delay capacitor are also used to control the second switch tube Q2 to be turned on after the preset time is delayed, so that the current limiting module 120 is short-circuited by the second switch tube Q2, and the input power supply 200 is electrically connected to the load 300 through the first switch tube Q1 and the second switch tube Q2 in sequence.
[0047] In this embodiment, after a preset time, the control terminal voltage of the second switch tube Q2 is less than the input terminal voltage. When the turn-on voltage of the second switch tube Q2 is reached, the second switch tube Q2 is turned on, and the input power supply 200, the first switch tube Q1, the second switch tube Q2 and the load 300 form a second loop, and the input power supply 200 supplies power to the load 300 through the second loop.
[0048] In one embodiment, see again Figure 2 The current limiting module 120 includes: a first current limiting resistor R1; a first end of the first current limiting resistor R1 is electrically connected to the output end of the first switch tube Q1, and a second end of the first current limiting resistor R1 is electrically connected to the load 300; when the first switch tube Q1 is turned on, the first current limiting resistor R1 is used to electrically connect the output end of the first switch tube Q1 and the load 300.
[0049] In this embodiment, the first current limiting resistor R1 is used to suppress surge current. Specifically, the resistance value of the first current limiting resistor R1 is determined according to the surge current and is selected based on the standard that the load 300 is not damaged by the impact. The first current limiting resistor R1 is connected in parallel between the input end and the output end of the second switch tube Q2. When the second switch tube Q2 is not turned on, the first current limiting resistor R1 is used to connect the first switch tube Q1 and the load 300. After the second switch tube Q2 is turned on, the first current limiting resistor R1 is short-circuited, and the first switch tube Q1 is connected to the load 300 through the second switch tube Q2.
[0050] In one embodiment, the first switch tube Q1 includes a first MOS tube, and the second switch tube Q2 includes a second MOS tube; the drain of the first MOS tube and the gate of the first MOS tube are electrically connected to the input power supply 200, respectively, and the source of the first MOS tube is electrically connected to the first end of the first current limiting resistor R1, the source of the second MOS tube and the first end of the delay capacitor, respectively; the drain of the second MOS tube is electrically connected to the load 300, and the control end of the second MOS tube is electrically connected to the input power supply 200.
[0051] In this embodiment, the first MOS tube and the second MOS tube are both PMOS tubes, and the first switch tube Q1 includes a reversely connected first MOS tube. When the first MOS tube is turned on, current is input from the drain of the first MOS tube and output from the source of the first MOS tube; when the second MOS tube is turned on, current is input from the source of the second MOS tube and output from the drain of the second MOS tube.
[0052] In one implementation, the first switch module 110 further includes a second current limiting resistor R2 connected in series between the control end of the first switch tube Q1 and the input power source 200 .
[0053] To prevent excessive current from damaging the gate oxide layer of the first switch tube Q1 , a second current limiting resistor R2 is connected in series between the gate of the first switch tube Q1 and the input power supply 200 to ensure that the gate voltage is within a safe range.
[0054] The inrush current suppression circuit provided by the embodiment of the present invention comprises: a first switch module, a second switch module, a delay module and a current limiting module; the first switch module is electrically connected to the input power supply, the current limiting module, the second switch module and the delay module respectively; the load is electrically connected to the current limiting module and the second switch module respectively; the delay module is also electrically connected to the second switch module and the input power supply respectively. The present invention obtains the first input voltage and the second input voltage from the input power supply through the first switch module; when the second input voltage is less than the first input voltage, the first switch module is turned on; when the first switch module is turned on, the input power supply is electrically connected to the load through the first switch module and the current limiting module in turn, and the delay module starts the delay; after the delay preset time, the delay module controls the second switch module to be turned on, so that the current limiting module is short-circuited by the second switch module, and the input power supply is electrically connected to the load through the first switch module and the second switch module in turn, and the preset time is greater than the inrush current impact time, so that the inrush current impact is suppressed while reducing the power loss, and ensuring that the normal output current size is not affected.
[0055] Example 2
[0056] In addition, an embodiment of the present invention also provides a surge current suppression device, including the surge current suppression circuit as described in Example 1 above. It can be understood that the surge current suppression device provided by the present invention can realize the function of the surge current suppression circuit described in Example 1 above. To avoid repetition, it will not be repeated here.
[0057] The surge current suppression device provided by the embodiment of the present invention obtains the first input voltage and the second input voltage from the input power supply through the first switch module; when the second input voltage is less than the first input voltage, the first switch module is turned on; when the first switch module is turned on, the input power supply is electrically connected to the load through the first switch module and the current limiting module in sequence, and the delay module starts the delay; after the preset delay time, the delay module controls the second switch module to be turned on, so that the current limiting module is short-circuited by the second switch module, and the input power supply is electrically connected to the load through the first switch module and the second switch module in sequence, and the preset time is greater than the surge current impact time, thereby achieving the goal of suppressing the surge current impact while reducing the power loss and ensuring that the normal output current size is not affected.
[0058] Example 3
[0059] Also, see Figure 4 The embodiment of the present invention further provides a power supply system 400, comprising: an input power supply and the surge current suppression device as described in the above embodiment 2, specifically, the input power supply is electrically connected to the surge current suppression device. The power supply system 400 provided by the embodiment of the present invention can realize all the functions of the surge current suppression device described in the above embodiment 2, and will not be described here to avoid repetition.
[0060] In all examples shown and described herein, any specific values should be interpreted as merely exemplary and not as limiting, and thus other examples of the exemplary embodiments may have different values.
[0061] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0062] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the present invention. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention.
Claims
1. A surge current suppression circuit, characterized in that: The circuit comprises: a first switch module, a second switch module, a delay module and a current limiting module; The first switch module is electrically connected to the input power supply, the current limiting module, the second switch module and the delay module respectively; The load is electrically connected to the current limiting module and the second switch module respectively; The delay module is also electrically connected to the second switch module and the input power supply respectively; The first switch module is used to obtain a first input voltage and a second input voltage from the input power supply; When the second input voltage is lower than the first input voltage, the first switch module is turned on; When the first switch module is turned on, the input power is electrically connected to the load through the first switch module and the current limiting module in sequence, and the delay module starts the delay; After a preset delay time, the delay module is used to control the second switch module to turn on, so that the current limiting module is short-circuited by the second switch module, and the input power supply is electrically connected to the load through the first switch module and the second switch module in turn. The preset time is greater than the surge current impact time.
2. The surge current suppression circuit according to claim 1, characterized in that: The first switch module includes: a first switch tube; The input end of the first switch tube and the control end of the first switch tube are electrically connected to the input power supply respectively, and the output end of the first switch tube is electrically connected to the current limiting module, the second switch module and the delay module respectively; The input end of the first switch module is used to obtain the first input voltage from the input power supply, and the control end of the first switch module is used to obtain the second input voltage from the input power supply; When the second input voltage is lower than the first input voltage, the first switch tube is turned on; When the first switch tube is turned on, the input power supply is electrically connected to the load through the first switch tube and the current limiting module in sequence, and the delay module starts the delay; After a preset delay time, the delay module is used to control the second switch module to turn on, so that the current limiting module is short-circuited by the second switch module, and the input power is electrically connected to the load through the first switch tube and the second switch module in sequence.
3. The surge current suppression circuit according to claim 2, characterized in that: The delay module includes: a delay capacitor; The first end of the delay capacitor is electrically connected to the output end of the first switch tube, and the second end of the delay capacitor is electrically connected to the second switch module.
4. The surge current suppression circuit according to claim 3, characterized in that: The delay module also includes: a delay resistor; The first end of the delay resistor is electrically connected to the second end of the delay capacitor, and the second end of the delay resistor is electrically connected to the input power supply; The delay resistor and the delay capacitor are used to start the delay when the first switch tube is turned on; The delay resistor and the delay capacitor are also used to control the second switch module to be turned on after a preset delay time, so that the current limiting module is short-circuited by the second switch module, and the input power supply is electrically connected to the load through the first switch tube and the second switch module in sequence.
5. The surge current suppression circuit according to claim 4, characterized in that: The second switch module includes a second switch tube; The input end of the second switch tube is electrically connected to the output end of the first switch tube, the control end of the second switch tube is electrically connected to the second end of the delay capacitor, and the output end of the second switch tube is electrically connected to the load; The delay resistor and the delay capacitor are also used to control the second switch tube to turn on after the preset time is delayed, so that the current limiting module is short-circuited by the second switch tube, and the input power supply is electrically connected to the load through the first switch tube and the second switch tube in sequence.
6. The surge current suppression circuit according to claim 5, characterized in that: The current limiting module includes: a first current limiting resistor; The first end of the first current limiting resistor is electrically connected to the output end of the first switch tube, and the second end of the first current limiting resistor is electrically connected to the load; When the first switch tube is turned on, the first current limiting resistor is used to electrically connect the output end of the first switch tube and the load.
7. The surge current suppression circuit according to claim 6, characterized in that: The first switch tube includes a first MOS tube, and the second switch tube includes a second MOS tube; The drain of the first MOS tube and the gate of the first MOS tube are electrically connected to the input power supply respectively, and the source of the first MOS tube is electrically connected to the first end of the first current limiting resistor, the source of the second MOS tube and the first end of the delay capacitor respectively; The drain of the second MOS tube is electrically connected to the load, and the control end of the second MOS tube is electrically connected to the input power supply.
8. The surge current suppression circuit according to claim 2, characterized in that: The first switch module further includes a second current limiting resistor connected in series between the control end of the first switch tube and the input power supply.
9. A surge current suppression device, characterized in that: The device comprises: the surge current suppression circuit according to any one of claims 1 to 8.
10. A power supply system, characterized in that: include: An input power supply and a surge current suppression device as claimed in claim 9.