An active balancing circuit and method for real-time adjustment of battery voltage difference

Abstract

This application relates to an active balancing circuit and method for real-time adjustment of battery voltage differences. The active balancing circuit includes a battery pack, a voltage difference sampling module, a control module, a driving module, a switch management module, and multiple transfer capacitors. Among every two adjacent battery elements, the power output terminal of one battery element is connected to the first power input terminal of the switch management module. The first power output terminal of the switch management module is connected to the first end of the transfer capacitor. The second end of the transfer capacitor is connected to the second power input terminal of the switch management module. The second power output terminal of the switch management module is connected to the power input terminal of the other battery element. The transfer capacitor serves as an energy carrier, avoiding the traditional passive balancing method of discharging excess energy through a resistor, and directly transferring the excess power of the battery to the battery that needs to be supplemented. This design significantly improves the energy utilization rate, achieves active and intelligent battery balancing, and meets the design requirements of high efficiency, energy conservation, and environmental protection.

Description

Technical Field

[0001] The present invention relates to the technical field of battery voltage difference equalization, and particularly to an active equalization circuit and method for real-time adjustment of battery voltage difference. Background Art

[0002] Currently, in a lithium battery pack, as the number of charge and discharge cycles increases, due to differences in internal resistance, capacity, and material properties among individual cells, the voltages of each cell gradually become unbalanced. To solve this problem, as Figure 1 shown, traditional passive equalization techniques usually discharge the energy of high-voltage batteries through resistors, consuming their excess energy as heat, thereby reducing the voltage and achieving voltage balance with other batteries. However, this method has significant drawbacks: First, a large amount of energy is wasted as heat in the resistors, reducing the overall energy utilization efficiency of the system, which runs counter to the design principles of energy conservation and environmental protection; Second, since the resistor discharge process generates high heat, this places higher requirements on the heat dissipation design of the battery management system (BMS), increasing the complexity and cost of the system; In addition, the passive equalization speed is slow, especially in large-capacity battery packs, and it cannot meet the requirements of efficient energy management. Therefore, a more efficient, energy-saving, and environmentally friendly equalization technique is needed to solve the above problems, improve energy utilization efficiency, and optimize the operating performance of the battery pack. Summary of the Invention

[0003] To solve the problems of energy waste, low efficiency, and heat caused by the traditional passive equalization technique discharging the energy of high-voltage batteries through resistors, the present application provides an active equalization circuit and method for real-time adjustment of battery voltage difference.

[0004] An active equalization circuit for real-time adjustment of battery voltage difference, the active equalization circuit for real-time adjustment of battery voltage difference includes a battery pack, a voltage difference sampling module, a control module, a driving module, a switch management module, and a plurality of transfer capacitors;

[0005] The battery pack includes a plurality of battery elements connected in series;

[0006] The sampling signal input terminals of the voltage difference sampling module are respectively connected to the common nodes between every two adjacent battery elements, and the sampling signal output terminal of the voltage difference sampling module is connected to the sampling signal input terminal of the control module;

[0007] The driving signal output terminal of the control module is connected to the driving signal input terminal of the driving module;

[0008] The enabling signal output terminal of the driving module is connected to the enabling signal input terminal of the switch management module;

[0009] Among every two adjacent battery elements, the power output terminal of one of the battery elements is connected to the first power input terminal of the switch management module, the first power output terminal of the switch management module is connected to the first end of the transfer capacitor, the second end of the transfer capacitor is connected to the second power input terminal of the switch management module, and the second power output terminal of the switch management module is connected to the power input terminal of the battery element.

[0010] By adopting the above technical solution, through the collaborative work of a series of modules, the present application effectively solves the problems of energy waste, low efficiency, and excessive heat in traditional passive balancing. The core lies in using the voltage difference sampling module to monitor the voltage differences of each battery in the battery pack in real time, and the control module generates precise drive signals according to the sampling results, thereby dynamically adjusting the working states of the drive module and the switch management module, enabling the transfer capacitor to achieve lossless energy transfer between high-voltage batteries and low-voltage batteries. As an energy carrier, the transfer capacitor avoids the way of discharging excess energy through a resistor in traditional passive balancing, directly transferring the excess power of the battery to the battery that needs to be supplemented. This design greatly improves the energy utilization rate. At the same time, through the flexible control of the switch management module, the charging and discharging circuit path of the transfer capacitor can be adjusted according to the voltage difference between the batteries, reducing the impact of current surges on the battery life, thereby reducing the heat generation of the system while improving the balancing efficiency and optimizing the heat dissipation design. This circuit structure and method achieve active and intelligent battery balancing, meeting the design requirements of high efficiency, energy conservation, and environmental protection.

[0011] Preferably, the drive signal output terminal of the control module includes a first drive output port and a second drive output port. The drive module includes a drive chip U3. The first drive signal input terminal of the drive chip U3 is connected to the first drive output port, the second drive signal input terminal of the drive chip U3 is connected to the second drive output port, and the first enable control terminal and the second enable control terminal of the drive chip U3 are respectively connected to the enable signal input terminal of the switch management module for controlling different switch operations of the switch management module.

[0012] By adopting the above technical solution, it is possible to generate multiple independent drive signals, ensuring the independent control of different switch units during the balancing operation, thereby improving the accuracy and efficiency of the balancing process; by connecting the first enable control terminal and the second enable control terminal in the drive module to different switch units of the switch management module respectively, it is possible to flexibly control different switch operations of the switch management module, thereby further realizing the dynamic regulation of the energy transfer path between multiple batteries and enhancing the operation flexibility of the balancing circuit.

[0013] Preferably, the switch management module includes a plurality of switch conduction units. Among them, each of the switch conduction units is correspondingly provided with one of the battery elements. Among every two adjacent battery elements, at least two switch conduction units and one transfer capacitor are involved in energy transfer, namely switch conduction unit A and switch conduction unit B. The switch conduction unit A includes a first MOS transistor A and a second MOS transistor A, and the switch conduction unit B includes a first MOS transistor B and a second MOS transistor B;

[0014] The first conduction end of the first MOS transistor A is connected to the positive electrode of one of the battery elements, the second conduction end of the first MOS transistor A is connected to the first conduction end of the first MOS transistor B, the second conduction end of the first MOS transistor B is connected to the negative electrode of one of the battery elements, the first conduction end of the second MOS transistor A is connected to the positive electrode of another battery element, the second conduction end of the second MOS transistor A is connected to the first conduction end of the second MOS transistor B, the second conduction end of the second MOS transistor B is connected to the negative electrode of another battery element, the controlled ends of the first MOS transistor A and the second MOS transistor A are both connected to the first enable control end of the driving chip U3, and the controlled ends of the first MOS transistor B and the second MOS transistor B are both connected to the second enable control end of the driving chip U3;

[0015] The common node between the second conduction end of the first MOS transistor A and the first MOS transistor B is connected to the first end of the transfer capacitor, and the common node between the second conduction end of the second MOS transistor A and the second MOS transistor B is connected to the second end of the transfer capacitor.

[0016] By adopting the above technical solutions, since the switch management module includes a plurality of switch conduction units, and each switch conduction unit is composed of a first MOS transistor and a second MOS transistor to respectively control the switch states of the battery positive and negative electrodes, it can achieve precise control of the connection state of the battery elements, thereby effectively realizing the dynamic scheduling of energy between the batteries and ensuring the high efficiency of the equalization process; through the design that the switch conduction units between every two adjacent battery elements are connected to the transfer capacitor, it can flexibly realize the charging and discharging operations of the transfer capacitor, thereby further ensuring high efficiency and low loss during the energy transfer process; by respectively controlling different switch conduction units through the first enable control end and the second enable control end of the driving module, it can achieve dynamic regulation of multi-path energy transmission, thereby improving the stability and applicability of the equalization circuit.

[0017] Preferably, the switch management module further includes an auxiliary control unit. The switch conduction unit corresponding to the last battery element in the battery pack is the switch conduction unit C. The switch conduction unit C includes a first MOS transistor C and a second MOS transistor C. The auxiliary control unit includes a resistor R1, a resistor R2, a resistor 4, a resistor R22, a diode D1, a diode D3, a voltage regulator diode ZD1, a voltage regulator diode ZD2, a MOS transistor Q13, and a MOS transistor Q19;

[0018] The negative terminal of the voltage regulator diode ZD1 is connected to the first enable control terminal of the drive chip U3. The positive terminal of the voltage regulator diode ZD1 is connected to the positive terminal of the diode D1. The negative terminal of the diode D1 is connected to the controlled terminal of the first MOS transistor C. A resistor R2 is connected between the common node between the positive terminals of the voltage regulator diode ZD1 and the diode D1 and the first conduction terminal of the second MOS transistor C. The common node between the positive terminals of the voltage regulator diode ZD1 and the diode D1 is connected to the controlled terminal of the MOS transistor Q13. A resistor R1 is connected between the common node between the negative terminal of the diode D1 and the controlled terminal of the first MOS transistor C and the first conduction terminal of the second MOS transistor C. The common node between the negative terminal of the diode D1 and the controlled terminal of the first MOS transistor C is connected to the first conduction terminal of the MOS transistor Q13. The second conduction terminal of the MOS transistor Q13 is connected to the first conduction terminal of the second MOS transistor C. The second conduction terminal of the second MOS transistor C is grounded;

[0019] The negative terminal of the voltage regulator diode ZD2 is connected to the second enable control terminal of the drive chip U3. The positive terminal of the voltage regulator diode ZD2 is connected to the positive terminal of the diode D3. The negative terminal of the diode D3 is connected to the controlled terminal of the second MOS transistor C. A resistor R4 is connected between the common node between the positive terminals of the voltage regulator diode ZD2 and the diode D3 and the ground. The common node between the positive terminals of the voltage regulator diode ZD2 and the diode D3 is connected to the controlled terminal of the MOS transistor Q19. A resistor R22 is connected between the common node between the negative terminal of the diode D3 and the controlled terminal of the second MOS transistor C and the ground. The common node between the negative terminal of the diode D3 and the controlled terminal of the second MOS transistor C is connected to the first conduction terminal of the MOS transistor Q19. The second conduction terminal of the MOS transistor Q19 is grounded.

[0020] By adopting the above technical solution, the switch management module includes an auxiliary control unit, which is composed of a voltage stabilizing diode, a diode, a MOS transistor, a resistor, etc. It can protect the working state of the circuit in the switch management module, avoid component damage caused by overcurrent or overvoltage, and thus improve the reliability of system operation; through the design of connecting the voltage stabilizing diode in the auxiliary control unit to the enable control terminal of the drive chip, the stability of the drive signal can be ensured, and thus the accuracy of switch operation can be further improved; through the collaborative work of the diode and the MOS transistor, the stability of the circuit during high-frequency switching is ensured, and the influence of signal interference on system operation can be reduced, thus enhancing the safety and anti-interference ability of the system.

[0021] Preferably, the sampling signal input end of the control module includes a plurality of sampling input ports, the differential pressure sampling module includes a plurality of differential pressure sampling units, each differential pressure sampling unit includes a first voltage dividing resistor and a second voltage dividing resistor, the common node between two adjacent battery elements is connected to the first end of the first voltage dividing resistor, the second end of the first voltage dividing resistor is connected to the first end of the second voltage dividing resistor, the second end of the second voltage dividing resistor is grounded, and the common node between the second end of the first voltage dividing resistor and the first end of the second voltage dividing resistor is connected to the sampling input port.

[0022] By adopting the above technical solution, since each differential pressure sampling unit in the differential pressure sampling module is composed of a first voltage dividing resistor and a second voltage dividing resistor, it can accurately divide and sample the voltage of each battery element, ensure the accuracy of the sampling signal, and thus improve the reliability of the drive signal generated by the control module; through the design of connecting the voltage dividing resistor to the sampling input port, the voltage signal can be stabilized, and data acquisition errors caused by circuit jitter can be avoided, thus further improving the working accuracy of the equalization circuit.

[0023] An active equalization method for real-time adjustment of battery differential pressure, which is applied to an active equalization circuit for real-time adjustment of battery differential pressure. The active equalization method for real-time adjustment of battery differential pressure includes:

[0024] Obtain battery differential pressure data, where the battery differential pressure data is the voltage difference between two adjacent battery elements;

[0025] Match the corresponding differential pressure threshold interval according to the battery differential pressure data;

[0026] Generate corresponding equalization control parameters according to the differential pressure threshold interval;

[0027] Execute corresponding capacitor energy transfer operations according to the equalization control parameters.

[0028] By adopting the above technical solution, by obtaining the battery voltage difference data and matching the voltage difference threshold range, the battery voltage state in the battery pack can be analyzed in real time, ensuring that the balancing operation is optimized based on the actual state of the battery, thereby improving the intelligence level of the balancing strategy; by performing the capacitor energy transfer operation according to the balancing control parameters, the charging and discharging process of the capacitor can be accurately controlled, realizing the efficient transfer of energy, thereby reducing the voltage difference between the batteries and improving the operation consistency and lifespan of the battery pack.

[0029] Preferably, in the step of generating corresponding balancing control parameters according to the voltage difference threshold range, the balancing control parameters include equal-timing control parameters and logic OR gate control parameters, and the step further includes:

[0030] Obtain the unit type data of the switch conduction unit in the switch management module;

[0031] If the unit type data is a single switch element, generate equal-timing control parameters according to the voltage difference threshold range;

[0032] If the unit type data is an encapsulated aggregate composed of multiple switch elements and at least constitutes a logic OR gate network, generate logic OR gate control parameters according to the voltage difference threshold range.

[0033] By adopting the above technical solution, by generating equal-timing control parameters and logic OR gate control parameters according to the voltage difference threshold range, the control strategy in the balancing process can be flexibly adjusted to adapt to different battery states, thereby improving the efficiency and flexibility of balancing; by judging that the unit type data is a single switch element or a logic OR gate network composed of multiple switch elements, optimized control can be performed for different circuit structures, thereby further enhancing the compatibility and scalability of the balancing circuit.

[0034] Preferably, in the step of generating equal-timing control parameters according to the voltage difference threshold range, the equal-timing control parameters include a first PWM frequency parameter and a second PWM frequency parameter, and the step further includes:

[0035] Extract the upper limit values in each of the voltage difference threshold ranges;

[0036] Judge whether the upper limit values are all the same. If so, generate the corresponding first PWM frequency parameter according to the upper limit value;

[0037] If not, determine one or more of the upper limit values with the highest numerical value among the upper limit values as the first target value, and generate the corresponding second PWM frequency parameter according to the first target value.

[0038] By adopting the above technical solution, by generating the first PWM frequency parameter and the second PWM frequency parameter according to the upper limit value of the pressure difference threshold interval, the frequency of the PWM signal can be dynamically adjusted to ensure the efficiency and accuracy of the energy transfer process, thereby reducing the energy loss during the equalization process; by determining the highest upper limit value and generating the corresponding PWM frequency parameter when the upper limit values are inconsistent, the equalization operation under high pressure difference conditions can be optimized, thereby further improving the equalization speed and the performance consistency of the battery pack.

[0039] Preferably, in the step of generating the logic OR gate control parameter according to the pressure difference threshold interval, the logic OR gate control parameter includes a third PWM frequency parameter and a fourth PWM frequency parameter, and includes

[0040] Determine the upper limit value of each of the pressure difference threshold intervals;

[0041] Judge whether the upper limit values are all the same. If so, generate the corresponding third PWM frequency parameter according to the upper limit value;

[0042] If not, determine the inconsistent upper limit value among the upper limit values as the second target value, generate the corresponding third PWM frequency parameter according to the upper limit value, and generate the corresponding fourth PWM frequency parameter according to the second target value. The third PWM frequency parameter is used to make the switch conduction unit select the common data transmission path included in the logic OR gate network, and the fourth PWM frequency parameter is used to make the switch conduction unit select the independent data transmission path included in the logic OR gate network.

[0043] By adopting the above technical solution, by generating the third PWM frequency parameter and the fourth PWM frequency parameter according to the pressure difference threshold interval, the common data transmission path and the independent data transmission path of the logic OR gate network can be respectively controlled, ensuring the stability and efficiency of data transmission in the equalization circuit, thereby improving the application effect of the equalization circuit in a complex circuit structure.

[0044] Preferably, in the step of performing the corresponding capacitor energy transfer operation according to the equalization control parameter, the capacitor energy transfer operation is an operation of repeating multiple switching cycles, and the switching cycle includes a capacitor storage operation and a capacitor discharge operation, and includes:

[0045] According to the equalization control parameter, determine the first state period of the first switch state and the second state period of the second switch state, and the number of switching cycles, where the first switch state and the second switch state are the conduction states of the switch conduction unit in the switch management module;

[0046] Execute the capacitance storage operation, which is to control the switch conduction unit in the switch management module to switch to the first switch state and start timing until the duration specified by the first state period is reached;

[0047] If the duration specified by the first state period is reached, execute the capacitance discharge operation, which is to control the switch conduction unit in the switch management module to switch to the second switch state and start timing until the duration specified by the second state period is reached;

[0048] If the duration specified by the second state period is reached, the switch management module goes through a switch cycle, records the current cycle count, and determines whether the current cycle count is equal to the switch cycle count. If not, a new switch cycle is executed again. If so, the execution of the new switch cycle is stopped.

[0049] By adopting the above technical solution, through the repeated execution of the capacitance storage operation and the capacitance discharge operation, the energy transfer between batteries can be efficiently completed, the voltage difference can be reduced, thereby improving the consistency of the operation of the battery pack; by determining the durations of the first switch state and the second switch state according to the equalization control parameters, the energy transfer process of each switch cycle can be accurately controlled, ensuring the minimum loss of the capacitance during the charge and discharge process, thereby further improving the equalization efficiency and the service life of the battery pack.

[0050] In summary, the present application includes at least one of the following beneficial technical effects:

[0051] Through the collaborative work of a series of modules in the present application, the problems of energy waste, low efficiency, and excessive heat in traditional passive equalization are effectively solved. The core lies in using the voltage difference sampling module to real-time monitor the voltage differences of each battery in the battery pack, and the control module generates accurate drive signals according to the sampling results, thereby dynamically adjusting the working states of the drive module and the switch management module, enabling the transfer capacitor to achieve lossless energy transfer between high-voltage batteries and low-voltage batteries. The transfer capacitor, as an energy carrier, avoids the traditional passive equalization method of discharging excess energy through a resistor, and directly transfers the excess power of the battery to the battery that needs to be supplemented. This design greatly improves the energy utilization rate. At the same time, through the flexible control of the switch management module, the charge and discharge circuit path of the transfer capacitor can be adjusted according to the voltage difference between the batteries, reducing the impact of current surges on the battery life, thereby reducing the heat generation of the system while improving the equalization efficiency and optimizing the heat dissipation design. This circuit structure and method achieve active and intelligent battery equalization, meeting the design requirements of high efficiency, energy conservation, and environmental protection. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 is a partial circuit schematic diagram of the traditional passive equalization technology in the present application;

[0053] Figure 2 is a flowchart of an active balancing circuit for real-time adjustment of battery voltage difference in an embodiment of the present application;

[0054] Figure 3 is a partial circuit schematic diagram of a control module in an active balancing circuit for real-time adjustment of battery voltage difference in an embodiment of the present application;

[0055] Figure 4 is a partial circuit schematic diagram of a voltage difference sampling module in an active balancing circuit for real-time adjustment of battery voltage difference in an embodiment of the present application;

[0056] Figure 5 is a partial circuit schematic diagram of a driving module in an active balancing circuit for real-time adjustment of battery voltage difference in an embodiment of the present application;

[0057] Figure 6 is a partial circuit schematic diagram of a battery pack, a switch management module, and a transfer capacitor in an active balancing circuit for real-time adjustment of battery voltage difference in an embodiment of the present application;

[0058] Figure 7 is a flowchart showing a partial structure of a switch conduction unit in an active balancing circuit for real-time adjustment of battery voltage difference in another embodiment of the present application;

[0059] Figure 8 is a flowchart of an active balancing method for real-time adjustment of battery voltage difference in an embodiment of the present application;

[0060] Figure 9 is a flowchart for implementing step S30 in an active balancing method for real-time adjustment of battery voltage difference in an embodiment of the present application;

[0061] Figure 10 is a flowchart for implementing step S302 in an active balancing method for real-time adjustment of battery voltage difference in an embodiment of the present application;

[0062] Figure 11 is a flowchart for implementing step S303 in an active balancing method for real-time adjustment of battery voltage difference in an embodiment of the present application;

[0063] Figure 12 is a flowchart for implementing step S40 in an active balancing method for real-time adjustment of battery voltage difference in an embodiment of the present application. Detailed implementation manners

[0064] The present application will be further described in detail below with reference to the accompanying drawings.

[0065] In one embodiment, as Figure 2 、 Figure 3As shown in the figure, the present application discloses an active equalization circuit for real-time adjusting the battery voltage difference, which includes a battery pack, a voltage difference sampling module, a control module, a driving module, a switch management module, and a plurality of transfer capacitors;

[0066] The battery pack includes a plurality of battery elements connected in series;

[0067] The sampling signal input terminals of the voltage difference sampling module are respectively connected to the common nodes between every two adjacent battery elements, and the sampling signal output terminal of the voltage difference sampling module is connected to the sampling signal input terminal of the control module;

[0068] The driving signal output terminal of the control module is connected to the driving signal input terminal of the driving module;

[0069] The enabling signal output terminal of the driving module is connected to the enabling signal input terminal of the switch management module;

[0070] Among every two adjacent battery elements, the power output terminal of one of the battery elements is connected to the first power input terminal of the switch management module, the first power output terminal of the switch management module is connected to the first end of the transfer capacitor, the second end of the transfer capacitor is connected to the second power input terminal of the switch management module, and the second power output terminal of the switch management module is connected to the power input terminal of the battery element.

[0071] In this embodiment, in the active balancing circuit, the port connections and control logic among various modules form the basis for the entire system to achieve dynamic balancing between batteries. The battery pack consists of multiple serially connected battery elements. The sampling signal input terminal of the voltage difference sampling module is connected through a common node between every two adjacent battery elements. The voltage difference sampling module transfers the sampling signal to the sampling signal input terminal of the control module by collecting the voltage differences between batteries in real time. The control module generates a driving signal based on the collected battery voltage difference information and transfers the signal to the driving signal input terminal of the driving module through its driving signal output terminal. The function of the driving module is to generate corresponding enable signals according to the driving signal output by the control module. These enable signals are transferred to the enable signal input terminal of the switch management module through the enable signal output terminal of the driving module, thereby realizing the control of the switch units in the switch management module. In every two adjacent battery elements, the power output terminal of one of the battery elements is connected to the first power input terminal of the switch management module. The switch management module adjusts the conduction state of its internal switches according to the control of the enable signal, enabling the current path to be opened or closed. The first power output terminal of the switch management module is connected to the first end of the transfer capacitor. The transfer capacitor plays a role of energy transfer in this circuit and is used to transfer energy losslessly between the battery with a higher voltage and the battery with a lower voltage. The second end of the transfer capacitor is connected to the second power input terminal of the switch management module, and the second power output terminal of the switch management module is finally connected to the power input terminal of another battery element. This connection method enables energy to be transferred from the battery element with a higher voltage to the battery element with a lower voltage along a predetermined path through the transfer capacitor.

[0072] In terms of control logic, the voltage difference sampling module collects the voltage differences between every two adjacent battery elements in the battery pack in real time and transfers this information to the control module. The control module analyzes and judges the voltage differences, identifies the battery elements that need to be balanced and the specific balancing paths, and then outputs corresponding driving signals to the driving module. The driving module activates specific switch conduction paths according to the driving signal, enables the switch units of the switch management module to conduct, and at the same time transfers energy from the high-voltage battery to the low-voltage battery through the transfer capacitor. The switch management module realizes flexible control of the entire balancing process by dynamically regulating the conduction states of each switch unit. This design can reduce the current impact on the battery while maintaining the high efficiency of energy transfer, and ultimately improve the performance consistency and service life of the entire battery pack.

[0073] In summary, through the collaborative work of a series of modules, the present application effectively solves the problems of energy waste, low efficiency, and excessive heat in traditional passive equalization. The core lies in using the differential pressure sampling module to monitor the voltage differences of each battery in the battery pack in real time, and the control module generates accurate drive signals based on the sampling results, thereby dynamically adjusting the working states of the drive module and the switch management module, enabling the transfer capacitor to achieve lossless energy transfer between high-voltage batteries and low-voltage batteries. As an energy carrier, the transfer capacitor avoids the traditional passive equalization method of discharging excess energy through resistors, directly transferring the excess power of the battery to the battery that needs to be supplemented. This design significantly improves the energy utilization rate. At the same time, through the flexible control of the switch management module, the charging and discharging circuit paths of the transfer capacitor can be adjusted according to the voltage differences between the batteries, reducing the impact of current surges on the battery life, thereby reducing the heat generation of the system while improving the equalization efficiency and optimizing the heat dissipation design. This circuit structure and method achieve active and intelligent battery equalization, meeting the design requirements of high efficiency, energy conservation, and environmental protection.

[0074] Further, as Figure 5 shown, the drive signal output terminals of the control module include a first drive output port and a second drive output port. The drive module includes a drive chip U3. The first drive signal input terminal of the drive chip U3 is connected to the first drive output port, the second drive signal input terminal of the drive chip U3 is connected to the second drive output port, and the first enable control terminal and the second enable control terminal of the drive chip U3 are respectively connected to the enable signal input terminal of the switch management module for controlling different switch operations of the switch management module.

[0075] In this embodiment, the drive signal output terminals of the control module include a first drive output port and a second drive output port, which indicates that the control module can generate multiple independent drive signals for precise control of different circuit parts. The first drive output port and the second drive output port are respectively connected to the first drive signal input terminal and the second drive signal input terminal of the drive chip U3. This connection relationship shows that the two drive signals generated by the control module can be independently transmitted to the drive chip U3 for processing. The drive chip U3 is a key module for generating an enable signal, and its function is to convert the drive signal transmitted from the control module into an enable signal that can directly control the switch management module. Specifically, after the first drive signal input terminal of the drive chip U3 receives the signal from the first drive output port, it will generate a corresponding enable signal according to this signal and output it to the enable signal input terminal of the switch management module through the first enable control terminal. Similarly, after the second drive signal input terminal of the drive chip U3 receives the signal from the second drive output port, it will generate an enable signal for the second enable control terminal and transmit it to the enable signal input terminal of the switch management module. The switch management module flexibly controls the on and off states of the switch units inside it according to the first enable control signal and the second enable control signal provided by the drive chip U3, thereby determining the specific connection path of the energy transfer capacitor in the battery pack. The independence of the first enable control terminal and the second enable control terminal means that different switch operations in the switch management module are separated, and the two enable control signals can respectively control the corresponding switch units without interfering with each other.

[0076] Logically, the control module is responsible for real-time acquisition and processing of the voltage difference information of the battery pack, and generates a first drive signal and a second drive signal according to a preset balancing strategy. These signals are transmitted to the drive chip U3 through the first drive output port and the second drive output port. After the drive chip U3 processes the input signals accordingly, it generates a first enable control signal and a second enable control signal, and transmits them to the enable signal input terminals of the switch management module respectively to activate the corresponding switch units. Through this distributed control logic, independent control of multiple switch units can be achieved, ensuring that the transfer capacitor can accurately and efficiently perform the energy transfer operation, thereby improving the performance and flexibility of the balancing circuit.

[0077] Further, as Figure 6As shown, the switch management module includes multiple switch conduction units. Among them, each switch conduction unit is correspondingly provided with a battery element. Among every two adjacent battery elements, at least two switch conduction units and one transfer capacitor are involved in energy transfer, namely switch conduction unit A and switch conduction unit B. The switch conduction unit A includes a first MOS transistor A and a second MOS transistor A. The switch conduction unit B includes a first MOS transistor B and a second MOS transistor B. The first conduction end of the first MOS transistor A is connected to the positive electrode of one of the battery elements. The second conduction end of the first MOS transistor A is connected to the first conduction end of the first MOS transistor B. The second conduction end of the first MOS transistor B is connected to the negative electrode of one of the battery elements. The first conduction end of the second MOS transistor A is connected to the positive electrode of another battery element. The second conduction end of the second MOS transistor A is connected to the first conduction end of the second MOS transistor B. The second conduction end of the second MOS transistor B is connected to the negative electrode of another battery element. The control ends of the first MOS transistor A and the second MOS transistor A are both connected to the first enable control end of the drive chip U3. The control ends of the first MOS transistor B and the second MOS transistor B are both connected to the second enable control end of the drive chip U3. The common node between the second conduction end of the first MOS transistor A and the first MOS transistor B is connected to the first end of the transfer capacitor. The common node between the second conduction end of the second MOS transistor A and the second MOS transistor B is connected to the second end of the transfer capacitor.

[0078] In this embodiment, as Figure 6As shown, such as BATT5 and BATT4, the first MOS transistor A is Q5A in the figure, the second MOS transistor A is Q11A in the figure, the first MOS transistor B is Q5B in the figure, and the second MOS transistor B is Q11B in the figure. When participating in the energy transfer of BATT5 and BATT4, it is through the transfer capacitor C12. In this active balancing circuit, the function of the switch management module is to dynamically control the connection state between the battery and the transfer capacitor through multiple switch conduction units, so as to achieve efficient energy transfer. Each switch conduction unit is responsible for controlling the connection relationship between the positive and negative electrodes of a battery and the transfer capacitor. The voltage difference between every two adjacent batteries is balanced through the coordinated operation of the switch conduction unit and the transfer capacitor. The core of its design is to jointly control a group of transfer capacitors through two switch conduction units to achieve the orderly flow of energy, transferring from the high-voltage battery to the low-voltage battery. Each switch conduction unit contains two switch devices (such as MOS transistors), which are respectively connected to the positive and negative electrodes of the battery. The first switch device controls the connection state of the positive electrode of the battery, while the second switch device controls the connection state of the negative electrode of the battery. The middle node of these two switch devices is directly connected to one end of the transfer capacitor, thus realizing the energy transfer of the capacitor to the battery. Among two adjacent batteries, the switch device of the switch conduction unit of the first battery is connected to one end of the capacitor, and the switch device of the switch conduction unit of the second battery is connected to the other end of the capacitor, thus forming a complete current path, enabling energy to flow between the batteries. The switch state of the switch conduction unit is determined by the control signal provided by the drive module. After receiving the drive signal generated by the control module, the drive module outputs the corresponding enable signal to each switch conduction unit. These enable signals control the conduction states of the switch conduction units of the first battery and the second battery respectively, so that the capacitor can be connected to one battery within a specific time and then switched to another battery to complete the charging and discharging process.

[0079] Taking actual operation as an example, when the driving module outputs a signal to turn on the switch conduction unit of the first battery, one end of the capacitor is connected to the positive and negative electrodes of the first battery, and the capacitor starts to draw energy from the first battery for charging; subsequently, when the control signal of the driving module switches to control the switch conduction unit of the second battery, the energy of the capacitor is released to the second battery with a lower voltage through the path connected to the second battery, thus completing an energy transfer operation. During the whole process, the core role of the transfer capacitor is to act as an energy intermediary. Through its charging and discharging behavior, it transfers charges between the high-voltage and low-voltage batteries, reducing the voltage difference between the two. The design of the switch conduction unit ensures the accuracy and flexibility of the connection between the capacitor and the battery. Each switch conduction unit can independently control the connection between the capacitor and different batteries according to the enable signal of the driving module. Through this modular design, the equalization operation of each pair of adjacent batteries in the battery pack can be achieved, and it can be flexibly extended to the equalization control of more batteries. The logical core of this design lies in separating the control signal from the specific physical connection. The independent signals generated by the driving module (such as the first enable control signal and the second enable control signal) can precisely control the working state of a specific switch conduction unit, enabling the circuit to dynamically adjust the connection relationship between the battery and the capacitor according to actual needs, avoiding multi-path signal conflicts, and ensuring the high efficiency and stability of the circuit. In addition, by restricting the charging and discharging path of the capacitor, this design effectively reduces the impact of current surges on the battery pack, thereby extending the battery life and optimizing the energy utilization efficiency. Generally speaking, the architecture of this switch management module not only achieves efficient energy transfer and dynamic equalization of battery voltages, but also improves the flexibility of the system through a modular design method, facilitating expansion to a larger-scale battery pack and adapting to more complex application scenarios. The control logic of the system is clear, and through the collaborative work of the distributed switch conduction units and the transfer capacitor, an efficient, energy-saving and safe equalization goal is achieved.

[0080] Furthermore, as Figure 6As shown, the switch management module further includes an auxiliary control unit. The switch conduction unit corresponding to the last battery element in the battery pack is the switch conduction unit C. The switch conduction unit C includes a first MOS transistor C and a second MOS transistor C. The auxiliary control unit includes a resistor R1, a resistor R2, a resistor 4, a resistor R22, a diode D1, a diode D3, a voltage regulator diode ZD1, a voltage regulator diode ZD2, a MOS transistor Q13, and a MOS transistor Q19. The negative terminal of the voltage regulator diode ZD1 is connected to the first enable control terminal of the drive chip U3. The positive terminal of the voltage regulator diode ZD1 is connected to the positive terminal of the diode D1. The negative terminal of the diode D1 is connected to the controlled terminal of the first MOS transistor C. A resistor R2 is connected between the common node between the positive terminal of the voltage regulator diode ZD1 and the positive terminal of the diode D1 and the first conduction terminal of the second MOS transistor C. The common node between the positive terminal of the voltage regulator diode ZD1 and the positive terminal of the diode D1 is connected to the controlled terminal of the MOS transistor Q13. A resistor R1 is connected between the common node between the negative terminal of the diode D1 and the controlled terminal of the first MOS transistor C and the first conduction terminal of the second MOS transistor C. The common node between the negative terminal of the diode D1 and the controlled terminal of the first MOS transistor C is connected to the first conduction terminal of the MOS transistor Q13. The second conduction terminal of the MOS transistor Q13 is connected to the first conduction terminal of the second MOS transistor C. The second conduction terminal of the second MOS transistor C is grounded. The negative terminal of the voltage regulator diode ZD2 is connected to the second enable control terminal of the drive chip U3. The positive terminal of the voltage regulator diode ZD2 is connected to the positive terminal of the diode D3. The negative terminal of the diode D3 is connected to the controlled terminal of the second MOS transistor C. A resistor R4 is connected between the common node between the positive terminal of the voltage regulator diode ZD2 and the positive terminal of the diode D3 and the ground. The common node between the positive terminal of the voltage regulator diode ZD2 and the positive terminal of the diode D3 is connected to the controlled terminal of the MOS transistor Q19. A resistor R22 is connected between the common node between the negative terminal of the diode D3 and the controlled terminal of the second MOS transistor C and the ground. The common node between the negative terminal of the diode D3 and the controlled terminal of the second MOS transistor C is connected to the first conduction terminal of the MOS transistor Q19. The second conduction terminal of the MOS transistor Q19 is grounded.

[0081] In this embodiment, MOS transistors Q13 and Q19 play a key auxiliary control role in the entire circuit. Their settings are to enhance the switching control and protection mechanism for the outermost battery components, while improving the response speed and accuracy of the control signal. Q13 and Q19 are respectively associated with the first MOS transistor C and the second MOS transistor C of the switch conduction unit C, and are responsible for assisting in controlling the operating states of these two switch transistors. The design purpose is to solve the possible problems existing in directly controlling MOS transistors with drive signals, such as mis-conduction caused by signal fluctuations, damage to the switch transistors due to current surges, and insufficient response speed in the dynamic operating state. MOS transistor Q13, zener diode ZD1, diode D1, and resistors R1 and R2 form a stable signal control loop, whose function is to provide a more stable and accurate control signal to the controlled terminal of the first MOS transistor C. In the control logic, when the first enable control terminal of the drive chip U3 outputs a signal, the zener diode ZD1 limits the voltage range of the input signal to prevent excessive voltage from directly acting on the controlled terminal of the first MOS transistor C. Q13 further enhances the reliability of this signal. Its controlled terminal is connected to the positive terminal of the zener diode ZD1. When the signal limited by the zener diode reaches the set value, Q13 conducts, allowing the signal to pass through. In this way, Q13 provides a controllable path for the first MOS transistor C, and at the same time amplifies and regulates the signal at the controlled terminal. The presence of Q13 makes the conduction of the first MOS transistor C faster and more reliable, thus effectively avoiding mis-conduction phenomena caused by signal jitter or insufficiency. In addition, Q13 also undertakes part of the current shunting function, playing a buffering effect in the circuit, and further protecting the stable operation of the first MOS transistor C. MOS transistor Q19, together with zener diode ZD2, diode D3, and resistors R4 and R22, constitutes an auxiliary control loop for the second MOS transistor C. Its function is similar to that of Q13, but acts on the controlled terminal of the second MOS transistor C, mainly responsible for regulating the transmission and output of the drive signal. When the second enable control terminal of the drive chip U3 outputs a signal, the zener diode ZD2 also limits the signal voltage to ensure that the signal is within a safe range. The controlled terminal of Q19 is connected to the positive terminal of the zener diode ZD2. When the signal reaches the set control level, Q19 conducts, enabling the signal to be transmitted to the controlled terminal of the second MOS transistor C through diode D3. The setting of Q19 enables the signal to reach the controlled terminal of the second MOS transistor C more smoothly, and its high-speed switching characteristics enable the second MOS transistor C to respond to the control signal in the shortest time, achieving precise switching operations. Q19 also undertakes a certain current buffering function in the dynamic operating state, effectively reducing the impact of current surges on the second MOS transistor C. Another important reason for setting MOS transistors Q13 and Q19 is to optimize the dynamic response ability of the circuit.In the circuit, due to the high switching frequency of the terminal battery element, the control signal needs to be quickly transmitted to the first MOS transistor C and the second MOS transistor C. Direct control through the drive signal may cause switching response delay or even malfunction due to signal attenuation or interference. By introducing Q13 and Q19, the signal transmission path is optimized, which can effectively shorten the signal transmission time and enhance the signal strength, thus ensuring the reliability and stability of the switching conduction unit C under high-frequency operation. In addition, the setting of Q13 and Q19 also improves the robustness of the entire auxiliary control unit. Under dynamic operating conditions, the circuit may be affected by external electromagnetic interference or transient signals. Such interference may cause the first MOS transistor C and the second MOS transistor C to conduct or turn off accidentally, thereby affecting the energy transfer efficiency of the terminal battery element. Q13 and Q19 effectively filter these interference signals through their voltage stabilization and rectification functions in the control path, ensuring the purity of the controlled-end signal and making the switching operation more accurate.

[0082] Generally speaking, the functions of MOS transistors Q13 and Q19 in this circuit are not only simple signal transmission media, but also part of the protection and regulation mechanism for the terminal battery element in the switching management module. They significantly improve the reliability and safety of the connection of the terminal battery element by enhancing signal stability, reducing current impact, increasing dynamic response speed, and filtering interference signals. This design is to provide more precise control under high-frequency switching conditions and ensure the stable operation of the entire balancing circuit in a complex environment.

[0083] Furthermore, as Figure 4 shown, the sampling signal input end of the control module includes a plurality of sampling input ports, the differential pressure sampling module includes a plurality of differential pressure sampling units, the differential pressure sampling unit includes a first voltage-dividing resistor and a second voltage-dividing resistor. The common node between two adjacent battery elements is connected to the first end of the first voltage-dividing resistor. The second end of the first voltage-dividing resistor is connected to the first end of the second voltage-dividing resistor. The second end of the second voltage-dividing resistor is grounded. The common node between the second end of the first voltage-dividing resistor and the first end of the second voltage-dividing resistor is connected to the sampling input port.

[0084] In this embodiment, as Figure 4As shown in the figure, the first voltage-dividing resistor is R5 in the figure, and the second voltage-dividing resistor is R3 in the figure. The common node of two adjacent battery elements is connected to the first end of the first voltage-dividing resistor, and the second end of the first voltage-dividing resistor is connected to the first end of the second voltage-dividing resistor, forming a voltage-dividing network. In the voltage-dividing network, the second end of the second voltage-dividing resistor is grounded, and the middle node of the voltage-dividing network transmits the voltage signal after voltage division to the control module through the sampling input port; through this connection method, the voltage difference sampling module can collect and convert the voltage difference between two adjacent batteries into a voltage signal suitable for processing by the control module. The function of the voltage-dividing resistor is to reduce the relatively high battery voltage in proportion to avoid exceeding the input voltage range of the control module. The resistance values of the first voltage-dividing resistor and the second voltage-dividing resistor need to be accurately calculated to ensure the stability and reliability of the voltage division ratio, so as to ensure that the signal received by the control module truly reflects the actual voltage difference between the batteries; the sampling signal input end of the control module is connected to the voltage-dividing middle node of the voltage difference sampling unit, and this design enables the output of each sampling unit to be independently input into the control module, ensuring that the voltage difference between each pair of adjacent batteries in the battery pack can be monitored in real time. After the sampling signal enters the control module through multiple sampling input ports, the module will judge the voltage difference value between each pair of adjacent batteries based on these signals. The control module can not only identify the unbalanced batteries in the battery pack based on this voltage difference information, but also combine the balancing strategy in the circuit to generate corresponding control signals to adjust the output of the drive module, thereby realizing the correction of the unbalanced state.

[0085] In another embodiment:

[0086] As Figure 7 shown in the figure, the figure shows the flowchart of one of the switch conduction units of the switch management module. The first switch tube is the first MOS tube A, the first MOS tube B or the first MOS tube C, and can also be the second MOS tube A, the second MOS tube B or the second MOS tube C, that is, any MOS tube in the above embodiment, and the second switch tube is a MOS tube on the common data transmission path, and the third switch tube is a MOS tube on the independent data transmission path. Both the second switch tube and the third switch tube are controlled by the enabling control ports of other parts of the control module or the enabling control ports of other auxiliary control modules to control their respective conduction states. When the common data transmission path is selected, the second switch tube is selected to conduct and the third switch tube is closed. When the independent data transmission path is selected, the second switch tube is selected to be closed and the third switch tube is conducted, so that the first switch tube can receive PWM signals with different duty cycles.

[0087] As Figure 8 shown, an active balancing method for real-time adjusting the battery voltage difference is applied to an active balancing circuit for real-time adjusting the battery voltage difference. The active balancing method for real-time adjusting the battery voltage difference includes:

[0088] S10. Obtain battery voltage difference data, where the battery voltage difference data is the voltage difference between two adjacent battery elements; in this embodiment, obtaining battery voltage difference data means that the voltage difference between each pair of adjacent batteries in the battery pack is collected in real time through a voltage difference sampling module. These voltage differences are important manifestations of the current working state of each battery in the battery pack and can accurately reflect the balance of the battery pack. The acquisition process of the voltage difference data depends on multiple voltage difference sampling units in the voltage difference sampling module. Each voltage difference sampling unit includes a first voltage-dividing resistor and a second voltage-dividing resistor. After dividing the high-voltage signal, the divided signal is transmitted to the control module. Specifically, the common node between adjacent batteries is connected to the voltage difference sampling unit, and the sampling unit reduces the original voltage difference to a safe voltage range that the control module can process through a voltage-dividing network. For example, if the voltages of two adjacent batteries are 3.7V and 3.6V respectively, and the voltage difference is 0.1V, the sampling unit converts this difference into a signal of 0.01V or other ratios according to the voltage division ratio and then transmits it to the control module for subsequent processing. Through this acquisition process, the voltage difference between each pair of adjacent batteries can be obtained in real time, ensuring the accuracy and dynamic response ability of subsequent balancing operations.

[0089] S20. Match the corresponding voltage difference threshold range according to the battery voltage difference data; in this embodiment, matching the corresponding voltage difference threshold range according to the battery voltage difference data means that after the control module receives the voltage difference signal transmitted by the sampling module, it compares the signal with a preset voltage difference range and classifies it into different voltage difference threshold ranges. The division of the voltage difference threshold range is usually set according to the specific performance requirements and balancing strategies of the battery pack. For example, the small voltage difference range is 0 - 0.2V, and the large voltage difference range is 0.2V and above. Through such range division, the control module can quickly identify the battery pairs that need to be balanced first and judge the intensity of the balancing strategy to be executed. For example, if the voltage difference between two detected batteries is 0.25V, the control module classifies this data into the large voltage difference range, indicating that the voltage difference between these two batteries is large and a stronger balancing operation is required to reduce the voltage difference. Through this range matching mechanism, the efficiency and intelligence of the balancing process can be effectively improved, and at the same time, excessive balancing operations on battery pairs with less balancing requirements can be avoided.

[0090] S30. Generate corresponding equalization control parameters according to the pressure difference threshold range. In this embodiment, generating corresponding equalization control parameters according to the pressure difference threshold range means that the control module generates a set of specific operation parameters according to the range to which the battery pressure difference belongs. These parameters include the frequency, duty cycle, and duration of the equalization operation of the PWM signal, etc., and are used to control the charging and discharging rhythm and intensity of the transfer capacitor during the equalization process. For a small pressure difference range, the control module may generate a PWM signal with a higher frequency to quickly complete the equalization; while for a large pressure difference range, it may generate a PWM signal with a lower frequency and a larger duty cycle to extend the charging and discharging time of the transfer capacitor, thereby ensuring the smoothness and effectiveness of the equalization process. For example, when the pressure difference between a pair of batteries is detected to be 0.3V and classified into the large pressure difference range, the control module may generate a PWM signal with a duty cycle of 60% and a frequency of 10kHz, and set a longer equalization operation time to ensure that the transfer capacitor can transfer energy smoothly and efficiently, and gradually reduce the voltage difference between the two batteries. This mechanism of dynamically generating control parameters can flexibly adjust the equalization operation according to the actual state of the battery pack, ensure the maximization of equalization efficiency, and avoid potential damage to the battery caused by current impact.

[0091] S40. Execute corresponding capacitor energy transfer operations according to the equalization control parameters. In this embodiment, executing corresponding capacitor energy transfer operations according to the equalization control parameters means that the control module uses the generated PWM signal to control the states of the switch conduction units of the switch management module through the drive module, so that the transfer capacitor is connected to the high-voltage battery and the low-voltage battery in turn, thereby realizing energy transfer. In specific operations, the transfer capacitor is first connected to the high-voltage battery through the switch conduction unit for charging. When the charging is completed, the switch state is switched, and the transfer capacitor is connected to the low-voltage battery to release energy to the low-voltage battery to reduce the voltage difference. For example, if the voltage difference between two batteries is 0.25V, the PWM signal generated by the control module will control the switch conduction unit to switch at a fixed frequency, so that the transfer capacitor completes the charging and discharging operations at a certain period, and gradually reduces the voltage difference below the set threshold (such as 0.05V). During this process, the control module will monitor the change of the voltage difference in real time, dynamically adjust the time parameters and operation frequency of the switch conduction to ensure the smooth and efficient equalization process, and minimize energy loss at the same time. This energy transfer operation not only improves the equalization speed, but also extends the service life of the battery by reducing the impact of transient large current on the battery, and optimizes the performance and operation stability of the entire battery pack.

[0092] In one embodiment, as Figure 9 shown, in step S30, that is, in the step of generating corresponding equalization control parameters according to the pressure difference threshold range, the equalization control parameters include equal-time sequence control parameters and logical OR gate control parameters, and the step further includes:

[0093] S301. Obtain the unit type data of the switch conduction unit in the switch management module; in this embodiment, obtaining the unit type data of the switch conduction unit in the switch management module means that the control module obtains the specific configuration of each switch conduction unit in the current switch management module through internal logic or external sampling, including its structural characteristics and the connection type of components. The unit type data reflects the composition method of each switch conduction unit, such as whether it is composed of a single switch tube element, or whether it contains multiple switch tube elements and forms a complex logic circuit. These data can be transmitted to the control module in real time through the detection circuit inside the switch management module or the communication interface with the control module. For example, in practical applications, a switch conduction unit may include the first MOS transistor A and the second MOS transistor A, or consist of the first MOS transistor A and an additional logic OR gate. The control module identifies the specific type of each switch unit by collecting this information, providing a basis for subsequent balancing operations.

[0094] S302. If the unit type data is a single switch tube element, generate equal-timing control parameters according to the pressure difference threshold range; in this embodiment, if the unit type data is a single switch tube element, generating equal-timing control parameters according to the pressure difference threshold range means that when the switch conduction unit in the switch management module is composed of a single MOS transistor, the control module generates fixed equalizing operation timing parameters for it according to the simple structural characteristics of the unit and the corresponding pressure difference threshold range. These equal-timing control parameters usually include the fixed PWM signal frequency and duty cycle, which are used to directly drive the switch tube for energy transfer during the equalizing operation. For example, when the voltage difference between a pair of adjacent batteries belongs to the medium pressure difference range, the control module may generate a 50% duty cycle and a 20 kHz PWM signal for the single MOS transistor to ensure that the transfer capacitor can complete the equalizing operation efficiently and stably. Since the single switch tube structure is relatively simple, using equal-timing control parameters can simplify the control logic, reduce the computational complexity, and improve the system response speed.

[0095] S303. If the unit type data is an encapsulated aggregate composed of multiple switching tube elements and at least forms a logical OR gate network, generate logical OR gate control parameters according to the pressure difference threshold range. In this embodiment, if the unit type data is an encapsulated aggregate composed of multiple switching tube elements and at least forms a logical OR gate network, generating logical OR gate control parameters according to the pressure difference threshold range means that when the switch conduction unit of the switch management module is composed of multiple MOS tubes and forms a more complex logical structure, the control module will generate more flexible balancing operation parameters according to this structural feature and the pressure difference threshold range. These logical OR gate control parameters include various combinations of PWM signal frequencies and duty cycles, which are used to control the conduction or cutoff of different switching tube elements. For example, when the pressure difference between a pair of adjacent batteries in the battery pack is large, the control module may generate a PWM signal with a lower frequency (such as 10 kHz) for the first MOS tube and a PWM signal with a higher frequency (such as 50 kHz) for the second MOS tube, so as to dynamically adjust the path and intensity of energy transfer according to the actual balancing requirements. This control method of multi-signal combination can perform refined energy management for complex switch structures, thereby improving the flexibility and efficiency of balancing;

[0096] Figure 7 The flowchart of the switch management module shown in shows a typical working mode of the switch conduction unit. The first switch tube can be the first MOS tube A, the first MOS tube B, or the first MOS tube C, or it can be the second MOS tube A, the second MOS tube B, or the second MOS tube C. The specific selection depends on the balancing strategy and the instructions of the control module. The second switch tube and the third switch tube are respectively responsible for controlling the common data transmission path and the independent data transmission path. The second switch tube is located on the common data transmission path, and its conduction or cutoff state is controlled by a specific enable control port of the control module; while the third switch tube is located on the independent data transmission path and is controlled by an auxiliary control module or other enable control ports. When the control module selects to use the common data transmission path, the second switch tube conducts and the third switch tube closes, ensuring that the energy transfer operation is unified through the common path to reduce circuit complexity and signal interference. For example, when the battery pressure difference is small (such as below 0.05 V), selecting the common path can quickly complete the balancing task. And when an independent data transmission path is required, for example, when the pressure difference is large (such as above 0.3 V) and higher balancing accuracy is required, the control module will turn off the second switch tube and conduct the third switch tube, so as to provide PWM signals with different duty cycles for the first switch tube through the independent path to more precisely adjust the energy transfer process. This design of flexible path switching can not only meet different balancing requirements, but also improve the adaptability and operating efficiency of the system in complex scenarios.

[0097] In one embodiment, as Figure 10As shown, in step S302, that is, in the step of generating equal-timing control parameters according to the pressure difference threshold range, the equal-timing control parameters include a first PWM frequency parameter and a second PWM frequency parameter, and the step further includes:

[0098] S3021. Extract the upper limit values in each of the pressure difference threshold ranges; in this embodiment, extracting the upper limit values in each of the pressure difference threshold ranges means that the control module extracts the maximum voltage difference of each range from the pressure difference threshold range through a preset internal balancing strategy, as the basis for subsequent control logic and parameter generation. The pressure difference threshold range is a range used to classify the pressure differences between batteries. For example, for the balancing strategy, the battery pressure differences can be divided into a low pressure difference range, a medium pressure difference range, and a high pressure difference range, and the corresponding upper limit values for each range are 0.05 volts, 0.2 volts, and 0.5 volts respectively. These upper limit values are extracted as the numerical benchmarks for measuring the voltage differences between batteries, facilitating subsequent processing. For example, when the control module detects that the pressure differences of multiple pairs of batteries in the current battery pack are 0.03 volts, 0.18 volts, and 0.4 volts respectively, these values will be mapped to the low pressure difference range, the medium pressure difference range, and the high pressure difference range respectively, and the upper limit value of each range will be extracted as the representative value of the range, corresponding to 0.05 volts, 0.2 volts, and 0.5 volts respectively. The technical effect of this step is that by extracting the upper limit values of the ranges, the control module can quickly convert different pressure difference states into unified numerical references, providing a clear basis for subsequent parameter generation.

[0099] S3022. Determine whether the upper limit values are all the same. If so, generate the corresponding first PWM frequency parameter according to the upper limit values; in this embodiment, determining whether the upper limit values are all the same means that after the control module extracts the upper limit values of all pressure difference ranges, it compares these upper limit values one by one to determine whether they are exactly the same. If all the upper limit values are the same, it indicates that the voltage difference distribution of each pair of batteries in the battery pack is relatively uniform without obvious differences, and the entire system can adopt a unified balancing strategy for processing. In this case, the control module will generate the first PWM frequency parameter based on the same upper limit value, and this parameter is used to control the relevant switch units in the switch management module to perform balancing operations in a unified timing. For example, if all the extracted upper limit values are 0.2 volts, the control module will generate a PWM signal with a frequency of 20 kHz and a duty cycle of 50%, ensuring that all pairs of batteries perform energy transfer operations at the same rhythm. The technical effect of this unified processing method is to simplify the balancing logic, reduce the complexity of the control signal, and at the same time ensure the synchronization and efficiency of the entire battery pack balancing process.

[0100] S3023. If not, determine one or more upper limit values with the highest numerical values among all the upper limit values as the first target value, and generate a corresponding second PWM frequency parameter according to the first target value. In this embodiment, if the upper limit values are inconsistent, determining one or more upper limit values with the highest numerical values among all the upper limit values as the first target value and generating a corresponding second PWM frequency parameter according to the first target value means that when there are differences in the upper limit values of the extracted pressure difference intervals, the control module will preferentially select the upper limit value with the highest numerical value, or select multiple upper limit values with relatively high numerical values as the first target value according to specific requirements, which is used to guide the generation of PWM frequency parameters more suitable for the current state of the battery pack. The design of this logic is based on the principle of preferentially processing high-pressure-difference battery pairs to quickly eliminate the impact of high pressure difference on the overall performance of the battery pack. For example, when the upper limit values of the extracted pressure difference intervals are 0.05 volts, 0.2 volts, and 0.4 volts respectively, the control module will select the highest 0.4 volts as the first target value, and generate a PWM signal with a frequency of 10 kHz and a duty cycle of 70% according to this target value, which is specifically used for the equalization operation of the high-pressure-difference battery pair. In addition, if the system detects that the pressure differences of multiple battery pairs are close to the maximum value (such as two pressure differences are both close to 0.4 volts), the control module can select these relatively high upper limit values as the target values together and allocate preferential equalization resources for them. The second PWM frequency parameter generated in this way can dynamically adjust the frequency and intensity of the equalization operation to quickly reduce the impact of high pressure difference on the battery pack, while avoiding excessive processing of low-pressure-difference battery pairs. The technical effect of this design is that it can significantly improve the equalization efficiency of the system, while protecting the battery from damage caused by excessive equalization operation, thereby extending the service life of the battery pack and optimizing the overall performance.

[0101] In one embodiment, as Figure 11 shown, in step S303, that is, in the step of generating the logic OR gate control parameter according to the pressure difference threshold interval, the logic OR gate control parameter includes a third PWM frequency parameter and a fourth PWM frequency parameter, including

[0102] S3031. Determine the upper limit value of each of the pressure difference threshold intervals; in this embodiment, determining the upper limit value of each of the pressure difference threshold intervals means that the control module extracts the maximum pressure difference value of each interval as the upper limit value through a preset pressure difference threshold interval. These upper limit values are important parameters for defining different interval ranges and can intuitively reflect the pressure difference state between adjacent battery pairs in the battery pack. For example, if the pressure difference threshold intervals are respectively set as a low pressure difference interval, a medium pressure difference interval, and a high pressure difference interval, their upper limit values are 0.05 volts, 0.2 volts, and 0.5 volts respectively. When the control module receives the battery pressure difference signal transmitted by the pressure difference sampling module, it will map these signals to different threshold intervals and extract the upper limit value of each interval as the input parameter for the next step of processing. Through this process, the control module can quickly determine the current pressure difference distribution of the battery pack and provide accurate reference data for the subsequent control logic. The technical effect of this operation is to improve the analysis efficiency of the system for the battery pressure difference and lay a data foundation for the dynamic adjustment of the equalization strategy.

[0103] S3032. Judge whether the upper limit values are all the same. If so, generate corresponding third PWM frequency parameters according to the upper limit values; in this embodiment, judging whether the upper limit values are all the same means that after the control module extracts the upper limit values of each pressure difference interval, it compares these upper limit values one by one to determine whether they are exactly the same. If the upper limit values of all intervals are the same, it means that the voltage difference distribution between adjacent battery pairs in the battery pack is relatively uniform and there is no significant difference. In this case, the equalization operation can adopt a unified logic path and control strategy. The control module will generate third PWM frequency parameters according to these same upper limit values, and this parameter is used to select the common data transmission path in the logic OR gate network. For example, if the extracted upper limit values are all 0.2 volts, the control module will generate a third PWM frequency parameter with a frequency of 15 kHz and a duty cycle of 50% to activate the relevant logic path in the switch conduction unit to ensure that the energy transfer operation of all battery pairs is based on the common data transmission path. The technical effect of this logic design is to simplify the control logic, reduce the complexity of signal distribution, and improve the synchronization and efficiency of the equalization process at the same time.

[0104] S3033. If not, determine the inconsistent upper limit values among all the upper limit values as the second target values, generate corresponding third PWM frequency parameters according to the upper limit values, and generate corresponding fourth PWM frequency parameters according to the second target values. The third PWM frequency parameters are used to make the switch conduction unit select the common data transmission path included in the logic OR gate network, and the fourth PWM frequency parameters are used to make the switch conduction unit select the independent data transmission path included in the logic OR gate network. In this embodiment, if the upper limit values are inconsistent, determining the inconsistent upper limit values among all the upper limit values as the second target values, generating corresponding third PWM frequency parameters according to the upper limit values, and generating corresponding fourth PWM frequency parameters according to the second target values means that when the control module detects differences in the upper limit values of the extracted pressure difference threshold intervals, it will preferentially select these inconsistent upper limit values as target parameters for generating control signals for different paths. In this case, the control module will generate third PWM frequency parameters according to the upper limit values to activate the common data transmission path of the logic OR gate network, and at the same time generate fourth PWM frequency parameters according to the second target values to activate the independent data transmission path of the logic OR gate network. For example, if the extracted upper limit values are 0.05 volts, 0.3 volts, and 0.5 volts respectively, and 0.3 volts and 0.5 volts are inconsistent upper limit values, the control module will generate corresponding control signals respectively. Among them, the third PWM frequency parameters (such as 20 kHz, duty cycle 60%) are used for the equalization of the lower pressure difference range, while the fourth PWM frequency parameters (such as 10 kHz, duty cycle 80%) are used for the energy transfer operation in the high pressure difference range. In specific operations, if it is detected that some battery pairs require stronger equalization operations through the independent data transmission path, the fourth PWM frequency parameters will preferentially activate the independent path in the switch management module. The technical effect of this design is to achieve zonal control of different pressure difference situations in the battery pack, be able to provide more accurate and efficient equalization operations for high pressure difference battery pairs, and at the same time adopt a milder equalization strategy for low pressure difference battery pairs, thereby achieving an overall optimization effect. Through the collaborative work of the third PWM frequency parameters and the fourth PWM frequency parameters, the system can flexibly switch the equalization path, improve the equalization efficiency and extend the service life of the battery pack.

[0105] In one embodiment, as Figure 12 shown, in step S40, that is, in the step of performing the corresponding capacitor energy transfer operation according to the equalization control parameters, the capacitor energy transfer operation is an operation that repeats multiple switching cycles. The switching cycle includes a capacitor storage operation and a capacitor discharge operation, and includes:

[0106] S401. Determine the first state period of the first switch state, the second state period of the second switch state, and the number of switching periods according to the balance control parameter. The first switch state and the second switch state are the conduction states of the switch conduction unit in the switch management module. In this embodiment, determining the first state period of the first switch state, the second state period of the second switch state, and the number of switching periods according to the balance control parameter means that the control module determines the duration of the charging and discharging operations of the capacitor during each energy transfer process and the total number of switching periods required during the entire balancing process according to the pre-generated balance control parameter. The first state period corresponds to the charging time when the capacitor obtains energy from the high-voltage battery, while the second state period corresponds to the discharging time when the capacitor releases energy to the low-voltage battery. The number of switching periods represents the number of charge-discharge cycles that the capacitor needs to complete during the entire balancing operation. For example, when the voltage difference between two batteries is detected to be 0.3 volts, the control module may set the first state period to 10 milliseconds, the second state period to 15 milliseconds, and the total number of switching periods to 100 times according to the balancing strategy for high voltage differences to ensure that the voltage difference gradually decreases to the target range. The technical effect of this operation is that by precisely setting the time of each state period and the total number of periods, it can ensure that the capacitor efficiently transfers energy while avoiding damage to the battery and circuit caused by excessive operation.

[0107] S402. Perform the capacitor storage operation. The capacitor storage operation is to control the switch conduction unit in the switch management module to switch to the first switch state and start timing until the duration specified by the first state period is reached. In this embodiment, performing the capacitor storage operation means that the control module activates a specific switch conduction unit in the switch management module through the drive module, connects both ends of the capacitor to the high-voltage battery, and starts timing to ensure that the capacitor is fully charged within the preset first state period. During the capacitor storage operation, the capacitor obtains charges from the high-voltage battery until the set energy storage time is reached. To ensure the safety and accuracy of the energy storage process, the control module adjusts the duration of the first state period in real time according to the current battery voltage difference and the balancing strategy. For example, when the voltage of the high-voltage battery is 3.7 volts and the voltage of the low-voltage battery is 3.4 volts, the control module may set the first state period to 10 milliseconds to prevent the capacitor from being fully charged too quickly, resulting in excessive transient current or affecting subsequent balancing operations. The technical effect of this process is to ensure that the capacitor efficiently obtains energy during energy storage through precise time control and path selection, while avoiding circuit heat loss and energy waste caused by overcharging.

[0108] S403, if the duration specified by the first state cycle is reached, the capacitor discharge operation is performed, and the capacitor discharge operation is to control the switch conduction unit in the switch management module to switch to the second switch state, and start timing until the duration specified by the second state cycle is reached; in this embodiment, if the duration specified by the first state cycle is reached, the capacitor discharge operation is performed, which means that when the control module detects that the capacitor storage operation reaches the predetermined first state cycle, the switch management module is immediately controlled to switch the state of the switch conduction unit, and the capacitor is switched from the connection state of the high-voltage battery to the state of the connection with the low-voltage battery, thereby starting the discharge operation. During the discharge process, the charge in the capacitor is gradually released to the low-voltage battery, so that its voltage gradually rises, thereby achieving voltage balance between adjacent batteries. The control module will start timing after the discharge operation starts, and strictly control the discharge time according to the preset second state cycle. For example, when the capacitor has been fully charged to 3.6 volts through the previous cycle and the voltage of the low-voltage battery is 3.4 volts, the control module may set the second state cycle to 15 milliseconds to ensure that the energy released by the capacitor can be smoothly transferred to the low-voltage battery until the voltage difference is further reduced to the target range. The technical effect of this process is to avoid battery shock caused by too fast energy release through precise discharge time control and path switching, thereby further protecting the battery and extending its service life.

[0109] S404. If the duration specified for the second state period is reached, the switch management module goes through a switching cycle, records the current cycle count, and determines whether the current cycle count is equal to the switching cycle count. If not, a new switching cycle is executed again. If so, the execution of the new switching cycle is stopped. In this embodiment, if the duration specified for the second state period is reached, the switch management module goes through a switching cycle, records the current cycle count, and determines whether the current cycle count is equal to the switching cycle count. If not, a new switching cycle is executed again. If so, the execution of the new switching cycle is stopped, which means that after each charge and discharge operation is completed, the control module marks the current cycle as a complete switching cycle and updates the executed cycle count. When the total number of switching cycles has not reached the preset value, the control module restarts a new switching cycle and repeats the charge and discharge operations of the capacitor until all the predetermined cycles are completed. For example, if the number of switching cycles set by the control module according to the balancing strategy is 100 times, after the first cycle is completed, the current cycle count will be recorded as 1, and the next capacitor storage operation will be started until all 100 cycles are completed. If the voltage difference has dropped below the target range within 100 cycles, the control module will terminate the operation in advance according to the real-time detection data, thus avoiding unnecessary balancing processes. The technical effect of this process is to ensure that the capacitor energy transfer operation meets the balancing requirements through the dynamic management of the number of switching cycles, avoid unnecessary energy loss caused by excessive cycles, and end the operation in time after balancing is completed, improving the energy utilization efficiency and operation stability of the system.

[0110] The above-described embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit them. Although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. And these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. An active balancing circuit for real-time adjusting battery voltage differences, characterized in that The active equalization circuit for real-time adjustment of battery voltage difference includes a battery pack, a voltage difference sampling module, a control module, a driving module, a switch management module, and multiple transfer capacitors; The battery pack includes multiple battery elements connected in series; The sampling signal input ends of the voltage difference sampling module are respectively connected to the common nodes between every two adjacent battery elements, and the sampling signal output end of the voltage difference sampling module is connected to the sampling signal input end of the control module; The driving signal output end of the control module is connected to the driving signal input end of the driving module; The enabling signal output end of the driving module is connected to the enabling signal input end of the switch management module; Among every two adjacent battery elements, the power output end of one of the battery elements is connected to the first power input end of the switch management module, the first power output end of the switch management module is connected to the first end of the transfer capacitor, the second end of the transfer capacitor is connected to the second power input end of the switch management module, and the second power output end of the switch management module is connected to the power input end of the battery element; The driving signal output end of the control module includes a first driving output port and a second driving output port. The driving module includes a driving chip U3. The first driving signal input end of the driving chip U3 is connected to the first driving output port, the second driving signal input end of the driving chip U3 is connected to the second driving output port, and the first enabling control end and the second enabling control end of the driving chip U3 are respectively connected to the enabling signal input end of the switch management module to control different switch operations of the switch management module; The switch management module includes multiple switch conduction units. Among them, each switch conduction unit corresponds to one battery element. Among every two adjacent battery elements, at least two switch conduction units and one transfer capacitor are involved in energy transfer, namely switch conduction unit A and switch conduction unit B. The switch conduction unit A includes a first MOS transistor A and a second MOS transistor A, and the switch conduction unit B includes a first MOS transistor B and a second MOS transistor B; The first conduction end of the first MOS transistor A is connected to the positive electrode of one of the battery elements, the second conduction end of the first MOS transistor A is connected to the first conduction end of the first MOS transistor B, the second conduction end of the first MOS transistor B is connected to the negative electrode of one of the battery elements, the first conduction end of the second MOS transistor A is connected to the positive electrode of another battery element, the second conduction end of the second MOS transistor A is connected to the first conduction end of the second MOS transistor B, the second conduction end of the second MOS transistor B is connected to the negative electrode of another battery element, the controlled ends of the first MOS transistor A and the second MOS transistor A are both connected to the first enabling control end of the driving chip U3, and the controlled ends of the first MOS transistor B and the second MOS transistor B are both connected to the second enabling control end of the driving chip U3; The common node between the second conduction end of the first MOS transistor A and the first MOS transistor B is connected to the first end of the transfer capacitor, and the common node between the second conduction end of the second MOS transistor A and the second MOS transistor B is connected to the second end of the transfer capacitor; The switch management module further includes an auxiliary control unit. The switch conduction unit corresponding to the last battery element in the battery pack is the switch conduction unit C. The switch conduction unit C includes a first MOS transistor C and a second MOS transistor C. The auxiliary control unit includes a resistor R1, a resistor R2, a resistor 4, a resistor R22, a diode D1, a diode D3, a voltage regulator ZD1, a voltage regulator ZD2, a MOS transistor Q13, and a MOS transistor Q19; The negative terminal of the voltage regulator ZD1 is connected to the first enable control terminal of the drive chip U3. The positive terminal of the voltage regulator ZD1 is connected to the positive terminal of the diode D1. The negative terminal of the diode D1 is connected to the controlled terminal of the first MOS transistor C. A resistor R2 is connected between the common node between the positive terminal of the voltage regulator ZD1 and the positive terminal of the diode D1 and the first conduction end of the second MOS transistor C. A resistor R1 is connected between the common node between the positive terminal of the voltage regulator ZD1 and the positive terminal of the diode D1 and the first conduction end of the second MOS transistor C. The common node between the negative terminal of the diode D1 and the controlled terminal of the first MOS transistor C is connected to the first conduction end of the MOS transistor Q13. The second conduction end of the MOS transistor Q13 is connected to the first conduction end of the second MOS transistor C. The second conduction end of the second MOS transistor C is grounded; The negative terminal of the voltage regulator ZD2 is connected to the second enable control terminal of the drive chip U3. The positive terminal of the voltage regulator ZD2 is connected to the positive terminal of the diode D3. The negative terminal of the diode D3 is connected to the controlled terminal of the second MOS transistor C. A resistor R4 is connected between the common node between the positive terminal of the voltage regulator ZD2 and the positive terminal of the diode D3 and the ground. A resistor R22 is connected between the common node between the positive terminal of the voltage regulator ZD2 and the positive terminal of the diode D3 and the controlled terminal of the MOS transistor Q19. The common node between the negative terminal of the diode D3 and the controlled terminal of the second MOS transistor C is connected to the first conduction end of the MOS transistor Q19. The second conduction end of the MOS transistor Q19 is grounded.

2. The active balancing circuit for real-time adjusting battery voltage difference according to claim 1, wherein The sampling signal input end of the control module includes a plurality of sampling input ports. The differential pressure sampling module includes a plurality of differential pressure sampling units. Each differential pressure sampling unit includes a first voltage-dividing resistor and a second voltage-dividing resistor. The common node between two adjacent battery elements is connected to the first end of the first voltage-dividing resistor. The second end of the first voltage-dividing resistor is connected to the first end of the second voltage-dividing resistor. The second end of the second voltage-dividing resistor is grounded. The common node between the second end of the first voltage-dividing resistor and the first end of the second voltage-dividing resistor is connected to the sampling input port.

3. An active equalization method for real-time adjustment of battery voltage differences, characterized in that Applied to an active balancing circuit for real-time adjusting battery differential pressure as described in any one of claims 1-2, the method for real-time adjusting battery differential pressure includes: Obtaining battery differential pressure data, where the battery differential pressure data is the voltage difference between two adjacent battery elements; Matching a corresponding differential pressure threshold interval according to the battery differential pressure data; Generating corresponding balance control parameters according to the differential pressure threshold interval; Performing corresponding capacitor energy transfer operations according to the balance control parameters.

4. The active balancing method for real-time adjusting battery voltage difference according to claim 3, wherein In the step of generating corresponding balance control parameters according to the differential pressure threshold interval, the balance control parameters include an equal-timing control parameter and a logical OR gate control parameter. The step further includes: Obtaining the unit type data of the switch conduction unit in the switch management module; If the unit type data is a single switch element, generating an equal-timing control parameter according to the differential pressure threshold interval; If the unit type data is a packaged aggregate composed of multiple switch elements and at least forming a logical OR gate network, generating a logical OR gate control parameter according to the differential pressure threshold interval.

5. The active balancing method for real-time adjusting battery voltage difference according to claim 4, characterized in that In the step of generating an equal-timing control parameter according to the differential pressure threshold interval, the equal-timing control parameter includes a first PWM frequency parameter and a second PWM frequency parameter. The step further includes: Extracting the upper limit values in each differential pressure threshold interval; Judging whether the upper limit values are all the same. If so, generating a corresponding first PWM frequency parameter according to the upper limit value; If not, determining one or more of the upper limit values with the highest numerical value as the first target value among the upper limit values, and generating a corresponding second PWM frequency parameter according to the first target value.

6. The active balancing method for real-time adjusting battery voltage difference according to claim 4, characterized in that In the step of generating a logical OR gate control parameter according to the differential pressure threshold interval, the logical OR gate control parameter includes a third PWM frequency parameter and a fourth PWM frequency parameter, including Determining the upper limit values of each differential pressure threshold interval; Judging whether the upper limit values are all the same. If so, generating a corresponding third PWM frequency parameter according to the upper limit value; Otherwise, determine the inconsistent upper limit values among the upper limit values as the second target values, generate corresponding third PWM frequency parameters according to the upper limit values, and generate corresponding fourth PWM frequency parameters according to the second target values. The third PWM frequency parameters are used to cause the switch conduction unit to select the common data transmission path included in the logic OR gate network, and the fourth PWM frequency parameters are used to cause the switch conduction unit to select the independent data transmission path included in the logic OR gate network.

7. The active balancing method for real-time adjusting battery voltage difference according to claim 3, characterized in that In the step of performing the corresponding capacitor energy transfer operation according to the equalization control parameter, the capacitor energy transfer operation is an operation that repeatedly executes multiple switching cycles. The switching cycle includes a capacitor storage operation and a capacitor discharge operation, and includes: According to the equalization control parameter, determine the first state period of the first switch state, the second state period of the second switch state, and the number of switching cycles. The first switch state and the second switch state are the conduction states of the switch conduction unit in the switch management module; Perform the capacitor storage operation, which is to control the switch conduction unit in the switch management module to switch to the first switch state and start timing until the duration specified by the first state period is reached; If the duration specified by the first state period is reached, perform the capacitor discharge operation, which is to control the switch conduction unit in the switch management module to switch to the second switch state and start timing until the duration specified by the second state period is reached; If the duration specified by the second state period is reached, the switch management module goes through one switching cycle, records the current cycle number, and determines whether the current cycle number is equal to the number of switching cycles. If not, execute a new switching cycle again. If so, stop executing the new switching cycle.

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