PWM (Pulse Width Modulation) method, electronic equipment and storage medium

Abstract

The invention discloses a PWM (Pulse Width Modulation) method, electronic equipment and a storage medium. The method comprises the following steps: carrying out per-unit processing and anti-Clark transformation processing on a voltage under a two-phase static coordinate system to obtain a three-phase voltage; selecting at least one of a plurality of PWM modulation modes according to the three-phase voltage, and obtaining a zero sequence signal according to the selected PWM modulation mode; and determining the duty ratio of the control signal according to the three-phase voltage and the zero sequence signal. According to the technical scheme provided by the invention, a set of multiple PWM modulation modes can be realized, the most suitable modulation method is flexibly selected according to specific application requirements, and the modulation convenience is improved, so that the modulation efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of motor PWM modulation, and in particular to a PWM modulation method, electronic equipment and storage medium. Background Art

[0002] At present, the degree of electrification is getting deeper and deeper. As actuators, motors play an increasingly important role in various fields. The control of motors depends on PWM modulation technology, and different PWM modulation methods are suitable for different working occasions and needs. PWM modulation methods mainly include SPWM, SVPWM, DPWM, and random PWM. Different modulation methods require separate design and debugging of circuits, which increases the complexity of design and debugging and has low efficiency. Summary of the invention

[0003] The present invention provides a PWM modulation method, electronic equipment and storage medium, which can realize various space vector PWM modulations.

[0004] According to one aspect of the present invention, there is provided a PWM modulation method, comprising:

[0005] The voltage in the two-phase stationary coordinate system is normalized and inverse Clarke transformed to obtain the three-phase voltage;

[0006] Selecting at least one from a plurality of PWM modulation modes according to the three-phase voltage, and obtaining a zero-sequence signal according to the selected PWM modulation mode;

[0007] The duty cycle of the control signal is determined according to the three-phase voltage and the zero-sequence signal.

[0008] Optionally, at least one is selected from a plurality of PWM modulation modes according to the three-phase voltage, including:

[0009] Select a modulation mode from SPWM, SVPWM, Random PWM, DPWMmin, DPWMmax, DPWM0, DPWM1, DPWM2, and DPWM3.

[0010] Optionally, obtaining a zero-sequence signal according to a selected PWM modulation method includes:

[0011] For SPWM, SVPWM, random PWM, DPWMmin, and DPWMmax modulation modes, the obtained zero-sequence signals Vz are:

[0012]

[0013] Among them, Max(Vabc) and Min(Vabc) represent the maximum value and minimum value of the three-phase voltage respectively.

[0014] Optionally, obtaining a zero-sequence signal according to a selected PWM modulation method includes:

[0015] For DPWM0 and DPWM1 modulation modes, the zero-sequence signals Vz obtained are:

[0016]

[0017] Among them, s is the sector of the voltage space vector diagram in the following formula, θ is the vector angle of voltage, s=1: θ∈[0, pi / 3]; s=2: θ∈[pi / 3, 2*pi / 3]; s=3: θ∈[2*pi / 3, pi]; s=4: θ∈[pi, 4*pi / 3]; s=5: θ∈[4*pi / 3, 5*pi / 3]; s=6: θ∈[5*pi / 3, 2*pi].

[0018] Optionally, obtaining a zero-sequence signal according to a selected PWM modulation method includes:

[0019] For DPWM2 and DPWM3 modulation modes, the obtained zero-sequence signals Vz are:

[0020]

[0021] Among them, k is the sector corresponding to the voltage space vector diagram, θ is the vector angle of voltage, k=1: θ∈[-pi / 6, pi / 6]; k=2: θ∈[pi / 6, pi / 2]; k=3: θ∈[pi / 2, 5*pi / 6]; k=4: θ∈[5*pi / 6, 7*pi / 6]; k=5: θ∈[7*pi / 6, 3*pi / 2]; k=6: θ∈[3*pi / 2, 11*pi / 6].

[0022] Optionally, determining a duty cycle of a control signal according to the three-phase voltage and the zero-sequence signal includes:

[0023] The three-phase voltage, zero-sequence signal and 0.5 are added and the duty cycle of the control signal is obtained by limiting.

[0024] Optionally, the duty cycle is obtained by the following calculation method:

[0025] Duty_abc=Sat[0.5+Vabc+Vz];

[0026] Among them, Duty_abc is the three-phase duty cycle, Sat function means limiting the maximum and minimum duty cycles to the interval [0, 1], Vabc is the three-phase voltage, and Vz is the zero-sequence signal.

[0027] Optionally, the voltages of the two-phase stationary coordinate system are normalized, including:

[0028] The voltage in the two-phase stationary coordinate system is compared with the bus voltage to obtain a normalized voltage.

[0029] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0030] at least one processor; and

[0031] a memory communicatively connected to the at least one processor; wherein,

[0032] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the PWM modulation method described in any embodiment of the present invention.

[0033] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the PWM modulation method described in any embodiment of the present invention when executed.

[0034] The technical solution of the embodiment of the present invention obtains the three-phase voltage by normalizing and inverse Clarke transforming the voltage in the two-phase stationary coordinate system, selects at least one from a plurality of PWM modulation modes according to the three-phase voltage, obtains the zero-sequence signal according to the selected PWM modulation mode, and determines the duty cycle of the control signal according to the three-phase voltage and the zero-sequence signal, which helps to understand the voltage utilization rate. The technical solution of the embodiment of the present invention can realize a collection of a plurality of PWM modulation modes, flexibly select the most suitable modulation method according to specific application requirements, improve the convenience of modulation, and thus improve the modulation efficiency.

[0035] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 is a flow chart of a PWM modulation method provided according to an embodiment of the present invention;

[0038] Figure 2 A voltage space vector diagram provided according to an embodiment of the present invention;

[0039] Figure 3 is a logic block diagram of a PWM modulation method provided according to an embodiment of the present invention;

[0040] Figure 4 It is a structural schematic diagram of an electronic device for implementing the PWM modulation method of an embodiment of the present invention. DETAILED DESCRIPTION

[0041] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0042] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0043] Figure 1 A flowchart of a PWM modulation method is provided for an embodiment of the present invention. This embodiment is applicable to motor control. The method can be executed by a PWM modulation device. The device can be implemented in the form of hardware and / or software. The device can be configured in the motor. Figure 1 As shown, the method includes:

[0044] S101, performing normalization and inverse Clarke transformation on the voltage in the two-phase stationary coordinate system to obtain the three-phase voltage.

[0045] Among them, the two-phase stationary coordinate system usually refers to the αβ coordinate system, in which the α axis leads the β axis by 90°, and the α axis coincides with the A phase (or any one phase) in the three-phase system. Per-unit normalization is a unit standardization method that obtains the per-unit value by dividing the actual physical quantity by a reference value. The inverse Clarke transform is the process of converting the two-phase stationary coordinate system (αβ coordinate system) back to the three-phase coordinate system (abc coordinate system). Specifically, the voltage in the two-phase stationary coordinate system can be obtained by field-oriented control (FOC). Per-unit normalization can be the voltage of the two-phase stationary coordinate system divided by the bus voltage, and the per-unit voltage is converted into the three-phase voltage through the inverse Clarke transform. FOC includes Clark, Park, current loop, inverse Park, SVPWM, etc., which can be a combination of one or more of these methods.

[0046] S102: selecting at least one from a plurality of PWM modulation modes according to the three-phase voltage, and obtaining a zero-sequence signal according to the selected PWM modulation mode.

[0047] Among them, the various PWM modulation modes include SPWM, SVPWM, random PWM, DPWMmin, DPWMmax, DPWM0, DPWM1, DPWM2, and DPWM3. SPWM (Sine-wave Pulse Width Modulation) determines the length of the pulse width by comparing the phase difference between the reference signal and the triangular wave signal, thereby controlling the shape of the output waveform. SVPWM (Space Vector Pulse Width Modulation) can be regarded as a modulation of a triangular wave and a sine fundamental wave with a certain third harmonic content. Random PWM (Random Pulse Width Modulation) introduces randomness in the modulation process to reduce electromagnetic interference (EMI) and reduce noise. DPWMmin (minimum discontinuous pulse width modulation), DPWMmax (maximum discontinuous pulse width modulation), DPWM0 (discontinuous pulse width modulation 0), DPWM1 (discontinuous pulse width modulation 1), DPWM2 (discontinuous pulse width modulation 2), and DPWM3 (discontinuous pulse width modulation 3) are all developed on the basis of DPWM (discontinuous pulse width modulation). DPWMmin aims to minimize switching losses. DPWMmax (maximum discontinuous pulse width modulation) aims to minimize switching losses. DPWM0 uses a specific zero vector in each PWM cycle so that the switch tube of one phase remains inactive throughout the cycle, thereby reducing switching losses. The clamping moment of DPWM1 is different from that of DPWM0 and is suitable for different power factor conditions. The clamping moment of DPWM2 is different from both DPWM1 and DPWM0 and is suitable for specific operating conditions to optimize switching losses and performance. The clamping and switching strategies of DPWM3 are different from other modes and are optimized according to specific application scenarios and power factor conditions. Zero-sequence signal refers to the result of adding the signals of the three phases in a three-phase power system. Specifically, an adjustment method is selected according to a PWM modulation method suitable for the three-phase voltage to obtain a zero-sequence signal.

[0048] S103. Determine the duty cycle of the control signal according to the three-phase voltage and the zero-sequence signal.

[0049] The duty cycle of the control signal refers to the ratio of the high-level duration of the pulse signal to the total duration of the entire pulse cycle. Calculating the three-phase duty cycle helps to understand the voltage utilization and thus optimize system performance.

[0050] The technical solution of the embodiment of the present invention obtains the three-phase voltage by normalizing and inverse Clarke transforming the voltage in the two-phase stationary coordinate system, selects at least one from a plurality of PWM modulation modes according to the three-phase voltage, obtains the zero-sequence signal according to the selected PWM modulation mode, and determines the duty cycle of the control signal according to the three-phase voltage and the zero-sequence signal, which helps to understand the voltage utilization rate. The technical solution of the embodiment of the present invention can realize a collection of a plurality of PWM modulation modes, flexibly select the most suitable modulation method according to specific application requirements, improve the convenience of modulation, and thus improve the modulation efficiency.

[0051] In some optional embodiments of the present invention, at least one is selected from a plurality of PWM modulation modes according to the three-phase voltage, including:

[0052] Select a modulation mode from SPWM, SVPWM, Random PWM, DPWMmin, DPWMmax, DPWM0, DPWM1, DPWM2, and DPWM3.

[0053] Among them, the selection of adjustment mode needs to consider the application scenario, system performance requirements and hardware capabilities. SPWM is suitable for occasions where analog sine wave output is required, such as motor control and power conversion. SVPWM is suitable for high-performance motor control, especially in occasions requiring high dynamic response and high voltage utilization. Random PWM is suitable for occasions where electromagnetic interference (EMI) and noise need to be reduced. DPWMmin, DPWMmax, DPWM0, DPWM1, DPWM2, and DPWM3 are suitable for occasions where switching losses are reduced and efficiency is improved, especially in medium and high voltage inverters.

[0054] In some optional embodiments of the present invention, obtaining a zero-sequence signal according to a selected PWM modulation mode includes:

[0055] For SPWM, SVPWM, random PWM, DPWMmin, and DPWMmax modulation modes, the zero-sequence signals Vz obtained are:

[0056]

[0057] Among them, Max(Vabc) and Min(Vabc) represent the maximum value and minimum value of the three-phase voltage respectively.

[0058] In some optional embodiments of the present invention, obtaining a zero-sequence signal according to a selected PWM modulation mode includes:

[0059] For the DPWM0 and DPWM1 modulation modes, the zero-sequence signals Vz are obtained respectively.

[0060]

[0061] Among them, s is the sector of the voltage space vector diagram, θ is the vector angle of the voltage, s=1: θ∈[0, pi / 3]; s=2: θ∈[pi / 3, 2*pi / 3]; s=3: θ∈[2*pi / 3, pi]; s=4: θ∈[pi, 4*pi / 3]; s=5: θ∈[4*pi / 3, 5*pi / 3]; s=6: θ∈[5*pi / 3, 2*pi].

[0062] Figure 2 It is a voltage space vector diagram provided according to an embodiment of the present invention. In a three-phase power system, a space vector refers to a vector representation of three-phase symmetrical voltage and current, which are 120° apart in the complex plane. These vectors have both magnitude and direction. The sectors of the voltage space vector diagram refer to dividing the position of the voltage vector in space into different areas to facilitate the control of the switching state of the inverter and achieve precise control of the motor voltage. The voltage space vector diagram is usually divided into six sectors. Figure 2 As shown, s is the sector of the voltage space vector diagram, θ is the vector angle of the voltage, s=1: θ∈[0, pi / 3]; s=2: θ∈[pi / 3, 2*pi / 3]; s=3: θ∈[2*pi / 3, pi]; s=4: θ∈[pi, 4*pi / 3]; s=5: θ∈[4*pi / 3, 5*pi / 3]; s=6: θ∈[5*pi / 3, 2*pi].

[0063] In some optional embodiments of the present invention, obtaining a zero-sequence signal according to a selected PWM modulation mode includes:

[0064] For DPWM2 and DPWM3 modulation modes, the obtained zero-sequence signals Vz are:

[0065]

[0066] Among them, k is the sector corresponding to the voltage space vector diagram, θ is the vector angle of voltage, k=1: θ∈[-pi / 6, pi / 6]; k=2: θ∈[pi / 6, pi / 2]; k=3: θ∈[pi / 2, 5*pi / 6]; k=4: θ∈[5*pi / 6, 7*pi / 6]; k=5: θ∈[7*pi / 6, 3*pi / 2]; k=6: θ∈[3*pi / 2, 11*pi / 6].

[0067] Continue to refer Figure 2, where U1(100), U2(110), U3(010), U4(011), U5(001), and U6(101) represent the basic voltage vector. The three-phase power system has 6 IGBT (Insulated Gate Bipolar Transistor) switches, each of which has two states: on and off. The upper and lower IGBTs of each bridge arm cannot be turned on at the same time. The state where the upper bridge arm is turned on and the lower bridge arm is turned off is defined as 1, otherwise it is 0. The conduction of each bridge arm does not affect each other, so there are 8 switch states in total. The binary number formed by arranging the conduction states of phases ABC in sequence represents the corresponding space voltage vector: U0(000), U1(001), U2(010), U3(011), U4(100), U5(101), U6(110), and U7(111). Among them, U0 and U7 are zero voltage vectors with arbitrary directions.

[0068] In some optional embodiments of the present invention, determining the duty cycle of the control signal according to the three-phase voltage and the zero-sequence signal includes:

[0069] The three-phase voltage, zero-sequence signal and 0.5 are added and the duty cycle of the control signal is obtained by limiting.

[0070] The duty cycle is calculated as follows:

[0071] Duty_abc=Sat[0.5+Vabc+Vz];

[0072] Among them, Duty_abc is the three-phase duty cycle, Sat function means limiting the maximum and minimum duty cycles to the interval [0, 1], Vabc is the three-phase voltage, and Vz is the zero-sequence signal.

[0073] In some optional embodiments of the present invention, the voltage in the two-phase stationary coordinate system is normalized, including:

[0074] Compare the voltage of the two-phase stationary coordinate system with the bus voltage to obtain the normalized voltage.

[0075] The bus voltage refers to the voltage on the main power line used to transmit electric energy. The normalized voltage is obtained by dividing the voltage in the two-phase stationary coordinate system by the bus voltage.

[0076] Figure 3 A logic block diagram of a PWM modulation method provided by an embodiment of the present invention. The voltage u in the two-phase stationary coordinate system is obtained through FOC α and u β , after normalization, that is, u α and u β Divide by Udc to get the normalized voltage uα 'and u β ', normalized voltage u α 'and u β 'After inverse Clarke transformation, it is converted into a three-phase voltage Vabc. The three-phase voltage Vabc is given to the duty cycle calculation and zero-sequence signal selection at the same time. The zero-sequence signal selection can select a suitable PWM modulation method to obtain the zero-sequence signal Vz. The duty cycle calculation module obtains the three-phase duty cycle Duty_abc according to the formula Duty_abc=Sat[0.5+Vabc+Vz].

[0077] Figure 4 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0078] like Figure 4 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0079] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0080] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as a PWM modulation method.

[0081] In some embodiments, the PWM modulation method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the PWM modulation method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the PWM modulation method in any other appropriate manner (e.g., by means of firmware).

[0082] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0083] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0084] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0085] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0086] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0087] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0088] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0089] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A PWM modulation method, characterized in that: include: The voltage in the two-phase stationary coordinate system is normalized and inverse Clarke transformed to obtain the three-phase voltage; Selecting at least one from a plurality of PWM modulation modes according to the three-phase voltage, and obtaining a zero-sequence signal according to the selected PWM modulation mode; The duty cycle of the control signal is determined according to the three-phase voltage and the zero-sequence signal.

2. The method according to claim 1, characterized in that At least one is selected from a plurality of PWM modulation modes according to the three-phase voltage, including: Select a modulation mode from SPWM, SVPWM, Random PWM, DPWMmin, DPWMmax, DPWM0, DPWM1, DPWM2, and DPWM3.

3. The method according to claim 2, characterized in that The zero-sequence signal is obtained according to the selected PWM modulation method, including: For SPWM, SVPWM, random PWM, DPWMmin, and DPWMmax modulation modes, the obtained zero-sequence signals Vz are: Among them, Max(Vabc) and Min(Vabc) represent the maximum value and minimum value of the three-phase voltage respectively.

4. The method according to claim 2, characterized in that: The zero-sequence signal is obtained according to the selected PWM modulation method, including: For DPWM0 and DPWM1 modulation modes, the zero-sequence signals Vz obtained are: DPWM0: Vz=(λ-0.5)-λ*Max(Vabc)-(1-λ)*Min(Vabc); λ=0(s=1 / 3 / 5), λ=1(s=2 / 4 / 6) DPWM1: Vz=(λ-0.5)-λ*Max(Vabc)-(1-λ)*Min(Vabc); λ=1(s=1 / 3 / 5), λ=0(s=2 / 4 / 6); Among them, Max(Vabc) and Min(Vabc) represent the maximum and minimum values ​​of the three-phase voltage respectively, s is the sector of the voltage space vector diagram in the figure below, θ is the vector angle of the voltage, s=1: θ∈[0,pi / 3]; s=2: θ∈[pi / 3,2*pi / 3]; s=3: θ∈[2*pi / 3,pi]; s=4: θ∈[pi,4*pi / 3]; s=5: θ∈[4*pi / 3,5*pi / 3]; s=6: θ∈[5*pi / 3,2*pi].

5. The method according to claim 2, characterized in that: The zero-sequence signal is obtained according to the selected PWM modulation method, including: For DPWM2 and DPWM3 modulation modes, the zero-sequence signals Vz obtained are: Among them, Max(Vabc) and Min(Vabc) represent the maximum and minimum values ​​of the three-phase voltage respectively, k is the sector corresponding to the voltage space vector diagram, θ is the vector angle of the voltage, k=1: θ∈[-pi / 6, pi / 6]; k=2: θ∈[pi / 6, pi / 2]; k=3: θ∈[pi / 2, 5*pi / 6]; k=4: θ∈[5*pi / 6, 7*pi / 6]; k=5: θ∈[7*pi / 6, 3*pi / 2]; k=6: θ∈[3*pi / 2, 11*pi / 6].

6. The method according to claim 1, characterized in that Determining a duty cycle of a control signal according to the three-phase voltage and the zero-sequence signal comprises: The three-phase voltage, zero-sequence signal and 0.5 are added and the duty cycle of the control signal is obtained by limiting.

7. The method according to claim 6, characterized in that The duty cycle is obtained by the following calculation method: Duty_abc=Sat[0.5+Vabc+Vz]; Among them, Duty_abc is the three-phase duty cycle, Sat function means limiting the maximum and minimum duty cycles to the interval [0, 1], Vabc is the three-phase voltage, and Vz is the zero-sequence signal.

8. The method according to claim 1, characterized in that: The voltage in the two-phase stationary coordinate system is normalized, including: The voltage in the two-phase stationary coordinate system is compared with the bus voltage to obtain a normalized voltage.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor. The computer program is executed by the at least one processor so that the at least one processor can perform the PWM modulation method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the PWM modulation method according to any one of claims 1 to 8 when executed.

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