Semiconductor device and method for manufacturing the same

Abstract

The present application discloses a semiconductor device and a method for preparing the same, and belongs to the field of semiconductor technology. The semiconductor device comprises: a semiconductor body, a first electrode, a second electrode, and a first ferroelectric material layer, and / or a second ferroelectric material layer. The first electrode is arranged on the first surface of the semiconductor body, the second electrode is arranged on the second surface of the semiconductor body, the first ferroelectric material layer is arranged on the side of the first electrode away from the semiconductor body, and / or the second ferroelectric material layer is arranged on the side of the second electrode away from the semiconductor body. The technical solution disclosed in the present application optimizes the device structure, thereby increasing the switching speed of the device and reducing power consumption.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and in particular relates to a semiconductor device and a method for preparing the same, as well as a power module, a power conversion circuit and a vehicle. Background Art

[0002] In the field of semiconductor technology, the junction barrier Schottky diode (JBS) is based on the Schottky diode and adds a PN junction structure. It can not only take advantage of the high breakdown voltage, high current density and high heat dissipation of Schottky diode devices, but also effectively reduce leakage current and improve device reliability. However, the introduction of the PN junction will also increase the forward on-resistance to a certain extent, affecting the switching speed and power consumption of the device. Therefore, how to optimize the device structure to increase the switching speed and reduce power consumption is a problem that needs to be solved. Summary of the invention

[0003] The embodiments of the present application provide a semiconductor device and a method for preparing the same, as well as a power module, a power conversion circuit and a vehicle, which optimize the device structure, thereby increasing the switching speed of the device and reducing power consumption.

[0004] In one aspect, an embodiment of the present application provides a semiconductor device, including:

[0005] Semiconductor body;

[0006] A first electrode is disposed on the first surface of the semiconductor body;

[0007] A second electrode is disposed on the second surface of the semiconductor body;

[0008] The first ferroelectric material layer is arranged on a side of the first electrode away from the semiconductor body, and / or the second ferroelectric material layer is arranged on a side of the second electrode away from the first electrode.

[0009] In some embodiments, at least one via hole is further included, located in the first ferroelectric material layer and / or the second ferroelectric material layer, and a conductive material is disposed in the via hole.

[0010] In some embodiments, the semiconductor body comprises:

[0011] A first epitaxial layer, wherein the first epitaxial layer is of a first conductivity type;

[0012] A substrate thinning layer, arranged between the first epitaxial layer and the second electrode;

[0013] A well region, disposed between the first epitaxial layer and the first electrode, the well region being of the second conductivity type;

[0014] The first region is arranged in the spacing region formed by the well region, and the first region conducts the first electrode and the first epitaxial layer, and the first region is of the first conductivity type.

[0015] In some embodiments, the thickness of the substrate thinning layer is 200-500 nm.

[0016] The technical solution provided by the embodiment of the present application, wherein the semiconductor device includes a first ferroelectric material layer formed on a side of the first electrode away from the semiconductor body, and / or a second ferroelectric material layer formed on a side of the second electrode away from the first electrode. On the one hand, the ferroelectric material can be used as a fast charge storage medium, which helps to improve the response speed of the semiconductor and reduce the power consumption of the semiconductor; on the other hand, the ferroelectric material layer can provide additional electric field distribution, which helps to protect the semiconductor from overvoltage and thermal stress, thereby improving the reliability and stability of the long-term operation of the semiconductor.

[0017] In a second aspect, an embodiment of the present application further provides a method for preparing a semiconductor device, comprising:

[0018] forming a semiconductor body, the semiconductor body comprising a first surface and a second surface disposed opposite to each other;

[0019] A first electrode is formed on the first surface of the semiconductor body, and a second electrode is formed on the second surface of the semiconductor body, and a first ferroelectric material layer is formed on the side of the first electrode away from the semiconductor body, and / or a second ferroelectric material layer is formed on the side of the second electrode away from the semiconductor body.

[0020] In some embodiments, forming the semiconductor body includes:

[0021] providing a substrate;

[0022] Forming a first epitaxial layer on the surface of the substrate; forming a well region and a first region on a side of the first epitaxial layer away from the substrate, wherein the first region is located between adjacent well regions;

[0023] Thinning the substrate to form a substrate thinning layer;

[0024] The substrate, the first epitaxial layer and the first region are of the first conductivity type, and the well region is of the second conductivity type.

[0025] In some embodiments, the thickness of the substrate thinning layer is in the range of 200-500 nm.

[0026] The technical solution provided in the embodiment of the present application thins the heavily doped substrate of the diode and forms an ohmic contact, so that the on-resistance of the device is lower, thereby reducing the forward conduction voltage drop, improving the conduction efficiency of the device, reducing conduction losses, and improving the transient response speed of the device.

[0027] In some embodiments, before the substrate is thinned, the method further comprises:

[0028] A protection layer is formed on a side of the well region and the first region away from the first epitaxial layer.

[0029] In some embodiments, the semiconductor device further comprises: forming at least one via hole in the first ferroelectric material layer and / or the second ferroelectric material layer;

[0030] A conductive material is disposed in the via hole.

[0031] In the preparation method provided in the embodiment of the present application, in the process of forming a semiconductor device, a first ferroelectric material layer is formed on the side of the first electrode away from the semiconductor body, and / or a second ferroelectric material layer is formed on the side of the second electrode away from the first electrode. On the one hand, the ferroelectric material can be used as a fast charge storage medium, which helps to improve the response speed of the semiconductor and reduce the power consumption of the semiconductor; on the other hand, the ferroelectric material layer can provide additional electric field distribution, which helps to protect the semiconductor from overvoltage and thermal stress, thereby improving the reliability and stability of the long-term operation of the semiconductor.

[0032] In a third aspect, a power module is provided. The power module includes a substrate and a semiconductor device as described in any one of the above embodiments. The substrate is used to carry the semiconductor device.

[0033] In a fourth aspect, a power conversion circuit is provided, which is used for one or more of current conversion, voltage conversion, and power factor correction. The power conversion circuit includes a circuit board and a semiconductor device as described in any of the above embodiments, and the semiconductor device is electrically connected to the circuit board.

[0034] In a fifth aspect, a vehicle is provided, which includes a load and a power conversion circuit as described in the above embodiment, wherein the power conversion circuit is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power and then input it into the load.

[0035] The above-mentioned power module, power conversion circuit and vehicle have the same structure and beneficial technical effects as the silicon carbide semiconductor devices provided in some of the above-mentioned embodiments, which will not be repeated here.

[0036] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0038] Figure 1 A schematic diagram of the structure of a semiconductor device provided in an embodiment of the present application;

[0039] Figure 2 A schematic diagram of a process for preparing a semiconductor device provided in an embodiment of the present application;

[0040] Figure 3 A schematic flow chart of another method for preparing a semiconductor device provided in an embodiment of the present application;

[0041] Figure 4~Figure 14 It is a schematic diagram of the structure corresponding to each step of preparing a semiconductor device in an embodiment of the present application;

[0042] Fig.15 A schematic diagram of the structure of a power module provided in an embodiment of the present application;

[0043] Fig.16 A schematic diagram of a power conversion circuit provided in an embodiment of the present application;

[0044] Fig.17 A schematic diagram of the structure of a vehicle provided in an embodiment of the present application. DETAILED DESCRIPTION

[0045] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0046] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0047] In the description of the present application, “plurality” means two or more.

[0048] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0049] The present application embodiment provides a semiconductor device, Figure 1 A schematic diagram of the structure of a semiconductor device provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, the semiconductor device includes a semiconductor body 101, a first electrode 102, a second electrode 103, a first ferroelectric material layer 104 and / or a second ferroelectric material layer 105. The first electrode 102 is arranged on the first surface P1, the second electrode 103 is arranged on the second surface P2, the first ferroelectric material layer 104 is arranged on a side of the first electrode 102 away from the semiconductor body 101, and the second ferroelectric material layer 105 is arranged on a side of the second electrode 103 away from the first electrode 102.

[0050] In an embodiment of the present application, the semiconductor body includes a first epitaxial layer 108, a first region 106, a well region 107, and a substrate thinning layer 113. The well region 107 and the first epitaxial layer 108 are type layers composed of different ion types. Exemplarily, the first epitaxial layer 108 may be an N-type layer, and the well region 107 may be a P-type layer, so that a PN junction is formed in the contact area between the first epitaxial layer 108 and the well region 107.

[0051] The first region 106 is disposed in a spacing region formed by the well region 107 , and conducts electricity between the first electrode 102 and the first epitaxial layer 108 .

[0052] The technical solution in the embodiment of the present application enables the first electrode 102 and the second electrode 103 to be externally connected by providing the first ferroelectric material layer 104 and the second ferroelectric material layer 105. Among them, the ferroelectric material can be used as a fast charge storage medium, which helps to improve the response speed of the semiconductor. The ferroelectric material layer can provide additional electric field distribution, which helps to protect the semiconductor from overvoltage and thermal stress, and improve the reliability and stability of long-term operation.

[0053] In some embodiments, at least one via hole 110 may be formed in the first ferroelectric material layer 104 and / or the second ferroelectric material layer 105 , and a conductive material is disposed in the via hole 110 .

[0054] In some embodiments, between the first epitaxial layer 108 and the second electrode 103 is a substrate thinning layer 113, which is obtained by thinning the substrate 111, and the thickness of the substrate thinning layer 113 is 200-500nm. Wherein, the substrate 111 is a heavily doped substrate and is of the first conductivity type, and its ion concentration is greater than the ion concentration of the first epitaxial layer 108. In this embodiment, by replacing the substrate 111 with the substrate thinning layer 113, and the substrate thinning layer 113 forms an ohmic contact with the second electrode 103, the forward conduction resistance is reduced, thereby reducing the forward conduction voltage drop, improving the conduction efficiency of the device, reducing the conduction loss, and improving the transient response speed of the device.

[0055] In some embodiments, the well region 107 is obtained by epitaxial growth on the first epitaxial layer 108. This epitaxial technology can avoid device damage caused by multiple ion implantations in the process, reduce the possibility of device defects, improve device electrical properties, and enhance device reliability.

[0056] The present application also provides a method for preparing a semiconductor device, by which the above-mentioned Figure 1 The semiconductor device in the illustrated embodiment. Figure 2 A schematic diagram of a method for preparing a semiconductor device provided in an embodiment of the present application, wherein the specific structure can be referred to Figure 1 As shown, Figure 2 As shown, the preparation method comprises the following steps:

[0057] Step 201: forming a semiconductor body 101, wherein the semiconductor body 101 includes a first surface P1 and a second surface P2 arranged opposite to each other;

[0058] Exemplarily, the semiconductor body includes: a substrate 111, a first epitaxial layer 108, a well region 107, a first region 106, and a first surface P1 and a second surface P2 arranged opposite to each other; wherein the substrate 111 may be a silicon carbide substrate, and is heavily doped, and a first epitaxial layer 108 of the same ion type as the first epitaxial layer 108 is formed on the substrate 111 by chemical vapor deposition, and the ion type may be N-type, and the ion concentration of the substrate 111 is greater than the ion concentration of the first epitaxial layer 108. A first region 106 of the same ion type as the first epitaxial layer 108 may be formed on the substrate 111 by chemical vapor deposition, and the ion type may be N-type, wherein the first region 106 only covers a part of the first epitaxial layer 108 and is located in the center, and then the well region 107 is deposited on both sides of the first region 106 to form the well region, and the ion type may be P-type; wherein the first region 106 and the well region 107 are formed in no particular order.

[0059] Step 202: forming a first electrode 102 on a first surface P1 of a semiconductor body;

[0060] Exemplarily, the first electrode 102 is formed by sputtering on a side of the first surface P1 away from the semiconductor body 101 . The material of the first electrode 102 is generally a metal material including nickel, titanium, and aluminum.

[0061] Step 203: forming a second electrode 103 on the second surface P2 of the semiconductor body;

[0062] Exemplarily, the second electrode 103 is formed on a side of the second surface P2 away from the first epitaxial layer 108 by sputtering. The material of the second electrode 103 is generally a metal material including nickel, titanium, and aluminum.

[0063] Step 204: forming a first ferroelectric material layer 104 on a side of the first electrode 102 away from the semiconductor body 101;

[0064] Exemplarily, the first ferroelectric material layer 104 is formed on a side of the first electrode 102 away from the first surface P1 by chemical vapor deposition.

[0065] Step 205: forming a second ferroelectric material layer 105 on a side of the second electrode 103 away from the semiconductor body 101;

[0066] Exemplarily, the second ferroelectric material layer 105 is formed on a side of the second surface P2 away from the semiconductor body 101 by chemical vapor deposition.

[0067] The technical solution provided by the embodiment of the present application, wherein the semiconductor device includes a first ferroelectric material layer 104 formed on a side of the first electrode away from the semiconductor body 101, and / or a second ferroelectric material layer 105 formed on a side of the second electrode 103 away from the first electrode 102, and at least one via 110 may be formed in the first ferroelectric material layer 104 and / or the second ferroelectric material layer 105, and a conductive material is arranged in the via 110. On the one hand, the ferroelectric material can be used as a fast charge storage medium, which helps to improve the response speed of the semiconductor and reduce the power consumption of the semiconductor; on the other hand, the ferroelectric material layer can provide additional electric field distribution, which helps to protect the semiconductor from overvoltage and thermal stress, thereby improving the reliability and stability of the long-term operation of the semiconductor.

[0068] Figure 3 A specific process flow chart of a method for preparing a semiconductor device provided in an embodiment of the present application, which can be combined with Figure 4-Figure 14 The structural schematic diagram during the preparation process shown is used to understand the preparation method of the semiconductor device in the embodiment of the present application.

[0069] like Figure 3 As shown, and also refer to Figure 4-Figure 14 The method for preparing a semiconductor device provided in the embodiment of the present application may include the following steps:

[0070] Step S301: Figure 4 As shown, a first epitaxial layer 108 is formed on a substrate. Specifically, the substrate 111 may be a silicon carbide substrate, and the first epitaxial layer 108 is formed on the silicon carbide substrate.

[0071] For example, an epitaxial layer 108 having the same ion type as the silicon carbide substrate may be formed on the silicon carbide substrate by chemical vapor deposition, and the ion type may be N-type.

[0072] Step S302: epitaxially forming a well region 107 and a first region 106 on a side of the first epitaxial layer 108 away from the substrate 111, wherein the first region 106 is formed in a spacing region formed by the well region 107;

[0073] like Figure 5 As shown, a first region 106 of the same ion type as the first region 108 can be formed on the silicon carbide substrate by chemical vapor deposition, and the ion type can be N-type. The first region 106 only covers a portion of the first epitaxial layer 108 and is located in the center. Then, well regions 107 are deposited on both sides of the first region 106, and the ion type can be P-type; wherein, the first region 106 and the well region 107 are formed in no particular order.

[0074] Step S303: forming a protection layer 112 on the well region 107 and the first region 106 on a side away from the first epitaxial layer 108;

[0075] like Figure 6 As shown, a protective layer 112 such as silicon dioxide (SiO2) can be formed on the first surface, the well region 107 and the first region 106 away from the first epitaxial layer 108 by chemical vapor deposition to protect them from damage in subsequent process steps.

[0076] Step S304: performing a thinning process on the second surface P2 of the substrate 111;

[0077] like Figure 7 As shown, the second surface P2 of the substrate 111 is thinned by laser, so that the thickness of the substrate 111 is reduced to 200-500 nm, thereby forming a substrate thinning layer 113 .

[0078] Step S305: forming a second electrode 103 on a side of the substrate thinning layer 113 away from the first epitaxial layer 108;

[0079] like Figure 8 As shown, the second electrode 103 is formed by sputtering on the side of the second surface P2 away from the first epitaxial layer 108 . The material of the second electrode 103 is generally a metal material including nickel, titanium, and aluminum. The substrate thinning layer 113 forms an ohmic contact with the second electrode 103 .

[0080] Step S306: forming a second ferroelectric material layer 105 on one side of the second surface P2;

[0081] like Fig. 9 As shown, in this step, the second ferroelectric material layer 105 can be formed on the side of the second surface P2 away from the semiconductor body 101 by chemical vapor deposition.

[0082] Step S307: forming at least one via hole 110 in the second ferroelectric material layer 105, and forming a conductive material in the via hole 110;

[0083] like Fig.10 As shown, at least one via hole 110 can be formed in the second ferroelectric material layer 105 by laser drilling, and then a conductive material can be formed in the via hole 110 by chemical vapor deposition to electrically connect the conductive material and the first ferroelectric material 104. The conductive material can be the same as the second electrode material.

[0084] Step S308: removing the protective layer 112 on the first surface P1;

[0085] like Fig.11As shown, the protective layer 112 on the first surface P1 can be removed by laser. Among them, by removing the protective layer by laser, efficient and accurate removal effect can be achieved, while reducing damage to the underlying material.

[0086] Step S309: forming a first electrode 102 on the first surface P1;

[0087] like Fig.12 As shown, the first electrode 102 is formed on the first surface P1 by sputtering. The material of the first electrode 102 is generally a metal material including nickel, titanium, and aluminum.

[0088] Step S310: forming a first ferroelectric material layer 104 on a side of the first electrode 102 away from the first surface P1;

[0089] like Fig.13 As shown, the process for forming the ferroelectric material layer is not limited. For example, the first ferroelectric material layer 104 may be formed on a side of the first electrode 102 away from the first surface P1 by chemical vapor deposition.

[0090] Step S311: forming at least one via hole 110 in the first ferroelectric material layer 104, and forming a conductive material in the via hole 110;

[0091] like Fig.14 As shown, at least one via hole 110 can be formed in the first ferroelectric material layer 104 by laser drilling, and then a conductive material can be formed in the via hole by chemical vapor deposition to electrically connect the conductive material and the first ferroelectric material layer 104. The conductive material can be the same as the second electrode material.

[0092] Illustratively, the first ferroelectric material layer 104 and the second ferroelectric material layer 105 are optional, and the order of their formation is not limited.

[0093] So far, the above embodiments of the present application Figure 2 The semiconductor device 10 shown is manufactured. It can be understood that the above manufacturing method is only an example, and some steps thereof can be adjusted to realize the manufacturing of the above semiconductor device 10.

[0094] The embodiment of the present application further provides a power module, Fig.15 A schematic diagram of the structure of a power module provided in an embodiment of the present application.

[0095] See also Fig.15 The power module 200 includes a substrate 201 and the semiconductor device 10 in any of the above embodiments, and the substrate 201 is used to carry the semiconductor device 10 .

[0096] Exemplarily, the power module 200 can be used as one of a power amplifier, a power converter, a power controller, a power management module, or a power regulator. The power amplifier is used to amplify the power of an electrical signal. The power converter is used to convert electrical energy from one form to another form. For example, the power converter can be an AC / DC converter or a DC / DC converter. The power controller is used to control the device of power flow. The power management module is used to manage the power supply to ensure that the power is stably and efficiently distributed to different parts of the electronic device. The power regulator is used to adjust the power output to meet the needs of a specific application.

[0097] The embodiment of the present application also provides a power conversion circuit, Fig.16 A schematic diagram of the structure of a power conversion circuit provided in an embodiment of the present application.

[0098] See also Fig.16 The power conversion circuit 300 includes a circuit board 301 and a semiconductor device 10 in any of the above embodiments. The semiconductor device 10 is electrically connected to the circuit board 301. The power conversion circuit 300 can be used for current conversion, voltage conversion or power factor correction.

[0099] Exemplarily, the power conversion circuit 300 can be used as one of an AC / DC converter, an AC / AC converter, a DC / DC converter, a DC / AC inverter or a power factor correction (PFC) circuit, wherein the AC / DC converter is used to convert alternating current into direct current, the AC / AC converter is used to convert alternating current into alternating current, the DC / DC converter is used to convert direct current into direct current, the DC / AC inverter is used to convert direct current into alternating current, and the power factor correction circuit is used to improve the power factor of the power supply and reduce the harmonic pollution of the power grid.

[0100] An embodiment of the present application further provides a vehicle, Fig.17 A schematic diagram of the structure of a vehicle provided in an embodiment of the present application.

[0101] See also Fig.17 The vehicle 400 includes a load 401 and the power conversion circuit 300 in the above embodiment. The power conversion circuit 300 is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power, and then input it into the load 401 to power the load 401.

[0102] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A semiconductor device, characterized in that: include: A semiconductor body, comprising a first surface and a second surface arranged opposite to each other, wherein the material of the semiconductor body comprises silicon carbide; A first electrode is disposed on a first surface of the semiconductor body; A second electrode is disposed on the second surface of the semiconductor body; A first ferroelectric material layer is disposed on a side of the first electrode away from the semiconductor body, and / or a second ferroelectric material layer is disposed on a side of the second electrode away from the semiconductor body; At least one via is located in the first ferroelectric material layer, wherein a conductive material electrically connected to the first electrode is disposed in the via, and / or located in the second ferroelectric material layer, wherein a conductive material electrically connected to the second electrode is disposed in the via.

2. The semiconductor device according to claim 1, wherein: The semiconductor body comprises: A first epitaxial layer, wherein the first epitaxial layer is of a first conductivity type; A substrate thinning layer, disposed between the first epitaxial layer and the second electrode; A well region, disposed between the first epitaxial layer and the first electrode, the well region being of a second conductivity type; The first region is arranged in the spacing region formed by the well region, and the first region conducts the first electrode and the first epitaxial layer, and the first region is of a first conductivity type.

3. The semiconductor device according to claim 2, characterized in that The thickness of the substrate thinning layer is 200 nm-500 nm.

4. A method for preparing a semiconductor device, characterized in that: include: forming a semiconductor body, the semiconductor body comprising a first surface and a second surface disposed opposite to each other, the material of the semiconductor body comprising silicon carbide; A first electrode is formed on the first surface of the semiconductor body, and a second electrode is formed on the second surface of the semiconductor body, and a first ferroelectric material layer is formed on a side of the first electrode away from the semiconductor body, and / or a second ferroelectric material layer is formed on a side of the second electrode away from the semiconductor body; A via hole is formed in the first ferroelectric material layer, and a conductive material electrically connected to the first electrode is formed in the via hole; and / or a via hole is formed in the second ferroelectric material layer, and a conductive material electrically connected to the second electrode is formed in the via hole.

5. The method according to claim 4, characterized in that The forming of the semiconductor body comprises: providing a substrate; forming a first epitaxial layer on the surface of the substrate; forming a well region and a first region on a side of the first epitaxial layer away from the substrate, wherein the first region is located between adjacent well regions; Thinning the substrate to form a substrate thinning layer; The substrate, the first epitaxial layer and the first region are of a first conductivity type, and the well region is of a second conductivity type.

6. The method according to claim 5, characterized in that The thickness of the substrate thinning layer is 200 nm-500 nm.

7. The method according to claim 5, characterized in that Before thinning the substrate, the method further comprises: A protection layer is formed on a side of the well region and the first region away from the first epitaxial layer.

8. A power module, characterized in that: include: At least one semiconductor device according to any one of claims 1 to 3; A substrate is used to carry the semiconductor device.

9. A power conversion circuit, characterized in that: The power conversion circuit is used for one or more of current conversion, voltage conversion, and power factor correction; The power conversion circuit includes a circuit board and at least one semiconductor device according to any one of claims 1 to 3, wherein the semiconductor device is electrically connected to the circuit board.

10. A vehicle, characterized in that: include: A load and a power conversion circuit as claimed in claim 9, wherein the power conversion circuit is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power and then input it into the load.

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