A solar cell, a battery assembly and a photovoltaic system

Abstract

The present invention is applicable to the field of photovoltaic technology, and provides a solar cell, a battery assembly and a photovoltaic system. The solar cell comprises: a silicon substrate having a backlight surface and a light-facing surface arranged oppositely, a plurality of grid lines and a plurality of microarrays arranged in parallel along a first direction on the backlight surface, the grid lines extending along a second direction, the microarray comprising a plurality of arranged microstructure units, an angle between the microarray and the grid lines, the first direction intersecting with the second direction; the length of the silicon substrate along the second direction is L, and the two sides of the silicon substrate parallel to the first direction respectively extend L / 9 to the center line as the edge area, the angle in the edge area is α, the angle in the area close to the center line is β, and the angle of α is greater than the angle of β. It is beneficial to increase the absorption path of light in the silicon wafer, promote the diffuse reflection effect of the reflected light from the backlight surface in different areas, and thus improve the light absorption efficiency.

Description

Technical Field

[0001] The present invention belongs to the field of photovoltaic technology, and in particular relates to a solar cell, a battery assembly and a photovoltaic system. Background Art

[0002] In the existing solar cell technology, although various methods have been used to optimize light absorption and charge transfer, there are still some technical problems that need to be solved. First, the traditional planar backlight design easily leads to direct penetration and escape of light, thereby reducing the propagation path of light in the silicon substrate and reducing the light absorption efficiency. In addition, the interface state recombination problem is more prominent, which will significantly affect the passivation effect of the back passivation film, resulting in increased surface recombination losses, thereby reducing the open circuit voltage.

[0003] Secondly, although the microstructure unit designed on the illuminated surface in the prior art can improve the absorption of light to a certain extent and optimize the passivation effect, the existing microstructure unit design cannot effectively change the angle of the light, so that part of the light will still escape when reaching the light-facing surface, reducing the chance of light absorption and lowering the photoelectric conversion efficiency. Summary of the invention

[0004] The present invention provides a solar cell sheet, a cell assembly and a photovoltaic system, aiming to solve the problem of low light absorption efficiency of existing solar cells.

[0005] The present invention is implemented as follows: a solar cell comprising:

[0006] A silicon substrate, wherein the silicon substrate has a backlight surface and a light-facing surface that are arranged opposite to each other, a plurality of grid lines and a plurality of microarrays are arranged in parallel along a first direction on the backlight surface, the grid lines extend along a second direction, the microarray includes a plurality of arranged microstructure units, an angle is formed between the microarray and the grid lines, and the first direction intersects with the second direction;

[0007] The length of the silicon substrate along the second direction is L, and the range of L / 9 extending from the two side edges of the silicon substrate parallel to the first direction to the center line is the edge area, the angle in the edge area is α, and the angle in the area close to the center line is β, and the angle of α is greater than the angle of β.

[0008] Optionally, the difference between the angle of α and the angle of β is 1°~15°.

[0009] Optionally, the difference between the angle of α and the angle of β is 2°~13°.

[0010] Optionally, the difference between the angle of α and the angle of β is 4°~13°.

[0011] Optionally, some of the microstructure units are arranged discontinuously.

[0012] Optionally, the second direction is perpendicular to the first direction.

[0013] Optionally, the gate line is arranged on the backlight surface of the battery cell.

[0014] Optionally, the gate line has only one polarity.

[0015] Optionally, the gate lines include gate lines of a first polarity and gate lines of a second polarity with a different polarity.

[0016] Optionally, first doped regions and second doped regions are alternately arranged on the backlight surface along the first direction, the first polarity gate lines are arranged on the first doped regions, and the second polarity gate lines are arranged on the second doped regions.

[0017] Optionally, in the edge region, the microarray in the adjacent first doping region and the microarray in the adjacent second doping region are parallel.

[0018] Optionally, the distribution of the microstructure units on the first doping region and / or the second doping region is uneven.

[0019] Optionally, the microstructure unit is a recessed structure.

[0020] Optionally, the projection of the bottom surface of the recessed structure in the thickness direction of the battery cell is a polygon.

[0021] Optionally, a maximum size of the recessed structure in the first doping region is greater than or equal to a maximum size of the recessed structure in the second doping region.

[0022] Optionally, the number of sides of the polygon is at least one of 3-6.

[0023] Optionally, a size of the polygon in the first doping region is 20 μm to 35 μm, and a size of the polygon in the second doping region is 8 μm to 15 μm.

[0024] Optionally, the depth of the recessed structure along the thickness direction of the battery cell is 0.2 μm to 2 μm.

[0025] Optionally, the roughness of the first doped region is smaller than the roughness of the second doped region.

[0026] Optionally, in the microarray, at least part of two or more of the microstructure units are stacked, and / or two or more of the microstructure units are adjacent to each other in a non-stacked arrangement.

[0027] Optionally, the first doped region and / or the second doped region includes one or more of doped polysilicon, doped amorphous silicon, and doped microcrystalline silicon.

[0028] Optionally, at a position L / y away from any side parallel to the first direction, where y>1, along the first direction, the angle close to the side parallel to the second direction is γ, and the angle close to the center is δ, and the angle of γ is smaller than the angle of δ.

[0029] The present invention also provides a battery assembly, comprising the above-mentioned solar cell sheet.

[0030] The present invention also provides a photovoltaic system, comprising the above-mentioned battery assembly.

[0031] The beneficial effect achieved by the present invention is that the microarray formed by a plurality of microstructure units is provided, and the microstructure unit design not only helps to improve the absorption of light, but also its interface state recombination is relatively low, and will not significantly affect the passivation effect of the back passivation film. At the same time, there is an angle between the microarray and the gate line. When the light enters the silicon wafer from the light-facing side, the microstructure units at different angles can change the angle of the light when it is reflected from the backlight side. Due to the change in angle, part of the light that would have originally escaped from the silicon wafer will be reflected back into the silicon wafer body when it reaches the front again, which helps to increase the absorption path of the light in the silicon wafer, thereby improving the absorption efficiency of the light, and ultimately improving the current output and overall conversion efficiency of the battery. The angle α in the edge area and the angle β at the center position can further increase the propagation path of the light inside the silicon wafer, increase the chance of light absorption, and further enhance the photoelectric conversion efficiency of the battery. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a schematic diagram of the structure of the solar cell provided by the present invention;

[0033] Figure 2 This is a microscope view at an angle α within the edge region of the solar cell provided by the present invention;

[0034] Figure 3 This is a microscope view at an angle α of the center position of the solar cell provided by the present invention;

[0035] Figure 4 It is the current trend diagram when the difference between the α angle in the edge area and the α angle in the center position is different;

[0036] Figure 5 It is a schematic diagram of the conversion efficiency trend when the difference between the α angle in the edge area and the α angle at the center position is different;

[0037] Figure 6It is a schematic diagram of the printing defect rate when the difference between the α angle in the edge area and the α angle at the center position is different;

[0038] Figure 7 is a schematic diagram of the scratch ratio when the difference between the α angle in the edge area and the α angle at the center position is different;

[0039] Figure 8 It is the data of the electrical performance of each group of cells when the difference between the α angle in the edge area and the α angle in the center position is different;

[0040] Fig. 9 It is a schematic diagram of the light path in the microstructure unit;

[0041] Fig.10 It is a partial schematic diagram of a microstructure unit microscope.

[0042] Description of reference numerals:

[0043] 100, solar cell; 110, silicon substrate; 111, first side; 112, second side; 120, microarray; 121, microstructure unit; 130, gate line. DETAILED DESCRIPTION

[0044] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention. In addition, it should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0045] In the description of the present invention, it is necessary to understand that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0046] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0047] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0048] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0049] The disclosure below provides many different embodiments or examples to realize different structures of the present invention. In order to simplify the disclosure of the present invention, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the examples of various specific processes and materials provided by the present invention, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0050] The present invention sets a microarray formed by a plurality of microstructure units. The microstructure unit design not only helps to improve the absorption of light, but also has a relatively low interface state recombination, which will not significantly affect the passivation effect of the back passivation film. At the same time, there is an angle between the microarray and the gate line. When the light enters the silicon wafer from the light-facing side, the microstructure units at different angles can change the angle of the light when it is reflected from the backlight side. Due to the change in angle, part of the light that would have escaped from the silicon wafer will be reflected back into the silicon wafer body when it reaches the front again, which helps to increase the absorption path of the light in the silicon wafer, thereby improving the absorption efficiency of the light, and ultimately improving the current output and overall conversion efficiency of the battery. The angle α in the edge region is greater than the angle β at the center position, which can further increase the propagation path of the light inside the silicon wafer, increase the chance of light absorption, and further enhance the photoelectric conversion efficiency of the battery.

[0051] Embodiment 1

[0052] This embodiment provides a solar cell 100, including:

[0053] A silicon substrate 110, wherein the silicon substrate 110 has a backlight surface and a light-facing surface that are oppositely arranged, wherein a plurality of microarrays 120 and gate lines 130 are arranged in parallel along a first direction on the backlight surface, wherein the gate lines 130 extend along a second direction, wherein the microarrays include a plurality of linearly arranged microstructure units, wherein the linear direction of the microarrays 120 and the extending direction of the gate lines 130 form an angle, and wherein the first direction intersects with the second direction;

[0054] The length of the silicon substrate 110 along the second direction is L, and the range of L / 9 extending from the two side edges of the silicon substrate 110 parallel to the first direction to the center line is the edge area, the angle in the edge area is α, and the angle in the area close to the center line is β, and the α angle is greater than the β angle.

[0055] The silicon substrate 110 has two main surfaces, a light-facing surface and a backlight surface. The light-facing surface is the side that directly faces the sunlight, and the backlight surface is the other side. The two surfaces are arranged opposite to each other. Usually, the back side of the silicon substrate 110 includes an N region and a P region that are alternately arranged, an N-type doped layer is arranged in the N region, and a P-type doped layer is arranged in the P region. The N-type doped layer and the P-type doped layer form regions with different chemical properties, supporting the formation of a PN junction and the separation of carriers.

[0056] A plurality of grid lines and a plurality of microarrays are arranged along a first direction, respectively, and the grid lines extend along a second direction, and the second direction intersects with the first direction. The grid lines can be arranged along the longitudinal direction of the silicon substrate and extend in a transverse direction, that is, the first direction can be the longitudinal direction of the back contact battery, and the second direction can be the transverse direction of the back contact battery, and the two are perpendicular to each other. Of course, in other embodiments, the first direction and the second direction can also be other directions, for example, the two can be the diagonal directions of the silicon substrate, respectively, which is not specifically limited herein. A plurality of grid lines and a plurality of microarrays can overlap each other.

[0057] like Figure 1 As shown, the first direction is the longitudinal direction of the silicon substrate 110, and a plurality of microarrays 120 and gate lines 130 are arranged in parallel along the first direction on the backlight surface. Usually, the gate lines 130 are straight lines extending along the second direction, which is perpendicular to the first direction, that is, extending along the lateral direction of the silicon substrate 110. The microarray 120 is formed by arranging a plurality of microstructure units 121, wherein the microstructure units 121 have a relatively small diameter, and a plurality of microstructure units 121 are densely overlapped and arranged to form the microarray 120. These microstructure units 121 can be in various shapes, such as pyramids, inverted pyramids, microholes, microcolumns, etc., which are not limited here.

[0058] It can be understood that the angle between the gate line 130 and the linear direction of the microarray 120 is the angle between the tangent at a certain position on the microarray 120 and the gate line 130. A specific position is selected on the microarray 120, and then the tangent at the position is made (if the microarray 120 is a straight line at this position, the tangent direction is consistent with the extension direction of the straight line; if the microarray 120 is a curve at this position, the tangent is the tangent of the curve). The gate line 130 itself is a series of parallel lines, and its direction is fixed, parallel to the two sides of the battery cell along the first direction. The gate line 130 itself has a certain width. When measuring the angle, the width of the gate line 130 is not considered, and the gate line 130 is only approximately regarded as a straight line parallel to the two sides of the battery cell along the first direction. In this application, the tangent and the gate line 130 are only regarded as scalars, and the directionality is not considered. The "angle" in this application refers to an angle greater than 0° and less than 90°.

[0059] like Figure 2 and Figure 3 As shown, the gate line 130 and the microarray 120 have an angle. Usually, the silicon substrate 110 is set to a square shape, and the gate line 130 is perpendicular to the first direction and parallel to the edge line of the silicon substrate 110. The first side 111 is two opposite side edges on the silicon substrate 110, and the first side 111 is parallel to the first direction. The second side 112 is two side edges on the silicon substrate 110 connected to the first side 111, and the second side 112 is perpendicular to the first side 111. The range extending from the first side 111 of the silicon substrate 110 to the center by 1 / 9 of the length is the edge area. There are two edge areas, which are distributed on both sides of the silicon substrate 110. The position at a distance of L / 2 from the first side 111 is the center position, and the center position is placed between the two edge areas. Let the angle between the gate line 130 and the microarray 120 in the edge area be α; at the center position, the angle between the gate line 130 and the microarray 120 is β. The angle of α is greater than the angle of β.

[0060] like Fig.10 As shown, the microarray 120 is formed by arranging microstructure units 121. When light is incident on the microstructure unit 121, multiple refractions and reflections will occur between multiple surfaces, making the propagation path of light in the silicon substrate 110 longer, thereby increasing the chance of photons interacting with the silicon material. Depending on the different angles at which the microstructure unit 121 is placed, light will have different refraction and reflection effects on the microstructure unit 121. If the angles between the microarray 120 and the grid line 130 are different, the microstructure unit 121 at this position will also be placed at different angles, thereby refracting and reflecting the light at different angles, complicating the propagation path of light in the silicon substrate 110, and further lengthening the propagation path of light in the silicon substrate 110, thereby further increasing the chance of photons interacting with the silicon material and improving the absorption rate.

[0061] Specifically, Fig. 9 As shown, light enters the silicon wafer from the light-facing surface, propagates inside the silicon wafer, and part of the light is absorbed by the silicon material and converted into electrical energy. The light that is not absorbed reaches the backlight surface and is reflected by the microarray 120. The angle of the reflected light changes due to the shape and arrangement of the microstructure unit 121, and part of the light will be reflected back into the silicon wafer body, increasing the chance of light absorption. In different areas, the angle between the gate line 130 and the microarray 120 is different, forming a diffuse reflection effect. Diffuse reflection increases the propagation path of light inside the silicon wafer, further improving the photoelectric conversion efficiency. After the light reflected back into the silicon wafer body is absorbed, the generated electron and hole pairs are collected by the gate line 130 to form a current output.

[0062] In addition, the angle α in the edge area is different from the angle β at the center position, so the microstructure units 121 at the corresponding positions are placed at different angles. The microstructure units 121 at different angles can better capture light at different incident angles, reduce light escape, improve the overall light capture efficiency, further reduce light reflection losses, and improve light transmission and absorption efficiency.

[0063] In this embodiment, by setting a microarray 120 formed by a plurality of microstructure units, the microstructure unit design not only helps to improve the absorption of light, but also its interface state recombination is relatively low, and will not significantly affect the passivation effect of the back passivation film. At the same time, there is an angle between the microarray 120 and the gate line 130. When the light enters the silicon wafer from the light-facing side, the microstructure units 121 at different angles can change the angle of the light when it is reflected from the backlight side. Due to the change in angle, part of the light that would have escaped from the silicon wafer will be reflected back into the silicon wafer body when it reaches the front again, which helps to increase the absorption path of the light in the silicon wafer, thereby improving the absorption efficiency of the light, and ultimately improving the current output and overall conversion efficiency of the battery. The angle α in the edge region is greater than the angle β at the center position, which can further increase the propagation path of the light inside the silicon wafer, increase the chance of light absorption, and further enhance the photoelectric conversion efficiency of the battery.

[0064] In some embodiments, the difference between the angles α and β is between 1° and 15°.

[0065] When the difference between α and β is less than 1°, the difference between the α angle in the edge area and the α angle in the center position is too small, which cannot play a good diffuse reflection effect, nor can it reduce the escape of light well, and has little effect on improving the photoelectric conversion efficiency. When the difference between α and β is greater than 15°, the difference in the light incident angle between the edge area and the center position is too large, which may cause the light incident angle of one area to be over-optimized, while the optimization effect of the other area is insufficient. For example, if the angle of the edge area is too large, the propagation path of the light will be too long, increasing the reflection loss; while the angle at the center position is too small, it may increase the direct transmission of light and reduce absorption. In addition, if the angle difference is too large, the light propagation paths of different areas will be significantly different, resulting in uneven distribution of light in the silicon substrate 110. This will reduce the overall photoelectric conversion efficiency because the photon absorption rate in some areas may be significantly higher than that in other areas, resulting in an imbalance in efficiency.

[0066] Therefore, the angle difference between α and β is between 1° and 15°, which can optimize the light incident angle between the edge area and the center position, so that light at different positions can effectively enter the silicon substrate 110, reducing reflection loss. Within this range, the propagation path length of light in different areas varies moderately, which can maintain uniform distribution of light in the silicon substrate 110 and improve the overall photoelectric conversion efficiency.

[0067] In some embodiments, the difference between the angle α in the edge region and the angle β in the center position is 2° to 13°.

[0068] In the laboratory, when the angle α in the edge area and the angle β in the center position have different differences, relevant electrical performance tests are performed to obtain relevant laboratory data. The angle difference between the angle α in the edge area and the angle β in the center position is x. The following experimental data is the value obtained by averaging the data of several battery cells tested. The experimental process will inevitably be affected by random factors, resulting in errors in individual data points. By taking the average of multiple experimental results, these random errors can be effectively smoothed and the stability of the data can be improved.

[0069] like Figure 4 As shown in the figure, as the x angle increases, Jsc (Short Circuit Current Density) gradually increases, because the microarray 120 on the backlight side changes the light transmission path and is beneficial to the battery's absorption of light, generating more photogenerated carriers and increasing the current. However, as the x angle increases, the Jsc increase gradually decreases. When the x angle exceeds 13°, the Jsc increase is only 0.01, which is negligible.

[0070] like Figure 6As shown in the figure, as the x angle increases, the proportion of printing defects such as broken wires of fine grids in each group of cells increases. When the x angle is less than 13°, the defective proportion increases slowly, and when the α angle exceeds 13°, the defective proportion increases sharply. Due to the increase in broken wires, the current collected by the grid line 130 becomes worse, resulting in a decrease in the current gain generated by the microstructure, which ultimately causes the current to follow a corresponding change. When the α angle exceeds 13°, the current decreases significantly.

[0071] It is understandable that due to the increase in broken lines, the current collection of the gate line 130 becomes poorer, resulting in a smaller current gain generated by the microstructure.

[0072] In addition, as the x angle increases, the Rs series resistance first decreases, then increases, and then suddenly changes. The microstructure unit 121 increases the roughness of the silicon wafer surface, which helps the metal paste to contact the silicon wafer surface and reduce the series resistance. When the x angle is less than 13°, the battery cell printing is low, the series resistance will decrease, and the FF (Fill Factor) will increase accordingly; when the x angle exceeds 13°, the proportion of battery cell printing defects increases sharply, and the increase in series resistance caused by broken wires and thick wires exceeds the effect of the microstructure unit 121, resulting in an increase in series resistance, which in turn greatly reduces FF.

[0073] like Figure 7 As shown in the figure, as the x angle increases, the scratch ratio of the battery surface also increases, especially when the α angle exceeds 13°, the scratch ratio increases sharply. These scratches are caused by the increase in the arc angle formed by these microstructures, which increases the surface roughness. As a result, in the battery manufacturing process, the silicon wafer surface is easily scratched when it contacts the automation and equipment table, resulting in poor surface passivation, which in turn leads to a decrease in Voc (Open-Circuit Voltage).

[0074] like Figure 5 and Figure 8 As shown in the figure, considering all the electrical properties, when the angle of x is less than 2°, although the values ​​of the poor printing ratio and the scratch ratio are very low, the values ​​of Voc, Jsc, FF and EFF (Efficiency) are also low. When the angle of α is greater than 13°, the poor printing ratio and the scratch ratio are too high, and the values ​​of Voc, FF and EFF are also low. Although the value of Jsc has increased, the increase is too small. When the angle of α is between 2-13°, the poor printing ratio and the scratch ratio are maintained at a low value, while Voc, Jsc, FF and EFF have a significant increase.

[0075] Specifically, the angle of α can be 2°, 2.2°, 3°, 3.3°, 4°, 4.5°, 5°, 5.4°, 6°, 6.5°, 7°, 8°, 9°, 10°, 11°, 12°, 13°, etc., or other values ​​within the range of 2°~13°, and the examples are not exhaustive.

[0076] When the angle difference is less than 2°, the optimization effect is limited, the light incident angle difference is not obvious, the light propagation path does not change much, the manufacturing difficulty is low but it is difficult to achieve significant performance improvement. When the angle difference is greater than 13°, it is over-optimized, the light propagation path is uneven, and a large angle difference may affect the stability of the microstructure unit 121, causing the structure to be easily deformed or damaged during manufacturing and use, thereby reducing the life and reliability of the solar cell and causing a decrease in overall efficiency. When the angle difference is 2°~13°, the optimization effect is better, the light incident angle is more moderate, the light propagation path is more uniform, and the structural stability is good, which is an ideal choice for improving photoelectric conversion efficiency and overall performance.

[0077] Furthermore, Figure 8 As shown, when the angle of α is 4°~13°, the values ​​of Voc, Jsc, FF and EFF are improved the most, that is, when the difference between the angle of α in the edge area and the angle of α in the center position is 4°~13°, the performance of the solar cell 100 under different lighting conditions can be optimally balanced. This design significantly reduces reflection loss by optimizing the refraction and reflection of light on the microstructure unit 121 and the grid line 130, and further improves the absorption rate of photons and the photoelectric conversion efficiency.

[0078] Embodiment 2

[0079] like Fig.10 As shown, in some embodiments, the microstructure units 121 are arranged non-continuously.

[0080] The arc-shaped microarray 120 formed by overlapping multiple microstructure units 121 is a non-continuous arrangement of the microstructure units 121, that is, there is a certain distance between some of the microstructure units 121, and they are not closely connected. Specifically, each microstructure unit 121 can have different shapes and sizes (usually at the micrometer level), and the distances between some of the microstructure units 121 can also be different.

[0081] The non-continuous arrangement of the microstructure units 121 makes the reflection path of the light inside the silicon wafer more complicated. The light is reflected multiple times between different microstructure units 121, which increases the propagation path of the light in the silicon wafer, thereby improving the light absorption efficiency. And due to the spacing between some microstructure units 121, the light has more opportunities to be absorbed by the silicon wafer during the reflection process, reducing the amount of escaping light.

[0082] Embodiment 3

[0083] In some embodiments, the gate line is disposed on the backlight side of the cell.

[0084] In back-contact cells (such as HBC cells), the grid lines are set on the backlight side of the cell. There is no grid line blocking the front side, which maximizes the effective area for absorbing sunlight and improves the photoelectric conversion efficiency of the cell.

[0085] In some embodiments, the gridlines have only one polarity. In some cells, all the current collecting electrodes on the front side (such as the positive gridlines) are located on the back side of the cell. This design means that there are no metal gridlines on the front side of the cell, and all the light can shine on the photovoltaic material. This allows more sunlight to shine directly on the photovoltaic material, thereby improving the light absorption rate and the photoelectric conversion efficiency of the cell.

[0086] In some embodiments, the gate line includes a first polarity gate line and a second polarity gate line of different polarity. The first polarity gate line and the second polarity gate line have opposite polarities, one is a positive gate line, and the other is a negative gate line. The positive gate line collects photogenerated electrons, and the negative gate line collects photogenerated holes. The current path can be optimized, the series resistance can be reduced, and the overall performance of the battery can be improved.

[0087] In some embodiments, the first doped regions and the second doped regions are alternately arranged on the backlight surface along the first direction, the first polarity gate lines are arranged on the first doped regions, and the second polarity gate lines are arranged on the second doped regions.

[0088] Two different doping regions, a first doping region and a second doping region, are arranged on the backlight surface of the silicon substrate 110, and the two doping regions are arranged alternately. Specifically, a plurality of first doping regions and a plurality of second doping regions are arranged alternately along a first direction, and both the first doping regions and the second doping regions extend along a second direction, and the second direction intersects the first direction. The arrangement direction of the first doping region and the second doping region is consistent with the arrangement direction of the gate line, and the extension direction of the first doping region and the second doping region is consistent with the extension direction of the gate line.

[0089] A first doping layer is disposed in the first doping region, and a second doping layer is disposed in the second doping region. The first doping layer and the second doping layer have different polarities. Specifically, the first doping layer may be a P-type doping layer and the second doping layer may be an N-type doping layer, or the first doping layer may be an N-type doping layer and the second doping layer may be a P-type doping layer. The first polarity doping layer and the second polarity doping layer form doping regions with different electrical characteristics, supporting the formation of a PN junction and the separation of carriers.

[0090] The first polarity gate line is arranged on the first doping region, and the first polarity gate line corresponds to the polarity of the first doping region, and the second polarity gate line is arranged on the second doping region, and the second polarity gate line corresponds to the polarity of the second doping region. That is, when the first doping region is a P-type doping layer and the second doping region is an N-type doping layer, the first polarity gate line is a positive gate line and the second polarity gate line is a negative gate line; when the first doping region is an N-type doping layer and the second doping region is a P-type doping layer, the first polarity gate line is a negative gate line and the second polarity gate line is a positive gate line.

[0091] In some embodiments, a spacer is provided between the first doped region and the second doped region, and the spacer provides a physical isolation between the first doped region and the second doped region, which helps to form a clearer electric field separation between the first doped region and the second doped region. The optimization of the electric field can improve the separation efficiency of carriers, reduce the direct recombination of carriers (electrons and holes) in these regions, reduce recombination losses, and improve the open circuit voltage.

[0092] In some embodiments, in the edge region, the microarrays 120 in the adjacent first doping regions and the microarrays 120 in the adjacent second doping regions are parallel.

[0093] The edge region is usually a high-risk region for carrier recombination. In the edge region, the microarrays 120 in the adjacent first doping region and the second doping region are parallel, which can ensure that the propagation path of light in these regions is more uniform, reduce the reflection loss of light in the edge region, and increase the absorption rate of light, thereby improving the photoelectric conversion efficiency. At the same time, the parallel microarrays 120 can reduce the recombination loss in the edge region and reduce the risk of carrier recombination in the edge region.

[0094] In some embodiments, the distribution of the microstructure units on the first doping region and / or the second doping region is uneven.

[0095] The distribution density and arrangement of microstructure units in different regions may be different. In the same doping region, the density or arrangement of microstructure units at different positions may be different. Specifically, the microstructure units on the first doping region and the second doping region may be unevenly distributed; the distribution of microstructure units on the first doping region may be uneven, but the distribution of microstructure units on the second doping region may be uniform; the distribution of microstructure units on the first doping region may be uniform, but the distribution of microstructure units on the second doping region may be uneven.

[0096] Through uneven distribution of microstructure units, the propagation path of light in different areas can be optimized and the reflection loss at specific angles can be reduced.

[0097] Embodiment 4

[0098] In some embodiments, some of the microstructure units 121 are recessed structures.

[0099] The microstructure unit 121 is recessed from the backlight surface to the light-facing surface, that is, the distance from the top surface of the microstructure unit 121 to the light-facing surface is smaller than the distance from the backlight surface to the light-facing surface.

[0100] The recessed microstructure units 121 can form multiple reflection surfaces, increasing the multiple reflections of light in these microstructure units 121. This multiple reflection prolongs the propagation path of light in the silicon substrate 110 and improves the light absorption efficiency. The recessed structure can also increase the scattering effect of light, making the light more evenly distributed in the silicon substrate 110, thereby increasing the short-circuit current density (Jsc). In addition, the recessed microstructure units 121 can form optical waveguides, allowing light to propagate along a specific path, reducing direct penetration and escape of light, and further improving the light capture rate.

[0101] In some embodiments, the depth of the recessed structure along the thickness direction of the battery cell is 0.2 μm to 2 μm.

[0102] That is, the distance from the bottom surface of the microstructure unit 121 to the backlight surface is 0.2μm~2μm, and can be 0.2μm, 0.3μm, 0.4μm, 0.5μm, 0.6μm, 0.7μm, 0.8μm, 0.9μm, 1μm, 1.2μm, 1.5μm, 1.8μm, 2μm, or other values ​​within the range of 0.2μm~2μm, which are not limited here. It is within this depth range to optimize the propagation and scattering characteristics of light and improve the transmittance, reflectivity and other properties of optical materials.

[0103] In some embodiments, a maximum size of the recess structure in the first doped region is greater than or equal to a maximum size of the recess structure in the second doped region.

[0104] The recessed structure can be formed by chemical etching, laser etching, mechanical method or plasma etching of the silicon substrate 110. The recessed structure usually forms a plane at the bottom, and the size of the recessed structure can be the length, width, diagonal length, circular diameter, etc. of the surface, which are not limited here. In the first doping region and the second doping region, respectively, the recessed structure with the largest area in each region is selected for measurement. In some examples, when measuring the size of the recessed structure, the surface calibration of the film layer can be directly measured by a testing instrument (optical microscope, atomic force microscope, scanning electron microscope, transmission electron microscope, etc.).

[0105] The size of the recessed structure in the first doped region is greater than or equal to the size of the recessed structure in the second doped region. This design can optimize the light reflection and electric field distribution on the back side, increase the light absorption path, promote charge separation and transmission, and reduce surface recombination loss and current leakage.

[0106] Specifically, the first doped region may be an N-type doped region, and the second doped region may be a P-type doped region. For different doped regions, microstructure units 121 of different sizes are designed accordingly, which can more specifically improve the passivation quality of the corresponding regions and enhance the contact characteristics with respect to the slurry, so that the prepared solar cells can obtain higher cell conversion efficiency.

[0107] In some embodiments, the projection of the bottom surface of the recessed structure in the thickness direction of the battery cell is a polygon, and the bottom surface of the recessed structure can be a plane or can have undulations. The number of sides of the polygon is at least one of 3-6. Specifically, the shape of the polygonal plane includes at least one of a rhombus, a square, a trapezoid, an approximate rhombus, an approximate square, an approximate trapezoid, a pentagon, and a hexagon. For example, the bottom surface can be all square, all rhombus, partly hexagonal, partly rhombus, partly trapezoidal, partly approximate square, and partly pentagonal. These are not exhaustive examples, and other possible combinations are not excluded.

[0108] In some embodiments, the size of the polygon in the first doping region is 20 μm-35 μm, and the size of the polygon in the second doping region is 8 μm-15 μm.

[0109] The size of the polygon in the first doping region may specifically be 20μm, 21μm, 22μm, 23μm, 24μm, 25μm, 25.5μm, 26μm, 27μm, 28μm, 29μm, 30μm, 31μm, 32μm, 33μm, 34μm, 35μm, or other values ​​from 20μm to 35μm, which are not limited here.

[0110] The size of the bottom surface of the microstructure unit 121 in the second doping region can specifically be 8μm, 9μm, 10μm, 10..5μm, 11μm, 12μm, 13μm, 13.6μm, 15μm, 15μm, or other values ​​of 8μm~15μm, which are not limited here.

[0111] Further limiting the bottom dimensions of the microstructure unit 121 in different doping regions is beneficial to obtaining a higher open circuit voltage and fill factor, thereby obtaining a higher battery conversion efficiency.

[0112] Embodiment 5

[0113] In some embodiments, the roughness of the first doped region is less than the roughness of the second doped region.

[0114] The surface of the first doped region is smoother than that of the second doped region. The smooth region can reduce light reflection and increase light absorption. The region with higher roughness can increase the reflection and scattering of light in the material, extend the path of light in the battery, and thus increase the probability of photons being absorbed. At the same time, the region with higher roughness can provide more surface area, which helps to deposit the passivation layer more evenly, reduce surface recombination, and increase the life of charge carriers. The combined use of the two roughness regions helps to improve the photoelectric conversion efficiency and reliability of the battery.

[0115] Embodiment 6

[0116] In some embodiments, in the microarray 120, at least a portion of two or more microstructure units 121 are stacked, and / or two or more microstructure units 121 are adjacent to each other in a non-stacked arrangement.

[0117] Specifically, one microarray 120 may include two or more microstructure units 121 that are at least partially stacked, that is, at least two microstructure units 121 are partially stacked or completely overlapped. One microarray 120 may also include two or more microstructure units 121 that are adjacent to each other and arranged in a non-stacked manner, that is, at least two microstructure units 121 are adjacent to each other and contact but not overlapped. One microarray 120 may also include two or more microstructure units 121 that are at least partially stacked, and two or more microstructure units 121 that are adjacent to each other and arranged in a non-stacked manner.

[0118] It can be understood that when the microarray 120 includes two or more at least partially stacked microstructure units 121 and two or more adjacent but non-stacked microstructure units 121, the roughness of the microarray 120 can be controlled within the required range, which is beneficial to the solar cell in the screen printing section, enhancing the contact of the slurry in the conductive area, increasing the tension of the slurry, improving the quality and yield of the solar cell, increasing the open circuit voltage of the solar cell, and increasing the fill factor, thereby improving the photoelectric conversion efficiency.

[0119] Embodiment 7

[0120] In some embodiments, the first doped region and / or the second doped region includes one or more of doped polysilicon, doped amorphous silicon, and doped microcrystalline silicon.

[0121] Polycrystalline silicon is composed of many small grains, and the grain boundaries between the grains increase the probability of recombination of electrons and holes. The doping of polycrystalline silicon is relatively uniform because the diffusion of dopants between grains is relatively uniform. Amorphous silicon does not have a long-range ordered lattice structure, and there are a large number of dangling bonds and defects inside the material. The doping non-uniformity of amorphous silicon is high because defects and dangling bonds affect the distribution of dopants. The structure of microcrystalline silicon is between amorphous silicon and polycrystalline silicon, with a certain grain structure, but the grain size is smaller. The defect density of microcrystalline silicon is lower than that of amorphous silicon, but higher than that of polycrystalline silicon.

[0122] According to different cell types, the doping types of the first doping region and the second doping region are selected, and the performance of the solar cell is further optimized through composite design.

[0123] In some embodiments, the back side of the solar cell further includes a passivation contact structure, wherein the passivation contact structure includes an interface tunneling passivation film layer and a doped polysilicon film layer.

[0124] The interface tunneling passivation film is a very thin film (usually between a few nanometers and tens of nanometers). Common materials include , , Etc., used to passivate the silicon surface and reduce surface recombination.

[0125] Doped polysilicon films are thicker polysilicon films (typically between a few hundred nanometers and a few micrometers) that are doped (usually with phosphorus or boron) to form a good electrical contact while maintaining a high charge carrier lifetime.

[0126] The passivation contact structure can be a stacked arrangement of an interface tunneling passivation film layer and a doped polysilicon film layer, or another film layer can be arranged between the tunneling passivation film layer and the doped polysilicon film layer. The passivation contact structure helps to improve the photoelectric conversion efficiency and stability of the battery.

[0127] In some embodiments, a back side passivation film layer structure is further included, wherein the material of the back side passivation film layer structure includes aluminum oxide.

[0128] The back passivation film structure is used to further reduce the back surface recombination. Aluminum oxide ( ) is a very effective passivation material. Alumina has a high dielectric constant and good electrical insulation, which can form effective electrical isolation on the back of the battery and reduce current loss. Alumina also has very good chemical stability and can resist the influence of high temperature and humid heat environment, improving the durability and reliability of the battery. At the same time, alumina can effectively reduce the recombination of the silicon surface.

[0129] Embodiment 8

[0130] This embodiment provides a battery assembly, including the solar cell 100 in the above embodiment.

[0131] The battery assembly may include a plurality of solar cells 100. The plurality of solar cells 100 in the battery assembly may be connected in series in sequence to form a battery string. The battery strings may be connected in series, in parallel, or in a combination of series and parallel to achieve current bus output. For example, the connection between the battery cells may be achieved by welding welding strips, and the connection between the battery strings may be achieved by bus bars.

[0132] The battery assembly may also include a metal frame, a back plate, photovoltaic glass and an adhesive film (not shown in the figure). The adhesive film may be filled between the front and photovoltaic glass, the back and the back plate of the solar cell 100, and between adjacent cells. As a filler, it may be a transparent colloid with good light transmission and aging resistance. For example, the adhesive film may be an EVA adhesive film or a POE adhesive film. The specific selection may be based on actual conditions and is not limited here.

[0133] Photovoltaic glass can cover the adhesive film on the front side of the solar cell 100. The photovoltaic glass can be ultra-white glass, which has high light transmittance, high transparency, and excellent physical, mechanical and optical properties. For example, the light transmittance of ultra-white glass can reach more than 92%, and it can protect the solar cell 100 without affecting the efficiency of the solar cell 100 as much as possible. At the same time, the adhesive film can bond the photovoltaic glass and the solar cell 100 together, and the presence of the adhesive film can seal and insulate the solar cell 100 and make it waterproof and moisture-proof.

[0134] The backplane can be attached to the adhesive film on the back of the solar cell 100. The backplane can protect and support the solar cell 100 and has reliable insulation, water resistance and aging resistance. There are multiple options for the backplane, which can usually be tempered glass, organic glass, aluminum alloy TPT composite adhesive film, etc. It can be set according to specific circumstances and is not limited here. The whole composed of the backplane, solar cell 100, adhesive film and photovoltaic glass can be set on a metal frame. The metal frame serves as the main external support structure of the entire battery assembly and can stably support and install the battery assembly. For example, the battery assembly can be installed at the required location through the metal frame.

[0135] The beneficial effects of the battery assembly of this embodiment are equivalent to the beneficial effects of the above-mentioned solar cell 100, and will not be described in detail here.

[0136] Embodiment 9

[0137] This embodiment provides a photovoltaic system, including the battery assembly in the above embodiment.

[0138] Photovoltaic systems can be used in photovoltaic power stations, such as ground power stations, rooftop power stations, water power stations, etc., and can also be used in equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc. Of course, it is understandable that the application scenarios of photovoltaic systems are not limited to this, that is to say, photovoltaic systems can be used in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array may be an array combination of multiple battery components. For example, multiple battery components can form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid. After that, it is connected to the mains network to realize solar power supply.

[0139] The beneficial effects of the photovoltaic module of this embodiment are equivalent to the beneficial effects of the above-mentioned battery module, and will not be described in detail here.

[0140] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A solar cell, characterized in that: include: A silicon substrate, wherein the silicon substrate has a backlight surface and a light-facing surface that are arranged opposite to each other, a plurality of grid lines and a plurality of microarrays are arranged in parallel along a first direction on the backlight surface, the grid lines extend along a second direction, the microarray includes a plurality of arranged microstructure units, an angle is formed between the microarray and the grid lines, the angle is greater than 0° and less than 90°, and the first direction intersects the second direction; The length of the silicon substrate along the second direction is L, and the range of L / 9 extending from the two side edges of the silicon substrate parallel to the first direction to the center line is the edge area, the angle in the edge area is α, and the angle in the area close to the center line is β, and the angle of α is greater than the angle of β.

2. The solar cell according to claim 1, wherein: The difference between the angle of α and the angle of β is 1° to 15°.

3. The solar cell according to claim 1, wherein: The difference between the angle of α and the angle of β is 2°~13°.

4. The solar cell according to claim 1, wherein: The difference between the angle of α and the angle of β is 4°~13°.

5. The solar cell according to claim 1, wherein: Some of the microstructure units are arranged discontinuously.

6. The solar cell according to claim 1, wherein: The second direction is perpendicular to the first direction.

7. The solar cell according to claim 1, wherein: The grid lines are arranged on the backlight surface of the battery cell.

8. The solar cell according to claim 7, characterized in that: The gate lines have only one polarity.

9. The solar cell according to claim 7, characterized in that: The gate lines include gate lines of a first polarity and gate lines of a second polarity with a different polarity.

10. The solar cell according to claim 9, characterized in that: The backlight surface is alternately provided with first doped regions and second doped regions along the first direction, the first polarity gate lines are provided on the first doped regions, and the second polarity gate lines are provided on the second doped regions.

11. The solar cell according to claim 10, wherein: In the edge region, the microarray in the adjacent first doping region and the microarray in the adjacent second doping region are parallel.

12. The solar cell according to claim 10, wherein: The microstructure units on the first doping region and / or the second doping region are distributed unevenly.

13. The solar cell according to claim 10, characterized in that: The microstructure unit is a concave structure.

14. The solar cell according to claim 13, characterized in that: A maximum size of the recessed structure in the first doping region is greater than or equal to a maximum size of the recessed structure in the second doping region.

15. The solar cell according to claim 13, wherein: The projection of the bottom surface of the recessed structure in the thickness direction of the battery cell is a polygon.

16. The solar cell according to claim 15, characterized in that: The number of sides of the polygon is at least one of 3-6.

17. The solar cell according to claim 15, characterized in that: The size of the polygon in the first doping region is 20 μm to 35 μm, and the size of the polygon in the second doping region is 8 μm to 15 μm.

18. The solar cell according to claim 13, wherein: The depth of the concave structure along the thickness direction of the battery cell is 0.2 μm to 2 μm.

19. The solar cell according to claim 10, characterized in that: The roughness of the first doped region is smaller than the roughness of the second doped region.

20. The solar cell according to claim 1, characterized in that: In the microarray, at least part of two or more of the microstructure units are stacked, and / or two or more of the microstructure units are adjacent to each other in a non-stacked arrangement.

21. The solar cell according to claim 10, characterized in that: The first doped region and / or the second doped region includes one or more of doped polysilicon, doped amorphous silicon, and doped microcrystalline silicon.

22. A battery assembly, characterized in that: The invention comprises the solar cell sheets as described in any one of claims 1 to 21.

23. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 22.

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