A method for thinning a large-array infrared detector chip capable of protecting metal electrodes

Abstract

The invention provides a large-array infrared detector chip thinning method capable of protecting metal electrodes, belonging to the technical field of infrared detector preparation. The invention solves the problem that a conventional back-grinding and polishing process needs to firstly adopt photoresist to protect a circuit, the glue curing time is long, the process is time-consuming and the efficiency is low. The invention comprises the following steps: growing a dielectric layer for protecting the metal electrodes on a chip; bonding the chip to a glass substrate, and attaching strips around the chip; then grinding and polishing until the required chip thickness is reached; making a photoresist corresponding to an ROIC and an FPA of the chip, removing the chip from the glass substrate after polishing, then uniformly coating a layer of photoresist on the chip, exposing the metal electrodes around the chip after developing the photoresist, and then post-baking the chip; removing the dielectric layer; and cleaning the surface photoresist. The invention can realize the protection of the metal electrodes of the detector chip.

Description

Technical Field

[0001] The invention provides a method for thinning a large-array infrared detector chip capable of protecting metal electrodes, and belongs to the technical field of infrared detector preparation. Background Art

[0002] The infrared detector chip includes a detector chip, an In column interconnection structure and a readout integrated circuit (ROIC). The detector chip is connected to the readout circuit through the In column interconnection structure, wherein the detector chip is a focal plane array (FPA), and the focal plane array includes an epitaxial material, a metal contact layer and an In column. The readout circuit includes a readout circuit module, a metal contact layer and an In column. The infrared detector chip is a back-incident chip. In order to achieve the detector performance, a grinding and polishing process is required. Before grinding and polishing, the metal electrodes (or metal PAD or electrode PAD) around the readout circuit must be protected to prevent damage / corrosion to the metal electrodes during grinding and mechanical chemical polishing, which makes subsequent testing impossible.

[0003] like Figure 1 As shown in the figure, the traditional metal electrode protection method is to manually apply photoresist 1 around the metal electrode 2 of the chip using a coating tool 3 after flip-chip interconnection, and then bake it in an oven at 85℃ for 3h. After taking it out, it is bonded, ground, polished and other processes are carried out. The completed structure is as shown in the figure. Figure 2 shown.

[0004] However, there are many problems with using photoresist as a protective layer to protect metal electrodes.

[0005] 1. The traditional back grinding and polishing process requires the use of photoresist to protect the circuit first. The glue curing time is long, the process is time-consuming and inefficient.

[0006] 2. The photoresist needs to be manually evenly coated, which is labor-intensive and difficult to control the coating thickness. The production capacity is low and it is easy to flow to the surface and back of the chip, affecting the thickness measurement and bonding. Even if acetone is used to wipe and protect the location where the photoresist flows by mistake, it will affect the area where the coating has been completed, increasing the difficulty of the work.

[0007] 3. During the grinding process, the required substrate thickness is about 30um. Since the thickness of the photoresist cannot be controlled by manual coating (thickness>30um), the photoresist and the abrasive will grind the grinding surface during the grinding process, causing secondary pollution, which is more obvious during the polishing process. The polishing removal amount is about 10um. The photoresist will also contaminate the surface during polishing due to the friction of the polishing cloth. In addition, the polishing adopts a chemical mechanical polishing process. The chemical components in the photoresist and the polishing liquid do not react, resulting in the photoresist polishing removal rate being much lower than the chip polishing removal rate, resulting in the photoresist layer being higher than the chip, which will cause the chip edge warping, causing edge collapse or even cracks.

[0008] 4. After polishing, the chip needs to be removed. The chip and the glass substrate are attached with double-sided tape. The chip needs to be heated to 120°C to dissolve the double-sided tape before the chip can be removed. During this process, the photoresist will melt and flow to the surface of the chip, causing contamination. In subsequent organic cleaning, there will be cases where photoresist remains on the chip surface and cannot be removed.

[0009] 5. After polishing, clean the photoresist. Generally, organic cleaning solvents (acetone, ethanol and isopropanol) are used to clean the photoresist. Photoresists of different properties may become difficult to clean due to excessively high heating temperatures and long heating times during wafer removal. For example, AZ6130 photoresist may make it impossible to perform normal wire bonding tests. Summary of the invention

[0010] In order to solve the above technical problems, the present invention proposes a method for thinning a large-array infrared detector chip that can protect metal electrodes, using a dielectric layer instead of photoresist as a solution for uniformly coating the metal electrode protective layer of the gallium antimonide infrared detector.

[0011] The technical solution adopted by the present invention is: a method for thinning a large-array infrared detector chip capable of protecting metal electrodes, comprising the following steps:

[0012] Step A: growing a dielectric layer for protecting the metal electrode on the large array infrared detector chip;

[0013] Step B: bonding the large array infrared detector chip to the glass substrate, and attaching strips around the large array infrared detector chip; then grinding and polishing until the required chip thickness is reached;

[0014] Step C: making a photoresist corresponding to the ROIC and FPA of the large-array infrared detector chip, removing the large-array infrared detector chip from the glass substrate after polishing, and then uniformly coating a layer of photoresist on the large-array infrared detector chip, exposing the metal electrodes around the large-array infrared detector chip after developing the photoresist, and then post-baking the large-array infrared detector chip;

[0015] Step D: removing the dielectric layer;

[0016] Step E: Place the large array infrared detector chip in an organic solution, clean off the photoresist on the surface, and complete the grinding and polishing process.

[0017] Before the dielectric layer growth in step A is performed, the surface and back of the large array infrared detector chip are first wiped.

[0018] The dielectric layer in step A is made of silicon oxide or silicon nitride.

[0019] ICP-CVD equipment is used to evaporate a dielectric layer on the surface of the large array infrared detector chip.

[0020] In step B, the thickness of the grind is measured by measuring the thickness of the strip.

[0021] When silicon oxide is used as the dielectric layer, step D is specifically as follows: placing the post-baked large-array infrared detector chip in a standard buffered etching solution for etching, and then washing with flowing deionized water to remove the silicon oxide dielectric layer.

[0022] When silicon nitride is used as the dielectric layer, step D is specifically as follows: placing the post-baked large-array infrared detector chip in a plasma etcher to remove the silicon nitride dielectric layer.

[0023] The organic solution in step E is acetone, ethanol and isopropanol solution. The photoresist is first removed with acetone solution, then with ethanol solution, the acetone residue is removed, then with isopropanol solution, and finally with nitrogen blow-drying.

[0024] In step B, grinding is performed at least once using grinding materials with different particle sizes to reach the required thickness of the large-array infrared detector chip and then polishing is performed.

[0025] The large-area array infrared detector chip is a second-type superlattice large-area array infrared detector chip.

[0026] The beneficial effects of the present invention compared with the prior art are as follows:

[0027] 1. Through the photolithography process, the surface of the flip-chip interconnected chip is accurately positioned and developed, so that the surface of the detector chip is protected by photoresist, while the exposed part of ROIC is not protected by photoresist due to development.

[0028] 2. Through the coating process, ICP-CVD equipment is used to evaporate the silicon oxide / silicon nitride dielectric layer on the entire surface of the detector chip. The temperature is maintained at 75°C, which will not affect the epitaxial structure and In interconnection structure. The growth thickness is 350nm, which protects the metal electrode.

[0029] 3. Use BOE solution to corrode silicon oxide. The 350nm SiO2 dielectric layer can be completely corroded in just 12 seconds, and the metal electrode and ROIC will not be damaged in a very short time. Use deionized water to rinse for 30 seconds in time to effectively remove the BOE residue.

[0030] 4. Using RIE equipment to remove silicon nitride can avoid the problem that BOE solution will slowly corrode silicon nitride, which will react with the silicon oxide passivation layer inside the focal plane over a long period of time, affecting chip performance. Although RIE equipment takes 5.4 minutes to completely remove silicon nitride, side etching will not occur, and the substrate temperature is 20°C, so the chip will not be damaged due to high temperature. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The present invention will be further described below in conjunction with the accompanying drawings:

[0032] Figure 1 It is a schematic diagram of the traditional metal electrode protection method;

[0033] Figure 2 This is a schematic diagram of a traditional metal electrode after protection and grinding and polishing;

[0034] Figure 3 This is a flow chart of polishing and thinning a metal electrode using silicon oxide as a dielectric layer to protect the metal electrode in Example 1 of the present invention;

[0035] Figure 4 This is a flow chart of polishing and thinning a metal electrode using silicon nitride as a dielectric layer to protect the metal electrode in Example 2 of the present invention;

[0036] In the figure: 1 is photoresist, 2 is metal electrode, 3 is coating tool, 4 is silicon oxide film, and 5 is silicon nitride film. DETAILED DESCRIPTION

[0037] like Figure 3 and 4 As shown, the present invention provides a method for thinning a large-area array infrared detector chip that can protect a metal electrode. By evaporating a dielectric layer as a protective layer for the metal electrode 2, the thickness of the dielectric layer can be strictly controlled to be below the thickness of the remaining substrate after polishing. The specific steps are as follows:

[0038] Step A: growing a dielectric layer on the large array infrared detector chip;

[0039] Step B: bonding the large-area infrared detector chip protected by the metal electrode 2 to the glass substrate, and attaching strips around the large-area infrared detector chip; then grinding and polishing until the required chip thickness is reached;

[0040] Step C: making a photoresist corresponding to the ROIC and FPA of the large-array infrared detector chip, removing the large-array infrared detector chip from the glass substrate after polishing, and then uniformly coating a layer of photoresist 1 on the large-array infrared detector chip, exposing the metal electrodes 2 around the large-array infrared detector chip after developing the photoresist, and then post-baking the large-array infrared detector chip;

[0041] Step D: Place the post-baked large-area infrared detector chip in a standard buffered etching solution for etching, and then rinse with flowing deionized water (DI water) to remove the dielectric layer. Since the photoresist 1 protects the surface after FPA polishing, impurities in the dielectric layer will not contaminate the polished surface;

[0042] Step E: Place the large array infrared detector chip in an organic solution (acetone, ethanol and isopropanol) to clean off the photoresist 1 on the surface, thereby completing the grinding and polishing process.

[0043] The dielectric layer can be made of silicon oxide or silicon nitride. The large array infrared detector chip is a superlattice infrared detector chip, more specifically, a gallium antimonide / indium arsenide infrared detector chip.

[0044] The present invention is further described below based on dielectric layers made of different materials.

[0045] Example 1

[0046] like Figure 3 As shown, the silicon oxide film 4 is used as a dielectric layer to protect the metal electrode 2. The specific steps are as follows:

[0047] Step A1: Wipe the surface and back of the GaSb infrared detector chip with a dust-free cloth dipped in ethanol and measure the thickness, move it to the ICP-CVD equipment, and grow a silicon oxide film 4. The process parameters are: silane flow rate is 40sccm, nitrous oxide N2O flow rate is 100sccm, equipment chamber pressure is 8.0mtorr, ICP power is 2000W, RF power is 10W, back-cooling helium pressure is 5torr, temperature is 75℃, time is 2min, and the thickness of the grown silicon oxide film is about 350nm. (The coating temperature meets the process requirements such as epitaxial wafer temperature structure and In column melting point limit).

[0048] Step B1: Bond the GaSb infrared detector chip with electrode protection to the glass substrate, and attach strips around the GaSb infrared detector chip; grind the GaSb infrared detector chip to the first thickness using a 9um particle size abrasive, rinse the surface with a large amount of water, and measure the strip thickness. At this time, the 9um particle size abrasive removes about 450um of the GaSb substrate, and the silicon oxide film 4 evaporated on the surface of GaSb has no pollution or influence on the subsequent grinding and polishing; grind the GaSb infrared detector chip to the second thickness using a 3um particle size abrasive, rinse the surface with a large amount of water, and measure the strip thickness. At this time, the 3um particle size abrasive removes about 50um of the GaSb substrate. Finally, polish the GaSb infrared detector chip until the GaSb infrared detector chip reaches the required thickness.

[0049] Step C1: Make a simple photoresist plate, including ROIC and FPA parts. After polishing, take the slice and evenly coat the entire GaSb infrared detector chip with a layer of photoresist 1. The photoresist 1 model is AZ6130. Use the photoresist plate to develop, and keep a layer of photoresist 1 above the FPA with a thickness of about 3um. After development, the metal electrodes 2 around the GaSb infrared detector chip are exposed, and the GaSb infrared detector chip is baked at 110°C for 60s.

[0050] Step D1: Place the GaSb infrared detector chip that has been post-baked in a standard buffered oxide etchant (BOE) for etching at a removal rate of about 30 nm / s. Soak for 12 seconds, and immediately place the GaSb infrared detector chip in flowing DI water for 30 seconds to remove the silicon oxide film 4 on the metal electrode 2. Since the photoresist 1 protects the surface after FPA polishing, SiO2 impurities will not contaminate the polished surface.

[0051] Step E1: Place the metal electrode 2 in an organic solution (acetone, ethanol and isopropanol) to clean off the photoresist 1 on the surface, thereby completing the grinding and polishing process.

[0052] By evaporating a silicon oxide film 4 on the metal electrode 2 as a dielectric layer instead of the photoresist 1, the process time can be greatly reduced. As shown in Table 1, while reducing the process time and adding some necessary processes, the protection of the metal electrode 2 can be completed more professionally and accurately without causing unnecessary pollution and waste.

[0053] The evaporated silicon oxide film 4 can effectively control the film thickness, and strictly control the dielectric layer protecting the metal electrode 2 to be below the thickness of the remaining substrate after polishing, thus avoiding the problems of uneven coating thickness and easy contamination to other surfaces caused by the traditional method of applying the photoresist 1 by hand. And it will not cause pollution during the grinding and polishing process.

[0054] The silicon oxide film 4 is used to protect the metal electrode 2. During the chip unloading process, the properties of the photoresist 1 will not be changed due to temperature increase, which prevents the photoresist 1 from contaminating the surface of the polished chip (the photoresist 1 melts and flows to the surface), causing difficulty in cleaning.

[0055] Table 1 Comparison of the time required for thinning by conventional process and optimized process using silicon oxide dielectric layer

[0056] .

[0057] Example 2

[0058] like Figure 4 As shown, the silicon nitride film 5 is used as a dielectric layer to protect the metal electrode 2. The specific steps are as follows:

[0059] Step A2: Wipe the surface and back of the gallium antimonide infrared detector chip with a dust-free cloth dipped in ethanol and measure the thickness, move it to the ICP-CVD equipment, and grow a silicon nitride film 5. The process parameters are: SiH4 flow rate is 45sccm, N2 flow rate is 38sccm, equipment chamber pressure is 8mtorr, ICP power is 2000W, RF power is 0W, back-cooling helium pressure is 5torr, temperature is 75°C, the growth rate of silicon nitride film 5 is about 120nm / nub, the time is 3min, and the thickness is about 350nm (the coating temperature meets the process requirements such as epitaxial wafer structure and In column melting point limit).

[0060] Step B2: The GaSb infrared detector chip with the metal electrode 2 protected is bonded to the glass substrate, and strips are attached around the GaSb infrared detector chip; the GaSb infrared detector chip is ground to the first thickness using a 9um particle size abrasive, the surface is rinsed with a large amount of water, and the strip thickness is measured. At this time, the amount of GaSb substrate removed by the 9um particle size abrasive is about 450um, and the silicon nitride film 5 evaporated on the surface of GaSb has no pollution and influence on the subsequent grinding and polishing process; the GaSb infrared detector chip is ground to the second thickness using a 3um particle size abrasive, the surface is rinsed with a large amount of water, and the strip thickness is measured. At this time, the amount of GaSb substrate removed by the 3um particle size abrasive is about 50um, and finally the GaSb infrared detector chip is polished until the GaSb infrared detector chip reaches the required thickness.

[0061] Step C2: Make a simple photoresist plate, including ROIC and FPA parts. After polishing, evenly coat the entire GaSb infrared detector chip with a layer of photoresist 1, the photoresist 1 model is AZ6130, and use the photoresist plate to develop, leaving a layer of photoresist 1 above the FPA with a thickness of about 3um. After development, the metal electrodes 2 around the GaSb infrared detector chip are exposed, and the GaSb infrared detector chip is baked at 110°C for 60s.

[0062] Step D2: After post-baking, the GaSb infrared detector chip is placed in a plasma etcher (RIE) with the following parameters: substrate temperature 20°C, removal rate of about 65nm / min, and 5.4min required to remove the silicon nitride film 5 protecting the metal electrode 2. Since the photoresist 1 protects the surface after FPA polishing, silicon nitride impurities will not contaminate the polished surface.

[0063] Step E2: Place the GaSb infrared detector chip in an organic solution (acetone, ethanol and isopropanol) to clean off the photoresist 1 on the surface, thereby completing the grinding and polishing process.

[0064] By evaporating a silicon nitride film 5 on the metal electrode 2 as a dielectric layer instead of the photoresist 1, the process time can be greatly reduced, as shown in Table 2 below.

[0065] Using RIE equipment to remove silicon nitride film 5 can avoid the slow corrosion of silicon nitride by BOE solution, which will react with the silicon oxide passivation layer inside the focal plane over a long period of time, affecting chip performance. Although RIE takes 5.4 minutes to completely remove silicon nitride, side etching will not occur, and the substrate temperature is 20°C, so the chip will not be damaged due to high temperature.

[0066] Table 2 Comparison of the time required for thinning by conventional process and optimized process using silicon nitride dielectric layer

[0067] .

[0068] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for thinning a large array infrared detector chip capable of protecting metal electrodes, characterized in that: The following steps are involved: Step A: growing a dielectric layer for protecting the metal electrode on the large array infrared detector chip; Step B: bonding the large array infrared detector chip to the glass substrate, and attaching strips around the large array infrared detector chip; then grinding and polishing until the required chip thickness is reached; Step C: making a photoresist corresponding to the ROIC and FPA of the large-array infrared detector chip, removing the large-array infrared detector chip from the glass substrate after polishing, and then uniformly coating a layer of photoresist on the large-array infrared detector chip, exposing the metal electrodes around the large-array infrared detector chip after developing the photoresist, and then post-baking the large-array infrared detector chip; Step D: removing the dielectric layer; Step E: Place the large array infrared detector chip in an organic solution, clean off the photoresist on the surface, and complete the grinding and polishing process.

2. The method for thinning a large array infrared detector chip capable of protecting metal electrodes according to claim 1, characterized in that: Before the dielectric layer growth in step A is performed, the surface and back of the large array infrared detector chip are first wiped.

3. The method for thinning a large array infrared detector chip capable of protecting metal electrodes according to claim 2, characterized in that: The dielectric layer in step A is made of silicon oxide or silicon nitride.

4. A method for thinning a large array infrared detector chip capable of protecting metal electrodes according to claim 2 or 3, characterized in that: ICP-CVD equipment is used to evaporate a dielectric layer on the surface of the large array infrared detector chip.

5. The method for thinning a large-array infrared detector chip capable of protecting metal electrodes according to claim 4, characterized in that: In step B, the thickness of the grind is measured by measuring the thickness of the strip.

6. The method for thinning a large-array infrared detector chip capable of protecting metal electrodes according to claim 3, characterized in that: When silicon oxide is used as the dielectric layer, step D is specifically as follows: placing the post-baked large-array infrared detector chip in a standard buffered etching solution for etching, and then washing with flowing deionized water to remove the silicon oxide dielectric layer.

7. The method for thinning a large array infrared detector chip capable of protecting metal electrodes according to claim 3, characterized in that: When silicon nitride is used as the dielectric layer, step D is specifically as follows: placing the post-baked large-array infrared detector chip in a plasma etcher to remove the silicon nitride dielectric layer.

8. The method for thinning a large array infrared detector chip capable of protecting metal electrodes according to claim 2, characterized in that: The organic solution in step E is acetone, ethanol and isopropanol solution. The photoresist is first removed with acetone solution, then with ethanol solution to remove acetone residue, then with isopropanol solution to remove ethanol residue, and finally with nitrogen blow-drying.

9. The method for thinning a large array infrared detector chip capable of protecting metal electrodes according to claim 5, characterized in that: In step B, grinding is performed at least once using grinding materials with different particle sizes to reach the required thickness of the large-array infrared detector chip and then polishing is performed.

10. The method for thinning a large array infrared detector chip capable of protecting metal electrodes according to claim 9, characterized in that: The large-area array infrared detector chip is a second-type superlattice large-area array infrared detector chip.

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