A multi-type interface access unified scheduling deterministic Ethernet scheduling device

Abstract

This invention belongs to the field of airborne bus communication technology in airborne avionics systems, and particularly relates to a deterministic Ethernet scheduling device for unified scheduling of multiple interface access. It includes: a host access interface module, a hardware interface access module, a standard Ethernet interface access module, a communication configuration receiving and management module, a communication configuration storage and status management module, a multi-service type interface output processing module, a service priority mapping management module, an inbound traffic management module, and a network data processing module. It provides integrated services with different QoS capabilities for different interface access service characteristics, effectively controls the timeliness of service access on each interface, meets control and buffering requirements, and realizes a unified transmission device for multiple interface accesses based on a dynamic, flexible, and highly deterministic communication architecture, providing distributed synchronous collaboration and time-division gating scheduling.

Description

Technical Field

[0001] This invention belongs to the field of airborne bus communication technology in airborne avionics systems, and particularly relates to a multi-type interface access unified scheduling deterministic Ethernet scheduling device. Background Technology

[0002] Current mainstream airborne bus networks, employing event-triggered communication mechanisms, allow end systems to connect and send messages at any time, inevitably leading to transmission contention. This results in uncontrollable latency and jitter in end-to-end data stream transmission, failing to meet the demands of modern avionics systems for distributed communication applications with varying time-criticality and safety requirements. Time-Triggered Ethernet (TTE), a next-generation airborne bus based on a time-triggered architecture, establishes a global network synchronization clock based on a clock synchronization mechanism. Through a deterministic time-triggered communication mechanism, it ensures contention-free TT frame communication, significantly improving the time determinism and real-time performance of network communication. It also supports the transmission of event-triggered communication frames, meeting the integration needs of application tasks with different time-criticality levels. However, the fine-grained mapping of communication bandwidth time slots to each message stream via TDMA in the TTE technology requires strong coupling of corresponding application categories, making the TT services carried by the system overly closed and lacking flexibility in design. This hinders system integration and iterative maintenance in airborne environments with diverse operating modes. Summary of the Invention

[0003] The technical problem solved by this invention is that current general-purpose Ethernet, AFDX, FC and other switching networks cannot achieve strong real-time, low-jitter communication architecture services. Furthermore, Time-Triggered Termination (TTE) technology is too closed, and its TT service constraints and definitions do not support flexible, dynamic, and reconfigurable access features. The purpose of this invention is to provide a deterministic Ethernet scheduling device with unified scheduling for multiple interface accesses. This device provides integrated services with different QoS capabilities for different interface access service characteristics, effectively controls the timeliness of access for each interface service, meets control and buffering requirements, and realizes a design method for a unified transmission device for multiple interface accesses based on a dynamic, flexible, and highly deterministic communication architecture, providing distributed synchronous collaboration and time-division gating scheduling.

[0004] The technical solution of the present invention:

[0005] A multi-type interface access unified scheduling deterministic Ethernet scheduling device, the device comprising:

[0006] Host access interface module 1, hardware interface access module 2, standard Ethernet interface access module 3, communication configuration receiving and management module 4, communication configuration storage and status management module 5, multi-service type interface output processing module 6, service priority mapping management module 7, inbound traffic management module 8, network data processing module 11;

[0007] The host access interface module 1, hardware interface access module 2, and standard Ethernet interface access module 3 are parallel modules, all connected to the multi-service type interface output processing module 6. The input data of the host access interface module 1 is divided into configuration data and communication data. The configuration data is input into the communication configuration receiving and management module 4. The output of the communication configuration receiving and management module 4 is connected to the communication configuration storage and status management module 5 for storage. The output of the communication configuration storage and status management module 5 is connected to the multi-service type interface output processing module 6. The output of the multi-service type interface output processing module 6 is connected to the service priority mapping management module 7. The output of the service priority mapping management module 7 enters the priority queue cache of the network data processing module 11.

[0008] Furthermore, the device also includes: an inbound traffic management module 8, a global synchronization module 9, and a synchronization establishment and maintenance module 10;

[0009] The inbound traffic management module 8 is located between the service priority mapping management module 7 and the network data processing module 11. The network data processing module 11 completes initial synchronization through the global synchronization module 9, and performs communication band scheduling through the synchronization establishment and maintenance module 10.

[0010] Furthermore, the host access interface module 1 supports PCIe, PCI, and localbus interface access communication, and is also compatible with the above-mentioned types of interface software emulation interfaces, transmitting the interface access data to the multi-service type interface output processing module 6.

[0011] The hardware interface access module 2 supports data input and output of SRIO, IB, and DVR interfaces, and realizes the encapsulation and stripping of the hardware characteristics of the interface data, and transmits the data accessed by the interface to the multi-service type interface output processing module 6.

[0012] The standard Ethernet interface access module 3 supports standard Ethernet access communication, provides network frame parsing and processing, and transmits the data accessed through the interface to the multi-service type interface output processing module 6.

[0013] Furthermore, the communication configuration storage and status management module 5 stores predefined configuration rules, including at least the type and number of external access interfaces under the current online operation of the scheduling device, the mapping relationship between the interface service type characteristics and the scheduling queue of the unified scheduling deterministic Ethernet, the bandwidth capacity of each type of interface service, the deterministic Ethernet device ID of the peer for interface service pass-through, and the scheduling queue buffer depth of the deterministic Ethernet.

[0014] Furthermore, the communication configuration receiving and management module 4 receives configuration data from the data path of the host access interface module 1, parses it according to the rules agreed upon in the configuration, and stores the parsing result in the communication configuration storage and status management module 5;

[0015] The communication configuration storage and status management module 5 stores the data according to the table lookup method required by the multi-service type interface output processing module 6, service priority mapping management module 7, inbound traffic management module 8, and network data processing module 11, and provides the above modules with access paths for querying and accessing the data.

[0016] The multi-service type interface output processing module 6 receives data from three interfaces: host access interface module 1, hardware interface access module 2, and standard Ethernet interface access module 3, and processes the data accordingly.

[0017] The multi-service type interface output processing module 6 classifies data frames according to interface type and data frame priority, and updates the protocol header of Ethernet data frames accessed by the standard Ethernet interface access module 3. The update parameters are derived from the communication configuration storage and status management module 5.

[0018] The multi-service type interface output processing module 6 performs complete protocol encapsulation on the pure user data accessed by the host access interface module 1. For the data of the hardware interface of the hardware interface access module 2, two different processing methods can be selected: one is to directly encapsulate the data collected by the hardware interface through tunneling and then transmit it transparently after complete protocol encapsulation; the other is to strip the hardware attribute characteristics of the interface and encapsulate the remaining valid data with complete protocol.

[0019] Furthermore, the service priority mapping management module 7 receives input from the multi-service type interface output processing module 6, looks up the table according to the communication configuration storage and status management module 5, obtains the independent priority category of the input data of the multi-service type interface output processing module 6, and accesses the corresponding priority scheduling cache queue.

[0020] Furthermore, the inbound traffic management module 8 is a functional module between the service priority mapping management module 7 and the priority scheduling cache. It performs bandwidth agreement on each priority queue data input by the service priority mapping management module 7 according to the parameters of the communication configuration storage and status management module 5 to avoid unconventional bandwidth services.

[0021] Furthermore, the global synchronization module 9 constructs synchronization based on the interaction processing of external input data, and the synchronization establishment and maintenance module 10 maintains and reconstructs the synchronization based on the synchronization signal provided by the global synchronization module 9.

[0022] The synchronization establishment and maintenance module 10 provides synchronization information to the network data processing module 11. The network data processing module 11 performs scheduling processing based on the data entering the priority scheduling cache and according to the pre-planned configuration of the communication configuration storage and status management module 5.

[0023] The technical solution of this invention utilizes a gated scheduling transmission mechanism based on high-precision network clock synchronization, which enables contention-free transmission of TAS data streams in the network. It integrates bandwidth-controlled access services and TAS data streams on the same physical link, while supporting dynamic access planning for service resource allocation. This improves the determinism and real-time performance of data communication, as well as the flexibility of system service access and integration expansion. Consequently, this airborne bus is better suited for applications with certain real-time and security requirements, while also supporting flexible access and dynamic reconfiguration of system service communication. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of a multi-type interface access unified scheduling deterministic Ethernet scheduling device provided in an embodiment of the present invention. Detailed Implementation

[0025] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings.

[0026] To meet the network architecture design and application requirements of future intelligent airborne systems, in the context of a hierarchical and multi-service integrated communication architecture, the data collection, processing, and exchange of intelligent avionics need to have a certain degree of determinism and reliability, as well as a certain degree of openness and flexibility. In response to the constantly iterating and updating system requirements and the ever-changing working modes, which involve communication resource reconstruction and migration planning, a deterministic communication transmission architecture with flexible dynamic access for differentiated service scenarios is proposed.

[0027] As an indispensable component of this network architecture, deterministic transmission communication equipment for differentiated business scenarios is embedded in each avionics communication subsystem, providing a unified interface for the connection between each communication subsystem and the network system switch, and realizing data transmission applications with different time-critical needs between network devices.

[0028] This invention provides a multi-type interface access unified scheduling deterministic Ethernet scheduling device, such as... Figure 1 As shown, the device includes:

[0029] Host access interface module 1, hardware interface access module 2, standard Ethernet interface access module 3, communication configuration receiving and management module 4, communication configuration storage and status management module 5, multi-service type interface output processing module 6, service priority mapping management module 7, inbound traffic management module 8, network data processing module 11;

[0030] The host access interface module 1, hardware interface access module 2, and standard Ethernet interface access module 3 are parallel modules, all connected to the multi-service type interface output processing module 6. The input data of the host access interface module 1 is divided into configuration data and communication data. The configuration data is input into the communication configuration receiving and management module 4. The output of the communication configuration receiving and management module 4 is connected to the communication configuration storage and status management module 5 for storage. The output of the communication configuration storage and status management module 5 is connected to the multi-service type interface output processing module 6. The output of the multi-service type interface output processing module 6 is connected to the service priority mapping management module 7. The output of the service priority mapping management module 7 enters the priority queue cache of the network data processing module 11.

[0031] The device also includes: an inbound traffic management module 8, a global synchronization module 9, and a synchronization establishment and maintenance module 10;

[0032] The inbound traffic management module 8 is located between the service priority mapping management module 7 and the network data processing module 11. The network data processing module 11 completes initial synchronization through the global synchronization module 9, and performs communication band scheduling through the synchronization establishment and maintenance module 10.

[0033] The host access interface module 1 supports PCIe, PCI, and localbus interface access communication, and is also compatible with the above-mentioned types of interface software emulation interfaces, and transmits the interface access data to the multi-service type interface output processing module 6.

[0034] The hardware interface access module 2 supports data input and output of SRIO, IB, and DVR interfaces, and realizes the encapsulation and stripping of the hardware characteristics of the interface data, and transmits the data accessed by the interface to the multi-service type interface output processing module 6.

[0035] The standard Ethernet interface access module 3 supports standard Ethernet access communication, provides network frame parsing and processing, and transmits the data accessed through the interface to the multi-service type interface output processing module 6.

[0036] The communication configuration storage and status management module 5 stores predefined configuration rules, including at least the type and number of external access interfaces under the current online operation of the scheduling device, the mapping relationship between the interface service type characteristics and the scheduling queue of the unified scheduling deterministic Ethernet, the bandwidth capacity of each type of interface service, the deterministic Ethernet device ID of the peer of the interface service transparent transmission, and the scheduling queue buffer depth of the deterministic Ethernet.

[0037] The communication configuration receiving and management module 4 receives configuration data from the data path of the host access interface module 1, parses it according to the rules agreed upon in the configuration, and stores the parsing result in the communication configuration storage and status management module 5.

[0038] The communication configuration storage and status management module 5 stores the data according to the table lookup method required by the multi-service type interface output processing module 6, service priority mapping management module 7, inbound traffic management module 8, and network data processing module 11, and provides the above modules with access paths for querying and accessing the data.

[0039] The multi-service type interface output processing module 6 receives data from three interfaces: host access interface module 1, hardware interface access module 2, and standard Ethernet interface access module 3, and processes the data accordingly.

[0040] The multi-service type interface output processing module 6 classifies data frames according to interface type and data frame priority, and updates the protocol header of Ethernet data frames accessed by the standard Ethernet interface access module 3. The update parameters are derived from the communication configuration storage and status management module 5.

[0041] The multi-service type interface output processing module 6 performs complete protocol encapsulation on the pure user data accessed by the host access interface module 1. For the data of the hardware interface of the hardware interface access module 2, two different processing methods can be selected: one is to directly encapsulate the data collected by the hardware interface through tunneling and then transmit it transparently after complete protocol encapsulation; the other is to strip the hardware attribute characteristics of the interface and encapsulate the remaining valid data with complete protocol.

[0042] The service priority mapping management module 7 receives input from the multi-service type interface output processing module 6, looks up the table according to the communication configuration storage and status management module 5, obtains the independent priority category of the input data of the multi-service type interface output processing module 6, and connects it to the corresponding priority scheduling cache queue.

[0043] The inbound traffic management module 8 is a functional module between the service priority mapping management module 7 and the priority scheduling cache. It performs bandwidth agreement on each priority queue data input by the service priority mapping management module 7 according to the parameters of the communication configuration storage and status management module 5 to avoid unconventional bandwidth services.

[0044] The global synchronization module 9 constructs synchronization based on the interaction of external input data, and the synchronization establishment and maintenance module 10 maintains and reconstructs the synchronization based on the synchronization signal provided by the global synchronization module 9.

[0045] The synchronization establishment and maintenance module 10 provides synchronization information to the network data processing module 11. The network data processing module 11 performs scheduling processing based on the data entering the priority scheduling cache and according to the pre-planned configuration of the communication configuration storage and status management module 5.

[0046] The host access interface module 1, hardware interface access module 2, and standard Ethernet interface access module 3 can be purely hardware interfaces or software-defined bus interfaces. Based on the transmission time sensitivity of the input frames of the above interfaces and the length of a single frame bitstream, the mapping to the scheduling queue of the unified scheduling deterministic Ethernet is determined. If the length of a single frame input to the interface exceeds the maximum MTU (payload) of deterministic Ethernet, it needs to be adapted to the frame buffer of the unified network scheduling queue according to the agreed slicing mechanism (such as Ethernet IP fragmentation).

[0047] The prerequisite for multi-interface service access is that the total bandwidth of services received by multiple interfaces cannot exceed the service bandwidth capacity of the device's external output interfaces. Simultaneously, the MAC layer access bandwidth of the deterministic Ethernet device is shared by multiple priority scheduling queues. Services of the same type from different input interfaces will share access to a specific priority scheduling queue in the MAC layer. Therefore, for the system to allow multi-type interface service access and complete transmission through the deterministic Ethernet device's MAC layer scheduling, the entire system design must be constrained within reasonable boundaries. Even if the bandwidth statistics of multi-interface access services do not exceed the output scheduling bandwidth of the deterministic Ethernet device at a certain time granularity (such as 1s access bandwidth or a finer granularity like the 50ms avionics mission cycle), multi-interface services... There is no coordinated enforcement of constraints. Multiple concurrent access data streams from various interfaces are mapped to a shared scheduling queue at the MAC layer. However, the device's internal buffer is limited. For TAS services, there are fixed scheduling permission slots within a period. Access services outside of scheduling permission time may overwhelm the TAS queue buffer, resulting in unacceptable data loss within the device. The MAC layer's priority scheduling queue has backpressure control. This means that the MAC layer's priority scheduling queue informs the interface end to stop the shared time-sharing scheduling of multiple interface services mapped to this priority scheduling queue. This prevents the interface end's shared buffer from copying or moving data to the MAC layer's priority scheduling queue. When the interface end's shared buffer is full, a backpressure mechanism is used to control the interface end's data source to stop sending.

[0048] It supports multiple types of interface access and transmission, including: data access interfaces such as PCIe / PCI / localbus provided by common CPU / DSP processors; standard Ethernet service access interfaces; airborne sensor communication access interfaces such as SRIO / IB / DVR; or software-defined bus interfaces that simulate hardware characteristics while isolating physical hardware.

[0049] The services accessed through each interface are classified in different ways: 1. Data accessed by the host machine carries a classification identifier when accessed via PCIe / PCI / localbus. This identifier is predefined and issued when the user generates application data. The device internally performs frame classification lookup and mapping based on the data's classification identifier, and maps it to the scheduling queue of the unified scheduling deterministic Ethernet based on the relationship obtained from the lookup table. 2. Standard Ethernet service access interface data enters the frame classification mapping and dispatch module for classification and scheduling based on the service's QoS type and VLAN ID, and is classified into the scheduling queue of the unified scheduling deterministic Ethernet. 3. Sensor data such as SRIO / IB / DVR are classified and processed according to the characteristics of the access service type: In the single-characteristic service mode, a single interface is used to map to the scheduling service queue of the single type of unified scheduling deterministic Ethernet; in the multi-type service mode, different service types in a single interface are mapped to different scheduling service queues of the unified scheduling deterministic Ethernet. 4. Services of the software-defined bus interface are mapped to queue identifiers based on the service characteristics of the first few hardware interfaces it simulates.

[0050] The predefined configuration rules in the communication configuration receiving and management module 4 and the communication configuration storage and status management module 5 can be manually configured or configured to the product via a programmable interface, or remotely loaded via a host interface or general Ethernet. The predefined configuration rules include the type and number of external accesses under the current online operation of the scheduling device, the mapping relationship between the interface service type characteristics and the scheduling queue of the deterministic Ethernet of the unified scheduling, the bandwidth capacity of each type of interface service, the deterministic Ethernet device ID of the peer of the interface service, and the scheduling queue buffer depth of the deterministic Ethernet.

[0051] The multi-service type interface output processing module 6 has an independent local interface data buffer queue for each interface. The buffer data of this queue is designed to be written to the MAC scheduling shared queue corresponding to the deterministic Ethernet using shared time-division scheduling. The MAC layer scheduling shared queue is oriented towards physical port access transmission. The output rate of this buffer scheduling is determined by the proportion of the system scheduling cycle allocated to the queue. Under a 10Gbps access bandwidth, the maximum scheduling capacity of the queue is determined by the ratio between the total gated time slots allocated to the queue and the scheduling cycle.

[0052] The network data processing module 11 uses a system synchronization time base (deterministic Ethernet devices access the system to obtain synchronization time and maintain time through the device's local crystal oscillator) to generate periodic multi-queue scheduling pulses. Each queue pulse is divided into a scheduling start pulse and a scheduling end pulse. The pulse excites the time base gating switch of the queue to act. Based on the pulse signal, the scheduling and transmission control of the service is triggered. The gating opens the corresponding queue data frames and schedules them back-to-back in a first-in-first-out mode until the scheduling end pulse is detected. Then, it is judged whether the remaining time fragment plus the protection bandwidth time slot (the system selects whether to enable the protection bandwidth time slot setting according to different scheduling modes) meets the bandwidth requirements of the current scheduling frame in the queue. If the condition is met, transmission continues. If not, the queue scheduling can be terminated by turning off the gating enable switch of the scheduling queue in advance; or, transmission can be continued by using fragmented frame management mode, that is, splitting the data frame of this scheduling into frames that meet the transmission requirements within the protection bandwidth for transmission. Two scheduling control methods can be used at the end boundary of the gating scheduling of the device: 1. After the current gating time slot ends, the system allocates a transmission continuation time slot for this queue, which is also the start protection time slot for the next gating scheduling. This protection time slot can be defined as the transmission time of the longest frame bit stream in the current gating (number of bit streams in bits x / y Mbps, where x is "number of bytes in the longest frame + 20 bytes" multiplied by 8; y is the deterministic Ethernet port rate in Mbps) or the transmission time of a single fragment frame bit stream; 2. Start scheduling for the next gating scheduling, regardless of whether the current physical link status is idle, the data of the gating queue is scheduled to be transmitted.

[0053] The network data processing module 11 maps the services of the access interface according to the service characteristics. Services of the same type from different interfaces are assigned to a certain type of scheduling queue in the deterministic Ethernet to wait for scheduling. Messages of the same type on each interface are accessed to a certain type of shared scheduling queue in the corresponding MAC layer using a time-division multiplexing access mechanism.

[0054] Before storing the services from each interface into the shared scheduling queue, the network data processing module 11 is designed with the following receiving and processing flow, such as route lookup and packet assembly. Then, the data from each interface is classified and mapped to the shared scheduling queue of the deterministic Ethernet MAC for output communication. For data transmission between the shared scheduling queue of the deterministic Ethernet MAC and the shared scheduling queue of the deterministic Ethernet MAC for each interface, an asynchronous same-frequency or asynchronous cross-frequency dual-port queue control mechanism is designed.

[0055] The network data processing module 11 has intelligent autonomous capabilities for storing services from each interface into the deterministic Ethernet MAC scheduling shared queue's TDMA period and time slot allocation. The device itself collects and statistically analyzes the service type, service bandwidth capacity ratio, and service frame access period characteristic parameters of each interface (or the device adopts a user-programmable access configuration, and the user end pre-collects and statistically analyzes the above information for calculation and configuration through the programmable interface) to define the TDMA period and time slot allocation of each shared scheduling queue online: 1. The allocated time slots are converted into the cumulative bandwidth within 1 second to meet the bandwidth requirements of the statistical input; 2. The frequency of the number of frames written to the shared scheduling queue in the allocated TDMA period is not lower than the frequency corresponding to the service frame access period; 3. The services corresponding to each interface write the service data in the interface to the corresponding shared scheduling queue according to the allocated time slot control right; 4. Each shared scheduling queue performs TDMA period timing in parallel and independently, and allocates the control right of the corresponding time slot to the services of the corresponding interface. For each MAC shared scheduling queue, a time-division multiplexing mechanism is required to schedule the interface-side data cache (when the mode becomes a one-to-one architecture, a single interface occupies the entire TDMA time slot, and a simple configuration allows a single time slot to occupy the entire TDMA cycle). At the same time, the number of internal data cache levels is controlled to a minimum to avoid copying between internal caches from increasing transmission scheduling latency.

[0056] The Ethernet interface input process in the standard Ethernet interface access module 3 is as follows: Communication frames in the general Ethernet interface access system include the device's own communication configuration information and services transmitted via deterministic Ethernet. Data frames serving as communication configuration information undergo closed-loop reception processing in the device's configuration receiving and processing module, without needing to be transmitted externally. Service frames serving as deterministic Ethernet are relayed on the local device side and require scheduling and transmission via a service type mapping to a deterministic Ethernet MAC scheduling shared queue. After receiving data frames from the general Ethernet interface and verifying MAC protocol compliance, they are stored in the local interface's data buffer queue. The MAC address of the data frame is extracted for address-based type differentiation. Data frames with MAC addresses pointing to the local device are used as communication configuration information and enter the configuration receiving and processing module; other service frames are used as relayed data frames. As a relay forwarding data frame, i.e. a data frame used for forwarding on a deterministic Ethernet interface, it is stored in the data buffer queue of this interface, the scheduling descriptor of the data frame is output, priority and type information is extracted from the data frame and input into the relay frame type mapping module, the mapping relationship between the frame and the multi-type frame management queue managed by this interface is obtained, and the scheduling descriptor of the data frame is stored in the corresponding multi-type frame management queue; each descriptor of the multi-type frame management queue can be uniquely mapped to a certain shared scheduling queue of the MAC layer of the deterministic Ethernet device.

[0057] In Host Access Interface Module 1, the host accesses control via the internal bus: Data generated by the host on this device is transmitted through the internal bus to the scheduling device. After the load data is packetized according to protocol, it is stored in the data buffer queue of this interface. Based on its service characteristics, a user configuration type lookup table is performed, mapping the data to the corresponding MAC scheduling shared queue of the deterministic Ethernet for scheduled transmission. The data transmitted via the internal bus carries a service characteristic identifier. This identifier is extracted and entered into the user global configuration module to look up the corresponding MAC layer scheduling shared queue, forming the scheduling descriptor of the data frame. This determines the mapping relationship between the frame and the multi-type frame management queues managed by this interface, and the scheduling descriptor of the data frame is stored in the corresponding multi-type frame management queue. Each descriptor in the multi-type frame management queue can be uniquely mapped to a certain shared scheduling queue in the MAC layer of the deterministic Ethernet device.

[0058] In hardware interface access module 2, SRIO / IB / DVR interface access control is implemented: Input data generated by SRIO / IB / DVR interfaces is processed by the physical layer serial-to-parallel conversion of the corresponding interface, and the resulting data is stored in the data buffer queue of its respective interface. The scheduling descriptor of the data frame is then extracted. Based on the characteristics of each interface and the type identifier of different data types on the unified interface (typically, for SRIO / IB / DVR type interfaces, each interface input data corresponds to a specific service type of the deterministic Ethernet device, and there is no internal distinction within the interface; if distinction is required, the user needs to plan in detail beforehand and identify the distinction in the input data), the data is input into the user-configured type lookup table module. This module obtains the mapping relationship between the frame and the multi-type frame management queues managed by this interface, and stores the scheduling descriptor of the data frame in the corresponding multi-type frame management queue. Each descriptor in the multi-type frame management queue can be uniquely mapped to a shared scheduling queue in the MAC layer of the deterministic Ethernet device. For the SRIO / IB / DVR type interface service access device sending scheduling and access to peer device receiving processing, the interface-to-interface mode is adopted, rather than the send / receive service docking mode. That is, the sending data input by one interface does not have the situation of different addressing access to different receiving end devices.

[0059] The abstract software-defined bus interface of host access interface module 1, hardware interface access module 2, and standard Ethernet interface access module 3 simulates the frame processing process of similar hardware interfaces. The data frame content received by the software bus interface is stored in the interface buffer, and the frame descriptor is obtained. The identification information of the corresponding fields inside the frame is provided, and the corresponding configuration module is queried to obtain the corresponding mapping relationship. The data descriptor is then stored in the multi-type frame management queue managed by the interface.

[0060] The network data processing module 11 contains multi-type frame management queues for each interface, used to store and manage frame descriptors from each interface. The classification pattern of the multi-type frame management queues for each interface is consistent, not exceeding three types (time-aware scheduling (TAS) queues, flow control (CBS) queues, and BE queues for insertion-type transmission). Some interfaces may have fewer than three types, such as SRIO / IB / DVR interfaces, which have similar data frame characteristics and typically correspond to a single type of frame management mechanism. The deterministic Ethernet scheduling device coordinates the total number of each type of frame management queue in each interface, and, in accordance with the service type, service bandwidth capacity ratio, and service frame access period characteristic parameters collected and statistically analyzed for each interface as described in Part 10 (or, the device adopts a user-programmable access configuration, with the user end pre-collecting and statistically analyzing the above information for calculation and configuration via a programmable interface), defines the TDMA period and time slot allocation for each shared scheduling queue online.

[0061] The network data processing module 11 is designed with a shared queue time-sharing scheduling mechanism for copying data to the priority scheduling queue of the MAC layer. The time-sharing design principle of this mechanism is to classify the data received by the three types of interfaces and then perform time-sharing scheduling of the same type: (How to perform time-sharing is a science, and there are many possible combination modes. The maximum boundary time-sharing design mode is to support the scheduling of data from the same type of queues in the multi-type frame queues under three different interfaces. All data is copied to the corresponding MAC layer priority scheduling queue buffer according to the deterministic Ethernet device interface rate and wait for scheduling. This mode has a very high requirement for the capacity of the MAC layer priority scheduling queue. After adopting the backpressure mechanism, there may be high-frequency backpressure interruption of the above time-sharing scheduling operation) The total time-sharing operation period and the number of time slices occupied by each queue in the total time-sharing operation period are defined by the data bandwidth resource utilization rate and total bandwidth of the same type of queues in the multi-type frame queues of each interface. The time slices are usually defined as equal in length. Within the scheduling time slice of the multi-type frame queue of the corresponding interface, the scheduling descriptor of the current queue cache cell of the multi-type frame queue is output. The data content is extracted from the unique shared queue cache of the corresponding interface through the description and written to the data cache of the priority scheduling queue of the corresponding MAC layer. The descriptor formed by the data in the new queue is stored in the descriptor scheduling cache of the priority scheduling queue.

[0062] Considering a new layer of characteristics, data from different interfaces is mapped and uniformly scheduled within the network. At the receiving end, how should this data be differentiated and processed? After the receiving port extracts a frame and performs unified protocol processing, if further service encapsulation and differentiation are not performed, the receiving end lacks the ability to differentiate and process data. Designing a unified hybrid scheduling system for multiple interfaces also requires differentiation and identification during the unification process.

[0063] This embodiment implements a time-triggered transmission mechanism based on fault-tolerant network clock synchronization, which can improve the time determinism, real-time performance, reliability, and security of data communication to a certain extent. It also supports event-type message transmission, meeting the needs of applications with different real-time requirements. This design method greatly enriches users' methods for selecting airborne buses based on a time-triggered architecture and promoting the integration of airborne buses. Furthermore, this patent's application is independent of the hardware platform, has a wide range of applicability, and possesses significant market prospects and economic benefits.

[0064] It is understood that those skilled in the art can make equivalent substitutions or modifications to the technical solution and inventive concept of the present invention, and all such substitutions or modifications should fall within the protection scope of the appended claims.

Claims

1. A multi-type interface access unified scheduling deterministic Ethernet scheduling device, characterized in that, The device includes: Host access interface module (1), hardware interface access module (2), standard Ethernet interface access module (3), communication configuration receiving management module (4), communication configuration storage and status management module (5), multi-service type interface output processing module (6), service priority mapping management module (7), inbound traffic management module (8), network data processing module (11). The host access interface module (1), hardware interface access module (2) and standard Ethernet interface access module (3) are parallel modules, all of which are connected to the multi-service type interface output processing module (6); the input data of the host access interface module (1) is divided into configuration data and communication data. The configuration data is input into the communication configuration receiving management module (4). The output of the communication configuration receiving management module (4) is connected to the communication configuration storage and status management module (5) for storage. The output of the communication configuration storage and status management module (5) is connected to the multi-service type interface output processing module (6). The output of the multi-service type interface output processing module (6) is connected to the service priority mapping management module (7). The output of the service priority mapping management module (7) enters the priority queue cache of the network data processing module (11). The host access interface module (1) supports PCIe, PCI and localbus interface access communication and transmits the data accessed through the interface to the multi-service type interface output processing module (6). The hardware interface access module (2) supports data input and output of SRIO, IB and DVR interfaces, and realizes the encapsulation and stripping of the characteristic attributes of the interface data hardware, and transmits the data accessed by the interface to the multi-service type interface output processing module (6). The standard Ethernet interface access module (3) supports standard Ethernet access communication, provides network frame parsing processing, and transmits the data accessed by the interface to the multi-service type interface output processing module (6). The communication configuration storage and status management module (5) stores predefined configuration rules, including at least the type and number of external access interfaces under the current online operation of the scheduling device, the interface service type characteristics and the scheduling queue mapping relationship of the unified scheduling deterministic Ethernet, the bandwidth capacity of each type of interface service, the deterministic Ethernet device ID of the peer of the interface service transparent transmission, and the scheduling queue buffer depth of the deterministic Ethernet. The communication configuration receiving and management module (4) receives configuration data from the data path of the host access interface module (1), parses it according to the rules agreed upon in the configuration, and stores the parsing result in the communication configuration storage and status management module (5). The communication configuration storage and status management module (5) stores the data according to the table lookup method required by the multi-service type interface output processing module (6), service priority mapping management module (7), inbound traffic management module (8), and network data processing module (11), and provides the above modules with access paths for querying and accessing the data. The multi-service type interface output processing module (6) receives data from the host access interface module (1), hardware interface access module (2), and standard Ethernet interface access module (3) and performs classified processing on the data access of the three interfaces. The multi-service type interface output processing module (6) classifies according to interface type and data frame priority, and implements the standard Ethernet interface access module (3) to update the protocol header of the Ethernet data frame accessed by the standard Ethernet interface access module (3). The update parameters come from the communication configuration storage and status management module (5). The multi-service type interface output processing module (6) performs complete protocol encapsulation on the pure user data accessed by the host access interface module (1). For the data of the hardware interface of the hardware interface access module (2), two different processing methods can be selected: one is to directly encapsulate the data collected by the hardware interface through tunnel and then transmit it transparently after complete protocol encapsulation; the other is to strip the hardware attribute features of the interface and encapsulate the remaining valid data with complete protocol. The service priority mapping management module (7) receives input from the multi-service type interface output processing module (6), looks up the table according to the communication configuration storage and status management module (5), obtains the independent priority category of the input data of the multi-service type interface output processing module (6), and connects it to the corresponding priority scheduling cache queue.

2. The multi-type interface access unified scheduling deterministic Ethernet scheduling device according to claim 1, characterized in that, The device further includes: a global synchronization module (9) and a synchronization establishment and maintenance module (10). The inbound traffic management module (8) is located between the service priority mapping management module (7) and the network data processing module (11). The network data processing module (11) completes the initial synchronization through the global synchronization module (9). The network data processing module (11) performs communication band scheduling through the synchronization establishment and maintenance module (10).

3. The multi-type interface access unified scheduling deterministic Ethernet scheduling device according to claim 2, characterized in that, The inbound traffic management module (8) is a functional module between the service priority mapping management module (7) and the priority scheduling cache. It performs bandwidth agreement on each priority queue data input by the service priority mapping management module (7) according to the parameters of the communication configuration storage and status management module (5) to avoid unconventional bandwidth services.

4. The multi-type interface access unified scheduling deterministic Ethernet scheduling device according to claim 3, characterized in that, The global synchronization module (9) constructs synchronization based on the interaction of external input data, and the synchronization establishment and maintenance module (10) maintains and reconstructs the synchronization based on the synchronization signal provided by the global synchronization module (9). The synchronization establishment and maintenance module (10) provides synchronization information to the network data processing module (11). The network data processing module (11) performs scheduling processing according to the data entering the priority scheduling cache and the pre-planned configuration of the communication configuration storage and status management module (5).

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