A voltage reference updating method and device for DC arc discrimination

Abstract

The present invention discloses a voltage reference updating method and device for DC arc discrimination in the technical field of fault arc detection. The updating method includes: in response to the inverter power-on startup, obtaining the FFT characteristic value of the inverter output voltage within a preset period, initializing the reference voltage, and entering the power-on reference setting stage; in the power-on reference setting stage, obtaining the harmonic signal of the inverter output voltage within a preset period, judging whether the reference voltage needs to be updated; if necessary, updating the reference voltage, and entering the operation reference setting stage; in the operation reference setting stage, obtaining the harmonic signal and FFT characteristic value of the inverter output voltage within a preset period, judging whether the reference voltage needs to be updated; if necessary, updating the reference voltage, and maintaining it in the operation reference setting stage. The present invention can update the voltage reference in real time, thereby ensuring the accuracy and reliability of subsequent arc judgment, and finally solving the technical problem of inverter startup misjudgment.

Description

Technical Field

[0001] The present invention relates to the technical field of fault arc detection, and in particular to a voltage reference updating method and device for DC arc discrimination. Background Art

[0002] With the rapid improvement of global electrification level, social electricity demand is increasing day by day. Traditional energy will cause a series of carbon emission pollution problems, and it is urgent to change the energy development mode. Photovoltaic power generation has significant advantages such as clean and renewable, and has developed rapidly in recent years, but related safety technologies need to be improved. Fires caused by DC fault arcs in photovoltaic systems seriously threaten the safe operation of the system. The series fault arc current is difficult to be detected by traditional circuit protection devices, causing damage to the line and then causing fires. The DC fault arc circuit breaker on the DC side of the grid-connected photovoltaic system is in the initial development stage, and the research on related fault arc characteristics lacks sufficient depth.

[0003] Traditional DC arc detection equipment and methods rely more on low-frequency sampling signals, while the time domain characteristics of different photovoltaic environments fluctuate greatly, and the stability of related arc characteristics needs to be improved; when it comes to frequency domain model characteristics, due to the defect that low-frequency characteristics are easily affected by environmental interference, light intensity and on-site photovoltaic power consumption environment interference, the background noise will produce relatively large fluctuations, so the use of static benchmarks is prone to misjudgment, and continuous updating of the benchmark is necessary. Incorrect arc discrimination results will increase unnecessary human maintenance costs and safety hazards, especially when the inverter is started, the arc misjudgment will cause the inverter to fail to operate normally. Summary of the invention

[0004] The purpose of the present invention is to overcome the deficiencies in the prior art and to provide a voltage reference updating method and device for DC arc discrimination, so as to solve the technical problem that the use of static reference in the traditional DC arc detection process is prone to misjudgment.

[0005] To achieve the above object, the present invention is implemented by adopting the following technical solutions:

[0006] In a first aspect, the present invention provides a voltage reference updating method for DC arc discrimination, comprising:

[0007] In response to the inverter being powered on, obtaining an FFT characteristic value of the inverter output voltage within a preset period;

[0008] Initializing a reference voltage according to the FFT characteristic value and entering a power-on reference setting phase;

[0009] In the power-on reference setting stage, obtaining a harmonic signal of the inverter output voltage within a preset period;

[0010] Determining whether the reference voltage needs to be updated according to the harmonic signal;

[0011] If the reference voltage needs to be updated, the reference voltage is updated and the operation reference setting phase is entered;

[0012] In the benchmarking phase of operation, the harmonic signal and FFT characteristic value of the inverter output voltage within a preset period are obtained;

[0013] Determining whether the reference voltage needs to be updated according to the harmonic signal and the FFT eigenvalue;

[0014] If the reference voltage needs to be updated, the reference voltage is updated and maintained in the running reference phase.

[0015] Optionally, initializing a reference voltage according to the FFT eigenvalue includes:

[0016] The average value of the FFT characteristic value within a preset period is taken as the initial reference voltage.

[0017] Optionally, judging whether the reference voltage needs to be updated according to the harmonic signal includes:

[0018] Taking the maximum and minimum values ​​of the harmonic signal within a preset period;

[0019] When the harmonic signals within a preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, the reference voltage needs to be updated.

[0020] Optionally, judging whether the reference voltage needs to be updated according to the harmonic signal and the FFT eigenvalue includes:

[0021] Taking the maximum and minimum values ​​of the harmonic signal within a preset period;

[0022] When the harmonic signals within the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, and the FFT characteristic values ​​within the preset period are all less than the characteristic threshold, the reference voltage needs to be updated.

[0023] In a second aspect, the present invention provides a voltage reference updating device for DC arc discrimination, comprising:

[0024] An initialization module is configured to obtain, in response to the inverter power-on startup, an FFT characteristic value of the inverter output voltage within a preset period; initialize a reference voltage according to the FFT characteristic value, and enter a power-on reference setting phase;

[0025] The power-on reference setting module is configured to obtain the harmonic signal of the inverter output voltage within a preset period during the power-on reference setting stage; determine whether the reference voltage needs to be updated according to the harmonic signal; if the reference voltage needs to be updated, update the reference voltage and enter the operation reference setting stage;

[0026] The operation benchmark module is configured to obtain the harmonic signal and FFT eigenvalue of the inverter output voltage within a preset period during the operation benchmark stage; determine whether the reference voltage needs to be updated based on the harmonic signal and the FFT eigenvalue; if the reference voltage needs to be updated, update the reference voltage and keep it in the operation benchmark stage.

[0027] Optionally, judging whether the reference voltage needs to be updated according to the harmonic signal includes:

[0028] Taking the maximum and minimum values ​​of the harmonic signal within a preset period;

[0029] When the harmonic signals within a preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, the reference voltage needs to be updated.

[0030] Optionally, during the benchmarking phase, determining whether the benchmark voltage needs to be updated includes:

[0031] Taking the maximum and minimum values ​​of the harmonic signal within a preset period;

[0032] When the harmonic signals within the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, and the FFT characteristic values ​​within the preset period are all less than the characteristic threshold, the reference voltage needs to be updated.

[0033] In a third aspect, the present invention provides an electronic device, including a processor and a storage medium;

[0034] The storage medium is used to store instructions;

[0035] The processor is used to operate according to the instructions to execute the steps according to the above method.

[0036] In a fourth aspect, the present invention provides a computer-readable storage medium having a computer program stored thereon, which implements the steps of the above method when executed by a processor.

[0037] In a fifth aspect, the present invention provides a computer program product, comprising a computer program / instruction, which implements the steps of the above method when executed by a processor.

[0038] Compared with the prior art, the present invention has the following beneficial effects:

[0039] The present invention provides a voltage reference update method and device for DC arc discrimination, which ensures that the voltage reference follows the principle of continuity time when updating. The continuous voltage reference update includes two stages: the power-on reference setting stage and the operation reference setting stage. In the power-on reference setting stage, the voltage reference is updated in real time by using the multiple threshold and the harmonic threshold in combination; in the operation reference setting stage, the voltage reference is updated in real time by using the multiple threshold, the harmonic threshold and the characteristic threshold in combination, so as to ensure the accuracy and reliability of subsequent arc judgment, and finally solve the technical problem of inverter startup misjudgment. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is a flow chart of a voltage reference updating method for DC arc discrimination provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0041] The present invention will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and cannot be used to limit the protection scope of the present invention.

[0042] Embodiment 1:

[0043] An embodiment of the present invention provides a voltage reference updating method for DC arc discrimination, comprising the following steps:

[0044] Step S1, in response to the inverter being powered on, obtaining the FFT characteristic value of the inverter output voltage within a preset period; initializing the reference voltage according to the FFT characteristic value, and entering the power-on reference setting stage.

[0045] Specifically in this embodiment, initializing the reference voltage according to the FFT characteristic value includes: taking the average value of the FFT characteristic value within a preset period as the initial reference voltage.

[0046] Step S2: in the power-on reference setting stage, obtain the harmonic signal of the inverter output voltage within a preset period; determine whether the reference voltage needs to be updated according to the harmonic signal; if the reference voltage needs to be updated, update the reference voltage and enter the operation reference setting stage.

[0047] Specifically in this embodiment, judging whether the reference voltage needs to be updated according to the harmonic signal includes:

[0048] Take the maximum and minimum values ​​of the harmonic signal within a preset period;

[0049] When the harmonic signals in the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, the reference voltage needs to be updated.

[0050] Step S3, in the operation and reference setting stage, obtain the harmonic signal and FFT eigenvalue of the inverter output voltage within a preset period; determine whether the reference voltage needs to be updated based on the harmonic signal and FFT eigenvalue; if the reference voltage needs to be updated, then the reference voltage needs to be updated and maintained in the operation and reference setting stage.

[0051] Specifically in this embodiment, judging whether the reference voltage needs to be updated according to the harmonic signal and the FFT eigenvalue includes:

[0052] Take the maximum and minimum values ​​of the harmonic signal within a preset period;

[0053] When the harmonic signals in the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, and the FFT characteristic values ​​in the preset period are all less than the characteristic threshold, the reference voltage needs to be updated.

[0054] In the power-on reference setting stage and the operation reference setting stage, the reference voltage is updated in the same manner, and the average value of the FFT characteristic value in the current preset period is taken as the updated reference voltage.

[0055] FFT (Fast Fourier Transform) is an efficient algorithm used to calculate the spectrum of a signal and can convert the signal from the time domain to the frequency domain. It is an important analysis method in digital signal processing, with the characteristics of high-speed calculation, high efficiency and stability, which can greatly improve the efficiency of signal processing.

[0056] In order to solve the inverter startup misjudgment, the voltage reference in this embodiment follows the principle of continuous time when updating. The continuous voltage reference update includes two stages: the power-on benchmark stage and the operation benchmark stage. In the power-on benchmark stage, the voltage reference is updated in real time by using the multiple threshold and the harmonic threshold in combination; in the operation benchmark stage, the voltage reference is updated in real time by using the multiple threshold, the harmonic threshold and the characteristic threshold in combination, so as to ensure the accuracy and reliability of the subsequent arc judgment, and finally solve the technical problem of inverter startup misjudgment.

[0057] Embodiment 2:

[0058] An embodiment of the present invention provides a voltage reference updating device for DC arc discrimination, comprising:

[0059] The initialization module is configured to obtain the FFT characteristic value of the inverter output voltage within a preset period in response to the inverter power-on startup; initialize the reference voltage according to the FFT characteristic value, and enter the power-on reference setting stage.

[0060] The power-on reference setting module is configured to obtain the harmonic signal of the inverter output voltage within a preset period during the power-on reference setting stage; determine whether the reference voltage needs to be updated based on the harmonic signal; if the reference voltage needs to be updated, update the reference voltage and enter the operation reference setting stage.

[0061] The operation benchmark module is configured to obtain the harmonic signal and FFT eigenvalue of the inverter output voltage within a preset period during the operation benchmark stage; determine whether the reference voltage needs to be updated based on the harmonic signal and FFT eigenvalue; if the reference voltage needs to be updated, update the reference voltage and keep it in the operation benchmark stage.

[0062] Specifically, (1) judging whether the reference voltage needs to be updated according to the harmonic signal includes:

[0063] Take the maximum and minimum values ​​of the harmonic signal within a preset period;

[0064] When the harmonic signals in the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, the reference voltage needs to be updated.

[0065] (2) Judging whether the reference voltage needs to be updated based on the harmonic signal and FFT eigenvalue includes:

[0066] Take the maximum and minimum values ​​of the harmonic signal within a preset period;

[0067] When the harmonic signals in the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, and the FFT characteristic values ​​in the preset period are all less than the characteristic threshold, the reference voltage needs to be updated.

[0068] Embodiment three:

[0069] Based on the voltage reference updating method provided in the first embodiment, an embodiment of the present invention provides an electronic device, including a processor and a storage medium;

[0070] The storage medium is used to store instructions;

[0071] The processor is used to operate according to the instructions to execute the steps according to the above method.

[0072] Embodiment 4:

[0073] Based on the voltage reference updating method provided in the first embodiment, an embodiment of the present invention provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the steps of the above method are implemented.

[0074] Embodiment five:

[0075] Based on the voltage reference updating method provided in the first embodiment, an embodiment of the present invention provides a computer program product, including a computer program / instruction, which implements the steps of the above method when executed by a processor.

[0076] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0077] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0078] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0079] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0080] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A voltage reference updating method for DC arc discrimination, characterized in that: include: In response to the inverter being powered on, obtaining an FFT characteristic value of the inverter output voltage within a preset period; Initializing a reference voltage according to the FFT characteristic value and entering a power-on reference setting phase; In the power-on reference setting stage, obtaining a harmonic signal of the inverter output voltage within a preset period; Determining whether the reference voltage needs to be updated according to the harmonic signal; If the reference voltage needs to be updated, the reference voltage is updated and the operation reference setting phase is entered; In the benchmarking phase of operation, the harmonic signal and FFT characteristic value of the inverter output voltage within a preset period are obtained; Determining whether the reference voltage needs to be updated according to the harmonic signal and the FFT eigenvalue; If the reference voltage needs to be updated, the reference voltage is updated and maintained in the running reference setting stage; Wherein, judging whether the reference voltage needs to be updated according to the harmonic signal includes: Taking the maximum and minimum values ​​of the harmonic signal within a preset period; When the harmonic signals within the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, the reference voltage needs to be updated; Wherein, judging whether the reference voltage needs to be updated according to the harmonic signal and the FFT eigenvalue comprises: Taking the maximum and minimum values ​​of the harmonic signal within a preset period; When the harmonic signals within the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, and the FFT characteristic values ​​within the preset period are all less than the characteristic threshold, the reference voltage needs to be updated.

2. The voltage reference updating method for DC arc discrimination according to claim 1, characterized in that: Initializing the reference voltage according to the FFT eigenvalue comprises: The average value of the FFT characteristic value within a preset period is taken as the initial reference voltage.

3. A voltage reference updating device for DC arc discrimination, characterized in that: include: An initialization module is configured to obtain a FFT characteristic value of the inverter output voltage within a preset period in response to the inverter being powered on; Initializing a reference voltage according to the FFT characteristic value and entering a power-on reference setting phase; A power-on reference setting module is configured to obtain a harmonic signal of the inverter output voltage within a preset period during a power-on reference setting stage; Determining whether the reference voltage needs to be updated according to the harmonic signal; if the reference voltage needs to be updated, updating the reference voltage and entering the operation reference setting phase; An operation benchmark module is configured to obtain a harmonic signal and a FFT characteristic value of the inverter output voltage within a preset period during the operation benchmark phase; Determining whether the reference voltage needs to be updated according to the harmonic signal and the FFT characteristic value; if the reference voltage needs to be updated, updating the reference voltage and maintaining it in the running reference setting stage; Wherein, judging whether the reference voltage needs to be updated according to the harmonic signal includes: Taking the maximum and minimum values ​​of the harmonic signal within a preset period; When the harmonic signals within the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, the reference voltage needs to be updated; Wherein, judging whether the reference voltage needs to be updated according to the harmonic signal and the FFT eigenvalue comprises: Taking the maximum and minimum values ​​of the harmonic signal within a preset period; When the harmonic signals within the preset period are all greater than the harmonic threshold, and the ratio of the maximum value to the minimum value of the harmonic signal is less than the multiple threshold, and the FFT characteristic values ​​within the preset period are all less than the characteristic threshold, the reference voltage needs to be updated.

4. An electronic device, characterized in that: including processor and storage medium; The storage medium is used to store instructions; The processor is configured to operate according to the instructions to execute the steps of the method according to claim 1 or 2.

5. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps of the method according to claim 1 or 2 are implemented.

6. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method according to claim 1 or 2 are implemented.

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