A probe card detection system and method

Abstract

The present invention proposes a probe card detection system and method. The probe card detection system includes: a test machine, a probe station and a wafer sample. The controller controls a pulse voltage source to apply a pulse voltage through a first power supply terminal and a second power supply terminal. The first leakage current monitoring device monitors the first leakage current value between the emitter measurement terminal and the collector measurement terminal of the wafer sample, and transmits the first leakage current value to the controller. The controller determines whether the probe card has a withstand voltage isolation abnormality problem based on the first leakage current value. By monitoring the first leakage current value, it is accurately determined whether the probe card has a withstand voltage isolation abnormality problem, thereby ensuring the accuracy of the probe card detection result.

Description

Technical Field

[0001] The present invention relates to the field of testing, and in particular to a probe card detection system and method. Background Art

[0002] The probe card is an important component in the wafer testing process and can implement the corresponding test items. When there is an abnormality in the probe card, it will directly affect the wafer testing effect and even damage the wafer. Therefore, it is necessary to test whether the probe card is abnormal in order to troubleshoot the probe card problem.

[0003] Currently, the only way to troubleshoot probe card problems is to use a low-precision multimeter to monitor each port separately. The multimeter can only measure current at the milliampere level and cannot perform nA level measurements, so it is impossible to quickly and accurately locate the probe card problem. The multimeter monitors each port separately and cannot perform simultaneous troubleshooting; separate troubleshooting will miss some interference problems that form a synchronous series circuit. Summary of the invention

[0004] The object of the present invention is to provide a probe card detection system and method to improve the above-mentioned problem.

[0005] In order to achieve the above purpose, the technical solution adopted by the embodiment of the present invention is as follows:

[0006] In a first aspect, an embodiment of the present invention provides a probe card detection system, the probe card detection system comprising: a test machine, a probe station and a wafer sample, the collector measurement terminal and the collector signal input terminal of the wafer sample are both short-circuited with the wafer carrier of the probe station, the test machine is provided with a controller, a pulse voltage source and a first leakage current monitoring device, the controller is connected to the pulse voltage source and the first leakage current monitoring device respectively;

[0007] The probe card to be tested is provided with a first connector, a second connector, a first group of probes and a second group of probes, the first connector is connected to the first group of probes, the second connector is connected to the second group of probes, the first group of probes is connected to the emitter signal input end of the wafer sample, and the second group of probes is connected to the emitter measurement end of the wafer sample;

[0008] The first power supply end of the pulse voltage source is connected to the wafer stage, the first end of the first leakage current monitoring device is connected to the wafer stage, the second power supply end of the pulse voltage source is connected to the first connector, and the second end of the first leakage current monitoring device is connected to the second connector;

[0009] The controller is used to control the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal;

[0010] The first leakage current monitoring device is used to monitor a first leakage current value between an emitter measurement terminal and a collector measurement terminal of the wafer sample, and transmit the first leakage current value to the controller;

[0011] The controller is used to determine whether the probe card has a withstand voltage isolation abnormality problem according to the first leakage current value.

[0012] Optionally, the controller is used to control the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage;

[0013] The controller is used to determine whether a first leakage current value at the i-th target voltage exceeds a first current threshold;

[0014] If the first leakage current value exceeds the first current threshold, the controller is used to determine that the probe card has a withstand voltage isolation abnormality problem;

[0015] If the first leakage current value corresponding to the i-th target voltage does not exceed the first current threshold, the controller is used to control the pulse voltage source to stop applying the pulse voltage, and set i=i+1, and set the i-th target voltage=i-1th target voltage+first preset amplitude;

[0016] The controller is used to determine whether the new i-th target voltage exceeds a voltage threshold;

[0017] If the new i-th target voltage does not exceed the voltage threshold, the controller is used to control the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage until the new i-th target voltage exceeds the voltage threshold or the first leakage current value exceeds the first current threshold;

[0018] If the i-th target voltage exceeds the voltage threshold, the controller is used to determine that the probe card does not have a withstand voltage isolation abnormality problem.

[0019] Optionally, when i is greater than or equal to 2, if the first leakage current value corresponding to the i-th target voltage exceeds the first current threshold, the controller is used to control the pulse voltage source to stop applying the pulse voltage, so that the first suspected abnormal critical voltage = the i-1th target voltage + the second preset amplitude, wherein the second preset amplitude is less than or equal to half of the first preset amplitude;

[0020] The controller is used to determine whether the j-th suspected abnormal critical voltage exceeds the i-th target voltage, wherein the initial value of j is 1;

[0021] If the jth suspected abnormal critical voltage does not exceed the i-th target voltage, the controller is used to control the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the jth suspected abnormal critical voltage;

[0022] The controller is used to determine whether a first leakage current value at the jth suspected abnormal critical voltage exceeds a first current threshold;

[0023] If the first leakage current value corresponding to the jth suspected abnormal critical voltage exceeds the first current threshold, the controller is configured to determine that the jth suspected abnormal critical voltage is the final abnormal critical voltage.

[0024] Optionally, if the first leakage current value corresponding to the jth suspected abnormal critical voltage does not exceed the first current threshold, the controller is used to control the pulse voltage source to stop applying the pulse voltage, and set j=j+1, and set the jth suspected abnormal critical voltage=j-1th suspected abnormal critical voltage+second preset amplitude;

[0025] The controller is used to repeatedly determine whether the j-th suspected abnormal critical voltage exceeds the i-th target voltage until a first leakage current value corresponding to the j-th suspected abnormal critical voltage exceeds a first current threshold, or the j-th suspected abnormal critical voltage exceeds the i-th target voltage;

[0026] In a case where the jth suspected abnormal critical voltage exceeds the i-th target voltage, the controller is configured to determine the i-th target voltage as a final abnormal critical voltage.

[0027] Optionally, a second leakage current monitoring device is also provided in the testing machine.

[0028] The probe card to be tested is provided with a third connector, a fourth connector, a third group of probes and a fourth group of probes, the third connector is connected to the third group of probes, the fourth connector is connected to the fourth group of probes, the third group of probes is connected to the gate signal input end of the wafer sample, and the fourth group of probes is connected to the gate measurement end of the wafer sample;

[0029] The third power supply end of the pulse voltage source is connected to the third connector, the first end of the second leakage current monitoring device is connected to the fourth connector, and the second end of the second leakage current monitoring device is connected to the second connector;

[0030] The controller is used to control the pulse voltage source to apply a first pulse voltage through the first power supply terminal and the third power supply terminal;

[0031] The second leakage current monitoring device is used to monitor the second leakage current value between the emitter measurement terminal and the gate measurement terminal of the wafer sample, and transmit the second leakage current value to the controller;

[0032] The controller is used to determine whether the second leakage current value is greater than a second current threshold value, and if so, it is determined that the probe card has a leakage current abnormality problem.

[0033] Optionally, the controller is used to control the pulse voltage source to apply a second pulse voltage through the third power supply terminal and the first power supply terminal;

[0034] The second leakage current monitoring device is used to monitor a third leakage current value between a gate measurement terminal and an emitter measurement terminal of the wafer sample, and transmit the third leakage current value to the controller;

[0035] The controller is used to determine whether the third leakage current value is greater than the second current threshold value, and if so, it is determined that the probe card has a leakage current abnormality problem.

[0036] Optionally, the fourth power supply terminal of the pulse voltage source is connected to the fourth connector, and the test machine is further provided with a first voltage detection device;

[0037] One end of the first voltage detection device is connected to the third connector, and the other end of the first voltage detection device is connected to the fourth connector;

[0038] The controller is used to control the pulse voltage source to apply a third pulse current to the third connector;

[0039] The first voltage detection device is used to detect the gate voltage between the third connector and the fourth connector, and transmit the gate voltage to the controller;

[0040] The controller is used to determine whether the probe card has a gate terminal connection abnormality problem according to the gate voltage.

[0041] Optionally, the fifth power supply terminal of the pulse voltage source is connected to the second connector, and the test machine is further provided with a second voltage detection device;

[0042] One end of the second voltage detection device is connected to the first connection head, and the other end of the second voltage detection device is connected to the second connection head;

[0043] The controller is used to control the pulse voltage source to apply a fourth pulse current to the first connector;

[0044] The second voltage detection device is used to detect the emitter voltage between the first connector and the second connector, and transmit the emitter voltage to the controller;

[0045] The controller is used to determine whether the probe card has an abnormal emitter terminal connection problem according to the emitter voltage.

[0046] In a second aspect, an embodiment of the present invention provides a probe card detection method, which is applied to a controller in the above-mentioned probe card detection system. The probe card detection method includes:

[0047] Get the test start instruction;

[0048] The pulse voltage source is controlled to apply a pulse voltage through the first power supply terminal and the second power supply terminal, and whether the probe card has a withstand voltage isolation abnormality problem is determined according to a first leakage current value between the emitter measurement terminal and the collector measurement terminal of the wafer sample.

[0049] Optionally, the step of controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal, and determining whether the probe card has a withstand voltage isolation abnormality problem according to a first leakage current value between the emitter measurement terminal and the collector measurement terminal of the wafer sample, includes:

[0050] Controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to an i-th target voltage;

[0051] determining whether a first leakage current value at the i-th target voltage exceeds a first current threshold;

[0052] If the first leakage current value exceeds the first current threshold, it is determined that the probe card has a withstand voltage isolation abnormality problem;

[0053] If the first leakage current value corresponding to the i-th target voltage does not exceed the first current threshold, the pulse voltage source is controlled to stop applying the pulse voltage, and i=i+1, and the i-th target voltage=i-1th target voltage+first preset amplitude;

[0054] Determine whether the new i-th target voltage exceeds the voltage threshold;

[0055] If the new i-th target voltage does not exceed the voltage threshold, controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage until the new i-th target voltage exceeds the voltage threshold or the first leakage current value exceeds the first current threshold;

[0056] If the i-th target voltage exceeds the voltage threshold, it is determined that the probe card does not have a withstand voltage isolation abnormality problem.

[0057] Compared with the prior art, the embodiments of the present invention provide a probe card detection system and method, wherein the probe card detection system includes: a test machine, a probe station, and a wafer sample, wherein a controller controls a pulse voltage source to apply a pulse voltage through a first power supply terminal and a second power supply terminal; a first leakage current monitoring device monitors a first leakage current value between an emitter measurement terminal and a collector measurement terminal of a wafer sample, and transmits the first leakage current value to the controller; the controller determines whether the probe card has a withstand voltage isolation abnormality problem based on the first leakage current value. By monitoring the first leakage current value, it is possible to accurately determine whether the probe card has a withstand voltage isolation abnormality problem, thereby ensuring the accuracy of the probe card detection result.

[0058] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0060] Figure 1 A schematic diagram of a testing machine provided in an embodiment of the present invention.

[0061] Figure 2 A schematic diagram of a wafer sample provided by an embodiment of the present invention.

[0062] Figure 3 This is one of the schematic diagrams of the probe card detection system provided by an embodiment of the present invention.

[0063] Figure 4 The second schematic diagram of the probe card detection system provided in the embodiment of the present invention.

[0064] Figure 5 The third schematic diagram of the probe card detection system provided in the embodiment of the present invention.

[0065] Figure 6 This is a fourth schematic diagram of a probe card detection system provided in an embodiment of the present invention.

[0066] Figure 7 A schematic diagram of the flow of a probe card detection method provided in an embodiment of the present invention.

[0067] In the figure: 10 - testing machine; 11 - controller; 12 - pulse voltage source; 13 - first leakage current monitoring device; 14 - second leakage current monitoring device; 15 - first voltage detection device; 16 - second voltage detection device; 20 - probe station; 21 - wafer carrier; 30 - wafer sample; 40 - probe card. DETAILED DESCRIPTION

[0068] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0069] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0070] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, in the description of the present invention, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0071] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0072] In the description of the present invention, it should be noted that the terms "upper", "lower", "inside", "outside", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, or are directions or positional relationships in which the product of the invention is usually placed when in use. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.

[0073] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "disposed" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0074] Some embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0075] In order to accurately troubleshoot possible problems with the probe card, an embodiment of the present invention provides a probe card detection system, please refer to Figure 1 , Figure 2 and Figure 3 , Figure 1 A schematic diagram of a testing machine provided by an embodiment of the present invention, Figure 2 A schematic diagram of a wafer sample provided by an embodiment of the present invention, Figure 3 One of the schematic diagrams of the probe card detection system provided in the embodiment of the present invention. In the embodiment of the present invention, ①, ②, ③, ④ and ⑤ are simplified representations of corresponding devices, for example, in the pulse voltage source, ① represents the first power supply end, ① in the probe card represents the first connector, ① with an arrow on the outside of the probe card represents the first group of probes, the first leakage current monitoring device, the second leakage current monitoring device, the first voltage detection device and the second voltage detection device ① represent the first end, and the others are similar to this, which will not be repeated hereafter.

[0076] The probe card detection system includes: a test machine 10, a probe station 20 and a wafer sample 30. The collector measurement terminal CS and the collector signal input terminal CF of the wafer sample 30 are short-circuited with the wafer carrier 21 of the probe station 20. The test machine 10 is provided with a controller 11, a pulse voltage source 12 and a first leakage current monitoring device 13. The controller 11 is connected to the pulse voltage source 12 and the first leakage current monitoring device 13 respectively.

[0077] Among them, the wafer sample 30 is a qualified IGBT wafer, and the back side of the wafer sample 30 is placed on the wafer carrier 21 of the probe station 20 so that the collector measurement terminal CS and the collector signal input terminal CF of the wafer sample 30 are short-circuited with the wafer carrier 21 of the probe station 20.

[0078] The probe card 40 to be tested is provided with a first connector, a second connector, a first group of probes and a second group of probes. The first connector is connected to the first group of probes, the second connector is connected to the second group of probes, the first group of probes is connected to the emitter signal input terminal EF of the wafer sample 30, and the second group of probes is connected to the emitter measurement terminal ES of the wafer sample 30.

[0079] The first power supply end of the pulse voltage source 12 is connected to the wafer stage 21, the first end of the first leakage current monitoring device 13 is connected to the wafer stage 21, the second power supply end of the pulse voltage source 12 is connected to the first connector, and the second end of the first leakage current monitoring device 13 is connected to the second connector.

[0080] The controller 11 is used to control the pulse voltage source 12 to apply a pulse voltage through the first power supply terminal and the second power supply terminal.

[0081] The first leakage current monitoring device 13 is used to monitor a first leakage current value between an emitter measurement terminal ES and a collector measurement terminal CS of the wafer sample 30 , and transmit the first leakage current value to the controller 11 .

[0082] The controller 11 is used to determine whether the probe card 40 has a withstand voltage isolation abnormality problem according to the first leakage current value.

[0083] By monitoring the first leakage current value, it is possible to accurately determine whether the probe card has a withstand voltage isolation abnormality problem, thereby ensuring the accuracy of the probe card detection result.

[0084] Based on the foregoing, regarding the specific process of "controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal, and determining whether the probe card has a voltage withstand isolation abnormality problem according to the first leakage current value between the emitter measurement terminal and the collector measurement terminal of the wafer sample", the embodiment of the present invention also provides an optional implementation method, please refer to below.

[0085] The controller 11 is used to control the pulse voltage source 12 to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage.

[0086] The initial value of i is 1, the first target voltage is a preset value, and the first target voltage may be, but is not limited to, 100 V. The application time of the i-th target voltage may be, but is not limited to, 20 ms.

[0087] The controller 11 is used to determine whether a first leakage current value at an i-th target voltage exceeds a first current threshold.

[0088] The first current threshold may be, but is not limited to, 0.1 uA.

[0089] If the first leakage current value exceeds the first current threshold, the controller 11 is used to determine that the probe card 40 has a withstand voltage isolation abnormality problem.

[0090] If the first leakage current value corresponding to the i-th target voltage does not exceed the first current threshold, the controller 11 is used to control the pulse voltage source 12 to stop applying the pulse voltage, and set i=i+1, and set the i-th target voltage=i-1th target voltage+first preset amplitude to obtain a new i-th target voltage.

[0091] The first preset amplitude may be, but is not limited to, an even multiple of 100V.

[0092] The controller 11 is used to determine whether the new i-th target voltage exceeds a voltage threshold.

[0093] The voltage threshold may be, but is not limited to, 2000V.

[0094] If the new i-th target voltage does not exceed the voltage threshold, the controller 11 is used to repeatedly control the pulse voltage source 12 to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage until the new i-th target voltage exceeds the voltage threshold or the first leakage current value exceeds the first current threshold.

[0095] If the i-th target voltage exceeds the voltage threshold, the controller 11 is used to determine that the probe card 40 does not have a withstand voltage isolation abnormality problem.

[0096] Optionally, when i is greater than or equal to 2, if the first leakage current value corresponding to the i-th target voltage exceeds the first current threshold, the controller 11 is used to control the pulse voltage source 12 to stop applying the pulse voltage, so that the first suspected abnormal critical voltage = the i-1-th target voltage + the second preset amplitude, wherein the second preset amplitude is less than or equal to half of the first preset amplitude.

[0097] It should be noted that in the early stage of screening for abnormal withstand voltage isolation problems, adjusting the target voltage according to the first preset amplitude can improve the screening efficiency. When the problem is determined, further detailed investigation can be carried out through the second preset amplitude to accurately obtain the final abnormal critical voltage.

[0098] The controller 11 is used to determine whether the j-th suspected abnormal critical voltage exceeds the i-th target voltage, wherein the initial value of j is 1.

[0099] If the jth suspected abnormal critical voltage does not exceed the ith target voltage, the controller 11 is used to control the pulse voltage source 12 to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the jth suspected abnormal critical voltage;

[0100] The controller 11 is used to determine whether a first leakage current value at the jth suspected abnormal critical voltage exceeds a first current threshold.

[0101] If the first leakage current value corresponding to the jth suspected abnormal critical voltage exceeds the first current threshold, the controller 11 is configured to determine the jth suspected abnormal critical voltage as the final abnormal critical voltage.

[0102] If the first leakage current value corresponding to the jth suspected abnormal critical voltage does not exceed the first current threshold, the controller 11 is used to control the pulse voltage source 12 to stop applying the pulse voltage, and set j=j+1, and set the jth suspected abnormal critical voltage = the j-1th suspected abnormal critical voltage + the second preset amplitude to obtain a new jth suspected abnormal critical voltage.

[0103] The controller 11 is used to repeatedly determine whether the jth suspected abnormal critical voltage exceeds the i-th target voltage until the first leakage current value corresponding to the jth suspected abnormal critical voltage exceeds the first current threshold, or the jth suspected abnormal critical voltage exceeds the i-th target voltage.

[0104] When the j-th suspected abnormal critical voltage exceeds the ith target voltage, the controller 11 is configured to determine the ith target voltage as the final abnormal critical voltage.

[0105] In an optional implementation, before screening the probe card for abnormal withstand voltage isolation, it is also necessary to determine whether the probe card has abnormal leakage current. Figure 1 The test machine 10 is also provided with a second leakage current monitoring device 14. Please refer to Figure 4 , Figure 4 The second schematic diagram of the probe card detection system provided in the embodiment of the present invention.

[0106] The probe card 40 to be tested is provided with a third connector, a fourth connector, a third group of probes and a fourth group of probes. The third connector is connected to the third group of probes, the fourth connector is connected to the fourth group of probes, the third group of probes is connected to the gate signal input terminal GF of the wafer sample 30, and the fourth group of probes is connected to the gate measurement terminal GS of the wafer sample 30.

[0107] The third power supply end of the pulse voltage source 12 is connected to the third connector, the first end of the second leakage current monitoring device 14 is connected to the fourth connector, the second power supply end of the pulse voltage source 12 is connected to the first connector, and the second end of the second leakage current monitoring device 14 is connected to the second connector.

[0108] The controller 11 is used to control the pulse voltage source 12 to apply a first pulse voltage through the first power supply terminal and the third power supply terminal.

[0109] The value of the first pulse voltage may be 30V, and the application time of the first pulse voltage may be but is not limited to 20ms.

[0110] The second leakage current monitoring device 14 is used to monitor a second leakage current value between the emitter measurement terminal ES and the gate measurement terminal GS of the wafer sample 30 , and transmit the second leakage current value to the controller 11 .

[0111] The controller 11 is used to determine whether the second leakage current value is greater than the second current threshold value. If so, it is determined that the probe card 40 has a leakage current abnormality problem.

[0112] The second current threshold may be, but is not limited to, 0.1 uA.

[0113] Optionally, the controller 11 is used to control the pulse voltage source 12 to apply a second pulse voltage through the third power supply terminal and the first power supply terminal.

[0114] The value of the second pulse voltage may be 30V, the second pulse voltage is opposite to the first pulse voltage, and the application time of the first pulse voltage may be but is not limited to 20ms.

[0115] The second leakage current monitoring device 14 is used to monitor a third leakage current value between the gate measurement terminal GS and the emitter measurement terminal ES of the wafer sample 30 , and transmit the third leakage current value to the controller 11 .

[0116] The controller 11 is used to determine whether the third leakage current value is greater than the second current threshold value. If so, it is determined that the probe card 40 has a leakage current abnormality problem.

[0117] It should be understood that when the second leakage current value or the third leakage current value is greater than the second current threshold, it is determined that the probe card 40 has a leakage current abnormality problem.

[0118] In an optional implementation, before screening the probe card for abnormal leakage current, it is also necessary to determine whether the probe card 40 has abnormal gate terminal connection and abnormal emitter terminal connection. Figure 1 The test machine 10 is also provided with a first voltage detection device 15 and a second voltage detection device 16. Figure 5 , Figure 5 The third schematic diagram of the probe card detection system provided in the embodiment of the present invention.

[0119] The fourth power supply end of the pulse voltage source 12 is connected to the fourth connector, one end of the first voltage detection device 15 is connected to the third connector, and the other end of the first voltage detection device 15 is connected to the fourth connector.

[0120] The controller 11 is used to control the pulse voltage source 12 to apply a third pulse current to the third connector.

[0121] The value of the third pulse current may be, but is not limited to, 1 mA, and the application duration may be, but is not limited to, 780 us.

[0122] The first voltage detection device 15 is used to detect the gate voltage between the third connector and the fourth connector, and transmit the gate voltage to the controller 11 .

[0123] The controller 11 is used to determine whether the probe card 40 has a gate terminal connection abnormality problem according to the gate voltage.

[0124] Optionally, when the gate voltage is greater than a preset voltage value (eg, 200 mV), it is determined that there is an abnormal gate terminal connection problem in the probe card.

[0125] Please refer to Figure 6 , Figure 7 This is a fourth schematic diagram of a probe card detection system provided in an embodiment of the present invention.

[0126] Optionally, the fifth power supply terminal of the pulse voltage source 12 is connected to the second connector, and the test machine 10 is further provided with a second voltage detection device 16 .

[0127] One end of the second voltage detection device 16 is connected to the first connection head, and the other end of the second voltage detection device 16 is connected to the second connection head.

[0128] The controller 11 is used to control the pulse voltage source 12 to apply a fourth pulse current to the first connector.

[0129] The value of the fourth pulse current may be, but is not limited to, 1 mA, and the application duration may be, but is not limited to, 780 us.

[0130] The second voltage detection device 16 is used to detect the emitter voltage between the first connector and the second connector, and transmit the emitter voltage to the controller 11 .

[0131] The controller 11 is used to determine whether the probe card 40 has an abnormal emitter terminal connection problem according to the emitter voltage.

[0132] Optionally, when the emitter voltage is greater than a preset voltage value (eg, 200 mV), it is determined that the probe card has an abnormal emitter terminal connection problem.

[0133] Through the probe card detection system provided by the embodiment of the present invention, it is possible to determine whether the probe card meets the required insulation, isolation, continuity and other requirements under the required current and voltage environment, and at the same time, the respective series circuits of the gate terminal, emitter terminal and collector terminal can be checked synchronously, so that the current resistance, voltage resistance and whether the welding of the connection terminals of the high-voltage and high-current probe card is poorly checked can be accurately checked.

[0134] Optionally, the probe card includes a PCB substrate, the connectors of the probe card are all arranged on a first side of the PCB substrate, epoxy resin is arranged on a second side (opposite to the first side) of the PCB substrate, probes are arranged on a side of the epoxy resin away from the PCB substrate, and the kth group of probes is connected to the kth connector to achieve internal conduction. The probes can be inserted into the emitter piercing area and the gate piercing area to achieve corresponding connection relationships.

[0135] In the embodiment of the present invention, the controller 11 can be a general-purpose processor, including a central processing unit (CPU), a microcontroller unit (MCU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.

[0136] The embodiment of the present invention further provides a probe card detection method, which can be but is not limited to being applied to the controller in the above-mentioned probe card detection system. Figure 7 , the probe card detection method includes: S101 and S102, which are specifically described as follows.

[0137] S101, obtaining a test start instruction.

[0138] S102, controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal, and determining whether the probe card has a withstand voltage isolation abnormality problem according to a first leakage current value between the emitter measurement terminal and the collector measurement terminal of the wafer sample.

[0139] Optionally, S102, the step of controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal, and determining whether the probe card has a withstand voltage isolation abnormality problem according to a first leakage current value between the emitter measurement terminal and the collector measurement terminal of the wafer sample, includes:

[0140] Controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage;

[0141] determining whether a first leakage current value at an i-th target voltage exceeds a first current threshold;

[0142] If the first leakage current value exceeds the first current threshold, it is determined that the probe card has a withstand voltage isolation abnormality problem;

[0143] If the first leakage current value corresponding to the i-th target voltage does not exceed the first current threshold, the pulse voltage source is controlled to stop applying the pulse voltage, and i=i+1, and the i-th target voltage=i-1th target voltage+first preset amplitude;

[0144] Determine whether the new i-th target voltage exceeds the voltage threshold;

[0145] If the new i-th target voltage does not exceed the voltage threshold, the pulse voltage source is controlled to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage until the new i-th target voltage exceeds the voltage threshold or the first leakage current value exceeds the first current threshold;

[0146] If the i-th target voltage exceeds the voltage threshold, it is determined that the probe card does not have a withstand voltage isolation abnormality problem.

[0147] It should be noted that the probe card detection method provided in this embodiment can perform the functions and uses shown in the above-mentioned probe card detection system embodiment to achieve the corresponding technical effects. For the sake of brief description, for parts not mentioned in this embodiment, please refer to the corresponding contents in the above-mentioned embodiments.

[0148] In summary, the embodiments of the present invention provide a probe card detection system and method, wherein the probe card detection system includes: a test machine, a probe station, and a wafer sample, wherein a controller controls a pulse voltage source to apply a pulse voltage through a first power supply terminal and a second power supply terminal; a first leakage current monitoring device monitors a first leakage current value between an emitter measurement terminal and a collector measurement terminal of a wafer sample, and transmits the first leakage current value to the controller; the controller determines whether the probe card has a withstand voltage isolation abnormality problem based on the first leakage current value. By monitoring the first leakage current value, it is possible to accurately determine whether the probe card has a withstand voltage isolation abnormality problem, thereby ensuring the accuracy of the probe card detection result.

[0149] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

[0150] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A probe card detection system, characterized in that: The probe card detection system comprises: a test machine, a probe station and a wafer sample, wherein the collector measurement terminal and the collector signal input terminal of the wafer sample are short-circuited with the wafer carrier of the probe station, and the test machine is provided with a controller, a pulse voltage source and a first leakage current monitoring device, and the controller is connected to the pulse voltage source and the first leakage current monitoring device respectively; The probe card to be tested is provided with a first connector, a second connector, a first group of probes and a second group of probes, the first connector is connected to the first group of probes, the second connector is connected to the second group of probes, the first group of probes is connected to the emitter signal input end of the wafer sample, and the second group of probes is connected to the emitter measurement end of the wafer sample; The first power supply end of the pulse voltage source is connected to the wafer stage, the first end of the first leakage current monitoring device is connected to the wafer stage, the second power supply end of the pulse voltage source is connected to the first connector, and the second end of the first leakage current monitoring device is connected to the second connector; The controller is used to control the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal; The first leakage current monitoring device is used to monitor a first leakage current value between an emitter measurement terminal and a collector measurement terminal of the wafer sample, and transmit the first leakage current value to the controller; The controller is used to determine whether the probe card has a withstand voltage isolation abnormality problem according to the first leakage current value; The test machine is also provided with a second leakage current monitoring device; The probe card to be tested is provided with a third connector, a fourth connector, a third group of probes and a fourth group of probes, the third connector is connected to the third group of probes, the fourth connector is connected to the fourth group of probes, the third group of probes is connected to the gate signal input end of the wafer sample, and the fourth group of probes is connected to the gate measurement end of the wafer sample; The third power supply end of the pulse voltage source is connected to the third connector, the first end of the second leakage current monitoring device is connected to the fourth connector, and the second end of the second leakage current monitoring device is connected to the second connector; The controller is used to control the pulse voltage source to apply a first pulse voltage through the first power supply terminal and the third power supply terminal; The second leakage current monitoring device is used to monitor the second leakage current value between the emitter measurement terminal and the gate measurement terminal of the wafer sample, and transmit the second leakage current value to the controller; The controller is used to determine whether the second leakage current value is greater than a second current threshold value, and if so, it is determined that the probe card has a leakage current abnormality problem.

2. The probe card detection system according to claim 1, wherein: The controller is used to control the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage; The controller is used to determine whether a first leakage current value at the i-th target voltage exceeds a first current threshold; If the first leakage current value exceeds the first current threshold, the controller is used to determine that the probe card has a withstand voltage isolation abnormality problem; If the first leakage current value corresponding to the i-th target voltage does not exceed the first current threshold, the controller is used to control the pulse voltage source to stop applying the pulse voltage, and set i=i+1, and set the i-th target voltage=i-1th target voltage+first preset amplitude; The controller is used to determine whether the new i-th target voltage exceeds a voltage threshold; If the new i-th target voltage does not exceed the voltage threshold, the controller is used to control the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage until the new i-th target voltage exceeds the voltage threshold or the first leakage current value exceeds the first current threshold; If the i-th target voltage exceeds the voltage threshold, the controller is used to determine that there is no voltage withstand isolation abnormality problem in the probe card.

3. The probe card detection system according to claim 2, wherein: When i is greater than or equal to 2, if the first leakage current value corresponding to the i-th target voltage exceeds the first current threshold, the controller is used to control the pulse voltage source to stop applying the pulse voltage, so that the first suspected abnormal critical voltage = the i-1th target voltage + the second preset amplitude, wherein the second preset amplitude is less than or equal to one half of the first preset amplitude; The controller is used to determine whether the j-th suspected abnormal critical voltage exceeds the i-th target voltage, wherein the initial value of j is 1; If the jth suspected abnormal critical voltage does not exceed the i-th target voltage, the controller is used to control the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the jth suspected abnormal critical voltage; The controller is used to determine whether a first leakage current value at the jth suspected abnormal critical voltage exceeds a first current threshold; If the first leakage current value corresponding to the jth suspected abnormal critical voltage exceeds the first current threshold, the controller is configured to determine that the jth suspected abnormal critical voltage is the final abnormal critical voltage.

4. The probe card detection system according to claim 3, characterized in that: If the first leakage current value corresponding to the jth suspected abnormal critical voltage does not exceed the first current threshold, the controller is used to control the pulse voltage source to stop applying the pulse voltage, and set j=j+1, and set the jth suspected abnormal critical voltage=j-1th suspected abnormal critical voltage+second preset amplitude; The controller is used to repeatedly determine whether the j-th suspected abnormal critical voltage exceeds the i-th target voltage until a first leakage current value corresponding to the j-th suspected abnormal critical voltage exceeds a first current threshold, or the j-th suspected abnormal critical voltage exceeds the i-th target voltage; In a case where the jth suspected abnormal critical voltage exceeds the i-th target voltage, the controller is configured to determine the i-th target voltage as a final abnormal critical voltage.

5. The probe card detection system according to claim 4, characterized in that: The controller is used to control the pulse voltage source to apply a second pulse voltage through the third power supply terminal and the first power supply terminal; The second leakage current monitoring device is used to monitor a third leakage current value between a gate measurement terminal and an emitter measurement terminal of the wafer sample, and transmit the third leakage current value to the controller; The controller is used to determine whether the third leakage current value is greater than the second current threshold value, and if so, it is determined that the probe card has a leakage current abnormality problem.

6. The probe card detection system according to claim 4, characterized in that: The fourth power supply end of the pulse voltage source is connected to the fourth connector, and the test machine is also provided with a first voltage detection device; One end of the first voltage detection device is connected to the third connector, and the other end of the first voltage detection device is connected to the fourth connector; The controller is used to control the pulse voltage source to apply a third pulse current to the third connector; The first voltage detection device is used to detect the gate voltage between the third connector and the fourth connector, and transmit the gate voltage to the controller; The controller is used to determine whether the probe card has a gate terminal connection abnormality problem according to the gate voltage.

7. The probe card testing system according to claim 1, wherein: The fifth power supply terminal of the pulse voltage source is connected to the second connector, and the test machine is also provided with a second voltage detection device; One end of the second voltage detection device is connected to the first connection head, and the other end of the second voltage detection device is connected to the second connection head; The controller is used to control the pulse voltage source to apply a fourth pulse current to the first connector; The second voltage detection device is used to detect the emitter voltage between the first connector and the second connector, and transmit the emitter voltage to the controller; The controller is used to determine whether the probe card has an abnormal emitter terminal connection problem according to the emitter voltage.

8. A probe card detection method, characterized in that: A controller used in a probe card detection system according to any one of claims 1 to 7, wherein the probe card detection method comprises: Get the test start instruction; The pulse voltage source is controlled to apply a pulse voltage through the first power supply terminal and the second power supply terminal, and it is determined whether the probe card has a withstand voltage isolation abnormality problem according to a first leakage current value between the emitter measurement terminal and the collector measurement terminal of the wafer sample.

9. The probe card detection method according to claim 8, wherein: The step of controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal, and determining whether the probe card has a withstand voltage isolation abnormality problem according to a first leakage current value between the emitter measurement terminal and the collector measurement terminal of the wafer sample, includes: Controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to an i-th target voltage; determining whether a first leakage current value at the i-th target voltage exceeds a first current threshold; If the first leakage current value exceeds the first current threshold, it is determined that the probe card has a withstand voltage isolation abnormality problem; If the first leakage current value corresponding to the i-th target voltage does not exceed the first current threshold, the pulse voltage source is controlled to stop applying the pulse voltage, and i=i+1, and the i-th target voltage=i-1th target voltage+first preset amplitude; Determine whether the new i-th target voltage exceeds the voltage threshold; If the new i-th target voltage does not exceed the voltage threshold, controlling the pulse voltage source to apply a pulse voltage through the first power supply terminal and the second power supply terminal according to the i-th target voltage until the new i-th target voltage exceeds the voltage threshold or the first leakage current value exceeds the first current threshold; If the i-th target voltage exceeds the voltage threshold, it is determined that the probe card does not have a withstand voltage isolation abnormality problem.

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