CCD (Charge Coupled Device) temperature control system applying multiple independent-level TEC (Thermoelectric Cooler) stacking and control method

Abstract

The invention relates to a CCD temperature control system applying multiple independent-level TEC stacking and a control method. The CCD temperature control system comprises an upper computer, a CPU control processing module, a TEC driving and temperature acquisition module and a CCD detector refrigeration assembly. The CPU control processing module is respectively connected with the upper computer and the TEC driving and temperature acquisition module, and the CCD detector refrigeration assembly is connected with the TEC driving and temperature acquisition module; according to the invention, the control parameters of the superior TEC can be automatically adjusted according to a telemetering temperature CCD temperature change model, and the requirements of the temperature control rate and the temperature control precision can be met within a certain range; and according to the requirements of a telemetering temperature CCD temperature change model, temperature control precision and target temperature, lower-level TEC control parameters can be automatically adjusted, the temperature control precision is ensured, and the temperature control depth is expanded.

Description

Technical Field

[0001] The present invention relates to a TEC control system with multiple independent stages and high precision and wide cooling depth, and in particular to a CCD temperature control system and parameter adjustment control method for stacking and installing two TECs of different models with high precision and wide cooling depth. Background Art

[0002] TEC refrigeration technology: Thermoelectric Cooler (TEC), also known as semiconductor refrigerator, uses the temperature difference electric effect of thermoelectric materials to achieve refrigeration. It has the characteristics of small size, no mechanical noise, long life and high reliability. It is generally composed of a large number of thermocouples. When the current flows from the N end to the P end, the TEC cold end absorbs heat from the environment and becomes the cold end of the refrigerator. Loading currents of different sizes at both ends of the refrigerator can achieve precise control of the cold end temperature. The hot end of the thermoelectric cooler is generally connected to the radiator, and the heat is transferred from the hot end of the thermoelectric cooler to the radiator to achieve the transfer of thermal energy.

[0003] Semiconductor refrigerators have a wide range of applications, such as defense, medical, industrial, scientific research and other fields, all of which use corresponding precision temperature control systems according to specific application conditions. There are two main application conditions: one is a wide temperature range, considering multiple TEC stacked packaging, multi-level or single-level TEC control, to achieve wide cooling depth requirements. The other is multi-TEC distributed packaging, one by one control, to achieve wide density cooling requirements. In multi-TEC control technology, according to the assembly and layout of multi-TEC, as well as the heat dissipation capacity of the hot end, the design of the multi-TEC optimization control system and parameter configuration method affects the performance of the entire temperature control system.

[0004] High-stability deep-cooling detector temperature control technology for space-based platforms: Effective temperature control is the preferred way to suppress CCD dark current. Due to constraints on volume, weight, power, etc., especially the weak signals of dark targets on space-based platforms and the unfavorable atmospheric environment, the observation system is required to have higher sensitivity and lower noise. Good temperature measurement and control capabilities directly affect the quality of the imaging system. Therefore, for a large number of scientific and image sensors, high-stability deep cooling is one of the key factors in fully exerting detector performance.

[0005] Multi-TEC temperature control technology: PID control is a mature control technology used in the field of automatic control. It is a control method that collects state feedback from the controlled object and compares it with the target quantity. According to the system model, the appropriate PID control parameters of the upper TEC are established to achieve an automatic control system that meets the control requirements. PID control can not only realize the automatic control of the system independently on the hardware platform, but also realize the PID control function through software algorithms with the help of a certain hardware platform. Software PID control can improve the flexibility and convenience of system testing and parameter configuration.

[0006] Due to the complexity of actual application scenarios, the number of controlled objects often increases significantly, and the feedback information of the control system is often insufficient. The unified use of a single benchmark PID control algorithm for multiple controlled objects is not conducive to the convergence of the control process and will cause confusion in system control. Therefore, according to the characteristics of the controlled objects and feedback information, based on direct or indirect system feedback information, joint control of multiple controlled objects, and active search and optimization of control parameters are important links to improve the working performance of multi-control object systems.

[0007] In the complex environment of the space-based platform, the wide-depth and high-precision detector temperature cooling requirements and a special structure of two independent stacked TECs and dedicated temperature sensors require the use of PID algorithms for the two TECs as closed-loop temperature control algorithms, which makes it difficult to achieve stable temperature control and convergence. The installation method of the dedicated temperature sensor forces a control system to use indirect feedback, causing the indirect control party to be unable to cooperate well with the direct control party, resulting in poor temperature control stability, low temperature control efficiency, and long stabilization time. Therefore, in view of the use of the above-mentioned installation structure, it is necessary to find a method for automatic parameter configuration, so that the indirect control party can provide a good temperature control platform for the direct control party on the one hand, and on the other hand, it can automatically judge and adjust through the indirect feedback to meet the wide-depth and high-precision control requirements of the entire control system. Summary of the invention

[0008] The purpose of the present invention is to solve the technical problems in the prior art that due to the increase in the number of controlled objects and insufficient feedback information from the control system, the system control is chaotic and the temperature control stability is poor, the temperature control efficiency is low, and the stabilization time is long. A CCD temperature control system and control method using a multi-stage TEC stack are provided.

[0009] To achieve the above object, the technical solution adopted by the present invention is:

[0010] A CCD temperature control system using a multi-stage TEC stack, which is special in that it includes a host computer, a CPU control processing module, a TEC drive and temperature acquisition module, and a CCD detector cooling component; the CPU control processing module is connected to the host computer and the TEC drive and temperature acquisition module respectively, and the CCD detector cooling component is connected to the TEC drive and temperature acquisition module;

[0011] The CCD detector cooling assembly includes an array CCD, a temperature sensor assembly and a TEC cooler; the TEC cooler is two independent single-stage TEC coolers; the TEC cooler includes an upper TEC and a lower TEC stacked together, the cold end of the upper TEC is attached to the back of the array CCD; the temperature sensor assembly is arranged on the back of the array CCD4; the cold end of the lower TEC is attached to the hot end of the upper TEC; the output end of the temperature sensor assembly is connected to the temperature input end of the temperature acquisition module; the input end of the TEC cooler is connected to the drive input end of the temperature acquisition module. Output end; the CPU control processing module is used to receive protocol instructions and various parameters returned by transmission protocol telemetry to the host computer; parse various instructions and control parameters transmitted from the host computer, configure the working status of the TEC drive and temperature acquisition module according to the parsed data and the stored program software algorithm, output the digital control timing of the TEC drive and temperature acquisition module, and analyze the various telemetry acquisition quantities required by the control algorithm, calculate the temperature control quantity of the upper TEC in a closed loop, design the control quantity of the lower TEC, and after completing the calculation, output the drive control digital values ​​of the two TECs in real time; realize the interface conversion of the front and back end circuit levels.

[0012] Furthermore, the CPU control processing module includes a CAN communication interface, a CPU processor and a level conversion circuit module; the CPU processor is connected to the CAN communication interface and the level conversion circuit module respectively; the CAN communication interface is connected to the host computer, and is used to receive various instructions and control parameters transmitted from the host computer and forward them to the CPU processor, and receive the protocol instructions of the CPU processor and various parameters returned by the transmission protocol telemetry to the host computer; the CPU processor is used to parse the various instructions and control parameters transmitted from the host computer, and calculate and output the driving digital control quantity of the upper TEC and the lower TEC in real time according to the feedback temperature and the target temperature; the level conversion circuit module is connected to the TEC drive and temperature acquisition module, and is used to perform interface conversion on the driving digital control quantity output by the CPU processor and output it to the TEC drive and temperature acquisition module, and send the temperature signal collected by the TEC drive and temperature acquisition module to the CPU processor after level conversion.

[0013] Furthermore, the TEC drive and temperature acquisition module comprises an AD conversion circuit module, a temperature acquisition circuit module, a DA conversion circuit module and a drive circuit module; the input end of the temperature acquisition circuit module is connected to the output end of the temperature sensor assembly, the output end is connected to the input end of the AD conversion circuit module, and the output end of the AD conversion circuit module (31) is connected to the level conversion circuit module; the input end of the DA conversion circuit module is connected to the level conversion circuit module, the output end is connected to the input end of the drive circuit module, and the output end of the drive circuit module is connected to the TEC cooler.

[0014] Furthermore, the AD conversion circuit module and the DA conversion circuit module are 12-bit digital-analog hybrid circuit chips, and all control timings thereof are provided by a CPU processor.

[0015] Furthermore, the temperature sensor assembly includes two temperature sensors that back up each other; the two temperature sensors are arranged on the back of the area array CCD and are respectively located at two ends of the upper TEC, and are used to characterize the CCD cooling temperature.

[0016] Furthermore, the CCD detector cooling assembly also includes a tube shell with an opening at the lower end, a molybdenum plate and a heat sink; the tube shell is arranged on the heat sink, and a closed structure filled with rare gas is formed between the tube shell and the heat sink; the area array CCD, temperature sensor assembly, TEC refrigerator and molybdenum plate are all located in the closed structure; the molybdenum plate is arranged on the upper surface of the heat sink, and the hot end of the lower-level TEC is attached to the upper surface of the molybdenum plate.

[0017] Furthermore, the model of the area array CCD is CCD42-80; the detection capability is +22.5Mv, and the temperature control index is -75±2°C.

[0018] Furthermore, the host computer includes a ground inspection computer and a power control box; the ground inspection computer is connected to the power control box; the power control box is respectively connected to the power supply ends of the CPU control processing module and the TEC drive and temperature acquisition module; the ground inspection computer is communicatively connected to the CPU control processing module.

[0019] A control method for a CCD temperature control system using a multi-stage TEC stack is characterized in that it includes the following steps:

[0020] Step S1, after the host computer 1 is powered on, the CPU controls the processing module, the TEC drive and the temperature acquisition module to be powered on, and the CPU controls the processing module to establish communication with the host computer;

[0021] Step S2, the CPU controls the processing module to power on and loads the default control parameters of the upper TEC and the lower TEC;

[0022] Step S3, setting the temperature control accuracy, temperature control rate and target temperature value through the host computer, and after the setting is completed, the host computer issues a cooling command;

[0023] Step S4, the CPU controls the processing module to perform PID calculation and output control quantity of the upper TEC with default parameters according to the current temperature feedback value and the target temperature value of the area array CCD, and outputs a constant 1 / 2 full-scale control quantity to the lower TEC;

[0024] Step S5, the CPU control processing module compares the current temperature of the area array CCD with the target temperature value according to the control quantity output of the upper TEC and the lower TEC. If the area array CCD temperature is within ±2°C of the target temperature, the process returns to step S4; if the area array CCD temperature is outside the target temperature +2°C, the process proceeds to step S6; if the area array CCD temperature is outside the target temperature -2°C, the process proceeds to step S7;

[0025] Step S6, the output control amount of the lower-level TEC is increased stepwise to 3 / 2 times of the current value, and the step length of the lower-level TEC stepwise growth is controlled in combination with the current temperature rise rate to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD is stabilized within the range of the target temperature + 2°C;

[0026] In step S7, the output control amount of the lower-level TEC is reduced step by step to 1 / 2 times of the current value. At the same time, combined with the current temperature control rate, the step length of the lower-level TEC step control is controlled to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD is stabilized within the target temperature range of -2°C.

[0027] Furthermore, the temperature control accuracy setting value in step S3 is ±1°C or ±2°C; the temperature control rate setting value is 4°C / m or 3°C / m.

[0028] Compared with the prior art, the present invention has the following beneficial technical effects:

[0029] 1. The present invention can set the target temperature, temperature control accuracy and temperature control rate on the host computer according to the actual refrigeration demand. The host computer can establish a CCD refrigeration temperature change model according to the telemetry temperature to evaluate the temperature control accuracy and temperature control rate;

[0030] 2. The CCD temperature control system of the present invention using a multi-stage TEC stack is provided with a CPU control processing module and a TEC drive and temperature acquisition module. It can automatically adjust the upper-level TEC control parameters according to the temperature value converted into the CCD temperature telemetry digital quantity to meet the requirements of temperature control rate and temperature control accuracy within a certain range; and can automatically adjust the lower-level TEC control parameters according to the requirements of the telemetry temperature CCD temperature change model, temperature control accuracy and target temperature to ensure temperature control accuracy and expand temperature control depth.

[0031] 3. The present invention uses a CCD temperature control system and control method with multiple independent TEC stacks. According to the CCD temperature change, the CPU software algorithm actively matches the upper TEC control quantity to optimize the control parameters of the lower TEC, and establishes a lower control optimization strategy based on the upper TEC and the target temperature to ensure the temperature control accuracy and expand the temperature control depth in maneuverable conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of the composition of a CCD temperature control system using a multi-stage TEC stack according to the present invention;

[0033] Figure 2 A schematic diagram of a CPU control processing module in an embodiment of a CCD temperature control system using a multi-stage TEC stack according to the present invention;

[0034] Figure 3 A schematic diagram of a TEC driving and temperature acquisition module in an embodiment of a CCD temperature control system using a multi-stage TEC stack according to the present invention;

[0035] Figure 4 A schematic diagram of a CCD detector cooling assembly in an embodiment of a CCD temperature control system using a multi-stage TEC stack according to the present invention;

[0036] Figure 5 It is a schematic diagram of the control process of the control method of the CCD temperature control system using a multi-stage TEC stack according to the present invention;

[0037] The following are the descriptions of the reference numerals:

[0038] 1-host computer, 2-CPU control processing module, 3-TEC drive and temperature acquisition module, 4-CCD detector cooling component, 21-CAN communication interface, 22-CPU processor, 23-level conversion circuit module; 31-AD conversion circuit module, 32-temperature acquisition circuit module, 33-DA conversion circuit module, 34-drive circuit module, 41-array CCD, 42-temperature sensor component, 43-upper TEC, 44-lower TEC, 45-tube shell. DETAILED DESCRIPTION

[0039] In order to make the purpose, advantages and features of the present invention clearer, the CCD temperature control system and control method using a multi-stage TEC stack proposed by the present invention are further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood by those skilled in the art that these embodiments are only used to explain the technical principles of the present invention and are not intended to limit the scope of protection of the present invention.

[0040] The embodiment of the CCD temperature control system using multi-stage TEC stacking of the present invention takes a customized CCD detector refrigeration component used for astronomical observation as an example, meets the temperature control indicators of refrigeration depth, refrigeration accuracy, refrigeration rate and maneuvering conditions, and finds the best matching control parameters of the upper TEC43 and the lower TEC44 that meet the control indicators. The target temperature of the CCD detector refrigeration is -75±2℃, the hot end temperature range is -21℃~-60℃, and the temperature control rate is not more than 4℃ / min. The parameters for optimal matching include the control parameters of the upper TEC43 and the optimal control amount of the lower TEC44. The maneuvering condition refers to the change of the load posture, and the temperature range of the hot end of the heat dissipation surface suddenly deepens within the range of +10%.

[0041] like Figure 1 As shown, the CCD temperature control system of the present invention using multi-stage TEC stacking is composed of the following modules, namely, a host computer 1, a CPU control processing module 2, a TEC drive and temperature acquisition module 3, and a CCD detector refrigeration component 4; the host computer 1 includes a ground inspection computer and a power command control box, the command control box is used for power supply and distribution opening and closing control of the temperature control system, control of the control system hardware plus power-off switch control during ground testing, setting of system control mode and control parameters, and ground processing of telemetry return information. The ground inspection computer sets the target temperature and temperature control accuracy of the temperature control, and draws the real-time telemetry return temperature of the controlled object and the temperature curve change of the heat dissipation surface, and has the function of real-time evaluation of temperature control accuracy and temperature control rate.

[0042] After the ground inspection computer is powered on, the ground inspection system is started, the power control box is powered on, the CPU control processing module 2 and the TEC drive and temperature acquisition module 3 are powered on, and communication is established with the ground inspection computer. The control system mode and control instruction parameters can be uploaded to the ground and the test return parameters can be downloaded. Data analysis and curve drawing can be performed synchronously on the ground inspection computer.

[0043] like Figure 2As shown, the CPU control processing module 2 includes a CAN communication interface 21, a CPU processor 22 and a level conversion circuit module 23; the CAN communication interface 21 is used to receive protocol instructions and transmit various parameters returned by the protocol telemetry to the host computer 1; the CPU processor 22 is used to parse various instructions and control parameters transmitted from the host computer 1, and configure the working state of each digital analog circuit according to the parsed data and the stored program software algorithm. Here, the working state of the digital analog circuit is issued by the ground inspection software of the host computer 1, transmitted through the CAN communication interface 21, parsed by the CPU processor 22, output by the I / O interface of the CPU, and connected to the control interface of the AD conversion circuit module 31, the temperature acquisition circuit module 32, the DA conversion circuit module 33 and the drive circuit module 34 through the level conversion circuit module 23; the CPU control processing module 2 outputs the digital control timing of the digital analog circuit, and at the same time analyzes the various telemetry acquisition quantities required by the control algorithm, and calculates the temperature control quantity of the upper TEC43 in a closed loop, focusing on finding a reasonable control quantity that matches the lower TEC44. After the calculation is completed, the drive control digital value of the two TECs is output in real time.

[0044] The CPU processor 22 includes a temperature change mismatch module and an optimal control system calculation module. The temperature change mismatch module is used to calculate the difference between the current temperature of the CCD and the target set temperature, whether it is within the temperature control accuracy of the target temperature (±1°C or ±2°C), and whether the temperature change rate meets the set temperature control rate requirement (4°C / m or 3°C / m). The optimal control calculation module is used to calculate the digital control amount of the lower-level TEC44.

[0045] The level conversion circuit module 23 is composed of a level array of multiple identical chips. The chip model is HCC40109. Its function is to convert the output digital and control signal levels of the CPU into levels that are compatible with the circuit receiving logic and digital signals in the TEC drive and temperature acquisition module 3, thereby realizing the interface conversion of the logic control of the TEC drive and temperature acquisition module 3 and the front-end and back-end circuit levels.

[0046] The core of the CPU control processing module 2 is to process telemetry parameters, including: the temperature value of the temperature sensor encapsulated inside the detector package, which represents the current temperature of the refrigeration. The control strategy of the upper TEC is based on PID constant current control. Due to the lack of direct temperature feedback telemetry, the control strategy designed for the lower TEC is based on the difference between the current temperature of the controlled object and the target temperature, combined with the control amount of the upper TEC, to optimize the matching of the constant current control amount of the lower TEC, improve the control efficiency and random adjustment ability.

[0047] like Figure 3As shown, the TEC drive and temperature acquisition module 3 includes an AD conversion circuit module 31, a temperature acquisition circuit module 32, a DA conversion circuit module 33 and a drive circuit module 34; the digital control quantity obtained by the CPU processor 22 after analysis and calculation is converted into a voltage operation analog quantity through the level conversion circuit module 23 and the DA conversion circuit module 33, and then the TEC drive current is accurately controlled through the drive circuit module 34.

[0048] The level conversion circuit module 23 converts the analog signal of the temperature sensor into a digital quantity according to the control timing output by the CPU processor 22 and transmits it to the CPU processor 22, thereby providing the analog conversion quantity required by the processing analysis and calculation module.

[0049] like Figure 4 As shown, the temperature control system involved in the present invention is mainly used in a customized CCD detector cooling assembly 4 for astronomical observation. The CCD detector cooling assembly 4 is composed of a planar array CCD41, two independent single-stage and different models, stacked upper TEC43 and lower TEC44, and a temperature sensor pair installed at the cold end of the upper TEC43 (characterizing the detector cooling temperature). The CCD detector cooling assembly 4 is arranged in a tube shell 45 with an opening at the lower end; the tube shell 45 is arranged on a heat sink, and the entire structure is encapsulated in a closed structure filled with rare gas. The two TECs use the control platform designed by the present invention to form a good temperature control path with parameters such as target temperature and temperature sensor feedback.

[0050] The model of the area array CCD41 is CCD42-80 produced by E2V. The system detection capability needs to reach +22.5Mv (signal-to-noise ratio>5). In order to meet the signal-to-noise ratio requirement, the temperature control index of the CCD detector cooling component 4 is -75±2℃. The two TECs stacked and packaged in the CCD detector cooling component 4 are the upper TEC CP14.71.10L and the lower TEC CP14.71.06L. The temperature sensor pair is PT1000 installed at the cold end of the upper TEC43 to characterize the CCD cooling temperature. There are two sensors that are backed up and installed symmetrically. The cold end of the upper TEC43 is directly attached to the back substrate of the CCD detector cooling component 4, and the cold end of the lower TEC44 is attached to the hot end of the upper TEC43. The heat conduction device realizes heat conduction by attaching a molybdenum plate installed at the hot end of the lower TEC44. The hot end of the lower TEC44 is connected to the heat sink through the molybdenum plate. Two temperature sensors are installed on the cold surface of the back of the detector to measure the current temperature of the back of the actual detector and also serve as the temperature feedback of the temperature control system.

[0051] Since the TEC hot end dissipates heat to the external hot and cold environment through the molybdenum plate and the heat sink, the temperature change of the hot end fluctuates greatly with the change of the space environment. In the CCD temperature control system using multiple independent TEC stacks, the present invention actively matches the upper TEC control quantity through the CPU software algorithm to optimize the control parameters of the lower TEC, and establishes a lower control optimization strategy based on the upper TEC and the target temperature. For the control process and the joint optimization control process of the upper and lower TECs, the specific method process is as follows Figure 5 As shown, the following steps are included:

[0052] Step S1, after the host computer 1 is powered on, the CPU controls the processing module 2 and the TEC drive and temperature acquisition module 3 to power on and establish communication with the host computer 1;

[0053] Step S2, the default control parameters of the upper TEC43 and the lower TEC44 are loaded; first, the upper TEC43 takes the current temperature feedback and target value to perform PID process control based on the default parameters, and the lower TEC44 performs the default control value control, while the CPU controls the processing module 2 to calculate the current temperature control rate of the CCD.

[0054] Step S3, setting the temperature control accuracy, temperature control rate and target temperature value; these are set on the ground inspection computer control interface of the host computer 1, the temperature control accuracy can be set to ±1°C, ±2°C, etc., and the temperature control rate can be set to 4°C / m, 3°C / m. The above settings are used for software calculations during the temperature control process.

[0055] Step S4, the CPU controls the processing module 2 to perform PID calculation output control quantity of the upper-level TEC 43 with default parameters according to the current temperature feedback value and the target temperature value of the area array CCD 41, and outputs a constant 1 / 2 full-scale control quantity to the lower-level TEC 44;

[0056] The optimization process of the present invention is as follows: when the refrigeration control is started, the CPU control processing module 2 first performs PID calculation and output control quantity of the upper-level TEC43 with default parameters according to the current temperature feedback value of the CCD detector refrigeration component 4 and the target temperature. Due to the lack of direct temperature feedback quantity, the lower-level TEC44 directly adopts 1 / 2 full-scale control quantity in the first step, and constantly outputs 1 / 2 full-scale control value. The full-scale design digital quantity range is (48-4048).

[0057] Due to the space environment, changes in satellite pointing and the occurrence of maneuvering situations, the temperature of the TEC hot end fluctuates greatly. During the temperature control process, only the upper-level TEC full-range PID control and the lower-level constant TEC control amount are not enough to meet the temperature control requirements of the controlled object being stable at the target temperature ±2°C when the hot end temperature changes rapidly due to the refrigeration depth and maneuvering situations.

[0058] Step S5, the CPU controls the processing module 2 to compare the current temperature of the area array CCD41 with the target temperature value according to the control quantity output of the upper TEC43 and the lower TEC44. If the temperature of the area array CCD41 is within ±2°C of the target temperature, the process returns to step S4; if the temperature of the area array CCD41 is outside the target temperature +2°C, the process proceeds to step S6; if the temperature of the area array CCD41 is outside the target temperature -2°C, the process proceeds to step S7;

[0059] Step S6, the output control amount of the lower TEC (44) is increased stepwise to 3 / 2 times of the current value, and the step length of the stepwise increase of the lower TEC (44) is controlled in combination with the current temperature rise rate to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD (41) is stabilized within the range of the target temperature + 2°C;

[0060] In step S7, the output control amount of the lower-level TEC (44) is gradually reduced to 1 / 2 times of the current value. At the same time, combined with the current temperature control rate, the step length of the lower-level TEC (44) is controlled to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD (41) is stabilized within the range of -2°C of the target temperature.

[0061] The specific calculation process is: the current temperature of CCD is higher than the target temperature +2℃, and the upper TEC 43PID calculation value has been outputted and has exceeded 2 / 3 of the full range, the output control amount of the lower TEC44 is increased step by step to 3 / 2 times the current value, and at the same time, combined with the current temperature rise rate, the step length of the lower TEC44 step growth is controlled to meet the requirement that the temperature change rate is not greater than the setting value in step S3, until the current temperature of the controlled object CCD is stabilized within the target temperature +2℃ range. Similarly, the current temperature of CCD is lower than the target temperature -2℃, and the upper TEC43 PID calculation value has been outputted and has exceeded 1 / 3 of the full range, the output control amount of the lower TEC44 is decreased step by step to 1 / 2 times the current value, and at the same time, combined with the current temperature control rate, the step length of the lower TEC44 step control is controlled to meet the requirement that the temperature change rate is not greater than the setting value in step S3, until the temperature of the controlled object CCD is stabilized within the target temperature -2℃ range.

[0062] The optimal control strategy in the control method of the present invention relies on the above-mentioned hardware platform, has been fully verified by thermal optics and thermal vacuum tests in engineering projects, and has achieved stable working results on on-orbit space payloads.

[0063] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the present invention.

Claims

1. A CCD temperature control system using a multi-stage TEC stack, characterized in that: The system comprises a host computer (1), a CPU control processing module (2), a TEC drive and temperature acquisition module (3) and a CCD detector cooling component (4); the CPU control processing module (2) is connected to the host computer (1) and the TEC drive and temperature acquisition module (3) respectively, and the CCD detector cooling component (4) is connected to the TEC drive and temperature acquisition module (3); The CCD detector cooling assembly (4) comprises a planar array CCD (41), a temperature sensor assembly (42) and a TEC cooler; the TEC cooler is two independent single-stage TEC coolers; the TEC cooler comprises an upper TEC (43) and a lower TEC (44) which are stacked, the cold end of the upper TEC (43) being attached to the back of the planar array CCD (41); the temperature sensor assembly (42) being arranged on the back of the planar array CCD (41); the cold end of the lower TEC (44) being attached to the hot end of the upper TEC (43); the output end of the temperature sensor assembly (42) being connected to the temperature input end of the temperature acquisition module (3); and the input end of the TEC cooler being connected to the drive output end of the temperature acquisition module (3); The CPU control processing module (2) is used to receive protocol instructions and various parameters returned by transmission protocol telemetry to the host computer (1); parse the instructions and control parameters transmitted by the host computer (1), configure the working state of the TEC drive and temperature acquisition module (3), output the digital control timing of the TEC drive and temperature acquisition module (3), calculate the temperature control amount of the upper TEC (43) in a closed loop, design the control amount of the lower TEC (44) and output it in real time.

2. The CCD temperature control system using a multi-stage TEC stack according to claim 1, characterized in that: The CPU control processing module (2) comprises a CAN communication interface (21), a CPU processor (22) and a level conversion circuit module (23); the CPU processor (22) is connected to the CAN communication interface (21) and the level conversion circuit module (23) respectively; the CAN communication interface (21) is connected to the host computer (1) and is used to receive various instructions and control parameters transmitted from the host computer (1) and forward them to the CPU processor (22), and receive protocol instructions from the CPU processor (22) and various parameters returned by transmission protocol telemetry to the host computer (1); the CPU The CPU processor (22) is used to analyze various instructions and control parameters transmitted from the upper computer (1), and calculate and output the control quantities of the upper TEC (43) and the lower TEC (44) in real time according to the feedback temperature and the target temperature; the level conversion circuit module (23) is connected to the TEC drive and temperature acquisition module (3), and is used to perform interface conversion on the drive digital control quantity output by the CPU processor (22) and output it to the TEC drive and temperature acquisition module (3), and send the temperature signal collected by the TEC drive and temperature acquisition module (3) to the CPU processor (22) after level conversion.

3. The CCD temperature control system using a multi-stage TEC stack according to claim 2, characterized in that: The TEC drive and temperature acquisition module (3) comprises an AD conversion circuit module (31), a temperature acquisition circuit module (32), a DA conversion circuit module (33) and a drive circuit module (34); the input end of the temperature acquisition circuit module (32) is connected to the output end of the temperature sensor assembly (42), the output end is connected to the input end of the AD conversion circuit module (31), and the output end of the AD conversion circuit module (31) is connected to the level conversion circuit module (23); the input end of the DA conversion circuit module (33) is connected to the level conversion circuit module (23), the output end is connected to the input end of the drive circuit module (34), and the output end of the drive circuit module (34) is connected to the TEC refrigerator.

4. The CCD temperature control system using a multi-stage TEC stack according to claim 3, characterized in that: The AD conversion circuit module (31) and the DA conversion circuit module (33) are 12-bit digital-analog hybrid circuit chips, and all control timings thereof are provided by the CPU processor (22).

5. The CCD temperature control system using a multi-stage TEC stack according to any one of claims 1 to 4, characterized in that: The temperature sensor assembly (42) comprises two temperature sensors which serve as backup for each other; the two temperature sensors are arranged on the back of the area array CCD (41) and are respectively located at two ends of the upper TEC (43) and are used to characterize the CCD cooling temperature.

6. The CCD temperature control system using a multi-stage TEC stack according to claim 5, characterized in that: The CCD detector cooling assembly (4) further comprises a tube shell (45) with an opening at the lower end, a molybdenum plate and a heat sink; the tube shell (45) is arranged on the heat sink, and a closed structure filled with rare gas is formed between the tube shell and the heat sink; the area array CCD (41), the temperature sensor assembly (42), the TEC refrigerator and the molybdenum plate are all located in the closed structure; the molybdenum plate is arranged on the upper surface of the heat sink, and the hot end of the lower-level TEC (43) is attached to the upper surface of the molybdenum plate.

7. The CCD temperature control system using a multi-stage TEC stack according to claim 6, characterized in that: The model of the area array CCD (41) is CCD42-80; the detection capability is +22.5Mv, and the temperature control index is -75±2°C.

8. The CCD temperature control system using multi-stage TEC stacking according to claim 7, characterized in that: The host computer (1) comprises a ground inspection computer and a power control box; the ground inspection computer is connected to the power control box; the power control box is respectively connected to the power supply ends of the CPU control processing module (2) and the TEC drive and temperature acquisition module (3); the ground inspection computer is communicatively connected to the CPU control processing module (2).

9. A control method for a CCD temperature control system using a multi-stage TEC stack according to any one of claims 1 to 8, characterized in that: The following steps are involved: Step S1, after the host computer (1) is powered on, the CPU controls the processing module (2) and the TEC drive and temperature acquisition module (3) to be powered on, and the CPU controls the processing module (2) to establish communication with the host computer (1); Step S2, the CPU controls the processing module (2) to power on and loads the default control parameters of the upper TEC (43) and the lower TEC (44); Step S3, setting the temperature control accuracy, the temperature control rate and the target temperature value through the host computer (1), and after the setting is completed, the host computer (1) issues a cooling instruction; Step S4, the CPU controls the processing module (2) to perform PID calculation output control quantity of the upper-level TEC (43) with default parameters according to the current temperature feedback value and the target temperature value of the area array CCD (41), and to output a constant 1 / 2 full-scale control quantity to the lower-level TEC (44); Step S5, the CPU controls the processing module (2) to compare the current temperature of the area array CCD (41) with the target temperature value according to the control quantity output of the upper TEC (43) and the lower TEC (44); if the temperature of the area array CCD (41) is within ±2°C of the target temperature, the process returns to step S4; if the temperature of the area array CCD (41) is outside the target temperature +2°C, the process proceeds to step S6; if the temperature of the area array CCD (41) is outside the target temperature -2°C, the process proceeds to step S7; Step S6, the output control amount of the lower TEC (44) is increased stepwise to 3 / 2 times of the current value, and the step length of the stepwise increase of the lower TEC (44) is controlled in combination with the current temperature rise rate to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD (41) is stabilized within the range of the target temperature + 2°C; In step S7, the output control amount of the lower-level TEC (44) is gradually reduced to 1 / 2 times of the current value. At the same time, combined with the current temperature control rate, the step length of the lower-level TEC (44) is controlled to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD (41) is stabilized within the range of -2°C of the target temperature.

10. The control method of the CCD temperature control system using a multi-stage TEC stack according to claim 9, characterized in that: The temperature control accuracy setting value in step S3 is ±1°C or ±2°C; the temperature control rate setting value is 4°C / m or 3°C / m.

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