Control method, apparatus, and display device of display panel

Abstract

A control method and device of a display panel and a display device, the method comprising: when a first frequency switching instruction is received, performing next frame image scanning according to an image refresh frequency corresponding to the first frequency switching instruction; the first frequency switching instruction is used to switch the image refresh frequency from a high frequency to a low frequency; and during a first holding frame duration after the frequency switching, a voltage of a compensation voltage signal provided to a driving tube in a pixel circuit is maintained as a first compensation voltage value; the first compensation voltage value is greater than a second compensation voltage value, and the second compensation voltage value is a compensation voltage value of the compensation voltage signal in other holding frames after the frequency switching except for the first holding frame. With the above scheme, the voltage of the compensation voltage signal provided to the driving tube in the pixel circuit is raised, and thus the display brightness of the driving tube in the pixel circuit during the first holding frame duration after the frequency switching can be improved, brightness variation caused by state change of the driving tube when switching from the high frequency to the low frequency is avoided, and direct switching without flicker is achieved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a control method, apparatus, and display device for a display panel. Background Technology

[0002] With the continuous development of display technology, more and more high refresh rate displays have emerged. To meet the needs of different users, most high refresh rate displays have begun to support dynamic frequency adjustment.

[0003] In a display device, the application processor sends a frequency-switching command to the display chip and provides image data, so that the display chip adjusts the refresh rate to perform image scanning according to the frequency-switching command.

[0004] However, currently, display panels exhibit poor display quality when switching frequencies. Summary of the Invention

[0005] The technical problem solved by this invention is how to improve the display effect of a display panel.

[0006] To address the aforementioned technical problems, this invention provides a control method for a display panel, comprising: upon receiving a first frequency switching instruction, scanning the next frame of image according to the image refresh frequency corresponding to the first frequency switching instruction; the first frequency switching instruction is used to switch the image refresh frequency from a high frequency to a low frequency; wherein, during the duration of the first hold frame after frequency switching, the voltage of the compensation voltage signal provided to the driving transistor in the pixel circuit is maintained at a first compensation voltage value; the first compensation voltage value is greater than a second compensation voltage value, and the second compensation voltage value is the compensation voltage value of the compensation voltage signal for other hold frames after frequency switching, excluding the first hold frame.

[0007] Optionally, the first compensation voltage value ranges from 7V to 8V.

[0008] Optionally, the second compensation voltage value of the compensation voltage signal is the same for all holding frames except the first holding frame after frequency switching.

[0009] Optionally, the second compensation voltage value ranges from 6.95V to 7.95V.

[0010] Optionally, the control method for the display panel further includes: when a second frequency switching instruction is received, maintaining the current image refresh frequency to continue scanning the current frame image until the scanning duration of the current frame image reaches a preset duration, wherein the preset duration is an integer multiple of the anode reset signal period; the second frequency switching instruction is used to switch the image refresh frequency from low frequency to high frequency.

[0011] Optionally, maintaining the current image refresh rate to continue scanning the current frame image includes: keeping the current voltage of the tear signal unchanged.

[0012] Optionally, the preset duration is equal to the anode reset signal period.

[0013] Optionally, the preset duration is equal to twice the period of the anode reset signal.

[0014] Accordingly, embodiments of the present invention also provide a control device for a display panel, comprising: a frequency-switching scanning unit, adapted to perform image scanning of the next frame according to the image refresh frequency corresponding to the first frequency-switching command when a first frequency-switching command is received; the first frequency-switching command is used to switch the image refresh frequency from a high frequency to a low frequency; and a compensation voltage setting unit, adapted to maintain the voltage of the compensation voltage signal provided to the driving transistor in the pixel circuit at a first compensation voltage value during the duration of the first hold frame after frequency-switching; the first compensation voltage value is greater than a second compensation voltage value, and the second compensation voltage value is the compensation voltage value of the compensation voltage signal in other hold frames after frequency-switching, excluding the first hold frame.

[0015] Accordingly, embodiments of the present invention also provide a display device, including: a pixel circuit, an application processor, and a control device for the display panel as described above.

[0016] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0017] By employing the control method in this embodiment of the invention, during the duration of the first hold frame after frequency switching, the voltage of the compensation voltage signal provided to the driving transistor in the pixel circuit is maintained at a first compensation voltage value, and the first compensation voltage value is greater than the second compensation voltage value of other hold frames after frequency switching, excluding the first hold frame. This achieves the increase of the voltage of the compensation voltage signal provided to the driving transistor in the pixel circuit, thereby improving the display brightness of the driving transistor in the pixel circuit during the duration of the first hold frame after frequency switching, avoiding brightness changes caused by changes in the state of the driving transistor when switching from high frequency to low frequency, and achieving flicker-free direct switching.

[0018] Furthermore, since the driving transistor in the pixel circuit is stable in all holding frames except the first holding frame after frequency switching, the second compensation voltage value of the compensation voltage signal in this invention is the same in all holding frames except the first holding frame after frequency switching, so that the driving transistor in the pixel circuit can maintain a stable brightness output without brightness decay or flickering.

[0019] Furthermore, upon receiving the second frequency switching command, the present invention maintains the current image refresh frequency corresponding to the current image refresh frequency and continues to scan the current frame image until the scanning time of the current frame image reaches a preset time, and the preset time is an integer multiple of the anode reset signal period. Compared with the prior art, which immediately performs frequency switching after executing the first frequency switching command, causing the anode reset signal period to change, the present invention can keep the anode reset signal period unchanged before and after receiving the second frequency switching command, thereby achieving stable brightness of the display panel when switching refresh frequencies without any jumps, and improving the display effect of the display panel. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the pixel circuitry in a display panel.

[0021] Figure 2 This is a timing diagram of the signals in the pixel circuit section of a display panel;

[0022] Figure 3 This is a timing diagram of the signals in the pixel circuit section of a display panel according to an embodiment of the present invention;

[0023] Figure 4 This is a timing diagram of the pixel circuit portion of a display panel in another embodiment of the present invention;

[0024] Figure 5 This is a timing diagram of the signal of the pixel circuit part in another embodiment of the present invention;

[0025] Figure 6 This is a schematic diagram of the structure of the control device for the display panel in one embodiment of the present invention;

[0026] Figure 7 This is a schematic diagram of the structure of a display device according to an embodiment of the present invention. Detailed Implementation

[0027] Current display panels exhibit brightness fluctuations during frequency switching, resulting in poor display quality.

[0028] Figure 1 This is a schematic diagram of the pixel circuitry in a display panel. Figure 2 This is a timing diagram of the signals in the pixel circuit section of a display panel. For example... Figure 1 As shown, Figure 1The pixel circuit includes a driving transistor T3, a reset transistor T5, a compensation transistor T8, a storage capacitor Cst, and a light-emitting diode D1. One end of the driving transistor T3 is connected to the compensation transistor T8, the gate of the driving transistor T3 is connected to the reset transistor T5 and the storage capacitor Cst, and the other end of the driving transistor T3 is connected to the anode of the light-emitting diode D1.

[0029] In some embodiments, the pixel circuit further includes: a reset signal terminal connected to the gate of the reset transistor T5, a first reference voltage terminal connected to one end of the reset transistor T5, a write signal terminal connected to the gate of the compensation transistor T8, and a compensation signal terminal connected to the other end of the compensation transistor T8.

[0030] Specifically, a reset signal SN1 is applied to the gate of the reset transistor T5, causing the reset transistor T5 to conduct. The conducting reset transistor T5 connects the storage capacitor Cst to the power supply voltage or ground, causing the storage capacitor Cst to charge or discharge to a predetermined initial voltage value. When the storage capacitor Cst reaches the target voltage value, the reset signal SN1 switches to a low level, the reset transistor T5 is turned off, and the storage capacitor Cst remains at that voltage value, that is, the gate of the driving transistor T3 is reset to the initial voltage value.

[0031] exist Figure 1 Based on the combination Figure 2 It can be seen that when the frequency switching command is received at time t1, the display panel switches the refresh rate from 120Hz to 30Hz. Time t1 to t2 is the duration of the first refresh frame I after the frequency switching, and time t2 to t3 is the duration of the first hold frame II after the frequency switching. During time t1 to t2, the reset signal SN1 is still within the reset cycle. However, during time t2 to t3, the reset signal SN1 is at a low level. At this time, the reset transistor T5 stops resetting the gate voltage of the driving transistor T3, causing charge accumulation on the gate of the driving transistor T3. This leads to fluctuations in the gate-source voltage VGS of the driving transistor T3, affecting the display effect of the display panel.

[0032] Currently, in order to solve the above problems, the voltage of the compensation voltage signal DVH applied to one end of the compensation transistor T8 is usually set to the second compensation voltage value DVHB during the period from time t2 to time t3 (i.e., the duration of the first hold frame II after frequency switching) in order to raise the VGS of the driving transistor T3. However, setting the voltage of the compensation voltage signal DVH to the second compensation voltage value DVHB does not pull the VGS of the driving transistor T3 back to the initial voltage value, and still causes the VGS of the driving transistor T3 to fluctuate, affecting the display effect of the display panel.

[0033] To address the aforementioned problems, this invention provides a control method for a display panel. By increasing the voltage value of the compensation voltage signal provided to the driving transistor in the pixel circuit to a first compensation voltage value during the duration of the first hold frame II after frequency switching, wherein the first compensation voltage value is greater than the second compensation voltage value of other hold frames II after frequency switching (excluding the first hold frame II), the display brightness of the driving transistor in the pixel circuit is increased during the duration of the first hold frame II after frequency switching, avoiding brightness changes caused by changes in the state of the driving transistor when switching from high frequency to low frequency, and achieving flicker-free direct switching.

[0034] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0035] This invention provides a control method for a display panel, comprising: when a first frequency switching command is received, scanning the next frame of image according to the image refresh frequency corresponding to the first frequency switching command; wherein, during the duration of the first hold frame II after frequency switching, the voltage of the compensation voltage signal provided to the driving transistor in the pixel circuit is maintained at the first compensation voltage value.

[0036] It should be noted that the first compensation voltage value is greater than the second compensation voltage value, and the second compensation voltage value is the compensation voltage value of the compensation voltage signal after frequency switching for all other holding frames II except for the first holding frame II.

[0037] In a specific embodiment, the first compensation voltage value DVHC ranges from 7V to 8V, and the second compensation voltage value DVHB ranges from 6.95V to 7.95V.

[0038] In a preferred embodiment, the first compensation voltage value DVHC is 7.5V, and the second compensation voltage value DVHB is 7.45V.

[0039] In some embodiments of the present invention, the first frequency switching instruction is used to switch the image refresh rate from a high frequency to a low frequency.

[0040] In a specific embodiment, combined with Figure 1 as well as Figure 3 ,by Figure 3 Taking the timing diagram of some signals in the signal as an example, we will explain some signals before and after receiving the first frequency switching command.

[0041] In some embodiments of the present invention, the first frequency switching instruction is used to switch the image refresh rate from 120Hz to 30Hz.

[0042] Among them, the reset signal SN1 is used to reset the gate of the driving transistor T3 to the initial voltage; the write signal SP is used to control the turn-on or turn-off of the write transistor T2 to transmit the data signal Vdata to the driving transistor T3; and the compensation voltage signal DVH is used to provide a compensation voltage for the driving transistor T3.

[0043] refer to Figure 3 From time t0 to t1, the image refresh rate is 120Hz, meaning all frames from t0 to t1 are refresh frames 1. At this time, a reset signal SN1 (high level) is applied to the gate of the reset transistor T5, causing T5 to conduct. The conducting reset transistor T5 connects the storage capacitor Cst to the power supply voltage or ground, charging or discharging Cst to a predetermined initial voltage value. When the storage capacitor Cst reaches the target voltage value, the reset signal is removed (low level), the reset transistor T5 is turned off, and the storage capacitor Cst remains at that voltage value. That is, the gate of the driving transistor T3 is reset to its initial voltage value. Furthermore, from time t0 to t1, the voltage of the compensation voltage signal DVH provided to the driving transistor in the pixel circuit remains at the third compensation voltage value DVHA.

[0044] One reset cycle is defined as the interval between the rising edges of adjacent reset signals SN1.

[0045] The third compensation voltage value, DVHA, ranges from 6.9V to 7.9V.

[0046] In a preferred embodiment, the third compensation voltage value DVHA is 7.4V.

[0047] Specifically, when the reset signal SN1 is high, the write signal SP is low, that is, during the process of the gate of the driving transistor T3 being reset, the write transistor T2 stops writing the data signal Vdata; when the reset signal is low, the write signal SP is high, that is, after the gate of the driving transistor T3 is reset, the write transistor T2 starts writing the data signal Vdata.

[0048] refer to Figure 3 At time t1, the control device of the display panel receives the first frequency switching command and switches the refresh frequency of the display panel from 120Hz to 30Hz. Time t1 to time t2 is the duration of the first refresh frame I after the frequency switching, and the reset signal SN1 is still in the reset cycle during time t1 to time t2. Time t2 to time t3 is the duration of the first hold frame II after the frequency switching. During time t2 to time t3, the reset signal SN1 is at a low level. At this time, the reset transistor T5 stops driving the gate voltage of the transistor T3 to reset.

[0049] Meanwhile, from time t1 to time t2, the voltage of the compensation voltage signal DVH provided to the driving transistor in the pixel circuit is maintained at the third compensation voltage value DVHA; from time t2 to time t3, the voltage of the compensation voltage signal DVH provided to the driving transistor in the pixel circuit is maintained at the first compensation voltage value DVHC.

[0050] Specifically, during the period from time t1 to time t3, the duration of the refresh frame I is the time during which the tear signal TE remains at a low level, and the duration of the hold frame II is the time during which the tear signal TE remains at a high level.

[0051] Specifically, by applying a first compensation voltage value DVHC to the input terminal of the compensation transistor T8 from time t2 to time t3 (i.e., the first hold frame II after frequency switching), the VGS of the driving transistor T3 is raised, and the VGS of the driving transistor T3 is pulled back to the initial voltage value, so as to maintain the stability of the VGS of the driving transistor T3 and improve the display effect of the display panel.

[0052] As can be seen from the above, by adopting the control method in the embodiments of the present invention, during the duration of the first hold frame II after frequency switching, the voltage of the compensation voltage signal provided to the driving transistor in the pixel circuit is maintained at the first compensation voltage value, and the first compensation voltage value is greater than the second compensation voltage value of other hold frames II after frequency switching, except for the first hold frame II. This realizes the increase of the voltage of the compensation voltage signal provided to the driving transistor in the pixel circuit, thereby improving the display brightness of the driving transistor in the pixel circuit during the duration of the first hold frame II after frequency switching, avoiding brightness changes caused by the state change of the driving transistor when switching from high frequency to low frequency, and achieving flicker-free direct switching.

[0053] refer to Figure 3 From time t3 to time t4, the image refresh rate is 30Hz, which is refresh frame I. At this time, the reset signal is still within the reset cycle, and the reset transistor T5 starts to drive the gate voltage of transistor T3 to reset. The voltage of the compensation voltage signal DVH provided to the driving transistor T3 in the pixel circuit is maintained at the third compensation voltage value DVHA. From time t4 to time t5, it is hold frame II. The reset transistor T5 stops driving the gate voltage of transistor T3 to reset, and the voltage of the compensation voltage signal DVH provided to the driving transistor T3 in the pixel circuit is maintained at the second compensation voltage value DVHB.

[0054] Specifically, since time t4 to t5 is the second hold frame II after frequency switching, the state of drive transistor T3 is stable at this time and no high compensation voltage value is required. Therefore, this invention reduces the compensation voltage value to the second compensation voltage value DVHB from time t4 to t5.

[0055] In some embodiments of the present invention, the second compensation voltage value DVHB of the compensation voltage signal is the same for all holding frames II except for the first holding frame II after frequency switching.

[0056] It should be noted that the embodiments of the present invention only describe the second compensation voltage value of the second holding frame II after frequency switching. Since the second compensation voltage value of the compensation voltage signal is the same for all holding frames except the first holding frame after frequency switching, the second compensation voltage value of other holding frames after frequency switching will not be described here.

[0057] In the above scheme, since the driving transistor in the pixel circuit is stable in all holding frames II except the first holding frame II after frequency switching, the second compensation voltage value of the compensation voltage signal in this invention is the same in all holding frames except the first holding frame II after frequency switching, so that the driving transistor in the pixel circuit can maintain a stable brightness output without brightness decay or flickering.

[0058] In another embodiment of the present invention, the control method of the display panel further includes: when a second frequency switching command is received, maintaining the current image refresh frequency to continue scanning the current frame image until the scanning duration of the current frame image reaches a preset duration, wherein the preset duration is an integer multiple of the anode reset signal period.

[0059] The second frequency switching instruction is used to switch the image refresh rate from a low frequency to a high frequency.

[0060] In some embodiments, a first screen switching frequency instruction is executed first, followed by a second screen switching frequency instruction. Specifically, the current frame image is first scanned at a high refresh rate. After receiving the first screen switching frequency instruction, the current frame image is switched to a low refresh rate for scanning. After continuously scanning the current frame image at a low refresh rate for a period of time, the current frame image is switched to a high refresh rate for scanning after receiving the second screen switching frequency instruction.

[0061] In other embodiments, the second screen switching frequency instruction is executed first, followed by the first screen switching frequency instruction. Specifically, the current frame image is first scanned at a low refresh rate. After receiving the second screen switching frequency instruction, the current frame image is switched to be scanned at a high refresh rate. After continuously scanning the current frame image at a high refresh rate for a period of time, the current frame image is switched to be scanned at a low refresh rate after receiving the first screen switching frequency instruction.

[0062] In a specific embodiment, combined with Figure 1 , Figure 4 as well as Figure 5 ,by Figure 4 or Figure 5Taking the timing diagram of some signals in the signal as an example, we will explain some signals before and after receiving the second frequency switching command.

[0063] The second frequency switching instruction is used to switch the image refresh rate from 60Hz to 120Hz.

[0064] Specifically, Figure 1 The pixel circuit also includes an anode reset transistor T7, the output of which is connected to the anode of the light-emitting diode D1.

[0065] In some embodiments, the pixel circuit further includes an anode reset signal terminal connected to one end of the anode reset transistor T7.

[0066] The anode reset signal SP* is used to reset the anode voltage of the LED to its initial state.

[0067] refer to Figure 4 In some embodiments of the present invention, the preset duration is equal to the period of the anode reset signal.

[0068] Specifically, from time t0 to t1, the image refresh rate is 60 Hz, and the frequency of the anode reset signal is 120 Hz. At time t2, a second frequency switching command is received, switching the refresh rate from 60 Hz to 120 Hz. At this time, the tear signal TE maintains its current voltage, thus maintaining the current image refresh rate to continue scanning the current frame image until the scanning time of the current frame image reaches the scanning time of the 120 Hz refresh rate. During this time, the anode reset signal SP* is synchronized with the tear signal TE from time t2 to t3, so that the period of the anode reset signal remains unchanged before and after receiving the second frequency switching command. From time t3 to t4, the refresh rate of the tear signal TE is switched to 120 Hz, thus maintaining the 120 Hz refresh rate to continue scanning the current frame image. The anode reset signal SP* is synchronized with the tear signal TE from time t3 to t4.

[0069] In a specific embodiment, the synchronization of the anode reset signal SP* with the tear signal TE from time t2 to time t3 includes: when the tear signal TE is kept at a low level, the anode reset signal SP* is kept at a high level.

[0070] refer to Figure 5 In some other embodiments of the present invention, the preset duration is equal to twice the period of the anode reset signal SP*.

[0071] Specifically, from time t0 to t1, the image refresh rate is 60 Hz, and the frequency of the anode reset signal is 120 Hz. At time t2, a second frequency switching command is received, switching the refresh rate from 60 Hz to 120 Hz. At this time, the tear signal TE maintains its current voltage, thus maintaining the current image refresh rate to continue scanning the current frame image until the scanning time of the current frame image reaches the scanning time of the 60 Hz refresh rate. During this time, the anode reset signal SP* is synchronized with the tear signal TE from time t2 to t3, so that the period of the anode reset signal remains unchanged before and after receiving the second frequency switching command. After time t4, the refresh rate of the tear signal TE is switched to 120 Hz, thus maintaining the 120 Hz refresh rate to continue scanning the current frame image. The anode reset signal SP* is synchronized with the tear signal TE after time t4.

[0072] In a specific embodiment, the synchronization of the anode reset signal SP* with the tear signal TE from time t2 to time t3 includes: when the tear signal TE is kept at a low level, the anode reset signal SP* is kept at a high level.

[0073] In other embodiments of the present invention, the preset duration is an integer multiple of the anode reset signal period, such as three or four times.

[0074] As can be seen from the above, when the present invention receives the second frequency switching command, it maintains the image refresh frequency corresponding to the current image refresh frequency and continues to scan the current frame image until the scanning time of the current frame image reaches a preset time, and the preset time is an integer multiple of the anode reset signal period. Compared with the prior art, which immediately performs frequency switching after executing the first frequency switching command, causing the anode reset signal period to change, the present invention can keep the anode reset signal period unchanged before and after receiving the second frequency switching command, thereby achieving stable brightness of the display panel when switching refresh frequencies, without any jumps, and improving the display effect of the display panel.

[0075] Reference Figure 6 The present invention also provides a control device 10 for a display panel, the device including: a frequency switching scanning unit 11 and a compensation voltage setting unit 12, wherein:

[0076] The frequency-switching scanning unit 11 is adapted to scan the next frame of image according to the image refresh frequency corresponding to the first frequency-switching instruction when it receives the first frequency-switching instruction; the first frequency-switching instruction is used to switch the image refresh frequency from high frequency to low frequency.

[0077] The compensation voltage setting unit 12 is adapted to maintain the voltage of the compensation voltage signal provided to the driving transistor in the pixel circuit at a first compensation voltage value during the duration of the first hold frame after frequency switching; the first compensation voltage value is greater than a second compensation voltage value, and the second compensation voltage value is the compensation voltage value of the compensation voltage signal in other hold frames after frequency switching, excluding the first hold frame.

[0078] Reference Figure 7 The present invention also provides a display device 20, including: a pixel circuit 23, an application processor 21, and a control device 22 for the display panel.

[0079] In some embodiments of the present invention, the working principle of the display device 20 includes: the application processor 21 outputting a scanned image and a frequency switching command to the control device 22 of the display panel; the control device 22 of the display panel acquiring and scanning the scanned image, generating a tearing signal corresponding to the refresh frequency in the scanned image and several pixel circuit signals; outputting the tearing signal to the application processor 21; subsequently, the application processor 21 transmitting the scanned image to the control device of the display panel according to the rising edge of the tearing signal; and outputting several pixel circuit signals to the pixel circuit 23 to display the scanned image through the pixel circuit 23.

[0080] The display device 20 can be any device with display function, such as a mobile phone, tablet computer, laptop computer, e-reader, television, smartwatch, etc.

[0081] In this embodiment of the invention, the display device 20 is a mobile phone.

[0082] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A control method of a display panel, characterized by, The application relates to a display panel and a control method thereof. When a first frequency switching instruction is received, the next frame of image is scanned according to the image refresh frequency corresponding to the first frequency switching instruction; The first frequency switching instruction is used to switch the image refresh frequency from high frequency to low frequency; When a second frequency switching instruction is received, the current frame of image is continuously scanned at the current image refresh frequency until the scanning time length of the current frame of image reaches a preset time length, and the preset time length is an integer multiple of an anode reset signal period, wherein the second frequency switching instruction is used to switch the image refresh frequency from low frequency to high frequency; During the first holding frame after the frequency switching, the voltage of the compensation voltage signal provided to the driving tube in the pixel circuit is kept as a first compensation voltage value; the first compensation voltage value is greater than a second compensation voltage value, and the second compensation voltage value is the compensation voltage value of the compensation voltage signal in other holding frames except the first holding frame after the frequency switching; and the continuously scanning the current frame of image at the current image refresh frequency comprises keeping the current voltage of the tearing signal unchanged.

2. The control method of a display panel according to claim 1, wherein The first compensation voltage value ranges from 7V to 8V.

3. The control method of a display panel according to claim 1, wherein The second compensation voltage values of the compensation voltage signal in other holding frames except the first holding frame after the frequency switching are all the same.

4. The control method of a display panel according to claim 3, wherein The second compensation voltage value ranges from 6.95V to 7.95V.

5. The control method of a display panel according to any one of claims 1 to 4, wherein The preset time length is equal to the anode reset signal period.

6. The control method of the display panel according to any one of claims 1 to 4, wherein The preset time length is equal to twice the anode reset signal period.

7. A control device of a display panel, characterized by comprising: The application relates to a display panel and a control method thereof. The frequency scanning unit is adapted to, when a first frequency switching instruction is received, scan the next frame of image according to the image refresh frequency corresponding to the first frequency switching instruction; the first frequency switching instruction is used to switch the image refresh frequency from high frequency to low frequency; and when a second frequency switching instruction is received, the current frame of image is continuously scanned at the current image refresh frequency until the scanning time length of the current frame of image reaches a preset time length, and the preset time length is an integer multiple of an anode reset signal period, wherein the second frequency switching instruction is used to switch the image refresh frequency from low frequency to high frequency. The compensation voltage setting unit is adapted to, during the first holding frame after the frequency switching, keep the voltage of the compensation voltage signal provided to the driving tube in the pixel circuit as a first compensation voltage value; the first compensation voltage value is greater than a second compensation voltage value, and the second compensation voltage value is the compensation voltage value of the compensation voltage signal in other holding frames except the first holding frame after the frequency switching; and the continuously scanning the current frame of image at the current image refresh frequency comprises keeping the current voltage of the tearing signal unchanged.

8. A display device, characterized by comprising: The application relates to a display panel and a control method thereof. The application relates to a display panel and a control method thereof.

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