Optical driving circuit, communication method based on double-line difference and related equipment

Abstract

The embodiment of the invention provides an optical driving circuit, a communication method based on double-line difference and related equipment, and relates to the field of display. The light driving circuit includes: a controller; the driving chip set comprises a plurality of driving chips which are connected in series, and every two adjacent driving chips are connected through a first data line and a second data line; the first driving chip in the driving chip group is connected with the controller; and differential signals of data are transmitted between every two adjacent driving chips through the first data line and the second data line so as to carry out differential communication. Differential communication can be carried out among the driving chips in the optical driving circuit, so that the anti-interference capability of data transmission is improved.

Description

Technical Field

[0001] The present application relates to the field of display, and in particular, to an optical driving circuit, a communication method based on two-wire differential, and related equipment. Background Art

[0002] The backlight module includes a controller, multiple driver chips and multiple light sources. Each driver chip can control one or more light sources. The controller can send data to the multiple driver chips or read back data to control the display of the light sources through the driver chips.

[0003] Currently, single-ended transmission is usually used between the controller and the driver chip, that is, data transmission is controlled based on a clock signal output by a fixed clock or a clock line. This method uses a serial data line to transmit data. However, the single-ended transmission method is easily affected by the environment. For example, in some automotive application scenarios, due to the complex and changeable environment, data transmission is easily interfered, which affects the data transmission speed and the display effect. Summary of the invention

[0004] In view of this, the present application aims to provide an optical driving circuit, a communication method based on two-wire differential and related equipment to improve the stability of data transmission in the optical driving circuit.

[0005] First, an embodiment of the present application provides an optical driving circuit, including: a controller; at least one driving chipset, the driving chipset including a plurality of driving chips connected in series, and each adjacent two are connected via a first data line and a second data line; the first driving chip in the driving chipset is connected to the controller; a differential signal for transmitting data between each adjacent two driving chips via the first data line and the second data line to perform differential communication.

[0006] In the embodiment of the present application, differential signals can be transmitted between driver chips through the first data line and the second data line, and the communication between the driver chips can be configured as differential communication to improve the anti-interference ability of data transmission and improve data transmission efficiency through differential communication.

[0007] In one embodiment, the first driver chip of the driver chipset is connected to the controller via the first data line and the second data line; the controller performs single-ended communication with the first driver chip based on one of the first data line and the second data line.

[0008] The controller usually does not support differential communication. Therefore, in the embodiment of the present application, the controller and the first driver chip are communicated with each other on a single end through one of the first data line and the second data line, so that the controller can normally transmit data with the driver chipset without affecting the normal differential communication between subsequent driver chips, so that the optical drive circuit can improve the anti-interference ability of data transmission through differential communication.

[0009] In one embodiment, each of the driver chips includes a first end, and the first end is an end for receiving instructions issued by the controller; the first end of the first driver chip is connected to the controller through the first data line and the second data line; and the first data line and the second data line of the first end of the first driver chip are short-circuited; the first driver chip is configured to: when it is detected that the first data line and the second data line at the first end are short-circuited, use the data transmitted by any one of the first data line and the second data line at the first end as valid data for single-ended communication between the controller and the first driver chip.

[0010] In an embodiment of the present application, by short-circuiting the first data line and the second data line at the first end of the driver chip, the first driver chip detects the short circuit at the first end and learns that the controller does not support differential communication, thereby allowing the first driver chip to accurately receive data sent by the controller through single-ended communication at the first end.

[0011] In one embodiment, each of the driver chips in the driver chipset is configured to transmit data unidirectionally; each of the driver chips includes a second end; the last driver chip in the driver chipset is connected to the controller at the second end through the short-circuited first data line and the second data line; the last driver chip is configured to: when it is detected that the first data line and the second data line at the second end are short-circuited, use the data transmitted by any one of the first data line and the second data line at the second end as valid data for single-ended communication between the controller and the last driver chip.

[0012] The optical driving circuit can be a unidirectional data transmission mode. In the unidirectional data transmission mode, when the controller obtains the read-back data of each driver chip, the read-back data of each driver chip is sent to the controller through the last driver chip of the driver chip group, and the controller does not support differential communication. Therefore, in the embodiment of the present application, when the optical driving circuit is a unidirectional data transmission, the first data line and the second data line on the second end where the last driver chip is connected to the controller are short-circuited, so that the driver chip performs single-ended communication based on any one of the data lines on the second end after detecting the short circuit.

[0013] In one embodiment, each of the driver chips includes a first end, and the first end is an end for receiving instructions issued by the controller; the first data line of the first driver chip at the first end is configured to transmit a preset level signal; the first driver chip is configured to: when it is detected that the first data line at the first end transmits the preset level signal, use the data transmitted by the second data line at the first end as valid data for single-ended communication between the controller and the first driver chip.

[0014] The controller usually does not support differential communication. Therefore, in the embodiment of the present application, the first data line is made to transmit a preset level signal to instruct the first driver chip to perform single-ended communication at the first end, and then the valid data is transmitted through the second data line at the first end to achieve single-ended communication. In this way, the controller can normally transmit data with the driver chipset without affecting the normal differential communication between subsequent driver chips, so that the optical drive circuit can improve the anti-interference ability of data transmission through differential communication.

[0015] In one embodiment, each of the driver chips in the driver chipset is configured to transmit data unidirectionally; each of the driver chips includes a second end; the first data line of the second end of the last driver chip in the driver chipset is configured to transmit the preset level signal; the driver chip is configured to: when it is detected that the first data line at the second end transmits the preset level signal, use the data transmitted by the second data line at the second end as valid data to perform single-ended communication between the controller and the last driver chip.

[0016] The optical driving circuit can be a unidirectional data transmission mode. In the unidirectional data transmission mode, when the controller obtains the readback data of each driver chip, the readback data of each driver chip is sent to the controller through the last driver chip in the driver chip group, and the controller does not support differential communication. Therefore, in the embodiment of the present application, when the optical driving circuit is a unidirectional data transmission, the last driver chip can transmit a preset level signal on the first data line at the second end, and then transmit valid data through the second data line, thereby realizing single-ended communication with the controller.

[0017] In one embodiment, the controller includes a standard differential communication interface, and the controller accesses the first data line and the second data line through the standard differential communication interface to connect to the first driver chip of the driver chipset through the first data line and the second data line.

[0018] The controller usually does not support differential communication. In the embodiment of the present application, a standard differential communication interface can be configured on the controller so that the controller can support differential communication and transmit data through differential communication, thereby improving the stability and transmission efficiency of data transmission between the controller and the driver chip.

[0019] In one embodiment, each of the driving chips is configured with corresponding identification information; and the controller is configured to send data to or obtain data from any one of the driving chips based on the identification information corresponding to the driving chip.

[0020] In the embodiment of the present application, corresponding identification information is configured for each driver chip so that the controller and each driver chip in the optical driving circuit can accurately perform data transmission according to the identification information.

[0021] In one embodiment, the last driver chip in the driver chipset is connected to the controller, and each driver chip in the driver chipset is configured to transmit data unidirectionally; each driver chip is configured to: send the currently received data to the next driver chip when new data needs to be received; the controller is configured to: when the controller needs to send data to the Nth driver chip in the driver chipset, send the data required by the Nth driver chip to the data required by the first driver chip in each cycle, so that each driver chip sends data not required by itself to the next driver chip in turn, until each driver chip obtains the data required by itself; when the controller needs to obtain the readback data of each driver chip in the driver chipset, each driver chip in the driver chipset sends the readback data required to be fed back by itself to the next driver chip in turn, and the controller obtains the readback data fed back by the last driver chip from the last driver chip to the readback data fed back by the first driver chip in each cycle.

[0022] In one embodiment, each of the driver chips in the driver chipset is configured to transmit data bidirectionally; each of the driver chips is configured to: send the currently received data to the next driver chip when new data needs to be received; the controller is configured to: when the controller needs to send data to the Nth driver chip in the driver chipset, send the data required by the Nth driver chip to the data required by the first driver chip in each cycle, so that each driver chip sends data not required by itself to the next driver chip in turn until each driver chip obtains the data required by itself; when the controller needs to obtain the readback data of each driver chip in the driver chipset, each of the driver chips in the driver chipset sends the readback data required to be fed back to the previous driver chip in turn, and the controller obtains the readback data fed back by the first driver chip to the readback data fed back by the last driver chip in each cycle from the first driver chip in turn.

[0023] In the embodiment of the present application, through the above-mentioned method, the optical driving circuit can accurately transmit data even when the identification information corresponding to the controller and each driving chip is not configured.

[0024] In one embodiment, the controller and each of the driver chips are configured with a preset clock frequency; when data is transmitted between each two adjacent driver chips and between the controller and the first driver chip, data transmission is controlled based on the preset clock frequency.

[0025] In optical driving circuits, data transmission is usually controlled by clock signals, but differential communication does not support sending clock signals. Therefore, in an embodiment of the present application, the same preset clock frequency can be configured for the controller and the driver chip, so that data can be accurately transmitted between the controller and each driver chip based on the preset clock frequency even in the absence of a clock signal.

[0026] In one embodiment, between each two adjacent driver chips, and between the controller and the first driver chip, before transmitting data, the sending device first sends a preset clock frequency signal; the receiving device determines the preset clock frequency for data transmission between the sending device based on the preset clock frequency signal, so that the sending device and the receiving device control the data transmission based on the preset clock frequency.

[0027] In the optical driving circuit, data transmission is usually controlled by a clock signal, but differential communication does not support the sending of clock signals. Therefore, in an embodiment of the present application, before data transmission, the sending device can send a preset clock frequency signal to the receiving device to configure the frequency of data transmission based on the preset clock frequency signal, so that the controller and each driving chip can accurately control data transmission based on the preset clock frequency agreed in the preset clock frequency signal even in the absence of a clock signal.

[0028] In one embodiment, the controller and each of the driver chips configure clock information in the transmitted data; each of the driver chips includes: a phase-locked loop, and the driver chip is configured to determine the clock information from the transmitted data based on the phase-locked loop when transmitting data, so as to control data transmission based on the clock information.

[0029] In the optical drive circuit, data transmission is usually controlled by a clock signal, but differential communication does not support sending clock signals. Therefore, in the embodiment of the present application, a phase-locked loop can be configured in each driver chip to implement CDR (clock data recovery) through the phase-locked loop, determine the clock information from the data, and then control the data to be accurately transmitted through the clock information. In addition, the method of configuring the preset frequency requires that the driver chip has a higher clock frequency than the preset frequency, and the CDR technology has a lower clock frequency for the driver chip, which helps to improve the stability and efficiency of data transmission.

[0030] In a second aspect, an embodiment of the present application provides a communication method based on two-wire differential, which is applied to any driver chip in the optical driving circuit as described in any one of the first aspects, and the communication method based on two-wire differential includes: acquiring target data to be sent to a subsequent driver chip; based on differential communication with the subsequent driver chip, sending a differential signal of the target data to the subsequent driver chip through a first data line and a second data line.

[0031] In a third aspect, an embodiment of the present application further provides a backlight module, comprising: a plurality of light sources and a light driving circuit as described in any one of the first aspects; each of the light sources is respectively connected to each of the driving chips in the light driving circuit.

[0032] In a fourth aspect, an embodiment of the present application further provides a display, comprising: the light driving circuit as described in the first aspect or the backlight module as described in the third aspect.

[0033] In a fifth aspect, an embodiment of the present application further provides an electronic device, comprising the display as described in the fourth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without paying any creative work.

[0035] Figure 1 A schematic diagram of a light driving circuit provided in one embodiment of the present application; Figure 2 A schematic diagram of unidirectional transmission provided by an embodiment of the present application; Figure 3 A schematic diagram of a phase-locked loop provided in one embodiment of the present application; Figure 4 A schematic diagram of bidirectional transmission provided by an embodiment of the present application; Figure 5 A schematic diagram of data transmission without identification information provided in an embodiment of the present application; Figure 6 A flow chart of a communication method based on two-wire differential provided in one embodiment of the present application; Figure 7 A schematic diagram of a backlight module provided in accordance with an embodiment of the present application.

[0036] Icons: controller 110 ; driving chipset 120 ; driving chip 121 ; light source 130 . DETAILED DESCRIPTION

[0037] The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings in the embodiments of the present application. The embodiments described later in the present application and the implementation methods in the embodiments can be combined with each other to obtain new embodiments if there is no conflict.

[0038] First, an embodiment of the present application provides a light driving circuit, which can be configured in a backlight module to control the light source in the backlight module.

[0039] See also Figure 1 , Figure 1 This is a schematic diagram of a light driving circuit provided in an embodiment of the present application. The light driving circuit includes: a controller 110 and M groups of driving chipsets 120, where M is at least greater than or equal to 1.

[0040] The driver chipset 120 includes a plurality of driver chips 121, such as N driver chips 121, where N is greater than 1. The plurality of driver chips 121 are connected in series, and each driver chip 121 is used to connect one or more light sources. The driver chip 121 can receive dimming data sent by the controller 110 to control the display of the light source based on the dimming data.

[0041] In the embodiment of the present application, the number of driving chips 121 in different driving chipsets 120 may be the same or different, which is not limited here.

[0042] like Figure 1 As shown, in the embodiment of the present application, when multiple driver chips 121 are connected in series, any two adjacent driver chips 121 are connected via a first data line DN and a second data line DP. The first data line and the second data line are both used to transmit data, including control instructions issued by the transmission controller 110, dimming data, and readback data fed back by the driver chip 121 to the controller 110. It should be noted that the first data line and the second data line are not clock lines, and are not used to transmit clock signals.

[0043] like Figure 1 As shown, if a group of driver chips 120 includes N driver chips 121, the first driver chip 121 is connected to the second driver chip 121 through the first data line DN and the second data line DP. Similarly, the second driver chip 121 is connected to the third driver chip 121 through the first data line DN and the second data line DP. Similarly, the i-th driver chip 121 is connected to the i+1-th chip through the first data line DN and the second data line DP, and the N-1-th driver chip 121 is connected to the N-th driver chip 121 through the first data line DN and the second data line DP. N is a positive integer greater than 1, and i is less than or equal to N-1.

[0044] In the embodiment of the present application, differential communication is performed by transmitting differential signals of data via the first data line and the second data line between each two adjacent driving chips 121. That is, the first data line and the second data line transmit inverted signals of the same data, and the specifics can refer to the principle of existing differential communication, which will not be elaborated here.

[0045] Compared with single-ended communication, differential communication has strong anti-interference ability. In the embodiment of the present application, differential communication is used between adjacent driver chips 121, which helps to improve the data transmission rate and helps to connect more driver chips 121 in series to control the display of more light sources.

[0046] The controller 110 is used to output control instructions and dimming data for the light source.

[0047] In this embodiment, the controller 110 can send control instructions and dimming data to the light sources to each driver chip 121 of each driver chip group 120 .

[0048] In this embodiment, the controller 110 may be a device with processing functions such as FPGA (Field Programmable Gate Array), MCU (Microcontroller Unit, microcontroller 110), etc. The functions, structure, transmitted data, etc. of the controller 110 may refer to the controller 110 of the existing backlight module, which will not be expanded here.

[0049] Currently, the controller 110 in the optical driving circuit is generally unable to support differential communication. Therefore, in the embodiment of the present application, single-ended communication can be performed between the controller 110 and the driving chipset 120 . In some embodiments of the present application, the controller 110 may include a data line port, which may be connected to a data line. The controller 110 and the first driver chip 121 of the driver chipset 120 are connected via a single data line to perform single-ended communication based on the data line.

[0050] In some embodiments of the present application, the controller 110 may include two data line ports, which are respectively connected to a first data line and a second data line. The first driver chip 121 of each driver chipset 120 is connected to the controller 110 through the first data line and the second data line. The controller 110 performs single-ended communication with the first driver chip 121 based on one of the first data line and the second data line.

[0051] By connecting the controller 110 to the first driver chip 121 of the driver chipset 120 using the first data line and the second data line, the controller 110 and each driver chip 121 can maintain consistency in circuit connection structure, which helps to reduce the manufacturing difficulty of the corresponding circuit and lower production costs.

[0052] Since the controller 110 does not support differential communication, in an embodiment of the present application, the controller 110 can perform single-ended communication with the first driver chip 121 based on one of the first data line and the second data line, and the first driver chip 121 regards the data transmitted by one of the first data line and the second data line as valid data.

[0053] In the optical drive circuit, the driver chip 121 and the controller 110 can be collectively referred to as control devices, and the control devices are connected in series. Each control chip is connected to the previous control chip device and the next control device, respectively. Each control chip can receive data sent by the previous control device and send data to the next control device. In the embodiment of the present application, the end of the driver chip 121 connected to the previous control device is called the first end, and the end connected to the next control device is called the second end.

[0054] The controller 110 issues a control instruction which is transmitted backward in sequence through the driver chip 121 in front. Therefore, for the driver chip 121, the first end of the driver chip 121 may also refer to the end for receiving the instruction issued by the controller 110, and the second end refers to the end for sending data to the next control device.

[0055] In one embodiment of the present application, when the first end of the first driver chip 121 is connected to the controller 110 through the first data line and the second data line, the first data line and the second data line at the first end of the first driver chip 121 can be configured to be short-circuited, and at least the first driver chip 121 is configured to: when it is detected that the first data line and the second data line at the first end are short-circuited, the data transmitted by any one of the first data line and the second data line at the first end is used as valid data for single-ended communication between the controller 110 and the first driver chip 121.

[0056] In this embodiment, the controller 110 sends data based on any one of the first data line and the second data line, or sends the same data (non-differential signal) on the first data line and the second data line.

[0057] In this embodiment, the first data line and the second data line between the controller 110 and the first driving chip 121 are short-circuited, wherein the short-circuiting may make the voltage difference between the first data line and the second data line 0 or the impedance less than a preset threshold.

[0058] By short-circuiting the first data line and the second data line, it is indicated that only single-ended communication is supported at the short-circuited end. Therefore, the first driver chip 121 can detect whether the first end is short-circuited, thereby determining whether single-ended communication is performed. In the case of single-ended communication, data transmitted by any one of the first data line and the second data line at the first end is received as valid data to achieve single-ended communication between the controller 110 and the first driver chip 121.

[0059] In the optical drive circuit, data transmission modes are divided into unidirectional transmission and bidirectional transmission, such as Figure 2 As shown, Figure 2A schematic diagram of unidirectional transmission provided in an embodiment of the present application. In the case of single-line data transmission, the second end (or output end) of the last driver chip 121 of each driver chip group 120 needs to be connected to the controller 110, so that each driver chip 121 can send data to the next driver chip 121 in turn, and finally the last driver chip 121 transmits data to the controller 110.

[0060] In the case where each driver chip 121 in the driver chip group 120 is configured to transmit data in one direction, the last driver chip 121 in the driver chip group 120 is connected to the controller 110 at the second end through the short-circuited first data line and the second data line. At the same time, the last driver chip 121 is configured to: in the case of detecting that the first data line and the second data line at the second end are short-circuited, use the data transmitted by any one of the first data line and the second data line at the second end as valid data to perform single-ended communication between the controller 110 and the last driver chip 121.

[0061] Therefore, the last driver chip 121 can be short-circuited with the first data line and the second data line in the second section to indicate that the controller 110 only supports single-ended communication. The last driver chip 121 can detect whether the second section is short-circuited, thereby determining whether the controller 110 supports differential communication or single-ended communication. When the controller 110 only supports single-ended communication, single-ended communication is performed based on one of the first data line and the second data line.

[0062] Through the above method, the single-ended communication supported by the controller 110 in the optical driving circuit and the differential communication used by the driver chip 121 can be used at the same time, so that each driver chip 121 in the optical driving circuit can correctly transmit data based on differential communication, thereby improving data transmission stability and data transmission efficiency.

[0063] In actual scenarios, the driver chip 121 may be directly used to be set in the circuit without distinguishing whether the driving circuit is the first or the last. Therefore, each driver chip 121 can be configured to: detect whether the first data line and the second data line at the first end are short-circuited. If so, the data transmitted by any one of the first data line and the second data line at the first end is used as valid data for single-ended communication at the first end; and detect whether the first data line and the second data line at the second end are short-circuited. If so, the data transmitted by any one of the first data line and the second data line at the second end is used as valid data for single-ended communication at the second end.

[0064] In another embodiment of the present application, the controller 110 can also transmit a preset level signal on the first data line, and the first driver chip 121 can be configured to: when it is detected that the first data line at the first end transmits a preset level signal, the data transmitted by the second data line at the first end is used as valid data for single-ended communication between the controller 110 and the first driver chip 121.

[0065] In the embodiment of the present application, the first data line and the second data line are not specifically limited, and the first data line can be one of the two data lines, and the second data line is the other data line. In this embodiment, the controller 110 can be configured to transmit a preset level signal at one of the data lines (such as the first data line) at the first end, and the other data line (such as the second data line) transmits valid data. Thus, when the first driver chip 121 detects that the first data line at the first end transmits a preset level signal, the data transmitted by the second data line at the first end is received as valid data to achieve single-ended communication with the controller 110.

[0066] The preset level signal may be a low level (such as 0 voltage) or a high level (such as power supply voltage).

[0067] Similarly, if each driver chip 121 in the driver chipset 120 is configured to transmit data unidirectionally, the last driver chip 121 needs to be connected back to the controller 110. The controller 110 does not support differential communication. Therefore, the last driver chip 121 in the driver chipset 120 can be configured to transmit a preset level signal on the first data line at the second end; and the last driver chip 121 can be configured to: when it is detected that the first data line at the second end transmits a preset level signal, transmit valid data on the second data line at the second end, so as to realize single-ended communication between the controller 110 and the last driver chip 121.

[0068] Accordingly, the driver chip 121 may be directly used to be set in the circuit without distinguishing whether the driver circuit is the first or the last. Therefore, each driver chip 121 may be configured as follows: when it is detected that the first data line at the first end transmits a preset level signal, the data transmitted by the second data line at the first end is used as valid data for single-ended communication between the controller 110 and the first driver chip 121; and, when it is detected that the first data line at the second end transmits a preset level signal, the second data line at the second end transmits valid data for single-ended communication between the controller 110 and the last driver chip 121.

[0069] It should be noted that, when single-ended communication is performed between the first driver chip 121 and the controller 110, and between the last driver chip 121 and the controller 110, differential communication is still used between adjacent driver chips 121 to improve the anti-interference capability of data transmission based on differential communication.

[0070] In some embodiments, a controller 110 capable of supporting differential communications may also be used or configured to support differential communications.

[0071] For example, in one embodiment provided in the present application, the controller 110 may include a standard differential communication interface, and the controller 110 may access the first data line and the second data line through the standard differential communication interface to connect to the first driver chip 121 of the driver chipset 120 through the first data line and the second data line.

[0072] The standard differential communication interface is a communication interface that can be configured on a device and configure the device with a corresponding differential communication protocol, thereby enabling the device to support differential communication. In an embodiment of the present application, the standard differential communication interface can be configured on the controller 110, and the first data line and the second data line can be accessed through the standard differential communication interface, and then the first driver chip 121 of the driver chipset 120 is connected with the first data line and the second data line, thereby enabling the controller 110 to perform differential communication with the first driver chip 121.

[0073] When the controller 110 supports differential communication, all control devices in the optical driving circuit can perform differential communication, so as to improve the anti-interference capability and transmission efficiency of data transmission based on differential communication.

[0074] The controller 110 and the driver chip 121 both control data transmission through clock frequency, but in addition to the controller 110 in the optical drive circuit not supporting differential communication, the differential circuit also does not support the transmission of clock signals, and cannot control data transmission based on the clock signal transmitted by the clock line. Therefore, in the embodiments of the present application, different methods are also provided to enable data to be transmitted between the driver chips 121 without an explicit clock signal.

[0075] In one embodiment, the same preset clock frequency may be configured in the controller 110 and each driver chip 121 ; during data transmission between two adjacent driver chips 121 and between the controller 110 and the first driver chip 121 , data transmission is controlled based on the preset clock frequency.

[0076] In this embodiment, the clock frequencies of the controller 110 and the driver chip 121 for controlling data transmission are unified so that the clock frequencies of the controller 110 and each driver chip 121 are preset clock frequencies. Thus, when data transmission is performed, even if there is no clock signal, the sending device and the receiving device can transmit data at the same clock frequency, thereby ensuring the accuracy of data transmission.

[0077] In one embodiment, the controller 110 and each driver chip 121 can also be configured as follows: between every two adjacent driver chips 121, and between the controller 110 and the first driver chip 121, before transmitting data, the sending device first sends a preset clock frequency signal; the receiving device determines the preset clock frequency for data transmission with the sending device based on the preset clock frequency signal, so that the sending device and the receiving device control the data transmission based on the preset clock frequency.

[0078] In this embodiment, the sending device is configured with a preset clock frequency, and generates the preset clock frequency as a preset clock frequency signal and sends it to the receiving device. The preset clock frequency signal can be the first data in each data transmission. After receiving the preset clock frequency signal, the receiving device can first extract the preset clock frequency required to be configured from the preset clock frequency signal, and control the reception of data based on the preset clock frequency. Thus, the sending device sends data based on the preset clock frequency, and the receiving device receives data based on the preset clock frequency. Thus, the two can control the transmission of data with the same clock frequency, so that data can be accurately transmitted even in the absence of a clock signal.

[0079] In the above embodiment, it is necessary to require that the clock frequency of the driver chip 121 and the controller 110 is greater than the preset clock frequency. When the clock frequency is greater than the preset clock frequency, the driver chip 121 and the controller 110 can control the clock signal transmission based on the preset clock frequency. The method of controlling data transmission based on the clock frequency can refer to the prior art and will not be expanded here.

[0080] In some other embodiments of the present application, each driver chip 121 may further include: a phase-locked loop. Figure 3 , Figure 3 A schematic diagram of a phase-locked loop provided in an embodiment of the present application, wherein the phase-locked loop includes a frequency detector, a charge pump, a low-pass filter and a voltage-controlled oscillator loop, which is used to lock the signal transmission frequency; the phase detector, the charge pump, the low-pass filter and the voltage-controlled oscillator constitute a phase-locked loop, which is used to fine-tune the phase jitter during the transmission process. For details, please refer to the prior art and will not be expanded here.

[0081] The phase-locked loop is configured in the driver chip 121, so that the driver chip 121 can implement CDR (clock data recovery) technology. Therefore, the controller 110 and each driver chip 121 can configure the clock information in the transmitted data. Through the phase-locked loop and CDR technology, the driver chip 121 is configured to determine the clock information from the transmitted data based on the phase-locked loop when transmitting data, so as to control the data transmission based on the clock information.

[0082] The implementation of CDR technology can refer to the existing technology, which will not be expanded now. Through the phase-locked loop and CDR technology, the optical drive circuit can correctly transmit data without an explicit clock signal, so that the optical drive circuit can perform differential communication.

[0083] If the controller 110 needs to control each driver chip 121, the control instructions issued by the controller 110 need to be accurately sent to the controlled driver chip 121. In one embodiment of the present application, each driver chip 121 may be configured with corresponding identification information, and the controller 110 may be configured to send data to the driver chip 121 or obtain data from the driver chip 121 based on the identification information corresponding to any driver chip 121. After receiving the data, each driver chip 121 detects the identification information in the data. If the identification information in the data is different from its own identification information, the data is sent to the next driver chip 121. Each driver chip 121 repeats the process until it is sent to the driver chip 121 whose identification information matches the data.

[0084] As mentioned above, the optical driving circuit includes unidirectional transmission and bidirectional transmission. In the case of unidirectional transmission, the last driver chip 121 is connected to the controller 110. When any driver chip 121 feeds back read-back data to the controller 110, the read-back data is transmitted sequentially through the next driver chip 121 of the driver chip 121 to the last driver chip 121 until it is transmitted to the controller 110.

[0085] See also Figure 4 , Figure 4 A schematic diagram of bidirectional transmission provided for an embodiment of the present application. In the bidirectional transmission, the last driver chip 121 is not connected to the controller 110. Each driver chip 121 can both receive data sent by the previous control device (including the driver chip 121 and the controller 110) and send data to the previous control device. Therefore, when any driver chip 121 feeds back readback data, the driver chip 121 can forward the readback data to each driver chip 121 between the previous driver chip 121 and the controller 110 step by step until it is received by the controller 110.

[0086] In the scenario of bidirectional transmission, corresponding identification information can also be configured for the active device so that each driver chip 121 configures the identification information in the read-back data. When each driver chip 121 detects that the identification information in the read-back data does not match its own identification information, it forwards the read-back data to the previous control device until the read-back data is received by the controller 110.

[0087] In one embodiment, the identification information may not be set. In this case, the driver chip 121 receiving data may be controlled based on the data transmission cycle. The cycle for controlling data transmission may be determined based on a preset frequency cycle or based on a clock signal extracted by a phase-locked loop.

[0088] In this embodiment, each driving chip 121 is configured to send currently received data to the next driving chip 121 when it is determined that new data needs to be received within a preset period.

[0089] See also Figure 5 , Figure 5 A schematic diagram of data transmission without identification information provided by an embodiment of the present application. In which, each moment corresponds to the end of a cycle, moment 1 corresponds to the end of the first cycle, moment 2 corresponds to the reception of the second cycle, and moment N corresponds to the end of the Nth cycle.

[0090] In the scenario of unidirectional data transmission, the controller 110 is configured as follows: when the controller 110 needs to send data to the Nth driver chip 121 in the driver chipset 120, the controller 110 sends the data required by the Nth driver chip 121 to the first driver chip 121 in each cycle, so that each driver chip 121 sends data not required by itself to the next driver chip 121 in turn until each driver chip 121 obtains the data required by itself.

[0091] like Figure 5As shown, in the first cycle, the controller 110 now sends the data N required by the N-th driver chip 121 to the first driver chip 121. In the second cycle, the controller 110 now sends the data N-1 required by the N-1th driver chip 121 to the first driver chip 121, and the first driver chip 121 sends the data N to the second driver chip 121, and so on. The controller 110 sends one data to the driver chip 121 in each cycle, and each driver chip 121 sends the data received in the previous cycle to the next driver chip 121 in turn and receives new data. Until the controller 110 sends data 1 to the first driver chip 121, at this time, the N-th driver chip 121 receives data N, and the controller 110 will no longer send new data. After a new cycle ends, it is determined that the data sending process ends, and each driver chip 121 executes according to the received chip. In this embodiment, the data sent by the controller 110 to the driver chip 121 that does not need to be executed can be empty, the purpose of which is to enable each driver chip 121 to "push" the received data backward.

[0092] The driver chip 121 obtains the readback data is to obtain the readback data of all the driver chips 121. In the case of unidirectional data transmission, the controller 110 obtains the readback data from the last driver chip 121 of the driver chipset 120. Similarly, if the controller 110 needs to obtain the readback data of each driver chip 121 of the driver chipset 120, each driver chip 121 in the driver chipset 120 sequentially sends the readback data required to be fed back to the next driver chip 121, and the controller 110 sequentially obtains the readback data fed back by the last driver chip 121 to the first driver chip 121 from the last driver chip 121 in each cycle. Each driver chip 121 sequentially sends the readback data generated by itself backward or forwards the readback data sent by the previous driver chip 121, and the readback data of all driver chips 121 are sent to the controller 110 through the last driver chip 121. When the controller 110 does not receive new data within the preset cycle, it determines that the data transmission is completed.

[0093] In the bidirectional transmission scenario, the process of the controller 110 sending data to each driver chip 121 is the same as the process of the controller 110 sending data to each driver chip 121 in the aforementioned unidirectional transmission scenario. That is, the controller 110 is configured as follows: when the controller 110 needs to send data to the Nth driver chip 121 in the driver chip group 120, the controller 110 sends the data required by the Nth driver chip 121 to the data required by the first driver chip 121 in each cycle, so that each driver chip 121 sends data not required by itself to the next driver chip 121 in turn, until each driver chip 121 obtains the data required by itself.

[0094] In the unidirectional transmission data and the bidirectional transmission data, the directions of data readback are opposite, that is, each driver chip 121 sends the readback data to the previous driver chip 121. Therefore, when the controller 110 needs to obtain the readback data of each driver chip 121 of the driver chip set 120, each driver chip 121 in the driver chip set 120 sequentially sends the readback data required to be fed back to the previous driver chip 121, and the controller 110 sequentially obtains the readback data fed back by the first driver chip 121 to the readback data fed back by the last driver chip 121 in each cycle.

[0095] Based on the same inventive concept, an embodiment of the present application further provides a communication method based on two-wire differential. The communication method based on two-wire differential can be applied to any driver chip 121 in the optical driving circuit provided in the aforementioned embodiment.

[0096] See also Figure 6 , Figure 6 A flow chart of a communication method based on two-wire differential is provided in one embodiment of the present application. The communication method based on two-wire differential includes: S610, obtaining target data to be sent to the next driver chip.

[0097] In the embodiment of the present application, the target data includes but is not limited to the control instructions sent by the controller, the read-back data that the current driver chip and each driver chip before the current driver chip need to send to the controller, etc.

[0098] S620: Based on the differential communication with the next driver chip, a differential signal of the target data is sent to the next driver chip through the first data line and the second data line.

[0099] In one embodiment of the present application, the driver chip implementing the communication method based on two-wire differential is the first driver chip of the driver chipset, and the communication method based on two-wire differential may also include: receiving data sent by the controller based on one of the first data line and the second data line to perform single-ended communication with the controller.

[0100] If each driver chip in the driver chipset is configured to transmit data unidirectionally, in one embodiment, the driver chip implementing the communication method based on two-wire differential is the first driver chip in the driver chipset, and the communication method based on two-wire differential may also include: when it is detected that the first data line and the second data line at the first end are short-circuited, the data transmitted by any one of the first data line and the second data line at the first end is used as valid data for single-ended communication with the controller.

[0101] If each driver chip in the driver chipset is configured to transmit data unidirectionally, in one embodiment, the driver chip implementing the communication method based on two-wire differential is the last driver chip in the driver chipset, and the communication method based on two-wire differential may also include: when it is detected that the first data line and the second data line at the second end are short-circuited, the data transmitted by any one of the first data line and the second data line at the second end is used as valid data for single-ended communication with the controller.

[0102] If each driver chip in the driver chipset is configured to transmit data unidirectionally, the controller transmits a preset level signal on the first data line. In one embodiment, the driver chip implementing the communication method based on two-wire differential is the first driver chip in the driver chipset. The communication method based on two-wire differential may also include: when it is detected that the first data line at the first end transmits a preset level signal, the data transmitted by the second data line at the first end is used as valid data for single-ended communication with the controller.

[0103] If each driver chip in the driver chipset is configured to transmit data unidirectionally, in one embodiment, the driver chip implementing the communication method based on two-wire differential is the last driver chip in the driver chipset, and the communication method based on two-wire differential may also include: when it is detected that the first data line at the first end transmits a preset level signal, the data transmitted by the second data line at the first end is used as valid data for single-ended communication between the controller and the first driver chip.

[0104] In one embodiment, the controller includes a standard differential communication interface, and the controller accesses the first data line and the second data line through the standard differential communication interface to connect to the first driver chip of the driver chipset through the first data line and the second data line. If the driver chip implementing the communication method based on two-wire differential is the first driver chip, the communication method based on two-wire differential may also include: differential communication based on the controller, receiving the differential signal of the target data sent by the controller through the first data line and the second data line.

[0105] In one embodiment, each driver chip is configured with corresponding identification information; the controller is configured to send data to or obtain data from any driver chip based on the identification information corresponding to the driver chip. The communication method based on two-wire differential may also include: when receiving data, determining whether the identification information of the data matches its own identification information, and forwarding the data to the next driver chip if there is no match.

[0106] In one embodiment, the communication method based on two-wire differential may further include: when it is determined that new data needs to be received within a preset period, sending the currently received data to the next driver chip.

[0107] In one embodiment, the driver chip is configured with a preset clock frequency that is the same as that of the controller, and the differential communication with the subsequent driver chip may include: performing differential communication with the subsequent driver chip based on the preset clock frequency.

[0108] In one embodiment, based on the differential communication with the subsequent driver chip, it may include: sending a preset clock frequency signal to the subsequent driver chip; and performing differential communication with the subsequent driver chip based on the preset clock frequency signal.

[0109] In one embodiment, the controller and each driver chip configure clock information in the transmitted data. The driver chip includes a phase-locked loop. Based on differential communication with the subsequent driver chip, it can include: determining the clock information in the received data based on the phase-locked loop; and controlling the differential communication with the subsequent driver chip based on the clock information.

[0110] It can be understood that the content realized by the two-wire differential communication method is the same as the function realized by the aforementioned optical driving circuit. For details, please refer to the aforementioned optical driving circuit, which will not be elaborated here.

[0111] Based on the same inventive concept, the present application also provides a backlight module, see Figure 7 , Figure 7 This is a schematic diagram of a backlight module provided in an embodiment of the present application. The backlight module includes a plurality of light sources 130 and the light driving circuit provided in the above embodiments, and each light source 130 is respectively connected to each driving chip 121 in the light driving circuit.

[0112] In the backlight module, each light source 130 is connected to each driving chip 121 in the light driving circuit, and each light source 130 connection channel of each driving chip 121 can be connected to one or more light sources 130 .

[0113] Each driver chip 121 can control the light source 130 to which it is connected according to the dimming data output by the controller 110 .

[0114] Furthermore, each driver chip 121 can detect whether the connected light source 130 is faulty, and in the event of a fault, actively generate fault information and transmit it to the controller 110 .

[0115] The light driving circuit can refer to the above-mentioned embodiment, which will not be described in detail here. The light source 130 can be an LED or other light emitting device.

[0116] Based on the same inventive concept, the embodiment of the present application further provides a display, which may include a display panel and a backlight module as provided in the above embodiment. The display may also have other structures, which may be specifically referred to in the prior art and will not be elaborated here.

[0117] Based on the same inventive concept, an embodiment of the present application further provides an electronic device, which includes the display provided in the above embodiment.

[0118] In the embodiments of the present application, the electronic device may be a discrete device, for example, the electronic device may be a computer including a host and a display. The electronic device may also be an integrated device, for example, the electronic device may be a mobile phone, a tablet computer, a television, or other electronic device in which a processor and a display are integrated in the same housing. This is not limited here.

[0119] The technical features of the above embodiments can be freely combined without conflict, and the embodiments obtained by the combination are included in the protection scope of this application.

[0120] The above detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0121] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0122] In the description of this application, it is also necessary to explain that, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0123] The above description is only an embodiment of the present application and is not intended to limit the protection scope of the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A light driving circuit, characterized in that: include: Controller; At least one driving chipset, the driving chipset comprising a plurality of driving chips connected in series, and each two adjacent driving chips are connected via a first data line and a second data line; the first driving chip in the driving chipset is connected to the controller; A differential signal of data is transmitted between each two adjacent driving chips through the first data line and the second data line to perform differential communication; The first driver chip of the driver chipset is connected to the controller via the first data line and the second data line; the controller performs single-ended communication with the first driver chip based on one of the first data line and the second data line; Alternatively, the controller includes a standard differential communication interface, and the controller accesses the first data line and the second data line through the standard differential communication interface, so as to be connected to a first driver chip of the driver chipset through the first data line and the second data line.

2. The optical drive circuit according to claim 1, characterized in that: Each of the driving chips comprises a first end, wherein the first end is an end for receiving instructions issued by the controller; The first end of the first driver chip is connected to the controller through the first data line and the second data line; and the first data line and the second data line at the first end of the first driver chip are short-circuited; The first driver chip is configured to: when detecting that the first data line and the second data line at the first end are short-circuited, use the data transmitted by any one of the first data line and the second data line at the first end as valid data to perform single-ended communication between the controller and the first driver chip.

3. The optical drive circuit according to claim 2, characterized in that: Each of the driving chips in the driving chipset is configured to transmit data unidirectionally; Each of the driving chips comprises a second end; the last driving chip in the driving chipset is connected to the controller at the second end through the short-circuited first data line and the second data line; The last driver chip is configured to: when it is detected that the first data line and the second data line at the second end are short-circuited, use the data transmitted by any one of the first data line and the second data line at the second end as valid data to perform single-ended communication between the controller and the last driver chip.

4. The optical drive circuit according to claim 1, characterized in that: Each of the driving chips comprises a first end, wherein the first end is an end for receiving instructions issued by the controller; The first data line at the first end of the first driver chip is configured to transmit a preset level signal; The first driver chip is configured to: when detecting that the first data line at the first end transmits the preset level signal, use the data transmitted by the second data line at the first end as valid data to perform single-ended communication between the controller and the first driver chip.

5. The optical drive circuit according to claim 4, characterized in that: Each of the driving chips in the driving chipset is configured to transmit data unidirectionally; Each of the driving chips comprises a second end; the first data line of the second end of the last driving chip in the driving chip group is configured to transmit the preset level signal; The driver chip is configured to: when detecting that the first data line at the second end transmits the preset level signal, use the data transmitted by the second data line at the second end as valid data to perform single-ended communication between the controller and the last driver chip.

6. The optical drive circuit according to claim 1, characterized in that: Each of the driving chips is configured with corresponding identification information; The controller is configured to send data to or obtain data from any one of the driver chips based on identification information corresponding to the driver chip.

7. The optical drive circuit according to claim 1, characterized in that: The last driver chip in the driver chipset is connected to the controller, and each driver chip in the driver chipset is configured to transmit data unidirectionally; Each of the driver chips is configured to: send currently received data to the next driver chip when new data needs to be received; The controller is configured as follows: when the controller needs to send data to the Nth driver chip in the driver chip group, the controller sequentially sends data required by the Nth driver chip to data required by the first driver chip in each cycle, so that each driver chip sequentially sends data not required by itself to the next driver chip until each driver chip obtains the data required by itself; When the controller needs to obtain the readback data of each driver chip in the driver chipset, each driver chip in the driver chipset sends the readback data it needs to feedback to the next driver chip in turn, and the controller obtains the readback data fed back by the last driver chip to the readback data fed back by the first driver chip in turn from the last driver chip in each cycle.

8. The optical drive circuit according to claim 1, characterized in that: Each of the driving chips in the driving chipset is configured to transmit data bidirectionally; Each of the driver chips is configured to: send currently received data to the next driver chip when new data needs to be received; The controller is configured as follows: when the controller needs to send data to the Nth driver chip in the driver chip group, the controller sequentially sends data required by the Nth driver chip to data required by the first driver chip in each cycle, so that each driver chip sequentially sends data not required by itself to the next driver chip until each driver chip obtains the data required by itself; When the controller needs to obtain the readback data of each driver chip in the driver chipset, each driver chip in the driver chipset sends the readback data it needs to feedback to the previous driver chip in turn, and the controller obtains the readback data fed back by the first driver chip to the readback data fed back by the last driver chip in turn in each cycle.

9. The optical drive circuit according to any one of claims 1 to 8, characterized in that: The controller and each of the driver chips are configured with a preset clock frequency; When data is transmitted between every two adjacent driver chips and between the controller and the first driver chip, the data transmission is controlled based on the preset clock frequency.

10. The optical drive circuit according to any one of claims 1 to 8, characterized in that: Between each two adjacent driver chips, and between the controller and the first driver chip, before transmitting data, the sending device first sends a preset clock frequency signal; The receiving device determines a preset clock frequency for data transmission between the receiving device and the sending device based on the preset clock frequency signal, so that the sending device and the receiving device control data transmission based on the preset clock frequency.

11. The optical drive circuit according to any one of claims 1 to 8, characterized in that: The controller and each of the driving chips configure clock information in the transmitted data; Each of the driving chips comprises a phase-locked loop. The driving chip is configured to determine the clock information from the transmitted data based on the phase-locked loop when transmitting data, so as to control the data transmission based on the clock information.

12. A communication method based on two-wire differential, characterized in that: Applied to any one of the driver chips in the optical driver circuit according to any one of claims 1 to 11, the communication method based on two-wire differential includes: Obtain target data to be sent to the next driver chip; Based on the differential communication with the subsequent driving chip, a differential signal of the target data is sent to the subsequent driving chip through the first data line and the second data line.

13. A backlight module, characterized in that: include: A plurality of light sources and a light driving circuit as claimed in any one of claims 1 to 11; Each of the light sources is connected to each of the driving chips in the light driving circuit respectively.

14. A display, characterized in that: include: The backlight module as claimed in claim 13.

15. An electronic device, characterized in that: Comprising a display as claimed in claim 14.

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