A virtual impedance boundary design method for virtual synchronous generators in grid-connected mode

Abstract

The present invention relates to the field of electric power technology, and specifically discloses a method for designing the virtual impedance boundary of a virtual synchronous machine in a grid-connected mode. In the grid-connected mode, the present application analyzes the influence of the output impedance of the VSG on the power transmission capability, the phase margin of the power loop, the active and reactive power coupling, and the bandwidth of the inner and outer loops, establishes an impedance model in the grid-connected mode, derives the quantitative design formula of the impedance boundary under different constraints, and then draws the output impedance design boundary diagram of the VSG. Combined with the above-mentioned impedance boundary conditions and comprehensive analysis of specific working conditions, a reasonable and intuitive virtual impedance design value range that meets different control performances can be obtained. The output impedance boundary proposed in the present application can improve the active and reactive control performance of the VSG system, the accuracy of the port voltage, and the stability of the system, and provides ideas for the virtual impedance design of VSG in engineering applications.

Description

Technical Field

[0001] The present invention relates to the field of electric power technology, and in particular to a method for designing a virtual impedance boundary of a virtual synchronous machine in a grid-connected mode. Background Art

[0002] In actual operation, distributed power sources controlled by virtual synchronous generators (VSGs) can present a range of problems. For example, non-inductive line impedance can cause power coupling, impacting power control accuracy and even leading to system instability. When multiple generators are connected in parallel, line impedance mismatch can lead to severe power imbalance. The output impedance amplitude and resistance-to-inductance ratio can affect power transmission efficiency and dynamic response speed. These issues are closely related to the VSG's output impedance.

[0003] Virtual impedance control technology can alter the output impedance characteristics of a virtual synchronous machine, flexibly designing the system impedance to be inductive, resistive-inductive, resistive, or even capacitive. This effectively addresses several of the aforementioned issues, and its greatest advantage lies in its simplicity, which lends itself to broad application prospects. Therefore, the proper design of the virtual impedance boundary is crucial for ensuring the system's operational characteristics. Summary of the Invention

[0004] The purpose of the present invention is to provide a virtual impedance boundary design method for a virtual synchronous machine in a grid-connected mode, so as to provide ideas for the virtual impedance design of VSG in engineering applications.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] A virtual impedance boundary design method for a virtual synchronous generator in grid-connected mode is proposed. The active power and reactive power transmitted between two voltage sources in grid-connected mode can be expressed by the following mathematical expressions:

[0007]

[0008] Where: E and U are the effective values ​​of the virtual synchronous machine output voltage and the PCC point voltage, respectively; |Z| is the impedance amplitude between the voltages; the impedance angle is θ = arctan(R / X); and δ is the power angle.

[0009] When sin(δ+θ)=1, the maximum active power output is:

[0010]

[0011] The maximum active power output capability of VSG is P max_c , then P should be satisfied max >P max_c ; After substituting formula (3), we can get the output impedance modulus that must satisfy the following relationship:

[0012]

[0013] Take the power angle margin as δ c , when the output impedance angle is θ, the maximum allowable steady-state power angle changes from π / 2-θ to:

[0014]

[0015] The maximum active power that the power supply can stably output is the maximum steady-state power angle δ s，c The mathematical expression of the active power value corresponding to the location is:

[0016]

[0017] Assume that the maximum active power that VSG can stably output is P max , the following constraints should be met:

[0018]

[0019] Furthermore, it can be deduced that the impedance should satisfy the following relationship:

[0020]

[0021] Preferably, G c_δP (s) and G c_EQ (s) represent the equivalent open-loop transfer functions of the active power controller and reactive power controller respectively:

[0022] G c_δP (s)=1 / [s(J P s+D p )],G c_EQ (s)=1 / k Q (9)

[0023] Among them, D P =k P +D,J P =dω ref , J is the inertia, ω ref is the rated frequency, k P and k Q is the power droop coefficient, D is the damping, and s is the differential factor in Laplace transform;

[0024] G Pδ (s), G PE (s), G Qδ (s) and G QE (s) are the gains during power transmission. When the dynamic process of the filter inductor and the switching action of the VSC are ignored, there exists:

[0025]

[0026] Where, E o is the rated value of the virtual internal potential, δ o is the rated value of the power angle;

[0027] Combining the closed-loop transfer function of the active power control loop in the dynamic coupling process, the following formula can be derived:

[0028]

[0029] Where, P ref is the active power instruction, P is the output active power;

[0030] The corresponding open-loop transfer function is:

[0031]

[0032] Let |G P_OL (jω c )|=1, solving for the cutoff frequency is:

[0033]

[0034] Then, the calculation expression of phase margin can be obtained:

[0035]

[0036] Set the lower bound of the phase margin to γ c , that is, the phase margin of the system needs to satisfy the constraint γ>γ c , substituting into the above formula we can get:

[0037]

[0038] Substituting the cutoff frequency calculation formula (13) into formula (15), the constraints that the system output impedance must meet to ensure sufficient phase margin can be obtained after solving the equation:

[0039]

[0040] Where: A is an intermediate variable, the specific

[0041] Preferably, the control of the active control loop is coupled to the reactive control loop, and the resulting reactive power error is:

[0042]

[0043] When s approaches 0, the reactive steady-state error is:

[0044]

[0045] Here we only measure the size of the error, not the sign of the error, so the absolute value is:

[0046]

[0047] Set the reactive error boundary as:

[0048]

[0049] Where, e Q is the upper limit of error;

[0050] Then the impedance boundary condition can be obtained as:

[0051]

[0052] Where P0 is the rated value of active power.

[0053] Preferably, the bandwidth of the power loop is 1 / 5 of the voltage and current inner loop, and the bandwidth of the voltage and current control inner loop is ω inner , then the constraints should be satisfied:

[0054]

[0055] According to formula (13), the bandwidth of the active power control loop is derived as:

[0056]

[0057] Substitute it into the bandwidth constraint and solve it through transformation to obtain the impedance constraint:

[0058]

[0059] Where: B is an intermediate variable, specifically

[0060] The beneficial technical effects of this application mainly include:

[0061] (1) This application analyzes the impact of the output impedance of the VSG on the power transmission capability, the phase margin of the power loop, the active and reactive power coupling, and the bandwidth of the inner and outer loops in the grid-connected mode, and establishes an impedance model in the grid-connected mode. Combining the above-mentioned impedance boundary conditions and analyzing the specific working conditions, a reasonable and intuitive virtual impedance design range that meets different control performances can be obtained;

[0062] (2) The virtual impedance design in VSG control is studied. The requirements of the output impedance of VSG under different constraints in the grid-connected mode are comprehensively considered, and the output impedance boundaries that meet different constraints are given, which provides ideas for the virtual impedance design of VSG. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0064] Figure 1 This is an equivalent circuit diagram of a VSG incorporated into the AC busbar of a power grid provided by an embodiment of the present application;

[0065] Figure 2 This is a general coupling model of a grid-connected VSG with amplitude and phase control provided in an embodiment of the present application;

[0066] Figure 3 This is an impedance boundary diagram in a grid-connected mode provided in an embodiment of the present application. DETAILED DESCRIPTION

[0067] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0068] The flowcharts shown in the accompanying drawings are for illustrative purposes only and do not necessarily include all contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may be decomposed, combined, or partially merged, so the actual execution order may vary depending on the actual situation.

[0069] In the description of this application, the terms "first / second" are only used to distinguish similar objects and do not represent a specific order for the objects. It can be understood that "first / second" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described here can be implemented in an order other than that illustrated or described here.

[0070] It should be understood that the orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings. These orientation terms are only used to facilitate the description of this application and simplify the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, they should not be understood as limiting this application.

[0071] Figure 1 The figure shows the equivalent circuit diagram of a VSG connected to the AC busbar of a power grid. The VSG is equivalent to an ideal voltage source and connected to the power grid through the output impedance.

[0072] Considering that this is a three-phase system, the active and reactive powers transferred between the two voltage sources can be expressed mathematically as follows:

[0073]

[0074] Where E and U are the effective values ​​of the virtual synchronous machine output voltage and the PCC voltage, respectively, |Z| is the impedance amplitude between the voltages, the impedance angle is θ = arctan(R / X), and δ is the power angle.

[0075] In grid-connected mode, the specific impedance value range analysis will be conducted from four aspects: VSG power transmission capability, phase margin, power coupling, and inner and outer loop bandwidth constraints.

[0076] (1) Analysis of power transmission capacity boundary conditions

[0077] As a distributed power source, the power transfer capability of a virtual synchronous generator is its most fundamental performance metric. This power transfer capability explores how to optimize the design of virtual impedance within the virtual synchronous generator control algorithm to fully utilize the converter's inherent power transfer capacity.

[0078] The power transfer capability discussed here focuses on optimizing the design of the virtual impedance within the virtual synchronous generator control algorithm to fully utilize the converter's inherent power transfer capacity. First, it should be noted that the converter's actual power output capability is determined by the port voltage and the AC-side connection impedance (including filter and line impedance), representing the device's inherent power transfer capability. However, for grid-connected converter systems employing VSG control algorithms, since output power is controlled by controlling the frequency (phase) and amplitude of its virtual internal potential, the VSG's power output capability is determined by the line impedance between the virtual internal potential and the PCC. The output impedance between the VSG's virtual internal potential and the grid voltage (which can be considered equal to the complex sum of the virtual impedance and the line impedance) significantly impacts its power transfer capability and control performance. The power transfer capability boundary condition considers the uncontrolled power output capability of the source itself, which is affected by the output impedance and is independent of other control parameters, thus representing its most fundamental constraint.

[0079] Assuming the virtual impedance is Z, the transmission equation of active power is:

[0080]

[0081] Where: θ = arctan(R / X), called the impedance angle; δ is the power angle.

[0082] Obviously, if the impedance ratio is constant, when sin(δ+θ)=1, that is, at the theoretical maximum power angle δ max =π / 2-θ, the theoretical maximum value of active power output is:

[0083]

[0084] Equation (3) gives the maximum active power output capability when the virtual impedance is |Z|∠θ. It should be noted that this is not the active power output capability of the converter hardware itself, but rather the theoretical value of the maximum active power that the VSG can output when using the VSG control strategy to prevent the control strategy from becoming unstable. In practice, sufficient power angle margin should be maintained, so the actual active power output capability is even smaller than this value.

[0085] According to formula (3), the maximum value of the output active power is related to the impedance and the amplitude of the virtual internal potential. Although in theory, the active power output can be increased by controlling the infinite increase of the virtual internal potential E. However, as E increases, the reactive power will increase significantly. As a power generation device, VSG mainly outputs active power. In order to respond to the needs of the power grid, it is sufficient to maintain the ability to output reactive power at a certain time. Therefore, the active power output cannot be increased by increasing E. Therefore, when calculating this constraint, E can be taken as the rated value during normal operation. When E is fixed, P can be obtained. max Constrained by the impedance Z. Assume that the maximum active power output capability of the VSG is P max_c , then P should be satisfied max >P max_c Substituting equation (3) into the equation, we can get the output impedance modulus that must satisfy the following relationship:

[0086]

[0087] From formula (4), we can see that: ① Under the constraint of the theoretical maximum active power output capacity, the impedance modulus is negatively correlated with the impedance ratio R / X, which indicates that the resistance component is not conducive to the output of active power; ② The higher the maximum active power output capacity requirement, the more the impedance boundary moves downward, and the smaller the range of impedance modulus values.

[0088] Constraint (4) gives the theoretical maximum active power output capability. At this point, the system is at the critical static stability point. If the system stabilizes at this point and a disturbance occurs, the system may become unstable. In practice, to ensure that the system can continue to operate stably, a certain power angle margin must be maintained.

[0089] Next, we will discuss the ability of the VSG to stably output active power when the power supply has a certain power angle margin. Assume that the power angle margin is δ c , when the output impedance angle is θ, the maximum allowable steady-state power angle changes from π / 2-θ to:

[0090]

[0091] From (5), we can see that the maximum allowable steady-state power angle δ s，c Affected by the system impedance angle (also known as impedance ratio), the larger the impedance angle, the larger the maximum steady-state power angle δ s，c The smaller the power angle margin is, the smaller the c Under the premise of the smaller, the maximum active power that the system can output stably is also smaller.

[0092] At this time, the maximum active power that the power supply can stably output is the maximum steady-state power angle δ s，c The mathematical expression of the active power value corresponding to the location is:

[0093]

[0094] Assume that the maximum active power that VSG can stably output is P max , the following constraints should be met:

[0095]

[0096] Furthermore, it can be deduced that the impedance should satisfy the following relationship:

[0097]

[0098] From equation (8), we can draw the following conclusions: ① When the impedance ratio R / X is larger, the upper limit of the impedance modulus is smaller; ② The power angle margin δ c The smaller it is, the larger the |Z| allowed under a certain impedance ratio is, and the smaller the impedance ratio allowed under a certain |Z| is.

[0099] (2) Phase margin constraints

[0100] In order to ensure the stability of the system, the phase margin of the active power closed-loop transfer function can be used as an indicator to measure it. Figure 2This is a general coupling model of a grid-connected VSG with amplitude and phase control provided by the embodiment of the present application. The VSG power control loop can be equivalent to the following: Figure 2 The control block diagram shown. c_δP (s) and G c_EQ (s) represent the equivalent open-loop transfer functions of the active power controller and reactive power controller respectively:

[0101] G c_δP (s)=1 / [s(J P s+D p )],G c_EQ (s)=1 / k Q (9)

[0102] Among them, D P =k P +D,J P =dω ref , J is the inertia, ω ref is the rated frequency, k P and k Q is the power droop coefficient, D is the damping, and s is the differential factor in Laplace transform.

[0103] G Pδ (s), G PE (s), G Qδ (s) and G QE (s) are the gains during power transmission. When the dynamic process of the filter inductor and the switching action of the VSC are ignored, there exists:

[0104]

[0105] Where, E o is the rated value of the virtual internal potential, δ o is the rated value of the power angle.

[0106] In order to make the modeling and analysis of the system more accurate, the closed-loop transfer function of the active power control loop considering the dynamic coupling process is adopted here. Figure 2 The following formula can be deduced:

[0107]

[0108] Where, P ref is the active power command, and P is the output active power.

[0109] The corresponding open-loop transfer function is:

[0110]

[0111] Let |G P_OL (jω c)|=1, solving for the cutoff frequency is:

[0112]

[0113] Then, the calculation expression of phase margin can be obtained:

[0114]

[0115] Set the lower limit of the phase margin to γ c , that is, the phase margin of the system needs to satisfy the constraint γ>γ c , substituting into the above formula we can get:

[0116]

[0117] Substituting the cutoff frequency calculation formula (13) into formula (15), the constraints that the system output impedance must meet to ensure sufficient phase margin can be obtained after solving the equation:

[0118]

[0119] Where: A is an intermediate variable, the specific

[0120] (3) Power coupling constraints

[0121] Because the reactive power droop control loop lacks an integrator similar to that in the active power control loop, this coupling effect can produce static errors in reactive power control, which in turn affects the system's voltage regulation and reactive power sharing performance. Therefore, it's necessary to consider the impact of power coupling on reactive power control errors and limit them to a tolerable range. This constraint, which is essentially caused by power coupling, is the underlying consideration.

[0122] The control of the active power control loop is coupled to the reactive power control loop, and the reactive power error caused by Figure 2 Deduced:

[0123]

[0124] When s approaches 0, the reactive steady-state error is:

[0125]

[0126] Here we only measure the size of the error, not the sign of the error, so the absolute value is:

[0127]

[0128] According to formula (19), it can be seen that the influence of the impedance modulus and impedance ratio on the reactive power error is as follows: the error of reactive power is positively correlated with the impedance modulus and impedance ratio, that is, the larger the impedance modulus or the impedance ratio, the greater the reactive power error.

[0129] In order to ensure that the reactive error is limited to a reasonable range, the boundary of the reactive error is set as:

[0130]

[0131] Where, e Q is the upper limit of error.

[0132] Then the impedance boundary condition can be obtained as:

[0133]

[0134] Where P0 is the rated value of active power.

[0135] (4) Inner and outer ring bandwidth constraints

[0136] The inner loop bandwidth refers to the bandwidth of the voltage-current dual closed loop, and the outer loop bandwidth refers to the bandwidth of the power control loop. From the power loop transfer function (11), it can be seen that the outer loop bandwidth is related to the output impedance. This constraint considers the issue of ensuring that the power loop and the inner loop do not overlap in bandwidth. Generally, for VSGs, the power loop is relatively slow and the inner loop bandwidth is very wide, so this constraint is generally met.

[0137] In order to ensure that the performance of the inner loop control does not affect the control of the power outer loop, it is necessary to ensure that the bandwidth of the voltage and current control inner loop in the control system is fast enough compared to the power control outer loop. Generally, the bandwidth of the power loop is 1 / 5 of the voltage and current inner loop. Assume that the bandwidth of the voltage and current control inner loop is ω inner , then the constraints should be satisfied:

[0138]

[0139] According to formula (13), the bandwidth of the active power control loop is derived as:

[0140]

[0141] Substitute it into the bandwidth constraint and solve it through transformation to obtain the impedance constraint:

[0142]

[0143] Where: B is an intermediate variable, specifically

[0144] According to the above four boundary conditions, we can get Figure 3 The impedance boundary diagram for grid-connected mode is shown in Figure 1. The vertical axis represents the impedance magnitude, and the horizontal axis represents the impedance-to-inductance ratio. The recommended region that meets the requirements is the shaded area in the lower left corner. Phase margin and power coupling are the primary constraints, while power transfer and the inner and outer loop bandwidths are less dynamic constraints.

[0145] The virtual impedance design in VSG control is studied, and the requirements of different constraints on the output impedance of VSG in the grid-connected mode are comprehensively considered. The output impedance boundary that meets different constraints is given, which provides ideas for the virtual impedance design of VSG. Specifically, in the grid-connected mode, the influence of the output impedance of VSG on the power transmission capability, the phase margin of the power loop, the active and reactive power coupling, and the bandwidth of the inner and outer loops are analyzed, an impedance model in the grid-connected mode is established, and the quantitative design formula of the impedance boundary under different constraints is derived, and then the output impedance design boundary diagram of VSG is drawn. Combined with the above-mentioned impedance boundary conditions and combined with the analysis of specific working conditions, a reasonable and intuitive virtual impedance design value range that meets different control performance can be obtained. The output impedance boundary proposed in this application can improve the active and reactive control performance of the VSG system, the accuracy of the port voltage, and the stability of the system, and provides ideas for the virtual impedance design of VSG in engineering applications.

[0146] It will be understood by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In a hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable storage medium, which may include a computer-readable storage medium (or a non-transitory medium) and a communication medium (or a temporary medium).

[0147] The above is merely a detailed description of the present invention to enable those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined in this application may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but rather should conform to the widest scope consistent with the principles and novel features claimed in this application.

Claims

1. A method for designing a virtual impedance boundary of a virtual synchronous machine in a grid-connected mode, characterized by: Calculate the impedance magnitude |Z| between the output voltage of the virtual synchronous machine and the voltage at the PCC point: E and U are the effective values ​​of the output voltage of the virtual synchronous machine and the voltage at the PCC point, respectively. The impedance angle is θ = arctan(R / X), and δ is the power angle. P max is the maximum value of active power output, δ s,c is the maximum value of active power output; G c_δP (s) and G c_EQ (s) represent the equivalent open-loop transfer functions of the active power controller and reactive power controller respectively: G c_δP (s)=1 / [s(J P s+D p )],G c_EQ (s)=1 / k Q Among them, D P =k P +D,J P =Jω ref , J is the inertia, ω ref is the rated frequency, k P and k Q is the power droop coefficient, D is the damping, and s is the differential factor in Laplace transform; G Pδ (s), G PE (s), G Qδ (s) and G QE (s) are the gains during power transmission. When the dynamic process of the filter inductor and the switching action of the VSC are ignored, there exists: Where, E o is the rated value of the virtual internal potential, δ o is the rated value of the power angle; Combining the closed-loop transfer function of the active power control loop in the dynamic coupling process, the following formula can be derived: Where, P ref is the active power instruction, P is the output active power; The corresponding open-loop transfer function is: Let |G P_OL (jω c )|=1, solving for the cutoff frequency is: Then, the calculation expression of phase margin can be obtained: Set the lower limit of the phase margin to γ c , that is, the phase margin of the system needs to satisfy the constraint γ>γ c , substituting into the above formula we can get: Substituting the cutoff frequency calculation formula into the equation, we can obtain the constraints that the system output impedance must meet to ensure sufficient phase margin: Where: A is an intermediate variable, the specific Determine the impedance boundary conditions: Where, e Q is the upper limit of reactive power error; P0 is the rated value of active power; Determine the impedance constraints: Where: B is an intermediate variable,

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